Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/kaber/nf-2.6
[linux-2.6] / drivers / mtd / onenand / onenand_base.c
1 /*
2  *  linux/drivers/mtd/onenand/onenand_base.c
3  *
4  *  Copyright (C) 2005-2007 Samsung Electronics
5  *  Kyungmin Park <kyungmin.park@samsung.com>
6  *
7  *  Credits:
8  *      Adrian Hunter <ext-adrian.hunter@nokia.com>:
9  *      auto-placement support, read-while load support, various fixes
10  *      Copyright (C) Nokia Corporation, 2007
11  *
12  * This program is free software; you can redistribute it and/or modify
13  * it under the terms of the GNU General Public License version 2 as
14  * published by the Free Software Foundation.
15  */
16
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/sched.h>
21 #include <linux/delay.h>
22 #include <linux/interrupt.h>
23 #include <linux/jiffies.h>
24 #include <linux/mtd/mtd.h>
25 #include <linux/mtd/onenand.h>
26 #include <linux/mtd/partitions.h>
27
28 #include <asm/io.h>
29
30 /**
31  * onenand_oob_64 - oob info for large (2KB) page
32  */
33 static struct nand_ecclayout onenand_oob_64 = {
34         .eccbytes       = 20,
35         .eccpos         = {
36                 8, 9, 10, 11, 12,
37                 24, 25, 26, 27, 28,
38                 40, 41, 42, 43, 44,
39                 56, 57, 58, 59, 60,
40                 },
41         .oobfree        = {
42                 {2, 3}, {14, 2}, {18, 3}, {30, 2},
43                 {34, 3}, {46, 2}, {50, 3}, {62, 2}
44         }
45 };
46
47 /**
48  * onenand_oob_32 - oob info for middle (1KB) page
49  */
50 static struct nand_ecclayout onenand_oob_32 = {
51         .eccbytes       = 10,
52         .eccpos         = {
53                 8, 9, 10, 11, 12,
54                 24, 25, 26, 27, 28,
55                 },
56         .oobfree        = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
57 };
58
59 static const unsigned char ffchars[] = {
60         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
61         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
62         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
63         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
64         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
65         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
66         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
67         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
68 };
69
70 /**
71  * onenand_readw - [OneNAND Interface] Read OneNAND register
72  * @param addr          address to read
73  *
74  * Read OneNAND register
75  */
76 static unsigned short onenand_readw(void __iomem *addr)
77 {
78         return readw(addr);
79 }
80
81 /**
82  * onenand_writew - [OneNAND Interface] Write OneNAND register with value
83  * @param value         value to write
84  * @param addr          address to write
85  *
86  * Write OneNAND register with value
87  */
88 static void onenand_writew(unsigned short value, void __iomem *addr)
89 {
90         writew(value, addr);
91 }
92
93 /**
94  * onenand_block_address - [DEFAULT] Get block address
95  * @param this          onenand chip data structure
96  * @param block         the block
97  * @return              translated block address if DDP, otherwise same
98  *
99  * Setup Start Address 1 Register (F100h)
100  */
101 static int onenand_block_address(struct onenand_chip *this, int block)
102 {
103         /* Device Flash Core select, NAND Flash Block Address */
104         if (block & this->density_mask)
105                 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
106
107         return block;
108 }
109
110 /**
111  * onenand_bufferram_address - [DEFAULT] Get bufferram address
112  * @param this          onenand chip data structure
113  * @param block         the block
114  * @return              set DBS value if DDP, otherwise 0
115  *
116  * Setup Start Address 2 Register (F101h) for DDP
117  */
118 static int onenand_bufferram_address(struct onenand_chip *this, int block)
119 {
120         /* Device BufferRAM Select */
121         if (block & this->density_mask)
122                 return ONENAND_DDP_CHIP1;
123
124         return ONENAND_DDP_CHIP0;
125 }
126
127 /**
128  * onenand_page_address - [DEFAULT] Get page address
129  * @param page          the page address
130  * @param sector        the sector address
131  * @return              combined page and sector address
132  *
133  * Setup Start Address 8 Register (F107h)
134  */
135 static int onenand_page_address(int page, int sector)
136 {
137         /* Flash Page Address, Flash Sector Address */
138         int fpa, fsa;
139
140         fpa = page & ONENAND_FPA_MASK;
141         fsa = sector & ONENAND_FSA_MASK;
142
143         return ((fpa << ONENAND_FPA_SHIFT) | fsa);
144 }
145
146 /**
147  * onenand_buffer_address - [DEFAULT] Get buffer address
148  * @param dataram1      DataRAM index
149  * @param sectors       the sector address
150  * @param count         the number of sectors
151  * @return              the start buffer value
152  *
153  * Setup Start Buffer Register (F200h)
154  */
155 static int onenand_buffer_address(int dataram1, int sectors, int count)
156 {
157         int bsa, bsc;
158
159         /* BufferRAM Sector Address */
160         bsa = sectors & ONENAND_BSA_MASK;
161
162         if (dataram1)
163                 bsa |= ONENAND_BSA_DATARAM1;    /* DataRAM1 */
164         else
165                 bsa |= ONENAND_BSA_DATARAM0;    /* DataRAM0 */
166
167         /* BufferRAM Sector Count */
168         bsc = count & ONENAND_BSC_MASK;
169
170         return ((bsa << ONENAND_BSA_SHIFT) | bsc);
171 }
172
173 /**
174  * onenand_get_density - [DEFAULT] Get OneNAND density
175  * @param dev_id        OneNAND device ID
176  *
177  * Get OneNAND density from device ID
178  */
179 static inline int onenand_get_density(int dev_id)
180 {
181         int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
182         return (density & ONENAND_DEVICE_DENSITY_MASK);
183 }
184
185 /**
186  * onenand_command - [DEFAULT] Send command to OneNAND device
187  * @param mtd           MTD device structure
188  * @param cmd           the command to be sent
189  * @param addr          offset to read from or write to
190  * @param len           number of bytes to read or write
191  *
192  * Send command to OneNAND device. This function is used for middle/large page
193  * devices (1KB/2KB Bytes per page)
194  */
195 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
196 {
197         struct onenand_chip *this = mtd->priv;
198         int value, block, page;
199
200         /* Address translation */
201         switch (cmd) {
202         case ONENAND_CMD_UNLOCK:
203         case ONENAND_CMD_LOCK:
204         case ONENAND_CMD_LOCK_TIGHT:
205         case ONENAND_CMD_UNLOCK_ALL:
206                 block = -1;
207                 page = -1;
208                 break;
209
210         case ONENAND_CMD_ERASE:
211         case ONENAND_CMD_BUFFERRAM:
212         case ONENAND_CMD_OTP_ACCESS:
213                 block = (int) (addr >> this->erase_shift);
214                 page = -1;
215                 break;
216
217         default:
218                 block = (int) (addr >> this->erase_shift);
219                 page = (int) (addr >> this->page_shift);
220
221                 if (ONENAND_IS_2PLANE(this)) {
222                         /* Make the even block number */
223                         block &= ~1;
224                         /* Is it the odd plane? */
225                         if (addr & this->writesize)
226                                 block++;
227                         page >>= 1;
228                 }
229                 page &= this->page_mask;
230                 break;
231         }
232
233         /* NOTE: The setting order of the registers is very important! */
234         if (cmd == ONENAND_CMD_BUFFERRAM) {
235                 /* Select DataRAM for DDP */
236                 value = onenand_bufferram_address(this, block);
237                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
238
239                 if (ONENAND_IS_2PLANE(this))
240                         /* It is always BufferRAM0 */
241                         ONENAND_SET_BUFFERRAM0(this);
242                 else
243                         /* Switch to the next data buffer */
244                         ONENAND_SET_NEXT_BUFFERRAM(this);
245
246                 return 0;
247         }
248
249         if (block != -1) {
250                 /* Write 'DFS, FBA' of Flash */
251                 value = onenand_block_address(this, block);
252                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
253
254                 /* Select DataRAM for DDP */
255                 value = onenand_bufferram_address(this, block);
256                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
257         }
258
259         if (page != -1) {
260                 /* Now we use page size operation */
261                 int sectors = 4, count = 4;
262                 int dataram;
263
264                 switch (cmd) {
265                 case ONENAND_CMD_READ:
266                 case ONENAND_CMD_READOOB:
267                         dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
268                         break;
269
270                 default:
271                         if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
272                                 cmd = ONENAND_CMD_2X_PROG;
273                         dataram = ONENAND_CURRENT_BUFFERRAM(this);
274                         break;
275                 }
276
277                 /* Write 'FPA, FSA' of Flash */
278                 value = onenand_page_address(page, sectors);
279                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
280
281                 /* Write 'BSA, BSC' of DataRAM */
282                 value = onenand_buffer_address(dataram, sectors, count);
283                 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
284         }
285
286         /* Interrupt clear */
287         this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
288
289         /* Write command */
290         this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
291
292         return 0;
293 }
294
295 /**
296  * onenand_wait - [DEFAULT] wait until the command is done
297  * @param mtd           MTD device structure
298  * @param state         state to select the max. timeout value
299  *
300  * Wait for command done. This applies to all OneNAND command
301  * Read can take up to 30us, erase up to 2ms and program up to 350us
302  * according to general OneNAND specs
303  */
304 static int onenand_wait(struct mtd_info *mtd, int state)
305 {
306         struct onenand_chip * this = mtd->priv;
307         unsigned long timeout;
308         unsigned int flags = ONENAND_INT_MASTER;
309         unsigned int interrupt = 0;
310         unsigned int ctrl;
311
312         /* The 20 msec is enough */
313         timeout = jiffies + msecs_to_jiffies(20);
314         while (time_before(jiffies, timeout)) {
315                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
316
317                 if (interrupt & flags)
318                         break;
319
320                 if (state != FL_READING)
321                         cond_resched();
322         }
323         /* To get correct interrupt status in timeout case */
324         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
325
326         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
327
328         /*
329          * In the Spec. it checks the controller status first
330          * However if you get the correct information in case of
331          * power off recovery (POR) test, it should read ECC status first
332          */
333         if (interrupt & ONENAND_INT_READ) {
334                 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
335                 if (ecc) {
336                         if (ecc & ONENAND_ECC_2BIT_ALL) {
337                                 printk(KERN_ERR "onenand_wait: ECC error = 0x%04x\n", ecc);
338                                 mtd->ecc_stats.failed++;
339                                 return -EBADMSG;
340                         } else if (ecc & ONENAND_ECC_1BIT_ALL) {
341                                 printk(KERN_INFO "onenand_wait: correctable ECC error = 0x%04x\n", ecc);
342                                 mtd->ecc_stats.corrected++;
343                         }
344                 }
345         } else if (state == FL_READING) {
346                 printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
347                 return -EIO;
348         }
349
350         /* If there's controller error, it's a real error */
351         if (ctrl & ONENAND_CTRL_ERROR) {
352                 printk(KERN_ERR "onenand_wait: controller error = 0x%04x\n",
353                         ctrl);
354                 if (ctrl & ONENAND_CTRL_LOCK)
355                         printk(KERN_ERR "onenand_wait: it's locked error.\n");
356                 return -EIO;
357         }
358
359         return 0;
360 }
361
362 /*
363  * onenand_interrupt - [DEFAULT] onenand interrupt handler
364  * @param irq           onenand interrupt number
365  * @param dev_id        interrupt data
366  *
367  * complete the work
368  */
369 static irqreturn_t onenand_interrupt(int irq, void *data)
370 {
371         struct onenand_chip *this = data;
372
373         /* To handle shared interrupt */
374         if (!this->complete.done)
375                 complete(&this->complete);
376
377         return IRQ_HANDLED;
378 }
379
380 /*
381  * onenand_interrupt_wait - [DEFAULT] wait until the command is done
382  * @param mtd           MTD device structure
383  * @param state         state to select the max. timeout value
384  *
385  * Wait for command done.
386  */
387 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
388 {
389         struct onenand_chip *this = mtd->priv;
390
391         wait_for_completion(&this->complete);
392
393         return onenand_wait(mtd, state);
394 }
395
396 /*
397  * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
398  * @param mtd           MTD device structure
399  * @param state         state to select the max. timeout value
400  *
401  * Try interrupt based wait (It is used one-time)
402  */
403 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
404 {
405         struct onenand_chip *this = mtd->priv;
406         unsigned long remain, timeout;
407
408         /* We use interrupt wait first */
409         this->wait = onenand_interrupt_wait;
410
411         timeout = msecs_to_jiffies(100);
412         remain = wait_for_completion_timeout(&this->complete, timeout);
413         if (!remain) {
414                 printk(KERN_INFO "OneNAND: There's no interrupt. "
415                                 "We use the normal wait\n");
416
417                 /* Release the irq */
418                 free_irq(this->irq, this);
419
420                 this->wait = onenand_wait;
421         }
422
423         return onenand_wait(mtd, state);
424 }
425
426 /*
427  * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
428  * @param mtd           MTD device structure
429  *
430  * There's two method to wait onenand work
431  * 1. polling - read interrupt status register
432  * 2. interrupt - use the kernel interrupt method
433  */
434 static void onenand_setup_wait(struct mtd_info *mtd)
435 {
436         struct onenand_chip *this = mtd->priv;
437         int syscfg;
438
439         init_completion(&this->complete);
440
441         if (this->irq <= 0) {
442                 this->wait = onenand_wait;
443                 return;
444         }
445
446         if (request_irq(this->irq, &onenand_interrupt,
447                                 IRQF_SHARED, "onenand", this)) {
448                 /* If we can't get irq, use the normal wait */
449                 this->wait = onenand_wait;
450                 return;
451         }
452
453         /* Enable interrupt */
454         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
455         syscfg |= ONENAND_SYS_CFG1_IOBE;
456         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
457
458         this->wait = onenand_try_interrupt_wait;
459 }
460
461 /**
462  * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
463  * @param mtd           MTD data structure
464  * @param area          BufferRAM area
465  * @return              offset given area
466  *
467  * Return BufferRAM offset given area
468  */
469 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
470 {
471         struct onenand_chip *this = mtd->priv;
472
473         if (ONENAND_CURRENT_BUFFERRAM(this)) {
474                 /* Note: the 'this->writesize' is a real page size */
475                 if (area == ONENAND_DATARAM)
476                         return this->writesize;
477                 if (area == ONENAND_SPARERAM)
478                         return mtd->oobsize;
479         }
480
481         return 0;
482 }
483
484 /**
485  * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
486  * @param mtd           MTD data structure
487  * @param area          BufferRAM area
488  * @param buffer        the databuffer to put/get data
489  * @param offset        offset to read from or write to
490  * @param count         number of bytes to read/write
491  *
492  * Read the BufferRAM area
493  */
494 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
495                 unsigned char *buffer, int offset, size_t count)
496 {
497         struct onenand_chip *this = mtd->priv;
498         void __iomem *bufferram;
499
500         bufferram = this->base + area;
501
502         bufferram += onenand_bufferram_offset(mtd, area);
503
504         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
505                 unsigned short word;
506
507                 /* Align with word(16-bit) size */
508                 count--;
509
510                 /* Read word and save byte */
511                 word = this->read_word(bufferram + offset + count);
512                 buffer[count] = (word & 0xff);
513         }
514
515         memcpy(buffer, bufferram + offset, count);
516
517         return 0;
518 }
519
520 /**
521  * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
522  * @param mtd           MTD data structure
523  * @param area          BufferRAM area
524  * @param buffer        the databuffer to put/get data
525  * @param offset        offset to read from or write to
526  * @param count         number of bytes to read/write
527  *
528  * Read the BufferRAM area with Sync. Burst Mode
529  */
530 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
531                 unsigned char *buffer, int offset, size_t count)
532 {
533         struct onenand_chip *this = mtd->priv;
534         void __iomem *bufferram;
535
536         bufferram = this->base + area;
537
538         bufferram += onenand_bufferram_offset(mtd, area);
539
540         this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
541
542         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
543                 unsigned short word;
544
545                 /* Align with word(16-bit) size */
546                 count--;
547
548                 /* Read word and save byte */
549                 word = this->read_word(bufferram + offset + count);
550                 buffer[count] = (word & 0xff);
551         }
552
553         memcpy(buffer, bufferram + offset, count);
554
555         this->mmcontrol(mtd, 0);
556
557         return 0;
558 }
559
560 /**
561  * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
562  * @param mtd           MTD data structure
563  * @param area          BufferRAM area
564  * @param buffer        the databuffer to put/get data
565  * @param offset        offset to read from or write to
566  * @param count         number of bytes to read/write
567  *
568  * Write the BufferRAM area
569  */
570 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
571                 const unsigned char *buffer, int offset, size_t count)
572 {
573         struct onenand_chip *this = mtd->priv;
574         void __iomem *bufferram;
575
576         bufferram = this->base + area;
577
578         bufferram += onenand_bufferram_offset(mtd, area);
579
580         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
581                 unsigned short word;
582                 int byte_offset;
583
584                 /* Align with word(16-bit) size */
585                 count--;
586
587                 /* Calculate byte access offset */
588                 byte_offset = offset + count;
589
590                 /* Read word and save byte */
591                 word = this->read_word(bufferram + byte_offset);
592                 word = (word & ~0xff) | buffer[count];
593                 this->write_word(word, bufferram + byte_offset);
594         }
595
596         memcpy(bufferram + offset, buffer, count);
597
598         return 0;
599 }
600
601 /**
602  * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
603  * @param mtd           MTD data structure
604  * @param addr          address to check
605  * @return              blockpage address
606  *
607  * Get blockpage address at 2x program mode
608  */
609 static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
610 {
611         struct onenand_chip *this = mtd->priv;
612         int blockpage, block, page;
613
614         /* Calculate the even block number */
615         block = (int) (addr >> this->erase_shift) & ~1;
616         /* Is it the odd plane? */
617         if (addr & this->writesize)
618                 block++;
619         page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
620         blockpage = (block << 7) | page;
621
622         return blockpage;
623 }
624
625 /**
626  * onenand_check_bufferram - [GENERIC] Check BufferRAM information
627  * @param mtd           MTD data structure
628  * @param addr          address to check
629  * @return              1 if there are valid data, otherwise 0
630  *
631  * Check bufferram if there is data we required
632  */
633 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
634 {
635         struct onenand_chip *this = mtd->priv;
636         int blockpage, found = 0;
637         unsigned int i;
638
639         if (ONENAND_IS_2PLANE(this))
640                 blockpage = onenand_get_2x_blockpage(mtd, addr);
641         else
642                 blockpage = (int) (addr >> this->page_shift);
643
644         /* Is there valid data? */
645         i = ONENAND_CURRENT_BUFFERRAM(this);
646         if (this->bufferram[i].blockpage == blockpage)
647                 found = 1;
648         else {
649                 /* Check another BufferRAM */
650                 i = ONENAND_NEXT_BUFFERRAM(this);
651                 if (this->bufferram[i].blockpage == blockpage) {
652                         ONENAND_SET_NEXT_BUFFERRAM(this);
653                         found = 1;
654                 }
655         }
656
657         if (found && ONENAND_IS_DDP(this)) {
658                 /* Select DataRAM for DDP */
659                 int block = (int) (addr >> this->erase_shift);
660                 int value = onenand_bufferram_address(this, block);
661                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
662         }
663
664         return found;
665 }
666
667 /**
668  * onenand_update_bufferram - [GENERIC] Update BufferRAM information
669  * @param mtd           MTD data structure
670  * @param addr          address to update
671  * @param valid         valid flag
672  *
673  * Update BufferRAM information
674  */
675 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
676                 int valid)
677 {
678         struct onenand_chip *this = mtd->priv;
679         int blockpage;
680         unsigned int i;
681
682         if (ONENAND_IS_2PLANE(this))
683                 blockpage = onenand_get_2x_blockpage(mtd, addr);
684         else
685                 blockpage = (int) (addr >> this->page_shift);
686
687         /* Invalidate another BufferRAM */
688         i = ONENAND_NEXT_BUFFERRAM(this);
689         if (this->bufferram[i].blockpage == blockpage)
690                 this->bufferram[i].blockpage = -1;
691
692         /* Update BufferRAM */
693         i = ONENAND_CURRENT_BUFFERRAM(this);
694         if (valid)
695                 this->bufferram[i].blockpage = blockpage;
696         else
697                 this->bufferram[i].blockpage = -1;
698 }
699
700 /**
701  * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
702  * @param mtd           MTD data structure
703  * @param addr          start address to invalidate
704  * @param len           length to invalidate
705  *
706  * Invalidate BufferRAM information
707  */
708 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
709                 unsigned int len)
710 {
711         struct onenand_chip *this = mtd->priv;
712         int i;
713         loff_t end_addr = addr + len;
714
715         /* Invalidate BufferRAM */
716         for (i = 0; i < MAX_BUFFERRAM; i++) {
717                 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
718                 if (buf_addr >= addr && buf_addr < end_addr)
719                         this->bufferram[i].blockpage = -1;
720         }
721 }
722
723 /**
724  * onenand_get_device - [GENERIC] Get chip for selected access
725  * @param mtd           MTD device structure
726  * @param new_state     the state which is requested
727  *
728  * Get the device and lock it for exclusive access
729  */
730 static int onenand_get_device(struct mtd_info *mtd, int new_state)
731 {
732         struct onenand_chip *this = mtd->priv;
733         DECLARE_WAITQUEUE(wait, current);
734
735         /*
736          * Grab the lock and see if the device is available
737          */
738         while (1) {
739                 spin_lock(&this->chip_lock);
740                 if (this->state == FL_READY) {
741                         this->state = new_state;
742                         spin_unlock(&this->chip_lock);
743                         break;
744                 }
745                 if (new_state == FL_PM_SUSPENDED) {
746                         spin_unlock(&this->chip_lock);
747                         return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
748                 }
749                 set_current_state(TASK_UNINTERRUPTIBLE);
750                 add_wait_queue(&this->wq, &wait);
751                 spin_unlock(&this->chip_lock);
752                 schedule();
753                 remove_wait_queue(&this->wq, &wait);
754         }
755
756         return 0;
757 }
758
759 /**
760  * onenand_release_device - [GENERIC] release chip
761  * @param mtd           MTD device structure
762  *
763  * Deselect, release chip lock and wake up anyone waiting on the device
764  */
765 static void onenand_release_device(struct mtd_info *mtd)
766 {
767         struct onenand_chip *this = mtd->priv;
768
769         /* Release the chip */
770         spin_lock(&this->chip_lock);
771         this->state = FL_READY;
772         wake_up(&this->wq);
773         spin_unlock(&this->chip_lock);
774 }
775
776 /**
777  * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
778  * @param mtd           MTD device structure
779  * @param buf           destination address
780  * @param column        oob offset to read from
781  * @param thislen       oob length to read
782  */
783 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
784                                 int thislen)
785 {
786         struct onenand_chip *this = mtd->priv;
787         struct nand_oobfree *free;
788         int readcol = column;
789         int readend = column + thislen;
790         int lastgap = 0;
791         unsigned int i;
792         uint8_t *oob_buf = this->oob_buf;
793
794         free = this->ecclayout->oobfree;
795         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
796                 if (readcol >= lastgap)
797                         readcol += free->offset - lastgap;
798                 if (readend >= lastgap)
799                         readend += free->offset - lastgap;
800                 lastgap = free->offset + free->length;
801         }
802         this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
803         free = this->ecclayout->oobfree;
804         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
805                 int free_end = free->offset + free->length;
806                 if (free->offset < readend && free_end > readcol) {
807                         int st = max_t(int,free->offset,readcol);
808                         int ed = min_t(int,free_end,readend);
809                         int n = ed - st;
810                         memcpy(buf, oob_buf + st, n);
811                         buf += n;
812                 } else if (column == 0)
813                         break;
814         }
815         return 0;
816 }
817
818 /**
819  * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
820  * @param mtd           MTD device structure
821  * @param from          offset to read from
822  * @param ops:          oob operation description structure
823  *
824  * OneNAND read main and/or out-of-band data
825  */
826 static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
827                                 struct mtd_oob_ops *ops)
828 {
829         struct onenand_chip *this = mtd->priv;
830         struct mtd_ecc_stats stats;
831         size_t len = ops->len;
832         size_t ooblen = ops->ooblen;
833         u_char *buf = ops->datbuf;
834         u_char *oobbuf = ops->oobbuf;
835         int read = 0, column, thislen;
836         int oobread = 0, oobcolumn, thisooblen, oobsize;
837         int ret = 0, boundary = 0;
838         int writesize = this->writesize;
839
840         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ops_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
841
842         if (ops->mode == MTD_OOB_AUTO)
843                 oobsize = this->ecclayout->oobavail;
844         else
845                 oobsize = mtd->oobsize;
846
847         oobcolumn = from & (mtd->oobsize - 1);
848
849         /* Do not allow reads past end of device */
850         if ((from + len) > mtd->size) {
851                 printk(KERN_ERR "onenand_read_ops_nolock: Attempt read beyond end of device\n");
852                 ops->retlen = 0;
853                 ops->oobretlen = 0;
854                 return -EINVAL;
855         }
856
857         stats = mtd->ecc_stats;
858
859         /* Read-while-load method */
860
861         /* Do first load to bufferRAM */
862         if (read < len) {
863                 if (!onenand_check_bufferram(mtd, from)) {
864                         this->command(mtd, ONENAND_CMD_READ, from, writesize);
865                         ret = this->wait(mtd, FL_READING);
866                         onenand_update_bufferram(mtd, from, !ret);
867                         if (ret == -EBADMSG)
868                                 ret = 0;
869                 }
870         }
871
872         thislen = min_t(int, writesize, len - read);
873         column = from & (writesize - 1);
874         if (column + thislen > writesize)
875                 thislen = writesize - column;
876
877         while (!ret) {
878                 /* If there is more to load then start next load */
879                 from += thislen;
880                 if (read + thislen < len) {
881                         this->command(mtd, ONENAND_CMD_READ, from, writesize);
882                         /*
883                          * Chip boundary handling in DDP
884                          * Now we issued chip 1 read and pointed chip 1
885                          * bufferam so we have to point chip 0 bufferam.
886                          */
887                         if (ONENAND_IS_DDP(this) &&
888                             unlikely(from == (this->chipsize >> 1))) {
889                                 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
890                                 boundary = 1;
891                         } else
892                                 boundary = 0;
893                         ONENAND_SET_PREV_BUFFERRAM(this);
894                 }
895                 /* While load is going, read from last bufferRAM */
896                 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
897
898                 /* Read oob area if needed */
899                 if (oobbuf) {
900                         thisooblen = oobsize - oobcolumn;
901                         thisooblen = min_t(int, thisooblen, ooblen - oobread);
902
903                         if (ops->mode == MTD_OOB_AUTO)
904                                 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
905                         else
906                                 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
907                         oobread += thisooblen;
908                         oobbuf += thisooblen;
909                         oobcolumn = 0;
910                 }
911
912                 /* See if we are done */
913                 read += thislen;
914                 if (read == len)
915                         break;
916                 /* Set up for next read from bufferRAM */
917                 if (unlikely(boundary))
918                         this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
919                 ONENAND_SET_NEXT_BUFFERRAM(this);
920                 buf += thislen;
921                 thislen = min_t(int, writesize, len - read);
922                 column = 0;
923                 cond_resched();
924                 /* Now wait for load */
925                 ret = this->wait(mtd, FL_READING);
926                 onenand_update_bufferram(mtd, from, !ret);
927                 if (ret == -EBADMSG)
928                         ret = 0;
929         }
930
931         /*
932          * Return success, if no ECC failures, else -EBADMSG
933          * fs driver will take care of that, because
934          * retlen == desired len and result == -EBADMSG
935          */
936         ops->retlen = read;
937         ops->oobretlen = oobread;
938
939         if (ret)
940                 return ret;
941
942         if (mtd->ecc_stats.failed - stats.failed)
943                 return -EBADMSG;
944
945         return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
946 }
947
948 /**
949  * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
950  * @param mtd           MTD device structure
951  * @param from          offset to read from
952  * @param ops:          oob operation description structure
953  *
954  * OneNAND read out-of-band data from the spare area
955  */
956 static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
957                         struct mtd_oob_ops *ops)
958 {
959         struct onenand_chip *this = mtd->priv;
960         struct mtd_ecc_stats stats;
961         int read = 0, thislen, column, oobsize;
962         size_t len = ops->ooblen;
963         mtd_oob_mode_t mode = ops->mode;
964         u_char *buf = ops->oobbuf;
965         int ret = 0;
966
967         from += ops->ooboffs;
968
969         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
970
971         /* Initialize return length value */
972         ops->oobretlen = 0;
973
974         if (mode == MTD_OOB_AUTO)
975                 oobsize = this->ecclayout->oobavail;
976         else
977                 oobsize = mtd->oobsize;
978
979         column = from & (mtd->oobsize - 1);
980
981         if (unlikely(column >= oobsize)) {
982                 printk(KERN_ERR "onenand_read_oob_nolock: Attempted to start read outside oob\n");
983                 return -EINVAL;
984         }
985
986         /* Do not allow reads past end of device */
987         if (unlikely(from >= mtd->size ||
988                      column + len > ((mtd->size >> this->page_shift) -
989                                      (from >> this->page_shift)) * oobsize)) {
990                 printk(KERN_ERR "onenand_read_oob_nolock: Attempted to read beyond end of device\n");
991                 return -EINVAL;
992         }
993
994         stats = mtd->ecc_stats;
995
996         while (read < len) {
997                 cond_resched();
998
999                 thislen = oobsize - column;
1000                 thislen = min_t(int, thislen, len);
1001
1002                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
1003
1004                 onenand_update_bufferram(mtd, from, 0);
1005
1006                 ret = this->wait(mtd, FL_READING);
1007                 if (ret && ret != -EBADMSG) {
1008                         printk(KERN_ERR "onenand_read_oob_nolock: read failed = 0x%x\n", ret);
1009                         break;
1010                 }
1011
1012                 if (mode == MTD_OOB_AUTO)
1013                         onenand_transfer_auto_oob(mtd, buf, column, thislen);
1014                 else
1015                         this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1016
1017                 read += thislen;
1018
1019                 if (read == len)
1020                         break;
1021
1022                 buf += thislen;
1023
1024                 /* Read more? */
1025                 if (read < len) {
1026                         /* Page size */
1027                         from += mtd->writesize;
1028                         column = 0;
1029                 }
1030         }
1031
1032         ops->oobretlen = read;
1033
1034         if (ret)
1035                 return ret;
1036
1037         if (mtd->ecc_stats.failed - stats.failed)
1038                 return -EBADMSG;
1039
1040         return 0;
1041 }
1042
1043 /**
1044  * onenand_read - [MTD Interface] Read data from flash
1045  * @param mtd           MTD device structure
1046  * @param from          offset to read from
1047  * @param len           number of bytes to read
1048  * @param retlen        pointer to variable to store the number of read bytes
1049  * @param buf           the databuffer to put data
1050  *
1051  * Read with ecc
1052 */
1053 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
1054         size_t *retlen, u_char *buf)
1055 {
1056         struct mtd_oob_ops ops = {
1057                 .len    = len,
1058                 .ooblen = 0,
1059                 .datbuf = buf,
1060                 .oobbuf = NULL,
1061         };
1062         int ret;
1063
1064         onenand_get_device(mtd, FL_READING);
1065         ret = onenand_read_ops_nolock(mtd, from, &ops);
1066         onenand_release_device(mtd);
1067
1068         *retlen = ops.retlen;
1069         return ret;
1070 }
1071
1072 /**
1073  * onenand_read_oob - [MTD Interface] Read main and/or out-of-band
1074  * @param mtd:          MTD device structure
1075  * @param from:         offset to read from
1076  * @param ops:          oob operation description structure
1077
1078  * Read main and/or out-of-band
1079  */
1080 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
1081                             struct mtd_oob_ops *ops)
1082 {
1083         int ret;
1084
1085         switch (ops->mode) {
1086         case MTD_OOB_PLACE:
1087         case MTD_OOB_AUTO:
1088                 break;
1089         case MTD_OOB_RAW:
1090                 /* Not implemented yet */
1091         default:
1092                 return -EINVAL;
1093         }
1094
1095         onenand_get_device(mtd, FL_READING);
1096         if (ops->datbuf)
1097                 ret = onenand_read_ops_nolock(mtd, from, ops);
1098         else
1099                 ret = onenand_read_oob_nolock(mtd, from, ops);
1100         onenand_release_device(mtd);
1101
1102         return ret;
1103 }
1104
1105 /**
1106  * onenand_bbt_wait - [DEFAULT] wait until the command is done
1107  * @param mtd           MTD device structure
1108  * @param state         state to select the max. timeout value
1109  *
1110  * Wait for command done.
1111  */
1112 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
1113 {
1114         struct onenand_chip *this = mtd->priv;
1115         unsigned long timeout;
1116         unsigned int interrupt;
1117         unsigned int ctrl;
1118
1119         /* The 20 msec is enough */
1120         timeout = jiffies + msecs_to_jiffies(20);
1121         while (time_before(jiffies, timeout)) {
1122                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1123                 if (interrupt & ONENAND_INT_MASTER)
1124                         break;
1125         }
1126         /* To get correct interrupt status in timeout case */
1127         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1128         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
1129
1130         if (interrupt & ONENAND_INT_READ) {
1131                 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
1132                 if (ecc & ONENAND_ECC_2BIT_ALL) {
1133                         printk(KERN_INFO "onenand_bbt_wait: ecc error = 0x%04x"
1134                                 ", controller error 0x%04x\n", ecc, ctrl);
1135                         return ONENAND_BBT_READ_ERROR;
1136                 }
1137         } else {
1138                 printk(KERN_ERR "onenand_bbt_wait: read timeout!"
1139                         "ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
1140                 return ONENAND_BBT_READ_FATAL_ERROR;
1141         }
1142
1143         /* Initial bad block case: 0x2400 or 0x0400 */
1144         if (ctrl & ONENAND_CTRL_ERROR) {
1145                 printk(KERN_DEBUG "onenand_bbt_wait: "
1146                         "controller error = 0x%04x\n", ctrl);
1147                 return ONENAND_BBT_READ_ERROR;
1148         }
1149
1150         return 0;
1151 }
1152
1153 /**
1154  * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1155  * @param mtd           MTD device structure
1156  * @param from          offset to read from
1157  * @param ops           oob operation description structure
1158  *
1159  * OneNAND read out-of-band data from the spare area for bbt scan
1160  */
1161 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from, 
1162                             struct mtd_oob_ops *ops)
1163 {
1164         struct onenand_chip *this = mtd->priv;
1165         int read = 0, thislen, column;
1166         int ret = 0;
1167         size_t len = ops->ooblen;
1168         u_char *buf = ops->oobbuf;
1169
1170         DEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", (unsigned int) from, len);
1171
1172         /* Initialize return value */
1173         ops->oobretlen = 0;
1174
1175         /* Do not allow reads past end of device */
1176         if (unlikely((from + len) > mtd->size)) {
1177                 printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n");
1178                 return ONENAND_BBT_READ_FATAL_ERROR;
1179         }
1180
1181         /* Grab the lock and see if the device is available */
1182         onenand_get_device(mtd, FL_READING);
1183
1184         column = from & (mtd->oobsize - 1);
1185
1186         while (read < len) {
1187                 cond_resched();
1188
1189                 thislen = mtd->oobsize - column;
1190                 thislen = min_t(int, thislen, len);
1191
1192                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
1193
1194                 onenand_update_bufferram(mtd, from, 0);
1195
1196                 ret = onenand_bbt_wait(mtd, FL_READING);
1197                 if (ret)
1198                         break;
1199
1200                 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1201                 read += thislen;
1202                 if (read == len)
1203                         break;
1204
1205                 buf += thislen;
1206
1207                 /* Read more? */
1208                 if (read < len) {
1209                         /* Update Page size */
1210                         from += this->writesize;
1211                         column = 0;
1212                 }
1213         }
1214
1215         /* Deselect and wake up anyone waiting on the device */
1216         onenand_release_device(mtd);
1217
1218         ops->oobretlen = read;
1219         return ret;
1220 }
1221
1222 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1223 /**
1224  * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1225  * @param mtd           MTD device structure
1226  * @param buf           the databuffer to verify
1227  * @param to            offset to read from
1228  */
1229 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1230 {
1231         struct onenand_chip *this = mtd->priv;
1232         u_char *oob_buf = this->oob_buf;
1233         int status, i;
1234
1235         this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
1236         onenand_update_bufferram(mtd, to, 0);
1237         status = this->wait(mtd, FL_READING);
1238         if (status)
1239                 return status;
1240
1241         this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
1242         for (i = 0; i < mtd->oobsize; i++)
1243                 if (buf[i] != 0xFF && buf[i] != oob_buf[i])
1244                         return -EBADMSG;
1245
1246         return 0;
1247 }
1248
1249 /**
1250  * onenand_verify - [GENERIC] verify the chip contents after a write
1251  * @param mtd          MTD device structure
1252  * @param buf          the databuffer to verify
1253  * @param addr         offset to read from
1254  * @param len          number of bytes to read and compare
1255  */
1256 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1257 {
1258         struct onenand_chip *this = mtd->priv;
1259         void __iomem *dataram;
1260         int ret = 0;
1261         int thislen, column;
1262
1263         while (len != 0) {
1264                 thislen = min_t(int, this->writesize, len);
1265                 column = addr & (this->writesize - 1);
1266                 if (column + thislen > this->writesize)
1267                         thislen = this->writesize - column;
1268
1269                 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
1270
1271                 onenand_update_bufferram(mtd, addr, 0);
1272
1273                 ret = this->wait(mtd, FL_READING);
1274                 if (ret)
1275                         return ret;
1276
1277                 onenand_update_bufferram(mtd, addr, 1);
1278
1279                 dataram = this->base + ONENAND_DATARAM;
1280                 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
1281
1282                 if (memcmp(buf, dataram + column, thislen))
1283                         return -EBADMSG;
1284
1285                 len -= thislen;
1286                 buf += thislen;
1287                 addr += thislen;
1288         }
1289
1290         return 0;
1291 }
1292 #else
1293 #define onenand_verify(...)             (0)
1294 #define onenand_verify_oob(...)         (0)
1295 #endif
1296
1297 #define NOTALIGNED(x)   ((x & (this->subpagesize - 1)) != 0)
1298
1299 static void onenand_panic_wait(struct mtd_info *mtd)
1300 {
1301         struct onenand_chip *this = mtd->priv;
1302         unsigned int interrupt;
1303         int i;
1304         
1305         for (i = 0; i < 2000; i++) {
1306                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1307                 if (interrupt & ONENAND_INT_MASTER)
1308                         break;
1309                 udelay(10);
1310         }
1311 }
1312
1313 /**
1314  * onenand_panic_write - [MTD Interface] write buffer to FLASH in a panic context
1315  * @param mtd           MTD device structure
1316  * @param to            offset to write to
1317  * @param len           number of bytes to write
1318  * @param retlen        pointer to variable to store the number of written bytes
1319  * @param buf           the data to write
1320  *
1321  * Write with ECC
1322  */
1323 static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len,
1324                          size_t *retlen, const u_char *buf)
1325 {
1326         struct onenand_chip *this = mtd->priv;
1327         int column, subpage;
1328         int written = 0;
1329         int ret = 0;
1330
1331         if (this->state == FL_PM_SUSPENDED)
1332                 return -EBUSY;
1333
1334         /* Wait for any existing operation to clear */
1335         onenand_panic_wait(mtd);
1336
1337         DEBUG(MTD_DEBUG_LEVEL3, "onenand_panic_write: to = 0x%08x, len = %i\n",
1338               (unsigned int) to, (int) len);
1339
1340         /* Initialize retlen, in case of early exit */
1341         *retlen = 0;
1342
1343         /* Do not allow writes past end of device */
1344         if (unlikely((to + len) > mtd->size)) {
1345                 printk(KERN_ERR "onenand_panic_write: Attempt write to past end of device\n");
1346                 return -EINVAL;
1347         }
1348
1349         /* Reject writes, which are not page aligned */
1350         if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
1351                 printk(KERN_ERR "onenand_panic_write: Attempt to write not page aligned data\n");
1352                 return -EINVAL;
1353         }
1354
1355         column = to & (mtd->writesize - 1);
1356
1357         /* Loop until all data write */
1358         while (written < len) {
1359                 int thislen = min_t(int, mtd->writesize - column, len - written);
1360                 u_char *wbuf = (u_char *) buf;
1361
1362                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1363
1364                 /* Partial page write */
1365                 subpage = thislen < mtd->writesize;
1366                 if (subpage) {
1367                         memset(this->page_buf, 0xff, mtd->writesize);
1368                         memcpy(this->page_buf + column, buf, thislen);
1369                         wbuf = this->page_buf;
1370                 }
1371
1372                 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1373                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1374
1375                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1376
1377                 onenand_panic_wait(mtd);
1378
1379                 /* In partial page write we don't update bufferram */
1380                 onenand_update_bufferram(mtd, to, !ret && !subpage);
1381                 if (ONENAND_IS_2PLANE(this)) {
1382                         ONENAND_SET_BUFFERRAM1(this);
1383                         onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
1384                 }
1385
1386                 if (ret) {
1387                         printk(KERN_ERR "onenand_panic_write: write failed %d\n", ret);
1388                         break;
1389                 }
1390
1391                 written += thislen;
1392
1393                 if (written == len)
1394                         break;
1395
1396                 column = 0;
1397                 to += thislen;
1398                 buf += thislen;
1399         }
1400
1401         *retlen = written;
1402         return ret;
1403 }
1404
1405 /**
1406  * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
1407  * @param mtd           MTD device structure
1408  * @param oob_buf       oob buffer
1409  * @param buf           source address
1410  * @param column        oob offset to write to
1411  * @param thislen       oob length to write
1412  */
1413 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1414                                   const u_char *buf, int column, int thislen)
1415 {
1416         struct onenand_chip *this = mtd->priv;
1417         struct nand_oobfree *free;
1418         int writecol = column;
1419         int writeend = column + thislen;
1420         int lastgap = 0;
1421         unsigned int i;
1422
1423         free = this->ecclayout->oobfree;
1424         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1425                 if (writecol >= lastgap)
1426                         writecol += free->offset - lastgap;
1427                 if (writeend >= lastgap)
1428                         writeend += free->offset - lastgap;
1429                 lastgap = free->offset + free->length;
1430         }
1431         free = this->ecclayout->oobfree;
1432         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1433                 int free_end = free->offset + free->length;
1434                 if (free->offset < writeend && free_end > writecol) {
1435                         int st = max_t(int,free->offset,writecol);
1436                         int ed = min_t(int,free_end,writeend);
1437                         int n = ed - st;
1438                         memcpy(oob_buf + st, buf, n);
1439                         buf += n;
1440                 } else if (column == 0)
1441                         break;
1442         }
1443         return 0;
1444 }
1445
1446 /**
1447  * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
1448  * @param mtd           MTD device structure
1449  * @param to            offset to write to
1450  * @param ops           oob operation description structure
1451  *
1452  * Write main and/or oob with ECC
1453  */
1454 static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
1455                                 struct mtd_oob_ops *ops)
1456 {
1457         struct onenand_chip *this = mtd->priv;
1458         int written = 0, column, thislen = 0, subpage = 0;
1459         int prev = 0, prevlen = 0, prev_subpage = 0, first = 1;
1460         int oobwritten = 0, oobcolumn, thisooblen, oobsize;
1461         size_t len = ops->len;
1462         size_t ooblen = ops->ooblen;
1463         const u_char *buf = ops->datbuf;
1464         const u_char *oob = ops->oobbuf;
1465         u_char *oobbuf;
1466         int ret = 0;
1467
1468         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ops_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1469
1470         /* Initialize retlen, in case of early exit */
1471         ops->retlen = 0;
1472         ops->oobretlen = 0;
1473
1474         /* Do not allow writes past end of device */
1475         if (unlikely((to + len) > mtd->size)) {
1476                 printk(KERN_ERR "onenand_write_ops_nolock: Attempt write to past end of device\n");
1477                 return -EINVAL;
1478         }
1479
1480         /* Reject writes, which are not page aligned */
1481         if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
1482                 printk(KERN_ERR "onenand_write_ops_nolock: Attempt to write not page aligned data\n");
1483                 return -EINVAL;
1484         }
1485
1486         /* Check zero length */
1487         if (!len)
1488                 return 0;
1489
1490         if (ops->mode == MTD_OOB_AUTO)
1491                 oobsize = this->ecclayout->oobavail;
1492         else
1493                 oobsize = mtd->oobsize;
1494
1495         oobcolumn = to & (mtd->oobsize - 1);
1496
1497         column = to & (mtd->writesize - 1);
1498
1499         /* Loop until all data write */
1500         while (1) {
1501                 if (written < len) {
1502                         u_char *wbuf = (u_char *) buf;
1503
1504                         thislen = min_t(int, mtd->writesize - column, len - written);
1505                         thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
1506
1507                         cond_resched();
1508
1509                         this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1510
1511                         /* Partial page write */
1512                         subpage = thislen < mtd->writesize;
1513                         if (subpage) {
1514                                 memset(this->page_buf, 0xff, mtd->writesize);
1515                                 memcpy(this->page_buf + column, buf, thislen);
1516                                 wbuf = this->page_buf;
1517                         }
1518
1519                         this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1520
1521                         if (oob) {
1522                                 oobbuf = this->oob_buf;
1523
1524                                 /* We send data to spare ram with oobsize
1525                                  * to prevent byte access */
1526                                 memset(oobbuf, 0xff, mtd->oobsize);
1527                                 if (ops->mode == MTD_OOB_AUTO)
1528                                         onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
1529                                 else
1530                                         memcpy(oobbuf + oobcolumn, oob, thisooblen);
1531
1532                                 oobwritten += thisooblen;
1533                                 oob += thisooblen;
1534                                 oobcolumn = 0;
1535                         } else
1536                                 oobbuf = (u_char *) ffchars;
1537
1538                         this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1539                 } else
1540                         ONENAND_SET_NEXT_BUFFERRAM(this);
1541
1542                 /*
1543                  * 2 PLANE, MLC, and Flex-OneNAND doesn't support
1544                  * write-while-programe feature.
1545                  */
1546                 if (!ONENAND_IS_2PLANE(this) && !first) {
1547                         ONENAND_SET_PREV_BUFFERRAM(this);
1548
1549                         ret = this->wait(mtd, FL_WRITING);
1550
1551                         /* In partial page write we don't update bufferram */
1552                         onenand_update_bufferram(mtd, prev, !ret && !prev_subpage);
1553                         if (ret) {
1554                                 written -= prevlen;
1555                                 printk(KERN_ERR "onenand_write_ops_nolock: write filaed %d\n", ret);
1556                                 break;
1557                         }
1558
1559                         if (written == len) {
1560                                 /* Only check verify write turn on */
1561                                 ret = onenand_verify(mtd, buf - len, to - len, len);
1562                                 if (ret)
1563                                         printk(KERN_ERR "onenand_write_ops_nolock: verify failed %d\n", ret);
1564                                 break;
1565                         }
1566
1567                         ONENAND_SET_NEXT_BUFFERRAM(this);
1568                 }
1569
1570                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1571
1572                 /*
1573                  * 2 PLANE, MLC, and Flex-OneNAND wait here
1574                  */
1575                 if (ONENAND_IS_2PLANE(this)) {
1576                         ret = this->wait(mtd, FL_WRITING);
1577
1578                         /* In partial page write we don't update bufferram */
1579                         onenand_update_bufferram(mtd, to, !ret && !subpage);
1580                         if (ret) {
1581                                 printk(KERN_ERR "onenand_write_ops_nolock: write filaed %d\n", ret);
1582                                 break;
1583                         }
1584
1585                         /* Only check verify write turn on */
1586                         ret = onenand_verify(mtd, buf, to, thislen);
1587                         if (ret) {
1588                                 printk(KERN_ERR "onenand_write_ops_nolock: verify failed %d\n", ret);
1589                                 break;
1590                         }
1591
1592                         written += thislen;
1593
1594                         if (written == len)
1595                                 break;
1596
1597                 } else
1598                         written += thislen;
1599
1600                 column = 0;
1601                 prev_subpage = subpage;
1602                 prev = to;
1603                 prevlen = thislen;
1604                 to += thislen;
1605                 buf += thislen;
1606                 first = 0;
1607         }
1608
1609         /* In error case, clear all bufferrams */
1610         if (written != len)
1611                 onenand_invalidate_bufferram(mtd, 0, -1);
1612
1613         ops->retlen = written;
1614         ops->oobretlen = oobwritten;
1615
1616         return ret;
1617 }
1618
1619
1620 /**
1621  * onenand_write_oob_nolock - [Internal] OneNAND write out-of-band
1622  * @param mtd           MTD device structure
1623  * @param to            offset to write to
1624  * @param len           number of bytes to write
1625  * @param retlen        pointer to variable to store the number of written bytes
1626  * @param buf           the data to write
1627  * @param mode          operation mode
1628  *
1629  * OneNAND write out-of-band
1630  */
1631 static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
1632                                     struct mtd_oob_ops *ops)
1633 {
1634         struct onenand_chip *this = mtd->priv;
1635         int column, ret = 0, oobsize;
1636         int written = 0;
1637         u_char *oobbuf;
1638         size_t len = ops->ooblen;
1639         const u_char *buf = ops->oobbuf;
1640         mtd_oob_mode_t mode = ops->mode;
1641
1642         to += ops->ooboffs;
1643
1644         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1645
1646         /* Initialize retlen, in case of early exit */
1647         ops->oobretlen = 0;
1648
1649         if (mode == MTD_OOB_AUTO)
1650                 oobsize = this->ecclayout->oobavail;
1651         else
1652                 oobsize = mtd->oobsize;
1653
1654         column = to & (mtd->oobsize - 1);
1655
1656         if (unlikely(column >= oobsize)) {
1657                 printk(KERN_ERR "onenand_write_oob_nolock: Attempted to start write outside oob\n");
1658                 return -EINVAL;
1659         }
1660
1661         /* For compatibility with NAND: Do not allow write past end of page */
1662         if (unlikely(column + len > oobsize)) {
1663                 printk(KERN_ERR "onenand_write_oob_nolock: "
1664                       "Attempt to write past end of page\n");
1665                 return -EINVAL;
1666         }
1667
1668         /* Do not allow reads past end of device */
1669         if (unlikely(to >= mtd->size ||
1670                      column + len > ((mtd->size >> this->page_shift) -
1671                                      (to >> this->page_shift)) * oobsize)) {
1672                 printk(KERN_ERR "onenand_write_oob_nolock: Attempted to write past end of device\n");
1673                 return -EINVAL;
1674         }
1675
1676         oobbuf = this->oob_buf;
1677
1678         /* Loop until all data write */
1679         while (written < len) {
1680                 int thislen = min_t(int, oobsize, len - written);
1681
1682                 cond_resched();
1683
1684                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1685
1686                 /* We send data to spare ram with oobsize
1687                  * to prevent byte access */
1688                 memset(oobbuf, 0xff, mtd->oobsize);
1689                 if (mode == MTD_OOB_AUTO)
1690                         onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
1691                 else
1692                         memcpy(oobbuf + column, buf, thislen);
1693                 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1694
1695                 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1696
1697                 onenand_update_bufferram(mtd, to, 0);
1698                 if (ONENAND_IS_2PLANE(this)) {
1699                         ONENAND_SET_BUFFERRAM1(this);
1700                         onenand_update_bufferram(mtd, to + this->writesize, 0);
1701                 }
1702
1703                 ret = this->wait(mtd, FL_WRITING);
1704                 if (ret) {
1705                         printk(KERN_ERR "onenand_write_oob_nolock: write failed %d\n", ret);
1706                         break;
1707                 }
1708
1709                 ret = onenand_verify_oob(mtd, oobbuf, to);
1710                 if (ret) {
1711                         printk(KERN_ERR "onenand_write_oob_nolock: verify failed %d\n", ret);
1712                         break;
1713                 }
1714
1715                 written += thislen;
1716                 if (written == len)
1717                         break;
1718
1719                 to += mtd->writesize;
1720                 buf += thislen;
1721                 column = 0;
1722         }
1723
1724         ops->oobretlen = written;
1725
1726         return ret;
1727 }
1728
1729 /**
1730  * onenand_write - [MTD Interface] write buffer to FLASH
1731  * @param mtd           MTD device structure
1732  * @param to            offset to write to
1733  * @param len           number of bytes to write
1734  * @param retlen        pointer to variable to store the number of written bytes
1735  * @param buf           the data to write
1736  *
1737  * Write with ECC
1738  */
1739 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
1740         size_t *retlen, const u_char *buf)
1741 {
1742         struct mtd_oob_ops ops = {
1743                 .len    = len,
1744                 .ooblen = 0,
1745                 .datbuf = (u_char *) buf,
1746                 .oobbuf = NULL,
1747         };
1748         int ret;
1749
1750         onenand_get_device(mtd, FL_WRITING);
1751         ret = onenand_write_ops_nolock(mtd, to, &ops);
1752         onenand_release_device(mtd);
1753
1754         *retlen = ops.retlen;
1755         return ret;
1756 }
1757
1758 /**
1759  * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1760  * @param mtd:          MTD device structure
1761  * @param to:           offset to write
1762  * @param ops:          oob operation description structure
1763  */
1764 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1765                              struct mtd_oob_ops *ops)
1766 {
1767         int ret;
1768
1769         switch (ops->mode) {
1770         case MTD_OOB_PLACE:
1771         case MTD_OOB_AUTO:
1772                 break;
1773         case MTD_OOB_RAW:
1774                 /* Not implemented yet */
1775         default:
1776                 return -EINVAL;
1777         }
1778
1779         onenand_get_device(mtd, FL_WRITING);
1780         if (ops->datbuf)
1781                 ret = onenand_write_ops_nolock(mtd, to, ops);
1782         else
1783                 ret = onenand_write_oob_nolock(mtd, to, ops);
1784         onenand_release_device(mtd);
1785
1786         return ret;
1787 }
1788
1789 /**
1790  * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
1791  * @param mtd           MTD device structure
1792  * @param ofs           offset from device start
1793  * @param allowbbt      1, if its allowed to access the bbt area
1794  *
1795  * Check, if the block is bad. Either by reading the bad block table or
1796  * calling of the scan function.
1797  */
1798 static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
1799 {
1800         struct onenand_chip *this = mtd->priv;
1801         struct bbm_info *bbm = this->bbm;
1802
1803         /* Return info from the table */
1804         return bbm->isbad_bbt(mtd, ofs, allowbbt);
1805 }
1806
1807 /**
1808  * onenand_erase - [MTD Interface] erase block(s)
1809  * @param mtd           MTD device structure
1810  * @param instr         erase instruction
1811  *
1812  * Erase one ore more blocks
1813  */
1814 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1815 {
1816         struct onenand_chip *this = mtd->priv;
1817         unsigned int block_size;
1818         loff_t addr;
1819         int len;
1820         int ret = 0;
1821
1822         DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%012llx, len = %llu\n", (unsigned long long) instr->addr, (unsigned long long) instr->len);
1823
1824         block_size = (1 << this->erase_shift);
1825
1826         /* Start address must align on block boundary */
1827         if (unlikely(instr->addr & (block_size - 1))) {
1828                 printk(KERN_ERR "onenand_erase: Unaligned address\n");
1829                 return -EINVAL;
1830         }
1831
1832         /* Length must align on block boundary */
1833         if (unlikely(instr->len & (block_size - 1))) {
1834                 printk(KERN_ERR "onenand_erase: Length not block aligned\n");
1835                 return -EINVAL;
1836         }
1837
1838         /* Do not allow erase past end of device */
1839         if (unlikely((instr->len + instr->addr) > mtd->size)) {
1840                 printk(KERN_ERR "onenand_erase: Erase past end of device\n");
1841                 return -EINVAL;
1842         }
1843
1844         instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
1845
1846         /* Grab the lock and see if the device is available */
1847         onenand_get_device(mtd, FL_ERASING);
1848
1849         /* Loop throught the pages */
1850         len = instr->len;
1851         addr = instr->addr;
1852
1853         instr->state = MTD_ERASING;
1854
1855         while (len) {
1856                 cond_resched();
1857
1858                 /* Check if we have a bad block, we do not erase bad blocks */
1859                 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
1860                         printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%012llx\n", (unsigned long long) addr);
1861                         instr->state = MTD_ERASE_FAILED;
1862                         goto erase_exit;
1863                 }
1864
1865                 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1866
1867                 onenand_invalidate_bufferram(mtd, addr, block_size);
1868
1869                 ret = this->wait(mtd, FL_ERASING);
1870                 /* Check, if it is write protected */
1871                 if (ret) {
1872                         printk(KERN_ERR "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1873                         instr->state = MTD_ERASE_FAILED;
1874                         instr->fail_addr = addr;
1875                         goto erase_exit;
1876                 }
1877
1878                 len -= block_size;
1879                 addr += block_size;
1880         }
1881
1882         instr->state = MTD_ERASE_DONE;
1883
1884 erase_exit:
1885
1886         ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1887
1888         /* Deselect and wake up anyone waiting on the device */
1889         onenand_release_device(mtd);
1890
1891         /* Do call back function */
1892         if (!ret)
1893                 mtd_erase_callback(instr);
1894
1895         return ret;
1896 }
1897
1898 /**
1899  * onenand_sync - [MTD Interface] sync
1900  * @param mtd           MTD device structure
1901  *
1902  * Sync is actually a wait for chip ready function
1903  */
1904 static void onenand_sync(struct mtd_info *mtd)
1905 {
1906         DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1907
1908         /* Grab the lock and see if the device is available */
1909         onenand_get_device(mtd, FL_SYNCING);
1910
1911         /* Release it and go back */
1912         onenand_release_device(mtd);
1913 }
1914
1915 /**
1916  * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1917  * @param mtd           MTD device structure
1918  * @param ofs           offset relative to mtd start
1919  *
1920  * Check whether the block is bad
1921  */
1922 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1923 {
1924         int ret;
1925
1926         /* Check for invalid offset */
1927         if (ofs > mtd->size)
1928                 return -EINVAL;
1929
1930         onenand_get_device(mtd, FL_READING);
1931         ret = onenand_block_isbad_nolock(mtd, ofs, 0);
1932         onenand_release_device(mtd);
1933         return ret;
1934 }
1935
1936 /**
1937  * onenand_default_block_markbad - [DEFAULT] mark a block bad
1938  * @param mtd           MTD device structure
1939  * @param ofs           offset from device start
1940  *
1941  * This is the default implementation, which can be overridden by
1942  * a hardware specific driver.
1943  */
1944 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1945 {
1946         struct onenand_chip *this = mtd->priv;
1947         struct bbm_info *bbm = this->bbm;
1948         u_char buf[2] = {0, 0};
1949         struct mtd_oob_ops ops = {
1950                 .mode = MTD_OOB_PLACE,
1951                 .ooblen = 2,
1952                 .oobbuf = buf,
1953                 .ooboffs = 0,
1954         };
1955         int block;
1956
1957         /* Get block number */
1958         block = ((int) ofs) >> bbm->bbt_erase_shift;
1959         if (bbm->bbt)
1960                 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1961
1962         /* We write two bytes, so we dont have to mess with 16 bit access */
1963         ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1964         return onenand_write_oob_nolock(mtd, ofs, &ops);
1965 }
1966
1967 /**
1968  * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1969  * @param mtd           MTD device structure
1970  * @param ofs           offset relative to mtd start
1971  *
1972  * Mark the block as bad
1973  */
1974 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1975 {
1976         struct onenand_chip *this = mtd->priv;
1977         int ret;
1978
1979         ret = onenand_block_isbad(mtd, ofs);
1980         if (ret) {
1981                 /* If it was bad already, return success and do nothing */
1982                 if (ret > 0)
1983                         return 0;
1984                 return ret;
1985         }
1986
1987         onenand_get_device(mtd, FL_WRITING);
1988         ret = this->block_markbad(mtd, ofs);
1989         onenand_release_device(mtd);
1990         return ret;
1991 }
1992
1993 /**
1994  * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1995  * @param mtd           MTD device structure
1996  * @param ofs           offset relative to mtd start
1997  * @param len           number of bytes to lock or unlock
1998  * @param cmd           lock or unlock command
1999  *
2000  * Lock or unlock one or more blocks
2001  */
2002 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
2003 {
2004         struct onenand_chip *this = mtd->priv;
2005         int start, end, block, value, status;
2006         int wp_status_mask;
2007
2008         start = ofs >> this->erase_shift;
2009         end = len >> this->erase_shift;
2010
2011         if (cmd == ONENAND_CMD_LOCK)
2012                 wp_status_mask = ONENAND_WP_LS;
2013         else
2014                 wp_status_mask = ONENAND_WP_US;
2015
2016         /* Continuous lock scheme */
2017         if (this->options & ONENAND_HAS_CONT_LOCK) {
2018                 /* Set start block address */
2019                 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2020                 /* Set end block address */
2021                 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
2022                 /* Write lock command */
2023                 this->command(mtd, cmd, 0, 0);
2024
2025                 /* There's no return value */
2026                 this->wait(mtd, FL_LOCKING);
2027
2028                 /* Sanity check */
2029                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2030                     & ONENAND_CTRL_ONGO)
2031                         continue;
2032
2033                 /* Check lock status */
2034                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2035                 if (!(status & wp_status_mask))
2036                         printk(KERN_ERR "wp status = 0x%x\n", status);
2037
2038                 return 0;
2039         }
2040
2041         /* Block lock scheme */
2042         for (block = start; block < start + end; block++) {
2043                 /* Set block address */
2044                 value = onenand_block_address(this, block);
2045                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2046                 /* Select DataRAM for DDP */
2047                 value = onenand_bufferram_address(this, block);
2048                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2049                 /* Set start block address */
2050                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2051                 /* Write lock command */
2052                 this->command(mtd, cmd, 0, 0);
2053
2054                 /* There's no return value */
2055                 this->wait(mtd, FL_LOCKING);
2056
2057                 /* Sanity check */
2058                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2059                     & ONENAND_CTRL_ONGO)
2060                         continue;
2061
2062                 /* Check lock status */
2063                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2064                 if (!(status & wp_status_mask))
2065                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
2066         }
2067
2068         return 0;
2069 }
2070
2071 /**
2072  * onenand_lock - [MTD Interface] Lock block(s)
2073  * @param mtd           MTD device structure
2074  * @param ofs           offset relative to mtd start
2075  * @param len           number of bytes to unlock
2076  *
2077  * Lock one or more blocks
2078  */
2079 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
2080 {
2081         int ret;
2082
2083         onenand_get_device(mtd, FL_LOCKING);
2084         ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
2085         onenand_release_device(mtd);
2086         return ret;
2087 }
2088
2089 /**
2090  * onenand_unlock - [MTD Interface] Unlock block(s)
2091  * @param mtd           MTD device structure
2092  * @param ofs           offset relative to mtd start
2093  * @param len           number of bytes to unlock
2094  *
2095  * Unlock one or more blocks
2096  */
2097 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
2098 {
2099         int ret;
2100
2101         onenand_get_device(mtd, FL_LOCKING);
2102         ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2103         onenand_release_device(mtd);
2104         return ret;
2105 }
2106
2107 /**
2108  * onenand_check_lock_status - [OneNAND Interface] Check lock status
2109  * @param this          onenand chip data structure
2110  *
2111  * Check lock status
2112  */
2113 static int onenand_check_lock_status(struct onenand_chip *this)
2114 {
2115         unsigned int value, block, status;
2116         unsigned int end;
2117
2118         end = this->chipsize >> this->erase_shift;
2119         for (block = 0; block < end; block++) {
2120                 /* Set block address */
2121                 value = onenand_block_address(this, block);
2122                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2123                 /* Select DataRAM for DDP */
2124                 value = onenand_bufferram_address(this, block);
2125                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2126                 /* Set start block address */
2127                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2128
2129                 /* Check lock status */
2130                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2131                 if (!(status & ONENAND_WP_US)) {
2132                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
2133                         return 0;
2134                 }
2135         }
2136
2137         return 1;
2138 }
2139
2140 /**
2141  * onenand_unlock_all - [OneNAND Interface] unlock all blocks
2142  * @param mtd           MTD device structure
2143  *
2144  * Unlock all blocks
2145  */
2146 static void onenand_unlock_all(struct mtd_info *mtd)
2147 {
2148         struct onenand_chip *this = mtd->priv;
2149         loff_t ofs = 0;
2150         size_t len = this->chipsize;
2151
2152         if (this->options & ONENAND_HAS_UNLOCK_ALL) {
2153                 /* Set start block address */
2154                 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2155                 /* Write unlock command */
2156                 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
2157
2158                 /* There's no return value */
2159                 this->wait(mtd, FL_LOCKING);
2160
2161                 /* Sanity check */
2162                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2163                     & ONENAND_CTRL_ONGO)
2164                         continue;
2165
2166                 /* Check lock status */
2167                 if (onenand_check_lock_status(this))
2168                         return;
2169
2170                 /* Workaround for all block unlock in DDP */
2171                 if (ONENAND_IS_DDP(this)) {
2172                         /* All blocks on another chip */
2173                         ofs = this->chipsize >> 1;
2174                         len = this->chipsize >> 1;
2175                 }
2176         }
2177
2178         onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2179 }
2180
2181 #ifdef CONFIG_MTD_ONENAND_OTP
2182
2183 /* Interal OTP operation */
2184 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
2185                 size_t *retlen, u_char *buf);
2186
2187 /**
2188  * do_otp_read - [DEFAULT] Read OTP block area
2189  * @param mtd           MTD device structure
2190  * @param from          The offset to read
2191  * @param len           number of bytes to read
2192  * @param retlen        pointer to variable to store the number of readbytes
2193  * @param buf           the databuffer to put/get data
2194  *
2195  * Read OTP block area.
2196  */
2197 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
2198                 size_t *retlen, u_char *buf)
2199 {
2200         struct onenand_chip *this = mtd->priv;
2201         struct mtd_oob_ops ops = {
2202                 .len    = len,
2203                 .ooblen = 0,
2204                 .datbuf = buf,
2205                 .oobbuf = NULL,
2206         };
2207         int ret;
2208
2209         /* Enter OTP access mode */
2210         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2211         this->wait(mtd, FL_OTPING);
2212
2213         ret = onenand_read_ops_nolock(mtd, from, &ops);
2214
2215         /* Exit OTP access mode */
2216         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2217         this->wait(mtd, FL_RESETING);
2218
2219         return ret;
2220 }
2221
2222 /**
2223  * do_otp_write - [DEFAULT] Write OTP block area
2224  * @param mtd           MTD device structure
2225  * @param to            The offset to write
2226  * @param len           number of bytes to write
2227  * @param retlen        pointer to variable to store the number of write bytes
2228  * @param buf           the databuffer to put/get data
2229  *
2230  * Write OTP block area.
2231  */
2232 static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
2233                 size_t *retlen, u_char *buf)
2234 {
2235         struct onenand_chip *this = mtd->priv;
2236         unsigned char *pbuf = buf;
2237         int ret;
2238         struct mtd_oob_ops ops;
2239
2240         /* Force buffer page aligned */
2241         if (len < mtd->writesize) {
2242                 memcpy(this->page_buf, buf, len);
2243                 memset(this->page_buf + len, 0xff, mtd->writesize - len);
2244                 pbuf = this->page_buf;
2245                 len = mtd->writesize;
2246         }
2247
2248         /* Enter OTP access mode */
2249         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2250         this->wait(mtd, FL_OTPING);
2251
2252         ops.len = len;
2253         ops.ooblen = 0;
2254         ops.datbuf = pbuf;
2255         ops.oobbuf = NULL;
2256         ret = onenand_write_ops_nolock(mtd, to, &ops);
2257         *retlen = ops.retlen;
2258
2259         /* Exit OTP access mode */
2260         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2261         this->wait(mtd, FL_RESETING);
2262
2263         return ret;
2264 }
2265
2266 /**
2267  * do_otp_lock - [DEFAULT] Lock OTP block area
2268  * @param mtd           MTD device structure
2269  * @param from          The offset to lock
2270  * @param len           number of bytes to lock
2271  * @param retlen        pointer to variable to store the number of lock bytes
2272  * @param buf           the databuffer to put/get data
2273  *
2274  * Lock OTP block area.
2275  */
2276 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
2277                 size_t *retlen, u_char *buf)
2278 {
2279         struct onenand_chip *this = mtd->priv;
2280         struct mtd_oob_ops ops = {
2281                 .mode = MTD_OOB_PLACE,
2282                 .ooblen = len,
2283                 .oobbuf = buf,
2284                 .ooboffs = 0,
2285         };
2286         int ret;
2287
2288         /* Enter OTP access mode */
2289         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2290         this->wait(mtd, FL_OTPING);
2291
2292         ret = onenand_write_oob_nolock(mtd, from, &ops);
2293
2294         *retlen = ops.oobretlen;
2295
2296         /* Exit OTP access mode */
2297         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2298         this->wait(mtd, FL_RESETING);
2299
2300         return ret;
2301 }
2302
2303 /**
2304  * onenand_otp_walk - [DEFAULT] Handle OTP operation
2305  * @param mtd           MTD device structure
2306  * @param from          The offset to read/write
2307  * @param len           number of bytes to read/write
2308  * @param retlen        pointer to variable to store the number of read bytes
2309  * @param buf           the databuffer to put/get data
2310  * @param action        do given action
2311  * @param mode          specify user and factory
2312  *
2313  * Handle OTP operation.
2314  */
2315 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
2316                         size_t *retlen, u_char *buf,
2317                         otp_op_t action, int mode)
2318 {
2319         struct onenand_chip *this = mtd->priv;
2320         int otp_pages;
2321         int density;
2322         int ret = 0;
2323
2324         *retlen = 0;
2325
2326         density = onenand_get_density(this->device_id);
2327         if (density < ONENAND_DEVICE_DENSITY_512Mb)
2328                 otp_pages = 20;
2329         else
2330                 otp_pages = 10;
2331
2332         if (mode == MTD_OTP_FACTORY) {
2333                 from += mtd->writesize * otp_pages;
2334                 otp_pages = 64 - otp_pages;
2335         }
2336
2337         /* Check User/Factory boundary */
2338         if (((mtd->writesize * otp_pages) - (from + len)) < 0)
2339                 return 0;
2340
2341         onenand_get_device(mtd, FL_OTPING);
2342         while (len > 0 && otp_pages > 0) {
2343                 if (!action) {  /* OTP Info functions */
2344                         struct otp_info *otpinfo;
2345
2346                         len -= sizeof(struct otp_info);
2347                         if (len <= 0) {
2348                                 ret = -ENOSPC;
2349                                 break;
2350                         }
2351
2352                         otpinfo = (struct otp_info *) buf;
2353                         otpinfo->start = from;
2354                         otpinfo->length = mtd->writesize;
2355                         otpinfo->locked = 0;
2356
2357                         from += mtd->writesize;
2358                         buf += sizeof(struct otp_info);
2359                         *retlen += sizeof(struct otp_info);
2360                 } else {
2361                         size_t tmp_retlen;
2362                         int size = len;
2363
2364                         ret = action(mtd, from, len, &tmp_retlen, buf);
2365
2366                         buf += size;
2367                         len -= size;
2368                         *retlen += size;
2369
2370                         if (ret)
2371                                 break;
2372                 }
2373                 otp_pages--;
2374         }
2375         onenand_release_device(mtd);
2376
2377         return ret;
2378 }
2379
2380 /**
2381  * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
2382  * @param mtd           MTD device structure
2383  * @param buf           the databuffer to put/get data
2384  * @param len           number of bytes to read
2385  *
2386  * Read factory OTP info.
2387  */
2388 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
2389                         struct otp_info *buf, size_t len)
2390 {
2391         size_t retlen;
2392         int ret;
2393
2394         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
2395
2396         return ret ? : retlen;
2397 }
2398
2399 /**
2400  * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
2401  * @param mtd           MTD device structure
2402  * @param from          The offset to read
2403  * @param len           number of bytes to read
2404  * @param retlen        pointer to variable to store the number of read bytes
2405  * @param buf           the databuffer to put/get data
2406  *
2407  * Read factory OTP area.
2408  */
2409 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
2410                         size_t len, size_t *retlen, u_char *buf)
2411 {
2412         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
2413 }
2414
2415 /**
2416  * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
2417  * @param mtd           MTD device structure
2418  * @param buf           the databuffer to put/get data
2419  * @param len           number of bytes to read
2420  *
2421  * Read user OTP info.
2422  */
2423 static int onenand_get_user_prot_info(struct mtd_info *mtd,
2424                         struct otp_info *buf, size_t len)
2425 {
2426         size_t retlen;
2427         int ret;
2428
2429         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
2430
2431         return ret ? : retlen;
2432 }
2433
2434 /**
2435  * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
2436  * @param mtd           MTD device structure
2437  * @param from          The offset to read
2438  * @param len           number of bytes to read
2439  * @param retlen        pointer to variable to store the number of read bytes
2440  * @param buf           the databuffer to put/get data
2441  *
2442  * Read user OTP area.
2443  */
2444 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
2445                         size_t len, size_t *retlen, u_char *buf)
2446 {
2447         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
2448 }
2449
2450 /**
2451  * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
2452  * @param mtd           MTD device structure
2453  * @param from          The offset to write
2454  * @param len           number of bytes to write
2455  * @param retlen        pointer to variable to store the number of write bytes
2456  * @param buf           the databuffer to put/get data
2457  *
2458  * Write user OTP area.
2459  */
2460 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
2461                         size_t len, size_t *retlen, u_char *buf)
2462 {
2463         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
2464 }
2465
2466 /**
2467  * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
2468  * @param mtd           MTD device structure
2469  * @param from          The offset to lock
2470  * @param len           number of bytes to unlock
2471  *
2472  * Write lock mark on spare area in page 0 in OTP block
2473  */
2474 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
2475                         size_t len)
2476 {
2477         struct onenand_chip *this = mtd->priv;
2478         u_char *oob_buf = this->oob_buf;
2479         size_t retlen;
2480         int ret;
2481
2482         memset(oob_buf, 0xff, mtd->oobsize);
2483         /*
2484          * Note: OTP lock operation
2485          *       OTP block : 0xXXFC
2486          *       1st block : 0xXXF3 (If chip support)
2487          *       Both      : 0xXXF0 (If chip support)
2488          */
2489         oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
2490
2491         /*
2492          * Write lock mark to 8th word of sector0 of page0 of the spare0.
2493          * We write 16 bytes spare area instead of 2 bytes.
2494          */
2495         from = 0;
2496         len = 16;
2497
2498         ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
2499
2500         return ret ? : retlen;
2501 }
2502 #endif  /* CONFIG_MTD_ONENAND_OTP */
2503
2504 /**
2505  * onenand_check_features - Check and set OneNAND features
2506  * @param mtd           MTD data structure
2507  *
2508  * Check and set OneNAND features
2509  * - lock scheme
2510  * - two plane
2511  */
2512 static void onenand_check_features(struct mtd_info *mtd)
2513 {
2514         struct onenand_chip *this = mtd->priv;
2515         unsigned int density, process;
2516
2517         /* Lock scheme depends on density and process */
2518         density = onenand_get_density(this->device_id);
2519         process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
2520
2521         /* Lock scheme */
2522         switch (density) {
2523         case ONENAND_DEVICE_DENSITY_4Gb:
2524                 this->options |= ONENAND_HAS_2PLANE;
2525
2526         case ONENAND_DEVICE_DENSITY_2Gb:
2527                 /* 2Gb DDP don't have 2 plane */
2528                 if (!ONENAND_IS_DDP(this))
2529                         this->options |= ONENAND_HAS_2PLANE;
2530                 this->options |= ONENAND_HAS_UNLOCK_ALL;
2531
2532         case ONENAND_DEVICE_DENSITY_1Gb:
2533                 /* A-Die has all block unlock */
2534                 if (process)
2535                         this->options |= ONENAND_HAS_UNLOCK_ALL;
2536                 break;
2537
2538         default:
2539                 /* Some OneNAND has continuous lock scheme */
2540                 if (!process)
2541                         this->options |= ONENAND_HAS_CONT_LOCK;
2542                 break;
2543         }
2544
2545         if (this->options & ONENAND_HAS_CONT_LOCK)
2546                 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
2547         if (this->options & ONENAND_HAS_UNLOCK_ALL)
2548                 printk(KERN_DEBUG "Chip support all block unlock\n");
2549         if (this->options & ONENAND_HAS_2PLANE)
2550                 printk(KERN_DEBUG "Chip has 2 plane\n");
2551 }
2552
2553 /**
2554  * onenand_print_device_info - Print device & version ID
2555  * @param device        device ID
2556  * @param version       version ID
2557  *
2558  * Print device & version ID
2559  */
2560 static void onenand_print_device_info(int device, int version)
2561 {
2562         int vcc, demuxed, ddp, density;
2563
2564         vcc = device & ONENAND_DEVICE_VCC_MASK;
2565         demuxed = device & ONENAND_DEVICE_IS_DEMUX;
2566         ddp = device & ONENAND_DEVICE_IS_DDP;
2567         density = onenand_get_density(device);
2568         printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
2569                 demuxed ? "" : "Muxed ",
2570                 ddp ? "(DDP)" : "",
2571                 (16 << density),
2572                 vcc ? "2.65/3.3" : "1.8",
2573                 device);
2574         printk(KERN_INFO "OneNAND version = 0x%04x\n", version);
2575 }
2576
2577 static const struct onenand_manufacturers onenand_manuf_ids[] = {
2578         {ONENAND_MFR_SAMSUNG, "Samsung"},
2579 };
2580
2581 /**
2582  * onenand_check_maf - Check manufacturer ID
2583  * @param manuf         manufacturer ID
2584  *
2585  * Check manufacturer ID
2586  */
2587 static int onenand_check_maf(int manuf)
2588 {
2589         int size = ARRAY_SIZE(onenand_manuf_ids);
2590         char *name;
2591         int i;
2592
2593         for (i = 0; i < size; i++)
2594                 if (manuf == onenand_manuf_ids[i].id)
2595                         break;
2596
2597         if (i < size)
2598                 name = onenand_manuf_ids[i].name;
2599         else
2600                 name = "Unknown";
2601
2602         printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
2603
2604         return (i == size);
2605 }
2606
2607 /**
2608  * onenand_probe - [OneNAND Interface] Probe the OneNAND device
2609  * @param mtd           MTD device structure
2610  *
2611  * OneNAND detection method:
2612  *   Compare the values from command with ones from register
2613  */
2614 static int onenand_probe(struct mtd_info *mtd)
2615 {
2616         struct onenand_chip *this = mtd->priv;
2617         int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
2618         int density;
2619         int syscfg;
2620
2621         /* Save system configuration 1 */
2622         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
2623         /* Clear Sync. Burst Read mode to read BootRAM */
2624         this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
2625
2626         /* Send the command for reading device ID from BootRAM */
2627         this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
2628
2629         /* Read manufacturer and device IDs from BootRAM */
2630         bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
2631         bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
2632
2633         /* Reset OneNAND to read default register values */
2634         this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
2635         /* Wait reset */
2636         this->wait(mtd, FL_RESETING);
2637
2638         /* Restore system configuration 1 */
2639         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
2640
2641         /* Check manufacturer ID */
2642         if (onenand_check_maf(bram_maf_id))
2643                 return -ENXIO;
2644
2645         /* Read manufacturer and device IDs from Register */
2646         maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
2647         dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
2648         ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
2649
2650         /* Check OneNAND device */
2651         if (maf_id != bram_maf_id || dev_id != bram_dev_id)
2652                 return -ENXIO;
2653
2654         /* Flash device information */
2655         onenand_print_device_info(dev_id, ver_id);
2656         this->device_id = dev_id;
2657         this->version_id = ver_id;
2658
2659         density = onenand_get_density(dev_id);
2660         this->chipsize = (16 << density) << 20;
2661         /* Set density mask. it is used for DDP */
2662         if (ONENAND_IS_DDP(this))
2663                 this->density_mask = (1 << (density + 6));
2664         else
2665                 this->density_mask = 0;
2666
2667         /* OneNAND page size & block size */
2668         /* The data buffer size is equal to page size */
2669         mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
2670         mtd->oobsize = mtd->writesize >> 5;
2671         /* Pages per a block are always 64 in OneNAND */
2672         mtd->erasesize = mtd->writesize << 6;
2673
2674         this->erase_shift = ffs(mtd->erasesize) - 1;
2675         this->page_shift = ffs(mtd->writesize) - 1;
2676         this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
2677         /* It's real page size */
2678         this->writesize = mtd->writesize;
2679
2680         /* REVIST: Multichip handling */
2681
2682         mtd->size = this->chipsize;
2683
2684         /* Check OneNAND features */
2685         onenand_check_features(mtd);
2686
2687         /*
2688          * We emulate the 4KiB page and 256KiB erase block size
2689          * But oobsize is still 64 bytes.
2690          * It is only valid if you turn on 2X program support,
2691          * Otherwise it will be ignored by compiler.
2692          */
2693         if (ONENAND_IS_2PLANE(this)) {
2694                 mtd->writesize <<= 1;
2695                 mtd->erasesize <<= 1;
2696         }
2697
2698         return 0;
2699 }
2700
2701 /**
2702  * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
2703  * @param mtd           MTD device structure
2704  */
2705 static int onenand_suspend(struct mtd_info *mtd)
2706 {
2707         return onenand_get_device(mtd, FL_PM_SUSPENDED);
2708 }
2709
2710 /**
2711  * onenand_resume - [MTD Interface] Resume the OneNAND flash
2712  * @param mtd           MTD device structure
2713  */
2714 static void onenand_resume(struct mtd_info *mtd)
2715 {
2716         struct onenand_chip *this = mtd->priv;
2717
2718         if (this->state == FL_PM_SUSPENDED)
2719                 onenand_release_device(mtd);
2720         else
2721                 printk(KERN_ERR "resume() called for the chip which is not"
2722                                 "in suspended state\n");
2723 }
2724
2725 /**
2726  * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
2727  * @param mtd           MTD device structure
2728  * @param maxchips      Number of chips to scan for
2729  *
2730  * This fills out all the not initialized function pointers
2731  * with the defaults.
2732  * The flash ID is read and the mtd/chip structures are
2733  * filled with the appropriate values.
2734  */
2735 int onenand_scan(struct mtd_info *mtd, int maxchips)
2736 {
2737         int i;
2738         struct onenand_chip *this = mtd->priv;
2739
2740         if (!this->read_word)
2741                 this->read_word = onenand_readw;
2742         if (!this->write_word)
2743                 this->write_word = onenand_writew;
2744
2745         if (!this->command)
2746                 this->command = onenand_command;
2747         if (!this->wait)
2748                 onenand_setup_wait(mtd);
2749
2750         if (!this->read_bufferram)
2751                 this->read_bufferram = onenand_read_bufferram;
2752         if (!this->write_bufferram)
2753                 this->write_bufferram = onenand_write_bufferram;
2754
2755         if (!this->block_markbad)
2756                 this->block_markbad = onenand_default_block_markbad;
2757         if (!this->scan_bbt)
2758                 this->scan_bbt = onenand_default_bbt;
2759
2760         if (onenand_probe(mtd))
2761                 return -ENXIO;
2762
2763         /* Set Sync. Burst Read after probing */
2764         if (this->mmcontrol) {
2765                 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2766                 this->read_bufferram = onenand_sync_read_bufferram;
2767         }
2768
2769         /* Allocate buffers, if necessary */
2770         if (!this->page_buf) {
2771                 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
2772                 if (!this->page_buf) {
2773                         printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2774                         return -ENOMEM;
2775                 }
2776                 this->options |= ONENAND_PAGEBUF_ALLOC;
2777         }
2778         if (!this->oob_buf) {
2779                 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
2780                 if (!this->oob_buf) {
2781                         printk(KERN_ERR "onenand_scan(): Can't allocate oob_buf\n");
2782                         if (this->options & ONENAND_PAGEBUF_ALLOC) {
2783                                 this->options &= ~ONENAND_PAGEBUF_ALLOC;
2784                                 kfree(this->page_buf);
2785                         }
2786                         return -ENOMEM;
2787                 }
2788                 this->options |= ONENAND_OOBBUF_ALLOC;
2789         }
2790
2791         this->state = FL_READY;
2792         init_waitqueue_head(&this->wq);
2793         spin_lock_init(&this->chip_lock);
2794
2795         /*
2796          * Allow subpage writes up to oobsize.
2797          */
2798         switch (mtd->oobsize) {
2799         case 64:
2800                 this->ecclayout = &onenand_oob_64;
2801                 mtd->subpage_sft = 2;
2802                 break;
2803
2804         case 32:
2805                 this->ecclayout = &onenand_oob_32;
2806                 mtd->subpage_sft = 1;
2807                 break;
2808
2809         default:
2810                 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2811                         mtd->oobsize);
2812                 mtd->subpage_sft = 0;
2813                 /* To prevent kernel oops */
2814                 this->ecclayout = &onenand_oob_32;
2815                 break;
2816         }
2817
2818         this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2819
2820         /*
2821          * The number of bytes available for a client to place data into
2822          * the out of band area
2823          */
2824         this->ecclayout->oobavail = 0;
2825         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES &&
2826             this->ecclayout->oobfree[i].length; i++)
2827                 this->ecclayout->oobavail +=
2828                         this->ecclayout->oobfree[i].length;
2829         mtd->oobavail = this->ecclayout->oobavail;
2830
2831         mtd->ecclayout = this->ecclayout;
2832
2833         /* Fill in remaining MTD driver data */
2834         mtd->type = MTD_NANDFLASH;
2835         mtd->flags = MTD_CAP_NANDFLASH;
2836         mtd->erase = onenand_erase;
2837         mtd->point = NULL;
2838         mtd->unpoint = NULL;
2839         mtd->read = onenand_read;
2840         mtd->write = onenand_write;
2841         mtd->read_oob = onenand_read_oob;
2842         mtd->write_oob = onenand_write_oob;
2843         mtd->panic_write = onenand_panic_write;
2844 #ifdef CONFIG_MTD_ONENAND_OTP
2845         mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2846         mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2847         mtd->get_user_prot_info = onenand_get_user_prot_info;
2848         mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2849         mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2850         mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2851 #endif
2852         mtd->sync = onenand_sync;
2853         mtd->lock = onenand_lock;
2854         mtd->unlock = onenand_unlock;
2855         mtd->suspend = onenand_suspend;
2856         mtd->resume = onenand_resume;
2857         mtd->block_isbad = onenand_block_isbad;
2858         mtd->block_markbad = onenand_block_markbad;
2859         mtd->owner = THIS_MODULE;
2860
2861         /* Unlock whole block */
2862         onenand_unlock_all(mtd);
2863
2864         return this->scan_bbt(mtd);
2865 }
2866
2867 /**
2868  * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2869  * @param mtd           MTD device structure
2870  */
2871 void onenand_release(struct mtd_info *mtd)
2872 {
2873         struct onenand_chip *this = mtd->priv;
2874
2875 #ifdef CONFIG_MTD_PARTITIONS
2876         /* Deregister partitions */
2877         del_mtd_partitions (mtd);
2878 #endif
2879         /* Deregister the device */
2880         del_mtd_device (mtd);
2881
2882         /* Free bad block table memory, if allocated */
2883         if (this->bbm) {
2884                 struct bbm_info *bbm = this->bbm;
2885                 kfree(bbm->bbt);
2886                 kfree(this->bbm);
2887         }
2888         /* Buffers allocated by onenand_scan */
2889         if (this->options & ONENAND_PAGEBUF_ALLOC)
2890                 kfree(this->page_buf);
2891         if (this->options & ONENAND_OOBBUF_ALLOC)
2892                 kfree(this->oob_buf);
2893 }
2894
2895 EXPORT_SYMBOL_GPL(onenand_scan);
2896 EXPORT_SYMBOL_GPL(onenand_release);
2897
2898 MODULE_LICENSE("GPL");
2899 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2900 MODULE_DESCRIPTION("Generic OneNAND flash driver code");