2 * linux/drivers/mtd/onenand/onenand_base.c
4 * Copyright (C) 2005-2007 Samsung Electronics
5 * Kyungmin Park <kyungmin.park@samsung.com>
8 * Adrian Hunter <ext-adrian.hunter@nokia.com>:
9 * auto-placement support, read-while load support, various fixes
10 * Copyright (C) Nokia Corporation, 2007
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/sched.h>
21 #include <linux/delay.h>
22 #include <linux/interrupt.h>
23 #include <linux/jiffies.h>
24 #include <linux/mtd/mtd.h>
25 #include <linux/mtd/onenand.h>
26 #include <linux/mtd/partitions.h>
31 * onenand_oob_64 - oob info for large (2KB) page
33 static struct nand_ecclayout onenand_oob_64 = {
42 {2, 3}, {14, 2}, {18, 3}, {30, 2},
43 {34, 3}, {46, 2}, {50, 3}, {62, 2}
48 * onenand_oob_32 - oob info for middle (1KB) page
50 static struct nand_ecclayout onenand_oob_32 = {
56 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
59 static const unsigned char ffchars[] = {
60 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
61 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
62 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
63 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
64 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
65 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
66 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
67 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
71 * onenand_readw - [OneNAND Interface] Read OneNAND register
72 * @param addr address to read
74 * Read OneNAND register
76 static unsigned short onenand_readw(void __iomem *addr)
82 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
83 * @param value value to write
84 * @param addr address to write
86 * Write OneNAND register with value
88 static void onenand_writew(unsigned short value, void __iomem *addr)
94 * onenand_block_address - [DEFAULT] Get block address
95 * @param this onenand chip data structure
96 * @param block the block
97 * @return translated block address if DDP, otherwise same
99 * Setup Start Address 1 Register (F100h)
101 static int onenand_block_address(struct onenand_chip *this, int block)
103 /* Device Flash Core select, NAND Flash Block Address */
104 if (block & this->density_mask)
105 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
111 * onenand_bufferram_address - [DEFAULT] Get bufferram address
112 * @param this onenand chip data structure
113 * @param block the block
114 * @return set DBS value if DDP, otherwise 0
116 * Setup Start Address 2 Register (F101h) for DDP
118 static int onenand_bufferram_address(struct onenand_chip *this, int block)
120 /* Device BufferRAM Select */
121 if (block & this->density_mask)
122 return ONENAND_DDP_CHIP1;
124 return ONENAND_DDP_CHIP0;
128 * onenand_page_address - [DEFAULT] Get page address
129 * @param page the page address
130 * @param sector the sector address
131 * @return combined page and sector address
133 * Setup Start Address 8 Register (F107h)
135 static int onenand_page_address(int page, int sector)
137 /* Flash Page Address, Flash Sector Address */
140 fpa = page & ONENAND_FPA_MASK;
141 fsa = sector & ONENAND_FSA_MASK;
143 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
147 * onenand_buffer_address - [DEFAULT] Get buffer address
148 * @param dataram1 DataRAM index
149 * @param sectors the sector address
150 * @param count the number of sectors
151 * @return the start buffer value
153 * Setup Start Buffer Register (F200h)
155 static int onenand_buffer_address(int dataram1, int sectors, int count)
159 /* BufferRAM Sector Address */
160 bsa = sectors & ONENAND_BSA_MASK;
163 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
165 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
167 /* BufferRAM Sector Count */
168 bsc = count & ONENAND_BSC_MASK;
170 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
174 * onenand_get_density - [DEFAULT] Get OneNAND density
175 * @param dev_id OneNAND device ID
177 * Get OneNAND density from device ID
179 static inline int onenand_get_density(int dev_id)
181 int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
182 return (density & ONENAND_DEVICE_DENSITY_MASK);
186 * onenand_command - [DEFAULT] Send command to OneNAND device
187 * @param mtd MTD device structure
188 * @param cmd the command to be sent
189 * @param addr offset to read from or write to
190 * @param len number of bytes to read or write
192 * Send command to OneNAND device. This function is used for middle/large page
193 * devices (1KB/2KB Bytes per page)
195 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
197 struct onenand_chip *this = mtd->priv;
198 int value, block, page;
200 /* Address translation */
202 case ONENAND_CMD_UNLOCK:
203 case ONENAND_CMD_LOCK:
204 case ONENAND_CMD_LOCK_TIGHT:
205 case ONENAND_CMD_UNLOCK_ALL:
210 case ONENAND_CMD_ERASE:
211 case ONENAND_CMD_BUFFERRAM:
212 case ONENAND_CMD_OTP_ACCESS:
213 block = (int) (addr >> this->erase_shift);
218 block = (int) (addr >> this->erase_shift);
219 page = (int) (addr >> this->page_shift);
221 if (ONENAND_IS_2PLANE(this)) {
222 /* Make the even block number */
224 /* Is it the odd plane? */
225 if (addr & this->writesize)
229 page &= this->page_mask;
233 /* NOTE: The setting order of the registers is very important! */
234 if (cmd == ONENAND_CMD_BUFFERRAM) {
235 /* Select DataRAM for DDP */
236 value = onenand_bufferram_address(this, block);
237 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
239 if (ONENAND_IS_2PLANE(this))
240 /* It is always BufferRAM0 */
241 ONENAND_SET_BUFFERRAM0(this);
243 /* Switch to the next data buffer */
244 ONENAND_SET_NEXT_BUFFERRAM(this);
250 /* Write 'DFS, FBA' of Flash */
251 value = onenand_block_address(this, block);
252 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
254 /* Select DataRAM for DDP */
255 value = onenand_bufferram_address(this, block);
256 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
260 /* Now we use page size operation */
261 int sectors = 4, count = 4;
265 case ONENAND_CMD_READ:
266 case ONENAND_CMD_READOOB:
267 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
271 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
272 cmd = ONENAND_CMD_2X_PROG;
273 dataram = ONENAND_CURRENT_BUFFERRAM(this);
277 /* Write 'FPA, FSA' of Flash */
278 value = onenand_page_address(page, sectors);
279 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
281 /* Write 'BSA, BSC' of DataRAM */
282 value = onenand_buffer_address(dataram, sectors, count);
283 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
286 /* Interrupt clear */
287 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
290 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
296 * onenand_wait - [DEFAULT] wait until the command is done
297 * @param mtd MTD device structure
298 * @param state state to select the max. timeout value
300 * Wait for command done. This applies to all OneNAND command
301 * Read can take up to 30us, erase up to 2ms and program up to 350us
302 * according to general OneNAND specs
304 static int onenand_wait(struct mtd_info *mtd, int state)
306 struct onenand_chip * this = mtd->priv;
307 unsigned long timeout;
308 unsigned int flags = ONENAND_INT_MASTER;
309 unsigned int interrupt = 0;
312 /* The 20 msec is enough */
313 timeout = jiffies + msecs_to_jiffies(20);
314 while (time_before(jiffies, timeout)) {
315 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
317 if (interrupt & flags)
320 if (state != FL_READING)
323 /* To get correct interrupt status in timeout case */
324 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
326 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
329 * In the Spec. it checks the controller status first
330 * However if you get the correct information in case of
331 * power off recovery (POR) test, it should read ECC status first
333 if (interrupt & ONENAND_INT_READ) {
334 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
336 if (ecc & ONENAND_ECC_2BIT_ALL) {
337 printk(KERN_ERR "onenand_wait: ECC error = 0x%04x\n", ecc);
338 mtd->ecc_stats.failed++;
340 } else if (ecc & ONENAND_ECC_1BIT_ALL) {
341 printk(KERN_INFO "onenand_wait: correctable ECC error = 0x%04x\n", ecc);
342 mtd->ecc_stats.corrected++;
345 } else if (state == FL_READING) {
346 printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
350 /* If there's controller error, it's a real error */
351 if (ctrl & ONENAND_CTRL_ERROR) {
352 printk(KERN_ERR "onenand_wait: controller error = 0x%04x\n",
354 if (ctrl & ONENAND_CTRL_LOCK)
355 printk(KERN_ERR "onenand_wait: it's locked error.\n");
363 * onenand_interrupt - [DEFAULT] onenand interrupt handler
364 * @param irq onenand interrupt number
365 * @param dev_id interrupt data
369 static irqreturn_t onenand_interrupt(int irq, void *data)
371 struct onenand_chip *this = data;
373 /* To handle shared interrupt */
374 if (!this->complete.done)
375 complete(&this->complete);
381 * onenand_interrupt_wait - [DEFAULT] wait until the command is done
382 * @param mtd MTD device structure
383 * @param state state to select the max. timeout value
385 * Wait for command done.
387 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
389 struct onenand_chip *this = mtd->priv;
391 wait_for_completion(&this->complete);
393 return onenand_wait(mtd, state);
397 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
398 * @param mtd MTD device structure
399 * @param state state to select the max. timeout value
401 * Try interrupt based wait (It is used one-time)
403 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
405 struct onenand_chip *this = mtd->priv;
406 unsigned long remain, timeout;
408 /* We use interrupt wait first */
409 this->wait = onenand_interrupt_wait;
411 timeout = msecs_to_jiffies(100);
412 remain = wait_for_completion_timeout(&this->complete, timeout);
414 printk(KERN_INFO "OneNAND: There's no interrupt. "
415 "We use the normal wait\n");
417 /* Release the irq */
418 free_irq(this->irq, this);
420 this->wait = onenand_wait;
423 return onenand_wait(mtd, state);
427 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
428 * @param mtd MTD device structure
430 * There's two method to wait onenand work
431 * 1. polling - read interrupt status register
432 * 2. interrupt - use the kernel interrupt method
434 static void onenand_setup_wait(struct mtd_info *mtd)
436 struct onenand_chip *this = mtd->priv;
439 init_completion(&this->complete);
441 if (this->irq <= 0) {
442 this->wait = onenand_wait;
446 if (request_irq(this->irq, &onenand_interrupt,
447 IRQF_SHARED, "onenand", this)) {
448 /* If we can't get irq, use the normal wait */
449 this->wait = onenand_wait;
453 /* Enable interrupt */
454 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
455 syscfg |= ONENAND_SYS_CFG1_IOBE;
456 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
458 this->wait = onenand_try_interrupt_wait;
462 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
463 * @param mtd MTD data structure
464 * @param area BufferRAM area
465 * @return offset given area
467 * Return BufferRAM offset given area
469 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
471 struct onenand_chip *this = mtd->priv;
473 if (ONENAND_CURRENT_BUFFERRAM(this)) {
474 /* Note: the 'this->writesize' is a real page size */
475 if (area == ONENAND_DATARAM)
476 return this->writesize;
477 if (area == ONENAND_SPARERAM)
485 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
486 * @param mtd MTD data structure
487 * @param area BufferRAM area
488 * @param buffer the databuffer to put/get data
489 * @param offset offset to read from or write to
490 * @param count number of bytes to read/write
492 * Read the BufferRAM area
494 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
495 unsigned char *buffer, int offset, size_t count)
497 struct onenand_chip *this = mtd->priv;
498 void __iomem *bufferram;
500 bufferram = this->base + area;
502 bufferram += onenand_bufferram_offset(mtd, area);
504 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
507 /* Align with word(16-bit) size */
510 /* Read word and save byte */
511 word = this->read_word(bufferram + offset + count);
512 buffer[count] = (word & 0xff);
515 memcpy(buffer, bufferram + offset, count);
521 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
522 * @param mtd MTD data structure
523 * @param area BufferRAM area
524 * @param buffer the databuffer to put/get data
525 * @param offset offset to read from or write to
526 * @param count number of bytes to read/write
528 * Read the BufferRAM area with Sync. Burst Mode
530 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
531 unsigned char *buffer, int offset, size_t count)
533 struct onenand_chip *this = mtd->priv;
534 void __iomem *bufferram;
536 bufferram = this->base + area;
538 bufferram += onenand_bufferram_offset(mtd, area);
540 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
542 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
545 /* Align with word(16-bit) size */
548 /* Read word and save byte */
549 word = this->read_word(bufferram + offset + count);
550 buffer[count] = (word & 0xff);
553 memcpy(buffer, bufferram + offset, count);
555 this->mmcontrol(mtd, 0);
561 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
562 * @param mtd MTD data structure
563 * @param area BufferRAM area
564 * @param buffer the databuffer to put/get data
565 * @param offset offset to read from or write to
566 * @param count number of bytes to read/write
568 * Write the BufferRAM area
570 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
571 const unsigned char *buffer, int offset, size_t count)
573 struct onenand_chip *this = mtd->priv;
574 void __iomem *bufferram;
576 bufferram = this->base + area;
578 bufferram += onenand_bufferram_offset(mtd, area);
580 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
584 /* Align with word(16-bit) size */
587 /* Calculate byte access offset */
588 byte_offset = offset + count;
590 /* Read word and save byte */
591 word = this->read_word(bufferram + byte_offset);
592 word = (word & ~0xff) | buffer[count];
593 this->write_word(word, bufferram + byte_offset);
596 memcpy(bufferram + offset, buffer, count);
602 * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
603 * @param mtd MTD data structure
604 * @param addr address to check
605 * @return blockpage address
607 * Get blockpage address at 2x program mode
609 static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
611 struct onenand_chip *this = mtd->priv;
612 int blockpage, block, page;
614 /* Calculate the even block number */
615 block = (int) (addr >> this->erase_shift) & ~1;
616 /* Is it the odd plane? */
617 if (addr & this->writesize)
619 page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
620 blockpage = (block << 7) | page;
626 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
627 * @param mtd MTD data structure
628 * @param addr address to check
629 * @return 1 if there are valid data, otherwise 0
631 * Check bufferram if there is data we required
633 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
635 struct onenand_chip *this = mtd->priv;
636 int blockpage, found = 0;
639 if (ONENAND_IS_2PLANE(this))
640 blockpage = onenand_get_2x_blockpage(mtd, addr);
642 blockpage = (int) (addr >> this->page_shift);
644 /* Is there valid data? */
645 i = ONENAND_CURRENT_BUFFERRAM(this);
646 if (this->bufferram[i].blockpage == blockpage)
649 /* Check another BufferRAM */
650 i = ONENAND_NEXT_BUFFERRAM(this);
651 if (this->bufferram[i].blockpage == blockpage) {
652 ONENAND_SET_NEXT_BUFFERRAM(this);
657 if (found && ONENAND_IS_DDP(this)) {
658 /* Select DataRAM for DDP */
659 int block = (int) (addr >> this->erase_shift);
660 int value = onenand_bufferram_address(this, block);
661 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
668 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
669 * @param mtd MTD data structure
670 * @param addr address to update
671 * @param valid valid flag
673 * Update BufferRAM information
675 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
678 struct onenand_chip *this = mtd->priv;
682 if (ONENAND_IS_2PLANE(this))
683 blockpage = onenand_get_2x_blockpage(mtd, addr);
685 blockpage = (int) (addr >> this->page_shift);
687 /* Invalidate another BufferRAM */
688 i = ONENAND_NEXT_BUFFERRAM(this);
689 if (this->bufferram[i].blockpage == blockpage)
690 this->bufferram[i].blockpage = -1;
692 /* Update BufferRAM */
693 i = ONENAND_CURRENT_BUFFERRAM(this);
695 this->bufferram[i].blockpage = blockpage;
697 this->bufferram[i].blockpage = -1;
701 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
702 * @param mtd MTD data structure
703 * @param addr start address to invalidate
704 * @param len length to invalidate
706 * Invalidate BufferRAM information
708 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
711 struct onenand_chip *this = mtd->priv;
713 loff_t end_addr = addr + len;
715 /* Invalidate BufferRAM */
716 for (i = 0; i < MAX_BUFFERRAM; i++) {
717 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
718 if (buf_addr >= addr && buf_addr < end_addr)
719 this->bufferram[i].blockpage = -1;
724 * onenand_get_device - [GENERIC] Get chip for selected access
725 * @param mtd MTD device structure
726 * @param new_state the state which is requested
728 * Get the device and lock it for exclusive access
730 static int onenand_get_device(struct mtd_info *mtd, int new_state)
732 struct onenand_chip *this = mtd->priv;
733 DECLARE_WAITQUEUE(wait, current);
736 * Grab the lock and see if the device is available
739 spin_lock(&this->chip_lock);
740 if (this->state == FL_READY) {
741 this->state = new_state;
742 spin_unlock(&this->chip_lock);
745 if (new_state == FL_PM_SUSPENDED) {
746 spin_unlock(&this->chip_lock);
747 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
749 set_current_state(TASK_UNINTERRUPTIBLE);
750 add_wait_queue(&this->wq, &wait);
751 spin_unlock(&this->chip_lock);
753 remove_wait_queue(&this->wq, &wait);
760 * onenand_release_device - [GENERIC] release chip
761 * @param mtd MTD device structure
763 * Deselect, release chip lock and wake up anyone waiting on the device
765 static void onenand_release_device(struct mtd_info *mtd)
767 struct onenand_chip *this = mtd->priv;
769 /* Release the chip */
770 spin_lock(&this->chip_lock);
771 this->state = FL_READY;
773 spin_unlock(&this->chip_lock);
777 * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
778 * @param mtd MTD device structure
779 * @param buf destination address
780 * @param column oob offset to read from
781 * @param thislen oob length to read
783 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
786 struct onenand_chip *this = mtd->priv;
787 struct nand_oobfree *free;
788 int readcol = column;
789 int readend = column + thislen;
792 uint8_t *oob_buf = this->oob_buf;
794 free = this->ecclayout->oobfree;
795 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
796 if (readcol >= lastgap)
797 readcol += free->offset - lastgap;
798 if (readend >= lastgap)
799 readend += free->offset - lastgap;
800 lastgap = free->offset + free->length;
802 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
803 free = this->ecclayout->oobfree;
804 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
805 int free_end = free->offset + free->length;
806 if (free->offset < readend && free_end > readcol) {
807 int st = max_t(int,free->offset,readcol);
808 int ed = min_t(int,free_end,readend);
810 memcpy(buf, oob_buf + st, n);
812 } else if (column == 0)
819 * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
820 * @param mtd MTD device structure
821 * @param from offset to read from
822 * @param ops: oob operation description structure
824 * OneNAND read main and/or out-of-band data
826 static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
827 struct mtd_oob_ops *ops)
829 struct onenand_chip *this = mtd->priv;
830 struct mtd_ecc_stats stats;
831 size_t len = ops->len;
832 size_t ooblen = ops->ooblen;
833 u_char *buf = ops->datbuf;
834 u_char *oobbuf = ops->oobbuf;
835 int read = 0, column, thislen;
836 int oobread = 0, oobcolumn, thisooblen, oobsize;
837 int ret = 0, boundary = 0;
838 int writesize = this->writesize;
840 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ops_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
842 if (ops->mode == MTD_OOB_AUTO)
843 oobsize = this->ecclayout->oobavail;
845 oobsize = mtd->oobsize;
847 oobcolumn = from & (mtd->oobsize - 1);
849 /* Do not allow reads past end of device */
850 if ((from + len) > mtd->size) {
851 printk(KERN_ERR "onenand_read_ops_nolock: Attempt read beyond end of device\n");
857 stats = mtd->ecc_stats;
859 /* Read-while-load method */
861 /* Do first load to bufferRAM */
863 if (!onenand_check_bufferram(mtd, from)) {
864 this->command(mtd, ONENAND_CMD_READ, from, writesize);
865 ret = this->wait(mtd, FL_READING);
866 onenand_update_bufferram(mtd, from, !ret);
872 thislen = min_t(int, writesize, len - read);
873 column = from & (writesize - 1);
874 if (column + thislen > writesize)
875 thislen = writesize - column;
878 /* If there is more to load then start next load */
880 if (read + thislen < len) {
881 this->command(mtd, ONENAND_CMD_READ, from, writesize);
883 * Chip boundary handling in DDP
884 * Now we issued chip 1 read and pointed chip 1
885 * bufferam so we have to point chip 0 bufferam.
887 if (ONENAND_IS_DDP(this) &&
888 unlikely(from == (this->chipsize >> 1))) {
889 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
893 ONENAND_SET_PREV_BUFFERRAM(this);
895 /* While load is going, read from last bufferRAM */
896 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
898 /* Read oob area if needed */
900 thisooblen = oobsize - oobcolumn;
901 thisooblen = min_t(int, thisooblen, ooblen - oobread);
903 if (ops->mode == MTD_OOB_AUTO)
904 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
906 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
907 oobread += thisooblen;
908 oobbuf += thisooblen;
912 /* See if we are done */
916 /* Set up for next read from bufferRAM */
917 if (unlikely(boundary))
918 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
919 ONENAND_SET_NEXT_BUFFERRAM(this);
921 thislen = min_t(int, writesize, len - read);
924 /* Now wait for load */
925 ret = this->wait(mtd, FL_READING);
926 onenand_update_bufferram(mtd, from, !ret);
932 * Return success, if no ECC failures, else -EBADMSG
933 * fs driver will take care of that, because
934 * retlen == desired len and result == -EBADMSG
937 ops->oobretlen = oobread;
942 if (mtd->ecc_stats.failed - stats.failed)
945 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
949 * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
950 * @param mtd MTD device structure
951 * @param from offset to read from
952 * @param ops: oob operation description structure
954 * OneNAND read out-of-band data from the spare area
956 static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
957 struct mtd_oob_ops *ops)
959 struct onenand_chip *this = mtd->priv;
960 struct mtd_ecc_stats stats;
961 int read = 0, thislen, column, oobsize;
962 size_t len = ops->ooblen;
963 mtd_oob_mode_t mode = ops->mode;
964 u_char *buf = ops->oobbuf;
967 from += ops->ooboffs;
969 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
971 /* Initialize return length value */
974 if (mode == MTD_OOB_AUTO)
975 oobsize = this->ecclayout->oobavail;
977 oobsize = mtd->oobsize;
979 column = from & (mtd->oobsize - 1);
981 if (unlikely(column >= oobsize)) {
982 printk(KERN_ERR "onenand_read_oob_nolock: Attempted to start read outside oob\n");
986 /* Do not allow reads past end of device */
987 if (unlikely(from >= mtd->size ||
988 column + len > ((mtd->size >> this->page_shift) -
989 (from >> this->page_shift)) * oobsize)) {
990 printk(KERN_ERR "onenand_read_oob_nolock: Attempted to read beyond end of device\n");
994 stats = mtd->ecc_stats;
999 thislen = oobsize - column;
1000 thislen = min_t(int, thislen, len);
1002 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
1004 onenand_update_bufferram(mtd, from, 0);
1006 ret = this->wait(mtd, FL_READING);
1007 if (ret && ret != -EBADMSG) {
1008 printk(KERN_ERR "onenand_read_oob_nolock: read failed = 0x%x\n", ret);
1012 if (mode == MTD_OOB_AUTO)
1013 onenand_transfer_auto_oob(mtd, buf, column, thislen);
1015 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1027 from += mtd->writesize;
1032 ops->oobretlen = read;
1037 if (mtd->ecc_stats.failed - stats.failed)
1044 * onenand_read - [MTD Interface] Read data from flash
1045 * @param mtd MTD device structure
1046 * @param from offset to read from
1047 * @param len number of bytes to read
1048 * @param retlen pointer to variable to store the number of read bytes
1049 * @param buf the databuffer to put data
1053 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
1054 size_t *retlen, u_char *buf)
1056 struct mtd_oob_ops ops = {
1064 onenand_get_device(mtd, FL_READING);
1065 ret = onenand_read_ops_nolock(mtd, from, &ops);
1066 onenand_release_device(mtd);
1068 *retlen = ops.retlen;
1073 * onenand_read_oob - [MTD Interface] Read main and/or out-of-band
1074 * @param mtd: MTD device structure
1075 * @param from: offset to read from
1076 * @param ops: oob operation description structure
1078 * Read main and/or out-of-band
1080 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
1081 struct mtd_oob_ops *ops)
1085 switch (ops->mode) {
1090 /* Not implemented yet */
1095 onenand_get_device(mtd, FL_READING);
1097 ret = onenand_read_ops_nolock(mtd, from, ops);
1099 ret = onenand_read_oob_nolock(mtd, from, ops);
1100 onenand_release_device(mtd);
1106 * onenand_bbt_wait - [DEFAULT] wait until the command is done
1107 * @param mtd MTD device structure
1108 * @param state state to select the max. timeout value
1110 * Wait for command done.
1112 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
1114 struct onenand_chip *this = mtd->priv;
1115 unsigned long timeout;
1116 unsigned int interrupt;
1119 /* The 20 msec is enough */
1120 timeout = jiffies + msecs_to_jiffies(20);
1121 while (time_before(jiffies, timeout)) {
1122 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1123 if (interrupt & ONENAND_INT_MASTER)
1126 /* To get correct interrupt status in timeout case */
1127 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1128 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
1130 if (interrupt & ONENAND_INT_READ) {
1131 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
1132 if (ecc & ONENAND_ECC_2BIT_ALL) {
1133 printk(KERN_INFO "onenand_bbt_wait: ecc error = 0x%04x"
1134 ", controller error 0x%04x\n", ecc, ctrl);
1135 return ONENAND_BBT_READ_ERROR;
1138 printk(KERN_ERR "onenand_bbt_wait: read timeout!"
1139 "ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
1140 return ONENAND_BBT_READ_FATAL_ERROR;
1143 /* Initial bad block case: 0x2400 or 0x0400 */
1144 if (ctrl & ONENAND_CTRL_ERROR) {
1145 printk(KERN_DEBUG "onenand_bbt_wait: "
1146 "controller error = 0x%04x\n", ctrl);
1147 return ONENAND_BBT_READ_ERROR;
1154 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1155 * @param mtd MTD device structure
1156 * @param from offset to read from
1157 * @param ops oob operation description structure
1159 * OneNAND read out-of-band data from the spare area for bbt scan
1161 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
1162 struct mtd_oob_ops *ops)
1164 struct onenand_chip *this = mtd->priv;
1165 int read = 0, thislen, column;
1167 size_t len = ops->ooblen;
1168 u_char *buf = ops->oobbuf;
1170 DEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", (unsigned int) from, len);
1172 /* Initialize return value */
1175 /* Do not allow reads past end of device */
1176 if (unlikely((from + len) > mtd->size)) {
1177 printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n");
1178 return ONENAND_BBT_READ_FATAL_ERROR;
1181 /* Grab the lock and see if the device is available */
1182 onenand_get_device(mtd, FL_READING);
1184 column = from & (mtd->oobsize - 1);
1186 while (read < len) {
1189 thislen = mtd->oobsize - column;
1190 thislen = min_t(int, thislen, len);
1192 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
1194 onenand_update_bufferram(mtd, from, 0);
1196 ret = onenand_bbt_wait(mtd, FL_READING);
1200 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1209 /* Update Page size */
1210 from += this->writesize;
1215 /* Deselect and wake up anyone waiting on the device */
1216 onenand_release_device(mtd);
1218 ops->oobretlen = read;
1222 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1224 * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1225 * @param mtd MTD device structure
1226 * @param buf the databuffer to verify
1227 * @param to offset to read from
1229 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1231 struct onenand_chip *this = mtd->priv;
1232 u_char *oob_buf = this->oob_buf;
1235 this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
1236 onenand_update_bufferram(mtd, to, 0);
1237 status = this->wait(mtd, FL_READING);
1241 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
1242 for (i = 0; i < mtd->oobsize; i++)
1243 if (buf[i] != 0xFF && buf[i] != oob_buf[i])
1250 * onenand_verify - [GENERIC] verify the chip contents after a write
1251 * @param mtd MTD device structure
1252 * @param buf the databuffer to verify
1253 * @param addr offset to read from
1254 * @param len number of bytes to read and compare
1256 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1258 struct onenand_chip *this = mtd->priv;
1259 void __iomem *dataram;
1261 int thislen, column;
1264 thislen = min_t(int, this->writesize, len);
1265 column = addr & (this->writesize - 1);
1266 if (column + thislen > this->writesize)
1267 thislen = this->writesize - column;
1269 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
1271 onenand_update_bufferram(mtd, addr, 0);
1273 ret = this->wait(mtd, FL_READING);
1277 onenand_update_bufferram(mtd, addr, 1);
1279 dataram = this->base + ONENAND_DATARAM;
1280 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
1282 if (memcmp(buf, dataram + column, thislen))
1293 #define onenand_verify(...) (0)
1294 #define onenand_verify_oob(...) (0)
1297 #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
1299 static void onenand_panic_wait(struct mtd_info *mtd)
1301 struct onenand_chip *this = mtd->priv;
1302 unsigned int interrupt;
1305 for (i = 0; i < 2000; i++) {
1306 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1307 if (interrupt & ONENAND_INT_MASTER)
1314 * onenand_panic_write - [MTD Interface] write buffer to FLASH in a panic context
1315 * @param mtd MTD device structure
1316 * @param to offset to write to
1317 * @param len number of bytes to write
1318 * @param retlen pointer to variable to store the number of written bytes
1319 * @param buf the data to write
1323 static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len,
1324 size_t *retlen, const u_char *buf)
1326 struct onenand_chip *this = mtd->priv;
1327 int column, subpage;
1331 if (this->state == FL_PM_SUSPENDED)
1334 /* Wait for any existing operation to clear */
1335 onenand_panic_wait(mtd);
1337 DEBUG(MTD_DEBUG_LEVEL3, "onenand_panic_write: to = 0x%08x, len = %i\n",
1338 (unsigned int) to, (int) len);
1340 /* Initialize retlen, in case of early exit */
1343 /* Do not allow writes past end of device */
1344 if (unlikely((to + len) > mtd->size)) {
1345 printk(KERN_ERR "onenand_panic_write: Attempt write to past end of device\n");
1349 /* Reject writes, which are not page aligned */
1350 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
1351 printk(KERN_ERR "onenand_panic_write: Attempt to write not page aligned data\n");
1355 column = to & (mtd->writesize - 1);
1357 /* Loop until all data write */
1358 while (written < len) {
1359 int thislen = min_t(int, mtd->writesize - column, len - written);
1360 u_char *wbuf = (u_char *) buf;
1362 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1364 /* Partial page write */
1365 subpage = thislen < mtd->writesize;
1367 memset(this->page_buf, 0xff, mtd->writesize);
1368 memcpy(this->page_buf + column, buf, thislen);
1369 wbuf = this->page_buf;
1372 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1373 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1375 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1377 onenand_panic_wait(mtd);
1379 /* In partial page write we don't update bufferram */
1380 onenand_update_bufferram(mtd, to, !ret && !subpage);
1381 if (ONENAND_IS_2PLANE(this)) {
1382 ONENAND_SET_BUFFERRAM1(this);
1383 onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
1387 printk(KERN_ERR "onenand_panic_write: write failed %d\n", ret);
1406 * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
1407 * @param mtd MTD device structure
1408 * @param oob_buf oob buffer
1409 * @param buf source address
1410 * @param column oob offset to write to
1411 * @param thislen oob length to write
1413 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1414 const u_char *buf, int column, int thislen)
1416 struct onenand_chip *this = mtd->priv;
1417 struct nand_oobfree *free;
1418 int writecol = column;
1419 int writeend = column + thislen;
1423 free = this->ecclayout->oobfree;
1424 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1425 if (writecol >= lastgap)
1426 writecol += free->offset - lastgap;
1427 if (writeend >= lastgap)
1428 writeend += free->offset - lastgap;
1429 lastgap = free->offset + free->length;
1431 free = this->ecclayout->oobfree;
1432 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1433 int free_end = free->offset + free->length;
1434 if (free->offset < writeend && free_end > writecol) {
1435 int st = max_t(int,free->offset,writecol);
1436 int ed = min_t(int,free_end,writeend);
1438 memcpy(oob_buf + st, buf, n);
1440 } else if (column == 0)
1447 * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
1448 * @param mtd MTD device structure
1449 * @param to offset to write to
1450 * @param ops oob operation description structure
1452 * Write main and/or oob with ECC
1454 static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
1455 struct mtd_oob_ops *ops)
1457 struct onenand_chip *this = mtd->priv;
1458 int written = 0, column, thislen = 0, subpage = 0;
1459 int prev = 0, prevlen = 0, prev_subpage = 0, first = 1;
1460 int oobwritten = 0, oobcolumn, thisooblen, oobsize;
1461 size_t len = ops->len;
1462 size_t ooblen = ops->ooblen;
1463 const u_char *buf = ops->datbuf;
1464 const u_char *oob = ops->oobbuf;
1468 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ops_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1470 /* Initialize retlen, in case of early exit */
1474 /* Do not allow writes past end of device */
1475 if (unlikely((to + len) > mtd->size)) {
1476 printk(KERN_ERR "onenand_write_ops_nolock: Attempt write to past end of device\n");
1480 /* Reject writes, which are not page aligned */
1481 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
1482 printk(KERN_ERR "onenand_write_ops_nolock: Attempt to write not page aligned data\n");
1486 /* Check zero length */
1490 if (ops->mode == MTD_OOB_AUTO)
1491 oobsize = this->ecclayout->oobavail;
1493 oobsize = mtd->oobsize;
1495 oobcolumn = to & (mtd->oobsize - 1);
1497 column = to & (mtd->writesize - 1);
1499 /* Loop until all data write */
1501 if (written < len) {
1502 u_char *wbuf = (u_char *) buf;
1504 thislen = min_t(int, mtd->writesize - column, len - written);
1505 thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
1509 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1511 /* Partial page write */
1512 subpage = thislen < mtd->writesize;
1514 memset(this->page_buf, 0xff, mtd->writesize);
1515 memcpy(this->page_buf + column, buf, thislen);
1516 wbuf = this->page_buf;
1519 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1522 oobbuf = this->oob_buf;
1524 /* We send data to spare ram with oobsize
1525 * to prevent byte access */
1526 memset(oobbuf, 0xff, mtd->oobsize);
1527 if (ops->mode == MTD_OOB_AUTO)
1528 onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
1530 memcpy(oobbuf + oobcolumn, oob, thisooblen);
1532 oobwritten += thisooblen;
1536 oobbuf = (u_char *) ffchars;
1538 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1540 ONENAND_SET_NEXT_BUFFERRAM(this);
1543 * 2 PLANE, MLC, and Flex-OneNAND doesn't support
1544 * write-while-programe feature.
1546 if (!ONENAND_IS_2PLANE(this) && !first) {
1547 ONENAND_SET_PREV_BUFFERRAM(this);
1549 ret = this->wait(mtd, FL_WRITING);
1551 /* In partial page write we don't update bufferram */
1552 onenand_update_bufferram(mtd, prev, !ret && !prev_subpage);
1555 printk(KERN_ERR "onenand_write_ops_nolock: write filaed %d\n", ret);
1559 if (written == len) {
1560 /* Only check verify write turn on */
1561 ret = onenand_verify(mtd, buf - len, to - len, len);
1563 printk(KERN_ERR "onenand_write_ops_nolock: verify failed %d\n", ret);
1567 ONENAND_SET_NEXT_BUFFERRAM(this);
1570 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1573 * 2 PLANE, MLC, and Flex-OneNAND wait here
1575 if (ONENAND_IS_2PLANE(this)) {
1576 ret = this->wait(mtd, FL_WRITING);
1578 /* In partial page write we don't update bufferram */
1579 onenand_update_bufferram(mtd, to, !ret && !subpage);
1581 printk(KERN_ERR "onenand_write_ops_nolock: write filaed %d\n", ret);
1585 /* Only check verify write turn on */
1586 ret = onenand_verify(mtd, buf, to, thislen);
1588 printk(KERN_ERR "onenand_write_ops_nolock: verify failed %d\n", ret);
1601 prev_subpage = subpage;
1609 /* In error case, clear all bufferrams */
1611 onenand_invalidate_bufferram(mtd, 0, -1);
1613 ops->retlen = written;
1614 ops->oobretlen = oobwritten;
1621 * onenand_write_oob_nolock - [Internal] OneNAND write out-of-band
1622 * @param mtd MTD device structure
1623 * @param to offset to write to
1624 * @param len number of bytes to write
1625 * @param retlen pointer to variable to store the number of written bytes
1626 * @param buf the data to write
1627 * @param mode operation mode
1629 * OneNAND write out-of-band
1631 static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
1632 struct mtd_oob_ops *ops)
1634 struct onenand_chip *this = mtd->priv;
1635 int column, ret = 0, oobsize;
1638 size_t len = ops->ooblen;
1639 const u_char *buf = ops->oobbuf;
1640 mtd_oob_mode_t mode = ops->mode;
1644 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1646 /* Initialize retlen, in case of early exit */
1649 if (mode == MTD_OOB_AUTO)
1650 oobsize = this->ecclayout->oobavail;
1652 oobsize = mtd->oobsize;
1654 column = to & (mtd->oobsize - 1);
1656 if (unlikely(column >= oobsize)) {
1657 printk(KERN_ERR "onenand_write_oob_nolock: Attempted to start write outside oob\n");
1661 /* For compatibility with NAND: Do not allow write past end of page */
1662 if (unlikely(column + len > oobsize)) {
1663 printk(KERN_ERR "onenand_write_oob_nolock: "
1664 "Attempt to write past end of page\n");
1668 /* Do not allow reads past end of device */
1669 if (unlikely(to >= mtd->size ||
1670 column + len > ((mtd->size >> this->page_shift) -
1671 (to >> this->page_shift)) * oobsize)) {
1672 printk(KERN_ERR "onenand_write_oob_nolock: Attempted to write past end of device\n");
1676 oobbuf = this->oob_buf;
1678 /* Loop until all data write */
1679 while (written < len) {
1680 int thislen = min_t(int, oobsize, len - written);
1684 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1686 /* We send data to spare ram with oobsize
1687 * to prevent byte access */
1688 memset(oobbuf, 0xff, mtd->oobsize);
1689 if (mode == MTD_OOB_AUTO)
1690 onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
1692 memcpy(oobbuf + column, buf, thislen);
1693 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1695 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1697 onenand_update_bufferram(mtd, to, 0);
1698 if (ONENAND_IS_2PLANE(this)) {
1699 ONENAND_SET_BUFFERRAM1(this);
1700 onenand_update_bufferram(mtd, to + this->writesize, 0);
1703 ret = this->wait(mtd, FL_WRITING);
1705 printk(KERN_ERR "onenand_write_oob_nolock: write failed %d\n", ret);
1709 ret = onenand_verify_oob(mtd, oobbuf, to);
1711 printk(KERN_ERR "onenand_write_oob_nolock: verify failed %d\n", ret);
1719 to += mtd->writesize;
1724 ops->oobretlen = written;
1730 * onenand_write - [MTD Interface] write buffer to FLASH
1731 * @param mtd MTD device structure
1732 * @param to offset to write to
1733 * @param len number of bytes to write
1734 * @param retlen pointer to variable to store the number of written bytes
1735 * @param buf the data to write
1739 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
1740 size_t *retlen, const u_char *buf)
1742 struct mtd_oob_ops ops = {
1745 .datbuf = (u_char *) buf,
1750 onenand_get_device(mtd, FL_WRITING);
1751 ret = onenand_write_ops_nolock(mtd, to, &ops);
1752 onenand_release_device(mtd);
1754 *retlen = ops.retlen;
1759 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1760 * @param mtd: MTD device structure
1761 * @param to: offset to write
1762 * @param ops: oob operation description structure
1764 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1765 struct mtd_oob_ops *ops)
1769 switch (ops->mode) {
1774 /* Not implemented yet */
1779 onenand_get_device(mtd, FL_WRITING);
1781 ret = onenand_write_ops_nolock(mtd, to, ops);
1783 ret = onenand_write_oob_nolock(mtd, to, ops);
1784 onenand_release_device(mtd);
1790 * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
1791 * @param mtd MTD device structure
1792 * @param ofs offset from device start
1793 * @param allowbbt 1, if its allowed to access the bbt area
1795 * Check, if the block is bad. Either by reading the bad block table or
1796 * calling of the scan function.
1798 static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
1800 struct onenand_chip *this = mtd->priv;
1801 struct bbm_info *bbm = this->bbm;
1803 /* Return info from the table */
1804 return bbm->isbad_bbt(mtd, ofs, allowbbt);
1808 * onenand_erase - [MTD Interface] erase block(s)
1809 * @param mtd MTD device structure
1810 * @param instr erase instruction
1812 * Erase one ore more blocks
1814 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1816 struct onenand_chip *this = mtd->priv;
1817 unsigned int block_size;
1822 DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%012llx, len = %llu\n", (unsigned long long) instr->addr, (unsigned long long) instr->len);
1824 block_size = (1 << this->erase_shift);
1826 /* Start address must align on block boundary */
1827 if (unlikely(instr->addr & (block_size - 1))) {
1828 printk(KERN_ERR "onenand_erase: Unaligned address\n");
1832 /* Length must align on block boundary */
1833 if (unlikely(instr->len & (block_size - 1))) {
1834 printk(KERN_ERR "onenand_erase: Length not block aligned\n");
1838 /* Do not allow erase past end of device */
1839 if (unlikely((instr->len + instr->addr) > mtd->size)) {
1840 printk(KERN_ERR "onenand_erase: Erase past end of device\n");
1844 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
1846 /* Grab the lock and see if the device is available */
1847 onenand_get_device(mtd, FL_ERASING);
1849 /* Loop throught the pages */
1853 instr->state = MTD_ERASING;
1858 /* Check if we have a bad block, we do not erase bad blocks */
1859 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
1860 printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%012llx\n", (unsigned long long) addr);
1861 instr->state = MTD_ERASE_FAILED;
1865 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1867 onenand_invalidate_bufferram(mtd, addr, block_size);
1869 ret = this->wait(mtd, FL_ERASING);
1870 /* Check, if it is write protected */
1872 printk(KERN_ERR "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1873 instr->state = MTD_ERASE_FAILED;
1874 instr->fail_addr = addr;
1882 instr->state = MTD_ERASE_DONE;
1886 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1888 /* Deselect and wake up anyone waiting on the device */
1889 onenand_release_device(mtd);
1891 /* Do call back function */
1893 mtd_erase_callback(instr);
1899 * onenand_sync - [MTD Interface] sync
1900 * @param mtd MTD device structure
1902 * Sync is actually a wait for chip ready function
1904 static void onenand_sync(struct mtd_info *mtd)
1906 DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1908 /* Grab the lock and see if the device is available */
1909 onenand_get_device(mtd, FL_SYNCING);
1911 /* Release it and go back */
1912 onenand_release_device(mtd);
1916 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1917 * @param mtd MTD device structure
1918 * @param ofs offset relative to mtd start
1920 * Check whether the block is bad
1922 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1926 /* Check for invalid offset */
1927 if (ofs > mtd->size)
1930 onenand_get_device(mtd, FL_READING);
1931 ret = onenand_block_isbad_nolock(mtd, ofs, 0);
1932 onenand_release_device(mtd);
1937 * onenand_default_block_markbad - [DEFAULT] mark a block bad
1938 * @param mtd MTD device structure
1939 * @param ofs offset from device start
1941 * This is the default implementation, which can be overridden by
1942 * a hardware specific driver.
1944 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1946 struct onenand_chip *this = mtd->priv;
1947 struct bbm_info *bbm = this->bbm;
1948 u_char buf[2] = {0, 0};
1949 struct mtd_oob_ops ops = {
1950 .mode = MTD_OOB_PLACE,
1957 /* Get block number */
1958 block = ((int) ofs) >> bbm->bbt_erase_shift;
1960 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1962 /* We write two bytes, so we dont have to mess with 16 bit access */
1963 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1964 return onenand_write_oob_nolock(mtd, ofs, &ops);
1968 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1969 * @param mtd MTD device structure
1970 * @param ofs offset relative to mtd start
1972 * Mark the block as bad
1974 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1976 struct onenand_chip *this = mtd->priv;
1979 ret = onenand_block_isbad(mtd, ofs);
1981 /* If it was bad already, return success and do nothing */
1987 onenand_get_device(mtd, FL_WRITING);
1988 ret = this->block_markbad(mtd, ofs);
1989 onenand_release_device(mtd);
1994 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1995 * @param mtd MTD device structure
1996 * @param ofs offset relative to mtd start
1997 * @param len number of bytes to lock or unlock
1998 * @param cmd lock or unlock command
2000 * Lock or unlock one or more blocks
2002 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
2004 struct onenand_chip *this = mtd->priv;
2005 int start, end, block, value, status;
2008 start = ofs >> this->erase_shift;
2009 end = len >> this->erase_shift;
2011 if (cmd == ONENAND_CMD_LOCK)
2012 wp_status_mask = ONENAND_WP_LS;
2014 wp_status_mask = ONENAND_WP_US;
2016 /* Continuous lock scheme */
2017 if (this->options & ONENAND_HAS_CONT_LOCK) {
2018 /* Set start block address */
2019 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2020 /* Set end block address */
2021 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
2022 /* Write lock command */
2023 this->command(mtd, cmd, 0, 0);
2025 /* There's no return value */
2026 this->wait(mtd, FL_LOCKING);
2029 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2030 & ONENAND_CTRL_ONGO)
2033 /* Check lock status */
2034 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2035 if (!(status & wp_status_mask))
2036 printk(KERN_ERR "wp status = 0x%x\n", status);
2041 /* Block lock scheme */
2042 for (block = start; block < start + end; block++) {
2043 /* Set block address */
2044 value = onenand_block_address(this, block);
2045 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2046 /* Select DataRAM for DDP */
2047 value = onenand_bufferram_address(this, block);
2048 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2049 /* Set start block address */
2050 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2051 /* Write lock command */
2052 this->command(mtd, cmd, 0, 0);
2054 /* There's no return value */
2055 this->wait(mtd, FL_LOCKING);
2058 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2059 & ONENAND_CTRL_ONGO)
2062 /* Check lock status */
2063 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2064 if (!(status & wp_status_mask))
2065 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
2072 * onenand_lock - [MTD Interface] Lock block(s)
2073 * @param mtd MTD device structure
2074 * @param ofs offset relative to mtd start
2075 * @param len number of bytes to unlock
2077 * Lock one or more blocks
2079 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
2083 onenand_get_device(mtd, FL_LOCKING);
2084 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
2085 onenand_release_device(mtd);
2090 * onenand_unlock - [MTD Interface] Unlock block(s)
2091 * @param mtd MTD device structure
2092 * @param ofs offset relative to mtd start
2093 * @param len number of bytes to unlock
2095 * Unlock one or more blocks
2097 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
2101 onenand_get_device(mtd, FL_LOCKING);
2102 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2103 onenand_release_device(mtd);
2108 * onenand_check_lock_status - [OneNAND Interface] Check lock status
2109 * @param this onenand chip data structure
2113 static int onenand_check_lock_status(struct onenand_chip *this)
2115 unsigned int value, block, status;
2118 end = this->chipsize >> this->erase_shift;
2119 for (block = 0; block < end; block++) {
2120 /* Set block address */
2121 value = onenand_block_address(this, block);
2122 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2123 /* Select DataRAM for DDP */
2124 value = onenand_bufferram_address(this, block);
2125 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2126 /* Set start block address */
2127 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2129 /* Check lock status */
2130 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2131 if (!(status & ONENAND_WP_US)) {
2132 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
2141 * onenand_unlock_all - [OneNAND Interface] unlock all blocks
2142 * @param mtd MTD device structure
2146 static void onenand_unlock_all(struct mtd_info *mtd)
2148 struct onenand_chip *this = mtd->priv;
2150 size_t len = this->chipsize;
2152 if (this->options & ONENAND_HAS_UNLOCK_ALL) {
2153 /* Set start block address */
2154 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2155 /* Write unlock command */
2156 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
2158 /* There's no return value */
2159 this->wait(mtd, FL_LOCKING);
2162 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2163 & ONENAND_CTRL_ONGO)
2166 /* Check lock status */
2167 if (onenand_check_lock_status(this))
2170 /* Workaround for all block unlock in DDP */
2171 if (ONENAND_IS_DDP(this)) {
2172 /* All blocks on another chip */
2173 ofs = this->chipsize >> 1;
2174 len = this->chipsize >> 1;
2178 onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2181 #ifdef CONFIG_MTD_ONENAND_OTP
2183 /* Interal OTP operation */
2184 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
2185 size_t *retlen, u_char *buf);
2188 * do_otp_read - [DEFAULT] Read OTP block area
2189 * @param mtd MTD device structure
2190 * @param from The offset to read
2191 * @param len number of bytes to read
2192 * @param retlen pointer to variable to store the number of readbytes
2193 * @param buf the databuffer to put/get data
2195 * Read OTP block area.
2197 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
2198 size_t *retlen, u_char *buf)
2200 struct onenand_chip *this = mtd->priv;
2201 struct mtd_oob_ops ops = {
2209 /* Enter OTP access mode */
2210 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2211 this->wait(mtd, FL_OTPING);
2213 ret = onenand_read_ops_nolock(mtd, from, &ops);
2215 /* Exit OTP access mode */
2216 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2217 this->wait(mtd, FL_RESETING);
2223 * do_otp_write - [DEFAULT] Write OTP block area
2224 * @param mtd MTD device structure
2225 * @param to The offset to write
2226 * @param len number of bytes to write
2227 * @param retlen pointer to variable to store the number of write bytes
2228 * @param buf the databuffer to put/get data
2230 * Write OTP block area.
2232 static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
2233 size_t *retlen, u_char *buf)
2235 struct onenand_chip *this = mtd->priv;
2236 unsigned char *pbuf = buf;
2238 struct mtd_oob_ops ops;
2240 /* Force buffer page aligned */
2241 if (len < mtd->writesize) {
2242 memcpy(this->page_buf, buf, len);
2243 memset(this->page_buf + len, 0xff, mtd->writesize - len);
2244 pbuf = this->page_buf;
2245 len = mtd->writesize;
2248 /* Enter OTP access mode */
2249 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2250 this->wait(mtd, FL_OTPING);
2256 ret = onenand_write_ops_nolock(mtd, to, &ops);
2257 *retlen = ops.retlen;
2259 /* Exit OTP access mode */
2260 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2261 this->wait(mtd, FL_RESETING);
2267 * do_otp_lock - [DEFAULT] Lock OTP block area
2268 * @param mtd MTD device structure
2269 * @param from The offset to lock
2270 * @param len number of bytes to lock
2271 * @param retlen pointer to variable to store the number of lock bytes
2272 * @param buf the databuffer to put/get data
2274 * Lock OTP block area.
2276 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
2277 size_t *retlen, u_char *buf)
2279 struct onenand_chip *this = mtd->priv;
2280 struct mtd_oob_ops ops = {
2281 .mode = MTD_OOB_PLACE,
2288 /* Enter OTP access mode */
2289 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2290 this->wait(mtd, FL_OTPING);
2292 ret = onenand_write_oob_nolock(mtd, from, &ops);
2294 *retlen = ops.oobretlen;
2296 /* Exit OTP access mode */
2297 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2298 this->wait(mtd, FL_RESETING);
2304 * onenand_otp_walk - [DEFAULT] Handle OTP operation
2305 * @param mtd MTD device structure
2306 * @param from The offset to read/write
2307 * @param len number of bytes to read/write
2308 * @param retlen pointer to variable to store the number of read bytes
2309 * @param buf the databuffer to put/get data
2310 * @param action do given action
2311 * @param mode specify user and factory
2313 * Handle OTP operation.
2315 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
2316 size_t *retlen, u_char *buf,
2317 otp_op_t action, int mode)
2319 struct onenand_chip *this = mtd->priv;
2326 density = onenand_get_density(this->device_id);
2327 if (density < ONENAND_DEVICE_DENSITY_512Mb)
2332 if (mode == MTD_OTP_FACTORY) {
2333 from += mtd->writesize * otp_pages;
2334 otp_pages = 64 - otp_pages;
2337 /* Check User/Factory boundary */
2338 if (((mtd->writesize * otp_pages) - (from + len)) < 0)
2341 onenand_get_device(mtd, FL_OTPING);
2342 while (len > 0 && otp_pages > 0) {
2343 if (!action) { /* OTP Info functions */
2344 struct otp_info *otpinfo;
2346 len -= sizeof(struct otp_info);
2352 otpinfo = (struct otp_info *) buf;
2353 otpinfo->start = from;
2354 otpinfo->length = mtd->writesize;
2355 otpinfo->locked = 0;
2357 from += mtd->writesize;
2358 buf += sizeof(struct otp_info);
2359 *retlen += sizeof(struct otp_info);
2364 ret = action(mtd, from, len, &tmp_retlen, buf);
2375 onenand_release_device(mtd);
2381 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
2382 * @param mtd MTD device structure
2383 * @param buf the databuffer to put/get data
2384 * @param len number of bytes to read
2386 * Read factory OTP info.
2388 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
2389 struct otp_info *buf, size_t len)
2394 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
2396 return ret ? : retlen;
2400 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
2401 * @param mtd MTD device structure
2402 * @param from The offset to read
2403 * @param len number of bytes to read
2404 * @param retlen pointer to variable to store the number of read bytes
2405 * @param buf the databuffer to put/get data
2407 * Read factory OTP area.
2409 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
2410 size_t len, size_t *retlen, u_char *buf)
2412 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
2416 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
2417 * @param mtd MTD device structure
2418 * @param buf the databuffer to put/get data
2419 * @param len number of bytes to read
2421 * Read user OTP info.
2423 static int onenand_get_user_prot_info(struct mtd_info *mtd,
2424 struct otp_info *buf, size_t len)
2429 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
2431 return ret ? : retlen;
2435 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
2436 * @param mtd MTD device structure
2437 * @param from The offset to read
2438 * @param len number of bytes to read
2439 * @param retlen pointer to variable to store the number of read bytes
2440 * @param buf the databuffer to put/get data
2442 * Read user OTP area.
2444 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
2445 size_t len, size_t *retlen, u_char *buf)
2447 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
2451 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
2452 * @param mtd MTD device structure
2453 * @param from The offset to write
2454 * @param len number of bytes to write
2455 * @param retlen pointer to variable to store the number of write bytes
2456 * @param buf the databuffer to put/get data
2458 * Write user OTP area.
2460 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
2461 size_t len, size_t *retlen, u_char *buf)
2463 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
2467 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
2468 * @param mtd MTD device structure
2469 * @param from The offset to lock
2470 * @param len number of bytes to unlock
2472 * Write lock mark on spare area in page 0 in OTP block
2474 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
2477 struct onenand_chip *this = mtd->priv;
2478 u_char *oob_buf = this->oob_buf;
2482 memset(oob_buf, 0xff, mtd->oobsize);
2484 * Note: OTP lock operation
2485 * OTP block : 0xXXFC
2486 * 1st block : 0xXXF3 (If chip support)
2487 * Both : 0xXXF0 (If chip support)
2489 oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
2492 * Write lock mark to 8th word of sector0 of page0 of the spare0.
2493 * We write 16 bytes spare area instead of 2 bytes.
2498 ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
2500 return ret ? : retlen;
2502 #endif /* CONFIG_MTD_ONENAND_OTP */
2505 * onenand_check_features - Check and set OneNAND features
2506 * @param mtd MTD data structure
2508 * Check and set OneNAND features
2512 static void onenand_check_features(struct mtd_info *mtd)
2514 struct onenand_chip *this = mtd->priv;
2515 unsigned int density, process;
2517 /* Lock scheme depends on density and process */
2518 density = onenand_get_density(this->device_id);
2519 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
2523 case ONENAND_DEVICE_DENSITY_4Gb:
2524 this->options |= ONENAND_HAS_2PLANE;
2526 case ONENAND_DEVICE_DENSITY_2Gb:
2527 /* 2Gb DDP don't have 2 plane */
2528 if (!ONENAND_IS_DDP(this))
2529 this->options |= ONENAND_HAS_2PLANE;
2530 this->options |= ONENAND_HAS_UNLOCK_ALL;
2532 case ONENAND_DEVICE_DENSITY_1Gb:
2533 /* A-Die has all block unlock */
2535 this->options |= ONENAND_HAS_UNLOCK_ALL;
2539 /* Some OneNAND has continuous lock scheme */
2541 this->options |= ONENAND_HAS_CONT_LOCK;
2545 if (this->options & ONENAND_HAS_CONT_LOCK)
2546 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
2547 if (this->options & ONENAND_HAS_UNLOCK_ALL)
2548 printk(KERN_DEBUG "Chip support all block unlock\n");
2549 if (this->options & ONENAND_HAS_2PLANE)
2550 printk(KERN_DEBUG "Chip has 2 plane\n");
2554 * onenand_print_device_info - Print device & version ID
2555 * @param device device ID
2556 * @param version version ID
2558 * Print device & version ID
2560 static void onenand_print_device_info(int device, int version)
2562 int vcc, demuxed, ddp, density;
2564 vcc = device & ONENAND_DEVICE_VCC_MASK;
2565 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
2566 ddp = device & ONENAND_DEVICE_IS_DDP;
2567 density = onenand_get_density(device);
2568 printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
2569 demuxed ? "" : "Muxed ",
2572 vcc ? "2.65/3.3" : "1.8",
2574 printk(KERN_INFO "OneNAND version = 0x%04x\n", version);
2577 static const struct onenand_manufacturers onenand_manuf_ids[] = {
2578 {ONENAND_MFR_SAMSUNG, "Samsung"},
2582 * onenand_check_maf - Check manufacturer ID
2583 * @param manuf manufacturer ID
2585 * Check manufacturer ID
2587 static int onenand_check_maf(int manuf)
2589 int size = ARRAY_SIZE(onenand_manuf_ids);
2593 for (i = 0; i < size; i++)
2594 if (manuf == onenand_manuf_ids[i].id)
2598 name = onenand_manuf_ids[i].name;
2602 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
2608 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
2609 * @param mtd MTD device structure
2611 * OneNAND detection method:
2612 * Compare the values from command with ones from register
2614 static int onenand_probe(struct mtd_info *mtd)
2616 struct onenand_chip *this = mtd->priv;
2617 int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
2621 /* Save system configuration 1 */
2622 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
2623 /* Clear Sync. Burst Read mode to read BootRAM */
2624 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
2626 /* Send the command for reading device ID from BootRAM */
2627 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
2629 /* Read manufacturer and device IDs from BootRAM */
2630 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
2631 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
2633 /* Reset OneNAND to read default register values */
2634 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
2636 this->wait(mtd, FL_RESETING);
2638 /* Restore system configuration 1 */
2639 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
2641 /* Check manufacturer ID */
2642 if (onenand_check_maf(bram_maf_id))
2645 /* Read manufacturer and device IDs from Register */
2646 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
2647 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
2648 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
2650 /* Check OneNAND device */
2651 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
2654 /* Flash device information */
2655 onenand_print_device_info(dev_id, ver_id);
2656 this->device_id = dev_id;
2657 this->version_id = ver_id;
2659 density = onenand_get_density(dev_id);
2660 this->chipsize = (16 << density) << 20;
2661 /* Set density mask. it is used for DDP */
2662 if (ONENAND_IS_DDP(this))
2663 this->density_mask = (1 << (density + 6));
2665 this->density_mask = 0;
2667 /* OneNAND page size & block size */
2668 /* The data buffer size is equal to page size */
2669 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
2670 mtd->oobsize = mtd->writesize >> 5;
2671 /* Pages per a block are always 64 in OneNAND */
2672 mtd->erasesize = mtd->writesize << 6;
2674 this->erase_shift = ffs(mtd->erasesize) - 1;
2675 this->page_shift = ffs(mtd->writesize) - 1;
2676 this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
2677 /* It's real page size */
2678 this->writesize = mtd->writesize;
2680 /* REVIST: Multichip handling */
2682 mtd->size = this->chipsize;
2684 /* Check OneNAND features */
2685 onenand_check_features(mtd);
2688 * We emulate the 4KiB page and 256KiB erase block size
2689 * But oobsize is still 64 bytes.
2690 * It is only valid if you turn on 2X program support,
2691 * Otherwise it will be ignored by compiler.
2693 if (ONENAND_IS_2PLANE(this)) {
2694 mtd->writesize <<= 1;
2695 mtd->erasesize <<= 1;
2702 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
2703 * @param mtd MTD device structure
2705 static int onenand_suspend(struct mtd_info *mtd)
2707 return onenand_get_device(mtd, FL_PM_SUSPENDED);
2711 * onenand_resume - [MTD Interface] Resume the OneNAND flash
2712 * @param mtd MTD device structure
2714 static void onenand_resume(struct mtd_info *mtd)
2716 struct onenand_chip *this = mtd->priv;
2718 if (this->state == FL_PM_SUSPENDED)
2719 onenand_release_device(mtd);
2721 printk(KERN_ERR "resume() called for the chip which is not"
2722 "in suspended state\n");
2726 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
2727 * @param mtd MTD device structure
2728 * @param maxchips Number of chips to scan for
2730 * This fills out all the not initialized function pointers
2731 * with the defaults.
2732 * The flash ID is read and the mtd/chip structures are
2733 * filled with the appropriate values.
2735 int onenand_scan(struct mtd_info *mtd, int maxchips)
2738 struct onenand_chip *this = mtd->priv;
2740 if (!this->read_word)
2741 this->read_word = onenand_readw;
2742 if (!this->write_word)
2743 this->write_word = onenand_writew;
2746 this->command = onenand_command;
2748 onenand_setup_wait(mtd);
2750 if (!this->read_bufferram)
2751 this->read_bufferram = onenand_read_bufferram;
2752 if (!this->write_bufferram)
2753 this->write_bufferram = onenand_write_bufferram;
2755 if (!this->block_markbad)
2756 this->block_markbad = onenand_default_block_markbad;
2757 if (!this->scan_bbt)
2758 this->scan_bbt = onenand_default_bbt;
2760 if (onenand_probe(mtd))
2763 /* Set Sync. Burst Read after probing */
2764 if (this->mmcontrol) {
2765 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2766 this->read_bufferram = onenand_sync_read_bufferram;
2769 /* Allocate buffers, if necessary */
2770 if (!this->page_buf) {
2771 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
2772 if (!this->page_buf) {
2773 printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2776 this->options |= ONENAND_PAGEBUF_ALLOC;
2778 if (!this->oob_buf) {
2779 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
2780 if (!this->oob_buf) {
2781 printk(KERN_ERR "onenand_scan(): Can't allocate oob_buf\n");
2782 if (this->options & ONENAND_PAGEBUF_ALLOC) {
2783 this->options &= ~ONENAND_PAGEBUF_ALLOC;
2784 kfree(this->page_buf);
2788 this->options |= ONENAND_OOBBUF_ALLOC;
2791 this->state = FL_READY;
2792 init_waitqueue_head(&this->wq);
2793 spin_lock_init(&this->chip_lock);
2796 * Allow subpage writes up to oobsize.
2798 switch (mtd->oobsize) {
2800 this->ecclayout = &onenand_oob_64;
2801 mtd->subpage_sft = 2;
2805 this->ecclayout = &onenand_oob_32;
2806 mtd->subpage_sft = 1;
2810 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2812 mtd->subpage_sft = 0;
2813 /* To prevent kernel oops */
2814 this->ecclayout = &onenand_oob_32;
2818 this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2821 * The number of bytes available for a client to place data into
2822 * the out of band area
2824 this->ecclayout->oobavail = 0;
2825 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES &&
2826 this->ecclayout->oobfree[i].length; i++)
2827 this->ecclayout->oobavail +=
2828 this->ecclayout->oobfree[i].length;
2829 mtd->oobavail = this->ecclayout->oobavail;
2831 mtd->ecclayout = this->ecclayout;
2833 /* Fill in remaining MTD driver data */
2834 mtd->type = MTD_NANDFLASH;
2835 mtd->flags = MTD_CAP_NANDFLASH;
2836 mtd->erase = onenand_erase;
2838 mtd->unpoint = NULL;
2839 mtd->read = onenand_read;
2840 mtd->write = onenand_write;
2841 mtd->read_oob = onenand_read_oob;
2842 mtd->write_oob = onenand_write_oob;
2843 mtd->panic_write = onenand_panic_write;
2844 #ifdef CONFIG_MTD_ONENAND_OTP
2845 mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2846 mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2847 mtd->get_user_prot_info = onenand_get_user_prot_info;
2848 mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2849 mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2850 mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2852 mtd->sync = onenand_sync;
2853 mtd->lock = onenand_lock;
2854 mtd->unlock = onenand_unlock;
2855 mtd->suspend = onenand_suspend;
2856 mtd->resume = onenand_resume;
2857 mtd->block_isbad = onenand_block_isbad;
2858 mtd->block_markbad = onenand_block_markbad;
2859 mtd->owner = THIS_MODULE;
2861 /* Unlock whole block */
2862 onenand_unlock_all(mtd);
2864 return this->scan_bbt(mtd);
2868 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2869 * @param mtd MTD device structure
2871 void onenand_release(struct mtd_info *mtd)
2873 struct onenand_chip *this = mtd->priv;
2875 #ifdef CONFIG_MTD_PARTITIONS
2876 /* Deregister partitions */
2877 del_mtd_partitions (mtd);
2879 /* Deregister the device */
2880 del_mtd_device (mtd);
2882 /* Free bad block table memory, if allocated */
2884 struct bbm_info *bbm = this->bbm;
2888 /* Buffers allocated by onenand_scan */
2889 if (this->options & ONENAND_PAGEBUF_ALLOC)
2890 kfree(this->page_buf);
2891 if (this->options & ONENAND_OOBBUF_ALLOC)
2892 kfree(this->oob_buf);
2895 EXPORT_SYMBOL_GPL(onenand_scan);
2896 EXPORT_SYMBOL_GPL(onenand_release);
2898 MODULE_LICENSE("GPL");
2899 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2900 MODULE_DESCRIPTION("Generic OneNAND flash driver code");