2 * TQM 8540 Device Tree Source
4 * Copyright 2008 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
15 model = "tqc,tqm8540";
16 compatible = "tqc,tqm8540";
36 d-cache-line-size = <32>;
37 i-cache-line-size = <32>;
38 d-cache-size = <32768>;
39 i-cache-size = <32768>;
40 timebase-frequency = <0>;
42 clock-frequency = <0>;
43 next-level-cache = <&L2>;
48 device_type = "memory";
49 reg = <0x00000000 0x10000000>;
56 ranges = <0x0 0xe0000000 0x100000>;
57 reg = <0xe0000000 0x200>;
59 compatible = "fsl,mpc8540-immr", "simple-bus";
62 compatible = "fsl,ecm-law";
68 compatible = "fsl,mpc8540-ecm", "fsl,ecm";
69 reg = <0x1000 0x1000>;
71 interrupt-parent = <&mpic>;
74 memory-controller@2000 {
75 compatible = "fsl,mpc8540-memory-controller";
76 reg = <0x2000 0x1000>;
77 interrupt-parent = <&mpic>;
81 L2: l2-cache-controller@20000 {
82 compatible = "fsl,mpc8540-l2-cache-controller";
83 reg = <0x20000 0x1000>;
84 cache-line-size = <32>;
85 cache-size = <0x40000>; // L2, 256K
86 interrupt-parent = <&mpic>;
94 compatible = "fsl-i2c";
97 interrupt-parent = <&mpic>;
101 compatible = "national,lm75";
106 compatible = "dallas,ds1337";
112 #address-cells = <1>;
114 compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
116 ranges = <0x0 0x21100 0x200>;
119 compatible = "fsl,mpc8540-dma-channel",
120 "fsl,eloplus-dma-channel";
123 interrupt-parent = <&mpic>;
127 compatible = "fsl,mpc8540-dma-channel",
128 "fsl,eloplus-dma-channel";
131 interrupt-parent = <&mpic>;
135 compatible = "fsl,mpc8540-dma-channel",
136 "fsl,eloplus-dma-channel";
139 interrupt-parent = <&mpic>;
143 compatible = "fsl,mpc8540-dma-channel",
144 "fsl,eloplus-dma-channel";
147 interrupt-parent = <&mpic>;
152 enet0: ethernet@24000 {
153 #address-cells = <1>;
156 device_type = "network";
158 compatible = "gianfar";
159 reg = <0x24000 0x1000>;
160 ranges = <0x0 0x24000 0x1000>;
161 local-mac-address = [ 00 00 00 00 00 00 ];
162 interrupts = <29 2 30 2 34 2>;
163 interrupt-parent = <&mpic>;
164 phy-handle = <&phy2>;
167 #address-cells = <1>;
169 compatible = "fsl,gianfar-mdio";
172 phy1: ethernet-phy@1 {
173 interrupt-parent = <&mpic>;
176 device_type = "ethernet-phy";
178 phy2: ethernet-phy@2 {
179 interrupt-parent = <&mpic>;
182 device_type = "ethernet-phy";
184 phy3: ethernet-phy@3 {
185 interrupt-parent = <&mpic>;
188 device_type = "ethernet-phy";
192 device_type = "tbi-phy";
197 enet1: ethernet@25000 {
198 #address-cells = <1>;
201 device_type = "network";
203 compatible = "gianfar";
204 reg = <0x25000 0x1000>;
205 ranges = <0x0 0x25000 0x1000>;
206 local-mac-address = [ 00 00 00 00 00 00 ];
207 interrupts = <35 2 36 2 40 2>;
208 interrupt-parent = <&mpic>;
209 phy-handle = <&phy1>;
212 #address-cells = <1>;
214 compatible = "fsl,gianfar-tbi";
219 device_type = "tbi-phy";
224 enet2: ethernet@26000 {
225 #address-cells = <1>;
228 device_type = "network";
230 compatible = "gianfar";
231 reg = <0x26000 0x1000>;
232 ranges = <0x0 0x26000 0x1000>;
233 local-mac-address = [ 00 00 00 00 00 00 ];
235 interrupt-parent = <&mpic>;
236 phy-handle = <&phy3>;
239 #address-cells = <1>;
241 compatible = "fsl,gianfar-tbi";
246 device_type = "tbi-phy";
251 serial0: serial@4500 {
253 device_type = "serial";
254 compatible = "ns16550";
255 reg = <0x4500 0x100>; // reg base, size
256 clock-frequency = <0>; // should we fill in in uboot?
258 interrupt-parent = <&mpic>;
261 serial1: serial@4600 {
263 device_type = "serial";
264 compatible = "ns16550";
265 reg = <0x4600 0x100>; // reg base, size
266 clock-frequency = <0>; // should we fill in in uboot?
268 interrupt-parent = <&mpic>;
272 interrupt-controller;
273 #address-cells = <0>;
274 #interrupt-cells = <2>;
275 reg = <0x40000 0x40000>;
276 device_type = "open-pic";
277 compatible = "chrp,open-pic";
282 #interrupt-cells = <1>;
284 #address-cells = <3>;
285 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
287 reg = <0xe0008000 0x1000>;
288 clock-frequency = <66666666>;
289 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
292 0xe000 0 0 1 &mpic 2 1
293 0xe000 0 0 2 &mpic 3 1>;
295 interrupt-parent = <&mpic>;
298 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
299 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;