3 extern void phy_calibration_winbond(hw_data_t *phw_data, u32 frequency);
5 // TRUE : read command process successfully
6 // FALSE : register not support
7 // RegisterNo : start base
8 // pRegisterData : data point
9 // NumberOfData : number of register data
10 // Flag : AUTO_INCREMENT - RegisterNo will auto increment 4
11 // NO_INCREMENT - Function will write data into the same register
13 Wb35Reg_BurstWrite(phw_data_t pHwData, u16 RegisterNo, u32 * pRegisterData, u8 NumberOfData, u8 Flag)
15 PWB35REG pWb35Reg = &pHwData->Wb35Reg;
17 PREG_QUEUE pRegQueue = NULL;
19 struct usb_ctrlrequest *dr;
20 u16 i, DataSize = NumberOfData*4;
23 if (pHwData->SurpriseRemove)
26 // Trying to use burst write function if use new hardware
27 UrbSize = sizeof(REG_QUEUE) + DataSize + sizeof(struct usb_ctrlrequest);
28 OS_MEMORY_ALLOC( (void* *)&pRegQueue, UrbSize );
29 pUrb = wb_usb_alloc_urb(0);
30 if( pUrb && pRegQueue ) {
31 pRegQueue->DIRECT = 2;// burst write register
32 pRegQueue->INDEX = RegisterNo;
33 pRegQueue->pBuffer = (u32 *)((u8 *)pRegQueue + sizeof(REG_QUEUE));
34 memcpy( pRegQueue->pBuffer, pRegisterData, DataSize );
35 //the function for reversing register data from little endian to big endian
36 for( i=0; i<NumberOfData ; i++ )
37 pRegQueue->pBuffer[i] = cpu_to_le32( pRegQueue->pBuffer[i] );
39 dr = (struct usb_ctrlrequest *)((u8 *)pRegQueue + sizeof(REG_QUEUE) + DataSize);
40 dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
41 dr->bRequest = 0x04; // USB or vendor-defined request code, burst mode
42 dr->wValue = cpu_to_le16( Flag ); // 0: Register number auto-increment, 1: No auto increment
43 dr->wIndex = cpu_to_le16( RegisterNo );
44 dr->wLength = cpu_to_le16( DataSize );
45 pRegQueue->Next = NULL;
46 pRegQueue->pUsbReq = dr;
47 pRegQueue->pUrb = pUrb;
49 spin_lock_irq( &pWb35Reg->EP0VM_spin_lock );
50 if (pWb35Reg->pRegFirst == NULL)
51 pWb35Reg->pRegFirst = pRegQueue;
53 pWb35Reg->pRegLast->Next = pRegQueue;
54 pWb35Reg->pRegLast = pRegQueue;
56 spin_unlock_irq( &pWb35Reg->EP0VM_spin_lock );
59 Wb35Reg_EP0VM_start(pHwData);
73 Wb35Reg_Update(phw_data_t pHwData, u16 RegisterNo, u32 RegisterValue)
75 PWB35REG pWb35Reg = &pHwData->Wb35Reg;
77 case 0x3b0: pWb35Reg->U1B0 = RegisterValue; break;
78 case 0x3bc: pWb35Reg->U1BC_LEDConfigure = RegisterValue; break;
79 case 0x400: pWb35Reg->D00_DmaControl = RegisterValue; break;
80 case 0x800: pWb35Reg->M00_MacControl = RegisterValue; break;
81 case 0x804: pWb35Reg->M04_MulticastAddress1 = RegisterValue; break;
82 case 0x808: pWb35Reg->M08_MulticastAddress2 = RegisterValue; break;
83 case 0x824: pWb35Reg->M24_MacControl = RegisterValue; break;
84 case 0x828: pWb35Reg->M28_MacControl = RegisterValue; break;
85 case 0x82c: pWb35Reg->M2C_MacControl = RegisterValue; break;
86 case 0x838: pWb35Reg->M38_MacControl = RegisterValue; break;
87 case 0x840: pWb35Reg->M40_MacControl = RegisterValue; break;
88 case 0x844: pWb35Reg->M44_MacControl = RegisterValue; break;
89 case 0x848: pWb35Reg->M48_MacControl = RegisterValue; break;
90 case 0x84c: pWb35Reg->M4C_MacStatus = RegisterValue; break;
91 case 0x860: pWb35Reg->M60_MacControl = RegisterValue; break;
92 case 0x868: pWb35Reg->M68_MacControl = RegisterValue; break;
93 case 0x870: pWb35Reg->M70_MacControl = RegisterValue; break;
94 case 0x874: pWb35Reg->M74_MacControl = RegisterValue; break;
95 case 0x878: pWb35Reg->M78_ERPInformation = RegisterValue; break;
96 case 0x87C: pWb35Reg->M7C_MacControl = RegisterValue; break;
97 case 0x880: pWb35Reg->M80_MacControl = RegisterValue; break;
98 case 0x884: pWb35Reg->M84_MacControl = RegisterValue; break;
99 case 0x888: pWb35Reg->M88_MacControl = RegisterValue; break;
100 case 0x898: pWb35Reg->M98_MacControl = RegisterValue; break;
101 case 0x100c: pWb35Reg->BB0C = RegisterValue; break;
102 case 0x102c: pWb35Reg->BB2C = RegisterValue; break;
103 case 0x1030: pWb35Reg->BB30 = RegisterValue; break;
104 case 0x103c: pWb35Reg->BB3C = RegisterValue; break;
105 case 0x1048: pWb35Reg->BB48 = RegisterValue; break;
106 case 0x104c: pWb35Reg->BB4C = RegisterValue; break;
107 case 0x1050: pWb35Reg->BB50 = RegisterValue; break;
108 case 0x1054: pWb35Reg->BB54 = RegisterValue; break;
109 case 0x1058: pWb35Reg->BB58 = RegisterValue; break;
110 case 0x105c: pWb35Reg->BB5C = RegisterValue; break;
111 case 0x1060: pWb35Reg->BB60 = RegisterValue; break;
115 // TRUE : read command process successfully
116 // FALSE : register not support
118 Wb35Reg_WriteSync( phw_data_t pHwData, u16 RegisterNo, u32 RegisterValue )
120 PWB35REG pWb35Reg = &pHwData->Wb35Reg;
124 if (pHwData->SurpriseRemove)
127 RegisterValue = cpu_to_le32(RegisterValue);
129 // update the register by send usb message------------------------------------
130 pWb35Reg->SyncIoPause = 1;
132 // 20060717.5 Wait until EP0VM stop
133 while (pWb35Reg->EP0vm_state != VM_STOP)
137 pWb35Reg->EP0vm_state = VM_RUNNING;
138 ret = usb_control_msg( pHwData->WbUsb.udev,
139 usb_sndctrlpipe( pHwData->WbUsb.udev, 0 ),
140 0x03, USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT,
141 0x0,RegisterNo, &RegisterValue, 4, HZ*100 );
142 pWb35Reg->EP0vm_state = VM_STOP;
143 pWb35Reg->SyncIoPause = 0;
145 Wb35Reg_EP0VM_start(pHwData);
149 WBDEBUG(("EP0 Write register usb message sending error\n"));
152 pHwData->SurpriseRemove = 1; // 20060704.2
159 // TRUE : read command process successfully
160 // FALSE : register not support
162 Wb35Reg_Write( phw_data_t pHwData, u16 RegisterNo, u32 RegisterValue )
164 PWB35REG pWb35Reg = &pHwData->Wb35Reg;
165 struct usb_ctrlrequest *dr;
167 PREG_QUEUE pRegQueue = NULL;
172 if (pHwData->SurpriseRemove)
175 // update the register by send urb request------------------------------------
176 UrbSize = sizeof(REG_QUEUE) + sizeof(struct usb_ctrlrequest);
177 OS_MEMORY_ALLOC( (void* *)&pRegQueue, UrbSize );
178 pUrb = wb_usb_alloc_urb(0);
179 if (pUrb && pRegQueue) {
180 pRegQueue->DIRECT = 1;// burst write register
181 pRegQueue->INDEX = RegisterNo;
182 pRegQueue->VALUE = cpu_to_le32(RegisterValue);
183 pRegQueue->RESERVED_VALID = FALSE;
184 dr = (struct usb_ctrlrequest *)((u8 *)pRegQueue + sizeof(REG_QUEUE));
185 dr->bRequestType = USB_TYPE_VENDOR|USB_DIR_OUT |USB_RECIP_DEVICE;
186 dr->bRequest = 0x03; // USB or vendor-defined request code, burst mode
187 dr->wValue = cpu_to_le16(0x0);
188 dr->wIndex = cpu_to_le16(RegisterNo);
189 dr->wLength = cpu_to_le16(4);
191 // Enter the sending queue
192 pRegQueue->Next = NULL;
193 pRegQueue->pUsbReq = dr;
194 pRegQueue->pUrb = pUrb;
196 spin_lock_irq(&pWb35Reg->EP0VM_spin_lock );
197 if (pWb35Reg->pRegFirst == NULL)
198 pWb35Reg->pRegFirst = pRegQueue;
200 pWb35Reg->pRegLast->Next = pRegQueue;
201 pWb35Reg->pRegLast = pRegQueue;
203 spin_unlock_irq( &pWb35Reg->EP0VM_spin_lock );
206 Wb35Reg_EP0VM_start(pHwData);
217 //This command will be executed with a user defined value. When it completes,
218 //this value is useful. For example, hal_set_current_channel will use it.
219 // TRUE : read command process successfully
220 // FALSE : register not support
222 Wb35Reg_WriteWithCallbackValue( phw_data_t pHwData, u16 RegisterNo, u32 RegisterValue,
225 PWB35REG pWb35Reg = &pHwData->Wb35Reg;
226 struct usb_ctrlrequest *dr;
228 PREG_QUEUE pRegQueue = NULL;
232 if (pHwData->SurpriseRemove)
235 // update the register by send urb request------------------------------------
236 UrbSize = sizeof(REG_QUEUE) + sizeof(struct usb_ctrlrequest);
237 OS_MEMORY_ALLOC((void* *) &pRegQueue, UrbSize );
238 pUrb = wb_usb_alloc_urb(0);
239 if (pUrb && pRegQueue) {
240 pRegQueue->DIRECT = 1;// burst write register
241 pRegQueue->INDEX = RegisterNo;
242 pRegQueue->VALUE = cpu_to_le32(RegisterValue);
243 //NOTE : Users must guarantee the size of value will not exceed the buffer size.
244 memcpy(pRegQueue->RESERVED, pValue, Len);
245 pRegQueue->RESERVED_VALID = TRUE;
246 dr = (struct usb_ctrlrequest *)((u8 *)pRegQueue + sizeof(REG_QUEUE));
247 dr->bRequestType = USB_TYPE_VENDOR|USB_DIR_OUT |USB_RECIP_DEVICE;
248 dr->bRequest = 0x03; // USB or vendor-defined request code, burst mode
249 dr->wValue = cpu_to_le16(0x0);
250 dr->wIndex = cpu_to_le16(RegisterNo);
251 dr->wLength = cpu_to_le16(4);
253 // Enter the sending queue
254 pRegQueue->Next = NULL;
255 pRegQueue->pUsbReq = dr;
256 pRegQueue->pUrb = pUrb;
257 spin_lock_irq (&pWb35Reg->EP0VM_spin_lock );
258 if( pWb35Reg->pRegFirst == NULL )
259 pWb35Reg->pRegFirst = pRegQueue;
261 pWb35Reg->pRegLast->Next = pRegQueue;
262 pWb35Reg->pRegLast = pRegQueue;
264 spin_unlock_irq ( &pWb35Reg->EP0VM_spin_lock );
267 Wb35Reg_EP0VM_start(pHwData);
277 // TRUE : read command process successfully
278 // FALSE : register not support
279 // pRegisterValue : It must be a resident buffer due to asynchronous read register.
281 Wb35Reg_ReadSync( phw_data_t pHwData, u16 RegisterNo, u32 * pRegisterValue )
283 PWB35REG pWb35Reg = &pHwData->Wb35Reg;
284 u32 * pltmp = pRegisterValue;
288 if (pHwData->SurpriseRemove)
291 // Read the register by send usb message------------------------------------
293 pWb35Reg->SyncIoPause = 1;
295 // 20060717.5 Wait until EP0VM stop
296 while (pWb35Reg->EP0vm_state != VM_STOP)
299 pWb35Reg->EP0vm_state = VM_RUNNING;
300 ret = usb_control_msg( pHwData->WbUsb.udev,
301 usb_rcvctrlpipe(pHwData->WbUsb.udev, 0),
302 0x01, USB_TYPE_VENDOR|USB_RECIP_DEVICE|USB_DIR_IN,
303 0x0, RegisterNo, pltmp, 4, HZ*100 );
305 *pRegisterValue = cpu_to_le32(*pltmp);
307 pWb35Reg->EP0vm_state = VM_STOP;
309 Wb35Reg_Update( pHwData, RegisterNo, *pRegisterValue );
310 pWb35Reg->SyncIoPause = 0;
312 Wb35Reg_EP0VM_start( pHwData );
316 WBDEBUG(("EP0 Read register usb message sending error\n"));
319 pHwData->SurpriseRemove = 1; // 20060704.2
326 // TRUE : read command process successfully
327 // FALSE : register not support
328 // pRegisterValue : It must be a resident buffer due to asynchronous read register.
330 Wb35Reg_Read(phw_data_t pHwData, u16 RegisterNo, u32 * pRegisterValue )
332 PWB35REG pWb35Reg = &pHwData->Wb35Reg;
333 struct usb_ctrlrequest * dr;
335 PREG_QUEUE pRegQueue;
339 if (pHwData->SurpriseRemove)
342 // update the variable by send Urb to read register ------------------------------------
343 UrbSize = sizeof(REG_QUEUE) + sizeof(struct usb_ctrlrequest);
344 OS_MEMORY_ALLOC( (void* *)&pRegQueue, UrbSize );
345 pUrb = wb_usb_alloc_urb(0);
346 if( pUrb && pRegQueue )
348 pRegQueue->DIRECT = 0;// read register
349 pRegQueue->INDEX = RegisterNo;
350 pRegQueue->pBuffer = pRegisterValue;
351 dr = (struct usb_ctrlrequest *)((u8 *)pRegQueue + sizeof(REG_QUEUE));
352 dr->bRequestType = USB_TYPE_VENDOR|USB_RECIP_DEVICE|USB_DIR_IN;
353 dr->bRequest = 0x01; // USB or vendor-defined request code, burst mode
354 dr->wValue = cpu_to_le16(0x0);
355 dr->wIndex = cpu_to_le16 (RegisterNo);
356 dr->wLength = cpu_to_le16 (4);
358 // Enter the sending queue
359 pRegQueue->Next = NULL;
360 pRegQueue->pUsbReq = dr;
361 pRegQueue->pUrb = pUrb;
362 spin_lock_irq ( &pWb35Reg->EP0VM_spin_lock );
363 if( pWb35Reg->pRegFirst == NULL )
364 pWb35Reg->pRegFirst = pRegQueue;
366 pWb35Reg->pRegLast->Next = pRegQueue;
367 pWb35Reg->pRegLast = pRegQueue;
369 spin_unlock_irq( &pWb35Reg->EP0VM_spin_lock );
372 Wb35Reg_EP0VM_start( pHwData );
377 usb_free_urb( pUrb );
385 Wb35Reg_EP0VM_start( phw_data_t pHwData )
387 PWB35REG pWb35Reg = &pHwData->Wb35Reg;
389 if (OS_ATOMIC_INC( pHwData->Adapter, &pWb35Reg->RegFireCount) == 1) {
390 pWb35Reg->EP0vm_state = VM_RUNNING;
391 Wb35Reg_EP0VM(pHwData);
393 OS_ATOMIC_DEC( pHwData->Adapter, &pWb35Reg->RegFireCount );
397 Wb35Reg_EP0VM(phw_data_t pHwData )
399 PWB35REG pWb35Reg = &pHwData->Wb35Reg;
401 struct usb_ctrlrequest *dr;
404 PREG_QUEUE pRegQueue;
407 if (pWb35Reg->SyncIoPause)
410 if (pHwData->SurpriseRemove)
413 // Get the register data and send to USB through Irp
414 spin_lock_irq( &pWb35Reg->EP0VM_spin_lock );
415 pRegQueue = pWb35Reg->pRegFirst;
416 spin_unlock_irq( &pWb35Reg->EP0VM_spin_lock );
421 // Get an Urb, send it
422 pUrb = (PURB)pRegQueue->pUrb;
424 dr = pRegQueue->pUsbReq;
425 pUrb = pRegQueue->pUrb;
426 pBuffer = pRegQueue->pBuffer;
427 if (pRegQueue->DIRECT == 1) // output
428 pBuffer = &pRegQueue->VALUE;
430 usb_fill_control_urb( pUrb, pHwData->WbUsb.udev,
431 REG_DIRECTION(pHwData->WbUsb.udev,pRegQueue),
432 (u8 *)dr,pBuffer,cpu_to_le16(dr->wLength),
433 Wb35Reg_EP0VM_complete, (void*)pHwData);
435 pWb35Reg->EP0vm_state = VM_RUNNING;
437 ret = wb_usb_submit_urb( pUrb );
441 WBDEBUG(("EP0 Irp sending error\n"));
449 pWb35Reg->EP0vm_state = VM_STOP;
450 OS_ATOMIC_DEC( pHwData->Adapter, &pWb35Reg->RegFireCount );
455 Wb35Reg_EP0VM_complete(PURB pUrb)
457 phw_data_t pHwData = (phw_data_t)pUrb->context;
458 PWB35REG pWb35Reg = &pHwData->Wb35Reg;
459 PREG_QUEUE pRegQueue;
463 pWb35Reg->EP0vm_state = VM_COMPLETED;
464 pWb35Reg->EP0VM_status = pUrb->status;
466 if (pHwData->SurpriseRemove) { // Let WbWlanHalt to handle surprise remove
467 pWb35Reg->EP0vm_state = VM_STOP;
468 OS_ATOMIC_DEC( pHwData->Adapter, &pWb35Reg->RegFireCount );
470 // Complete to send, remove the URB from the first
471 spin_lock_irq( &pWb35Reg->EP0VM_spin_lock );
472 pRegQueue = pWb35Reg->pRegFirst;
473 if (pRegQueue == pWb35Reg->pRegLast)
474 pWb35Reg->pRegLast = NULL;
475 pWb35Reg->pRegFirst = pWb35Reg->pRegFirst->Next;
476 spin_unlock_irq( &pWb35Reg->EP0VM_spin_lock );
478 if (pWb35Reg->EP0VM_status) {
480 WBDEBUG(("EP0 IoCompleteRoutine return error\n"));
481 DebugUsbdStatusInformation( pWb35Reg->EP0VM_status );
483 pWb35Reg->EP0vm_state = VM_STOP;
484 pHwData->SurpriseRemove = 1;
486 // Success. Update the result
488 // Start the next send
489 Wb35Reg_EP0VM(pHwData);
500 Wb35Reg_destroy(phw_data_t pHwData)
502 PWB35REG pWb35Reg = &pHwData->Wb35Reg;
504 PREG_QUEUE pRegQueue;
507 Uxx_power_off_procedure(pHwData);
509 // Wait for Reg operation completed
511 OS_SLEEP(10000); // Delay for waiting function enter 940623.1.a
512 } while (pWb35Reg->EP0vm_state != VM_STOP);
513 OS_SLEEP(10000); // Delay for waiting function enter 940623.1.b
515 // Release all the data in RegQueue
516 spin_lock_irq( &pWb35Reg->EP0VM_spin_lock );
517 pRegQueue = pWb35Reg->pRegFirst;
519 if (pRegQueue == pWb35Reg->pRegLast)
520 pWb35Reg->pRegLast = NULL;
521 pWb35Reg->pRegFirst = pWb35Reg->pRegFirst->Next;
523 pUrb = pRegQueue->pUrb;
524 spin_unlock_irq( &pWb35Reg->EP0VM_spin_lock );
530 WBDEBUG(("EP0 queue release error\n"));
533 spin_lock_irq( &pWb35Reg->EP0VM_spin_lock );
535 pRegQueue = pWb35Reg->pRegFirst;
537 spin_unlock_irq( &pWb35Reg->EP0VM_spin_lock );
540 //====================================================================================
541 // The function can be run in passive-level only.
542 //====================================================================================
543 unsigned char Wb35Reg_initial(phw_data_t pHwData)
545 PWB35REG pWb35Reg=&pHwData->Wb35Reg;
547 u32 SoftwareSet, VCO_trim, TxVga, Region_ScanInterval;
549 // Spin lock is acquired for read and write IRP command
550 spin_lock_init( &pWb35Reg->EP0VM_spin_lock );
552 // Getting RF module type from EEPROM ------------------------------------
553 Wb35Reg_WriteSync( pHwData, 0x03b4, 0x080d0000 ); // Start EEPROM access + Read + address(0x0d)
554 Wb35Reg_ReadSync( pHwData, 0x03b4, <mp );
556 //Update RF module type and determine the PHY type by inf or EEPROM
557 pWb35Reg->EEPROMPhyType = (u8)( ltmp & 0xff );
558 // 0 V MAX2825, 1 V MAX2827, 2 V MAX2828, 3 V MAX2829
559 // 16V AL2230, 17 - AL7230, 18 - AL2230S
561 // 33 - W89RF242(TxVGA 0~19), 34 - W89RF242(TxVGA 0~34)
562 if (pWb35Reg->EEPROMPhyType != RF_DECIDE_BY_INF) {
563 if( (pWb35Reg->EEPROMPhyType == RF_MAXIM_2825) ||
564 (pWb35Reg->EEPROMPhyType == RF_MAXIM_2827) ||
565 (pWb35Reg->EEPROMPhyType == RF_MAXIM_2828) ||
566 (pWb35Reg->EEPROMPhyType == RF_MAXIM_2829) ||
567 (pWb35Reg->EEPROMPhyType == RF_MAXIM_V1) ||
568 (pWb35Reg->EEPROMPhyType == RF_AIROHA_2230) ||
569 (pWb35Reg->EEPROMPhyType == RF_AIROHA_2230S) ||
570 (pWb35Reg->EEPROMPhyType == RF_AIROHA_7230) ||
571 (pWb35Reg->EEPROMPhyType == RF_WB_242) ||
572 (pWb35Reg->EEPROMPhyType == RF_WB_242_1))
573 pHwData->phy_type = pWb35Reg->EEPROMPhyType;
576 // Power On procedure running. The relative parameter will be set according to phy_type
577 Uxx_power_on_procedure( pHwData );
579 // Reading MAC address
580 Uxx_ReadEthernetAddress( pHwData );
582 // Read VCO trim for RF parameter
583 Wb35Reg_WriteSync( pHwData, 0x03b4, 0x08200000 );
584 Wb35Reg_ReadSync( pHwData, 0x03b4, &VCO_trim );
586 // Read Antenna On/Off of software flag
587 Wb35Reg_WriteSync( pHwData, 0x03b4, 0x08210000 );
588 Wb35Reg_ReadSync( pHwData, 0x03b4, &SoftwareSet );
591 Wb35Reg_WriteSync( pHwData, 0x03b4, 0x08100000 );
592 Wb35Reg_ReadSync( pHwData, 0x03b4, &TxVga );
594 // Get Scan interval setting from EEPROM offset 0x1c
595 Wb35Reg_WriteSync( pHwData, 0x03b4, 0x081d0000 );
596 Wb35Reg_ReadSync( pHwData, 0x03b4, &Region_ScanInterval );
598 // Update Ethernet address
599 memcpy( pHwData->CurrentMacAddress, pHwData->PermanentMacAddress, ETH_LENGTH_OF_ADDRESS );
601 // Update software variable
602 pHwData->SoftwareSet = (u16)(SoftwareSet & 0xffff);
604 pHwData->PowerIndexFromEEPROM = (u8)TxVga;
605 pHwData->VCO_trim = (u8)VCO_trim & 0xff;
606 if (pHwData->VCO_trim == 0xff)
607 pHwData->VCO_trim = 0x28;
609 pWb35Reg->EEPROMRegion = (u8)(Region_ScanInterval>>8); // 20060720
610 if( pWb35Reg->EEPROMRegion<1 || pWb35Reg->EEPROMRegion>6 )
611 pWb35Reg->EEPROMRegion = REGION_AUTO;
613 //For Get Tx VGA from EEPROM 20060315.5 move here
614 GetTxVgaFromEEPROM( pHwData );
617 pHwData->Scan_Interval = (u8)(Region_ScanInterval & 0xff) * 10;
618 if ((pHwData->Scan_Interval == 2550) || (pHwData->Scan_Interval < 10)) // Is default setting 0xff * 10
619 pHwData->Scan_Interval = SCAN_MAX_CHNL_TIME;
622 RFSynthesizer_initial(pHwData);
624 BBProcessor_initial(pHwData); // Async write, must wait until complete
626 Wb35Reg_phy_calibration(pHwData);
628 Mxx_initial(pHwData);
629 Dxx_initial(pHwData);
631 if (pHwData->SurpriseRemove)
634 return TRUE; // Initial fail
637 //===================================================================================
641 // Runs the AUTODIN II CRC algorithm on buffer Buffer of length, Length.
644 // Buffer - the input buffer
645 // Length - the length of Buffer
648 // The 32-bit CRC value.
651 // This is adapted from the comments in the assembly language
652 // version in _GENREQ.ASM of the DWB NE1000/2000 driver.
653 //==================================================================================
655 CardComputeCrc(u8 * Buffer, u32 Length)
663 for (i = 0; i < Length; i++) {
667 for (j = 0; j < 8; j++) {
669 Carry = ((Crc & 0x80000000) ? 1 : 0) ^ (CurByte & 0x01);
674 Crc =(Crc ^ 0x04c11db6) | Carry;
683 //==================================================================
685 // Reverse the bits in the input argument, dwData, which is
686 // regarded as a string of bits with the length, DataLength.
693 // The converted value.
694 //==================================================================
695 u32 BitReverse( u32 dwData, u32 DataLength)
697 u32 HalfLength, i, j;
700 if ( DataLength <= 0) return 0; // No conversion is done.
701 dwData = dwData & (0xffffffff >> (32 - DataLength));
703 HalfLength = DataLength / 2;
704 for ( i = 0, j = DataLength-1 ; i < HalfLength; i++, j--)
706 BitA = GetBit( dwData, i);
707 BitB = GetBit( dwData, j);
709 dwData = ClearBit( dwData, i);
710 dwData = SetBit( dwData, j);
711 } else if (!BitA && BitB) {
712 dwData = SetBit( dwData, i);
713 dwData = ClearBit( dwData, j);
716 // Do nothing since these two bits are of the save values.
723 void Wb35Reg_phy_calibration( phw_data_t pHwData )
727 if ((pHwData->phy_type == RF_WB_242) ||
728 (pHwData->phy_type == RF_WB_242_1)) {
729 phy_calibration_winbond ( pHwData, 2412 ); // Sync operation
730 Wb35Reg_ReadSync( pHwData, 0x103c, &BB3c );
731 Wb35Reg_ReadSync( pHwData, 0x1054, &BB54 );
733 pHwData->BB3c_cal = BB3c;
734 pHwData->BB54_cal = BB54;
736 RFSynthesizer_initial(pHwData);
737 BBProcessor_initial(pHwData); // Async operation
739 Wb35Reg_WriteSync( pHwData, 0x103c, BB3c );
740 Wb35Reg_WriteSync( pHwData, 0x1054, BB54 );