git.oblomov.eu Git - linux-2.6/blob - drivers/net/wireless/b43legacy/main.c

   1 /*
   2  *
   3  *  Broadcom B43legacy wireless driver
   4  *
   5  *  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
   6  *  Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it>
   7  *  Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
   8  *  Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
   9  *  Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
  10  *  Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
  11  *
  12  *  Some parts of the code in this file are derived from the ipw2200
  13  *  driver  Copyright(c) 2003 - 2004 Intel Corporation.
  14
  15  *  This program is free software; you can redistribute it and/or modify
  16  *  it under the terms of the GNU General Public License as published by
  17  *  the Free Software Foundation; either version 2 of the License, or
  18  *  (at your option) any later version.
  19  *
  20  *  This program is distributed in the hope that it will be useful,
  21  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  *  GNU General Public License for more details.
  24  *
  25  *  You should have received a copy of the GNU General Public License
  26  *  along with this program; see the file COPYING.  If not, write to
  27  *  the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  28  *  Boston, MA 02110-1301, USA.
  29  *
  30  */
  31
  32 #include <linux/delay.h>
  33 #include <linux/init.h>
  34 #include <linux/moduleparam.h>
  35 #include <linux/if_arp.h>
  36 #include <linux/etherdevice.h>
  37 #include <linux/version.h>
  38 #include <linux/firmware.h>
  39 #include <linux/wireless.h>
  40 #include <linux/workqueue.h>
  41 #include <linux/skbuff.h>
  42 #include <linux/dma-mapping.h>
  43 #include <net/dst.h>
  44 #include <asm/unaligned.h>
  45
  46 #include "b43legacy.h"
  47 #include "main.h"
  48 #include "debugfs.h"
  49 #include "phy.h"
  50 #include "dma.h"
  51 #include "pio.h"
  52 #include "sysfs.h"
  53 #include "xmit.h"
  54 #include "radio.h"
  55
  56
  57 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
  58 MODULE_AUTHOR("Martin Langer");
  59 MODULE_AUTHOR("Stefano Brivio");
  60 MODULE_AUTHOR("Michael Buesch");
  61 MODULE_LICENSE("GPL");
  62
  63 MODULE_FIRMWARE(B43legacy_SUPPORTED_FIRMWARE_ID);
  64
  65 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
  66 static int modparam_pio;
  67 module_param_named(pio, modparam_pio, int, 0444);
  68 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
  69 #elif defined(CONFIG_B43LEGACY_DMA)
  70 # define modparam_pio   0
  71 #elif defined(CONFIG_B43LEGACY_PIO)
  72 # define modparam_pio   1
  73 #endif
  74
  75 static int modparam_bad_frames_preempt;
  76 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
  77 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
  78                  " Preemption");
  79
  80 static char modparam_fwpostfix[16];
  81 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
  82 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
  83
  84 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
  85 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
  86         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
  87         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
  88         SSB_DEVTABLE_END
  89 };
  90 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
  91
  92
  93 /* Channel and ratetables are shared for all devices.
  94  * They can't be const, because ieee80211 puts some precalculated
  95  * data in there. This data is the same for all devices, so we don't
  96  * get concurrency issues */
  97 #define RATETAB_ENT(_rateid, _flags) \
  98         {                                                               \
  99                 .bitrate        = B43legacy_RATE_TO_100KBPS(_rateid),   \
 100                 .hw_value       = (_rateid),                            \
 101                 .flags          = (_flags),                             \
 102         }
 103 /*
 104  * NOTE: When changing this, sync with xmit.c's
 105  *       b43legacy_plcp_get_bitrate_idx_* functions!
 106  */
 107 static struct ieee80211_rate __b43legacy_ratetable[] = {
 108         RATETAB_ENT(B43legacy_CCK_RATE_1MB, 0),
 109         RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_SHORT_PREAMBLE),
 110         RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_SHORT_PREAMBLE),
 111         RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_SHORT_PREAMBLE),
 112         RATETAB_ENT(B43legacy_OFDM_RATE_6MB, 0),
 113         RATETAB_ENT(B43legacy_OFDM_RATE_9MB, 0),
 114         RATETAB_ENT(B43legacy_OFDM_RATE_12MB, 0),
 115         RATETAB_ENT(B43legacy_OFDM_RATE_18MB, 0),
 116         RATETAB_ENT(B43legacy_OFDM_RATE_24MB, 0),
 117         RATETAB_ENT(B43legacy_OFDM_RATE_36MB, 0),
 118         RATETAB_ENT(B43legacy_OFDM_RATE_48MB, 0),
 119         RATETAB_ENT(B43legacy_OFDM_RATE_54MB, 0),
 120 };
 121 #define b43legacy_b_ratetable           (__b43legacy_ratetable + 0)
 122 #define b43legacy_b_ratetable_size      4
 123 #define b43legacy_g_ratetable           (__b43legacy_ratetable + 0)
 124 #define b43legacy_g_ratetable_size      12
 125
 126 #define CHANTAB_ENT(_chanid, _freq) \
 127         {                                                       \
 128                 .center_freq    = (_freq),                      \
 129                 .hw_value       = (_chanid),                    \
 130         }
 131 static struct ieee80211_channel b43legacy_bg_chantable[] = {
 132         CHANTAB_ENT(1, 2412),
 133         CHANTAB_ENT(2, 2417),
 134         CHANTAB_ENT(3, 2422),
 135         CHANTAB_ENT(4, 2427),
 136         CHANTAB_ENT(5, 2432),
 137         CHANTAB_ENT(6, 2437),
 138         CHANTAB_ENT(7, 2442),
 139         CHANTAB_ENT(8, 2447),
 140         CHANTAB_ENT(9, 2452),
 141         CHANTAB_ENT(10, 2457),
 142         CHANTAB_ENT(11, 2462),
 143         CHANTAB_ENT(12, 2467),
 144         CHANTAB_ENT(13, 2472),
 145         CHANTAB_ENT(14, 2484),
 146 };
 147
 148 static struct ieee80211_supported_band b43legacy_band_2GHz_BPHY = {
 149         .channels = b43legacy_bg_chantable,
 150         .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
 151         .bitrates = b43legacy_b_ratetable,
 152         .n_bitrates = b43legacy_b_ratetable_size,
 153 };
 154
 155 static struct ieee80211_supported_band b43legacy_band_2GHz_GPHY = {
 156         .channels = b43legacy_bg_chantable,
 157         .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
 158         .bitrates = b43legacy_g_ratetable,
 159         .n_bitrates = b43legacy_g_ratetable_size,
 160 };
 161
 162 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
 163 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
 164 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
 165 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
 166
 167
 168 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
 169 {
 170         if (!wl || !wl->current_dev)
 171                 return 1;
 172         if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
 173                 return 1;
 174         /* We are up and running.
 175          * Ratelimit the messages to avoid DoS over the net. */
 176         return net_ratelimit();
 177 }
 178
 179 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
 180 {
 181         va_list args;
 182
 183         if (!b43legacy_ratelimit(wl))
 184                 return;
 185         va_start(args, fmt);
 186         printk(KERN_INFO "b43legacy-%s: ",
 187                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
 188         vprintk(fmt, args);
 189         va_end(args);
 190 }
 191
 192 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
 193 {
 194         va_list args;
 195
 196         if (!b43legacy_ratelimit(wl))
 197                 return;
 198         va_start(args, fmt);
 199         printk(KERN_ERR "b43legacy-%s ERROR: ",
 200                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
 201         vprintk(fmt, args);
 202         va_end(args);
 203 }
 204
 205 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
 206 {
 207         va_list args;
 208
 209         if (!b43legacy_ratelimit(wl))
 210                 return;
 211         va_start(args, fmt);
 212         printk(KERN_WARNING "b43legacy-%s warning: ",
 213                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
 214         vprintk(fmt, args);
 215         va_end(args);
 216 }
 217
 218 #if B43legacy_DEBUG
 219 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
 220 {
 221         va_list args;
 222
 223         va_start(args, fmt);
 224         printk(KERN_DEBUG "b43legacy-%s debug: ",
 225                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
 226         vprintk(fmt, args);
 227         va_end(args);
 228 }
 229 #endif /* DEBUG */
 230
 231 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
 232                                 u32 val)
 233 {
 234         u32 status;
 235
 236         B43legacy_WARN_ON(offset % 4 != 0);
 237
 238         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 239         if (status & B43legacy_MACCTL_BE)
 240                 val = swab32(val);
 241
 242         b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
 243         mmiowb();
 244         b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
 245 }
 246
 247 static inline
 248 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
 249                                 u16 routing, u16 offset)
 250 {
 251         u32 control;
 252
 253         /* "offset" is the WORD offset. */
 254
 255         control = routing;
 256         control <<= 16;
 257         control |= offset;
 258         b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
 259 }
 260
 261 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
 262                        u16 routing, u16 offset)
 263 {
 264         u32 ret;
 265
 266         if (routing == B43legacy_SHM_SHARED) {
 267                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 268                 if (offset & 0x0003) {
 269                         /* Unaligned access */
 270                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 271                         ret = b43legacy_read16(dev,
 272                                 B43legacy_MMIO_SHM_DATA_UNALIGNED);
 273                         ret <<= 16;
 274                         b43legacy_shm_control_word(dev, routing,
 275                                                      (offset >> 2) + 1);
 276                         ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
 277
 278                         return ret;
 279                 }
 280                 offset >>= 2;
 281         }
 282         b43legacy_shm_control_word(dev, routing, offset);
 283         ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
 284
 285         return ret;
 286 }
 287
 288 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
 289                            u16 routing, u16 offset)
 290 {
 291         u16 ret;
 292
 293         if (routing == B43legacy_SHM_SHARED) {
 294                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 295                 if (offset & 0x0003) {
 296                         /* Unaligned access */
 297                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 298                         ret = b43legacy_read16(dev,
 299                                              B43legacy_MMIO_SHM_DATA_UNALIGNED);
 300
 301                         return ret;
 302                 }
 303                 offset >>= 2;
 304         }
 305         b43legacy_shm_control_word(dev, routing, offset);
 306         ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
 307
 308         return ret;
 309 }
 310
 311 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
 312                            u16 routing, u16 offset,
 313                            u32 value)
 314 {
 315         if (routing == B43legacy_SHM_SHARED) {
 316                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 317                 if (offset & 0x0003) {
 318                         /* Unaligned access */
 319                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 320                         mmiowb();
 321                         b43legacy_write16(dev,
 322                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
 323                                           (value >> 16) & 0xffff);
 324                         mmiowb();
 325                         b43legacy_shm_control_word(dev, routing,
 326                                                    (offset >> 2) + 1);
 327                         mmiowb();
 328                         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
 329                                           value & 0xffff);
 330                         return;
 331                 }
 332                 offset >>= 2;
 333         }
 334         b43legacy_shm_control_word(dev, routing, offset);
 335         mmiowb();
 336         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
 337 }
 338
 339 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
 340                            u16 value)
 341 {
 342         if (routing == B43legacy_SHM_SHARED) {
 343                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 344                 if (offset & 0x0003) {
 345                         /* Unaligned access */
 346                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 347                         mmiowb();
 348                         b43legacy_write16(dev,
 349                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
 350                                           value);
 351                         return;
 352                 }
 353                 offset >>= 2;
 354         }
 355         b43legacy_shm_control_word(dev, routing, offset);
 356         mmiowb();
 357         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
 358 }
 359
 360 /* Read HostFlags */
 361 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
 362 {
 363         u32 ret;
 364
 365         ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 366                                    B43legacy_SHM_SH_HOSTFHI);
 367         ret <<= 16;
 368         ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 369                                     B43legacy_SHM_SH_HOSTFLO);
 370
 371         return ret;
 372 }
 373
 374 /* Write HostFlags */
 375 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
 376 {
 377         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 378                               B43legacy_SHM_SH_HOSTFLO,
 379                               (value & 0x0000FFFF));
 380         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 381                               B43legacy_SHM_SH_HOSTFHI,
 382                               ((value & 0xFFFF0000) >> 16));
 383 }
 384
 385 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
 386 {
 387         /* We need to be careful. As we read the TSF from multiple
 388          * registers, we should take care of register overflows.
 389          * In theory, the whole tsf read process should be atomic.
 390          * We try to be atomic here, by restaring the read process,
 391          * if any of the high registers changed (overflew).
 392          */
 393         if (dev->dev->id.revision >= 3) {
 394                 u32 low;
 395                 u32 high;
 396                 u32 high2;
 397
 398                 do {
 399                         high = b43legacy_read32(dev,
 400                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
 401                         low = b43legacy_read32(dev,
 402                                         B43legacy_MMIO_REV3PLUS_TSF_LOW);
 403                         high2 = b43legacy_read32(dev,
 404                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
 405                 } while (unlikely(high != high2));
 406
 407                 *tsf = high;
 408                 *tsf <<= 32;
 409                 *tsf |= low;
 410         } else {
 411                 u64 tmp;
 412                 u16 v0;
 413                 u16 v1;
 414                 u16 v2;
 415                 u16 v3;
 416                 u16 test1;
 417                 u16 test2;
 418                 u16 test3;
 419
 420                 do {
 421                         v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
 422                         v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
 423                         v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
 424                         v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
 425
 426                         test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
 427                         test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
 428                         test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
 429                 } while (v3 != test3 || v2 != test2 || v1 != test1);
 430
 431                 *tsf = v3;
 432                 *tsf <<= 48;
 433                 tmp = v2;
 434                 tmp <<= 32;
 435                 *tsf |= tmp;
 436                 tmp = v1;
 437                 tmp <<= 16;
 438                 *tsf |= tmp;
 439                 *tsf |= v0;
 440         }
 441 }
 442
 443 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
 444 {
 445         u32 status;
 446
 447         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 448         status |= B43legacy_MACCTL_TBTTHOLD;
 449         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
 450         mmiowb();
 451 }
 452
 453 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
 454 {
 455         u32 status;
 456
 457         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 458         status &= ~B43legacy_MACCTL_TBTTHOLD;
 459         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
 460 }
 461
 462 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
 463 {
 464         /* Be careful with the in-progress timer.
 465          * First zero out the low register, so we have a full
 466          * register-overflow duration to complete the operation.
 467          */
 468         if (dev->dev->id.revision >= 3) {
 469                 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
 470                 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
 471
 472                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
 473                 mmiowb();
 474                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
 475                                     hi);
 476                 mmiowb();
 477                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
 478                                     lo);
 479         } else {
 480                 u16 v0 = (tsf & 0x000000000000FFFFULL);
 481                 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
 482                 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
 483                 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
 484
 485                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
 486                 mmiowb();
 487                 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
 488                 mmiowb();
 489                 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
 490                 mmiowb();
 491                 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
 492                 mmiowb();
 493                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
 494         }
 495 }
 496
 497 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
 498 {
 499         b43legacy_time_lock(dev);
 500         b43legacy_tsf_write_locked(dev, tsf);
 501         b43legacy_time_unlock(dev);
 502 }
 503
 504 static
 505 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
 506                              u16 offset, const u8 *mac)
 507 {
 508         static const u8 zero_addr[ETH_ALEN] = { 0 };
 509         u16 data;
 510
 511         if (!mac)
 512                 mac = zero_addr;
 513
 514         offset |= 0x0020;
 515         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
 516
 517         data = mac[0];
 518         data |= mac[1] << 8;
 519         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 520         data = mac[2];
 521         data |= mac[3] << 8;
 522         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 523         data = mac[4];
 524         data |= mac[5] << 8;
 525         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 526 }
 527
 528 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
 529 {
 530         static const u8 zero_addr[ETH_ALEN] = { 0 };
 531         const u8 *mac = dev->wl->mac_addr;
 532         const u8 *bssid = dev->wl->bssid;
 533         u8 mac_bssid[ETH_ALEN * 2];
 534         int i;
 535         u32 tmp;
 536
 537         if (!bssid)
 538                 bssid = zero_addr;
 539         if (!mac)
 540                 mac = zero_addr;
 541
 542         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
 543
 544         memcpy(mac_bssid, mac, ETH_ALEN);
 545         memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
 546
 547         /* Write our MAC address and BSSID to template ram */
 548         for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
 549                 tmp =  (u32)(mac_bssid[i + 0]);
 550                 tmp |= (u32)(mac_bssid[i + 1]) << 8;
 551                 tmp |= (u32)(mac_bssid[i + 2]) << 16;
 552                 tmp |= (u32)(mac_bssid[i + 3]) << 24;
 553                 b43legacy_ram_write(dev, 0x20 + i, tmp);
 554                 b43legacy_ram_write(dev, 0x78 + i, tmp);
 555                 b43legacy_ram_write(dev, 0x478 + i, tmp);
 556         }
 557 }
 558
 559 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
 560 {
 561         b43legacy_write_mac_bssid_templates(dev);
 562         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
 563                                 dev->wl->mac_addr);
 564 }
 565
 566 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
 567                                     u16 slot_time)
 568 {
 569         /* slot_time is in usec. */
 570         if (dev->phy.type != B43legacy_PHYTYPE_G)
 571                 return;
 572         b43legacy_write16(dev, 0x684, 510 + slot_time);
 573         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
 574                               slot_time);
 575 }
 576
 577 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
 578 {
 579         b43legacy_set_slot_time(dev, 9);
 580         dev->short_slot = 1;
 581 }
 582
 583 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
 584 {
 585         b43legacy_set_slot_time(dev, 20);
 586         dev->short_slot = 0;
 587 }
 588
 589 /* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
 590  * Returns the _previously_ enabled IRQ mask.
 591  */
 592 static inline u32 b43legacy_interrupt_enable(struct b43legacy_wldev *dev,
 593                                              u32 mask)
 594 {
 595         u32 old_mask;
 596
 597         old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
 598         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask |
 599                           mask);
 600
 601         return old_mask;
 602 }
 603
 604 /* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
 605  * Returns the _previously_ enabled IRQ mask.
 606  */
 607 static inline u32 b43legacy_interrupt_disable(struct b43legacy_wldev *dev,
 608                                               u32 mask)
 609 {
 610         u32 old_mask;
 611
 612         old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
 613         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask & ~mask);
 614
 615         return old_mask;
 616 }
 617
 618 /* Synchronize IRQ top- and bottom-half.
 619  * IRQs must be masked before calling this.
 620  * This must not be called with the irq_lock held.
 621  */
 622 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
 623 {
 624         synchronize_irq(dev->dev->irq);
 625         tasklet_kill(&dev->isr_tasklet);
 626 }
 627
 628 /* DummyTransmission function, as documented on
 629  * http://bcm-specs.sipsolutions.net/DummyTransmission
 630  */
 631 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
 632 {
 633         struct b43legacy_phy *phy = &dev->phy;
 634         unsigned int i;
 635         unsigned int max_loop;
 636         u16 value;
 637         u32 buffer[5] = {
 638                 0x00000000,
 639                 0x00D40000,
 640                 0x00000000,
 641                 0x01000000,
 642                 0x00000000,
 643         };
 644
 645         switch (phy->type) {
 646         case B43legacy_PHYTYPE_B:
 647         case B43legacy_PHYTYPE_G:
 648                 max_loop = 0xFA;
 649                 buffer[0] = 0x000B846E;
 650                 break;
 651         default:
 652                 B43legacy_BUG_ON(1);
 653                 return;
 654         }
 655
 656         for (i = 0; i < 5; i++)
 657                 b43legacy_ram_write(dev, i * 4, buffer[i]);
 658
 659         /* dummy read follows */
 660         b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 661
 662         b43legacy_write16(dev, 0x0568, 0x0000);
 663         b43legacy_write16(dev, 0x07C0, 0x0000);
 664         b43legacy_write16(dev, 0x050C, 0x0000);
 665         b43legacy_write16(dev, 0x0508, 0x0000);
 666         b43legacy_write16(dev, 0x050A, 0x0000);
 667         b43legacy_write16(dev, 0x054C, 0x0000);
 668         b43legacy_write16(dev, 0x056A, 0x0014);
 669         b43legacy_write16(dev, 0x0568, 0x0826);
 670         b43legacy_write16(dev, 0x0500, 0x0000);
 671         b43legacy_write16(dev, 0x0502, 0x0030);
 672
 673         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
 674                 b43legacy_radio_write16(dev, 0x0051, 0x0017);
 675         for (i = 0x00; i < max_loop; i++) {
 676                 value = b43legacy_read16(dev, 0x050E);
 677                 if (value & 0x0080)
 678                         break;
 679                 udelay(10);
 680         }
 681         for (i = 0x00; i < 0x0A; i++) {
 682                 value = b43legacy_read16(dev, 0x050E);
 683                 if (value & 0x0400)
 684                         break;
 685                 udelay(10);
 686         }
 687         for (i = 0x00; i < 0x0A; i++) {
 688                 value = b43legacy_read16(dev, 0x0690);
 689                 if (!(value & 0x0100))
 690                         break;
 691                 udelay(10);
 692         }
 693         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
 694                 b43legacy_radio_write16(dev, 0x0051, 0x0037);
 695 }
 696
 697 /* Turn the Analog ON/OFF */
 698 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
 699 {
 700         b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
 701 }
 702
 703 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
 704 {
 705         u32 tmslow;
 706         u32 macctl;
 707
 708         flags |= B43legacy_TMSLOW_PHYCLKEN;
 709         flags |= B43legacy_TMSLOW_PHYRESET;
 710         ssb_device_enable(dev->dev, flags);
 711         msleep(2); /* Wait for the PLL to turn on. */
 712
 713         /* Now take the PHY out of Reset again */
 714         tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
 715         tmslow |= SSB_TMSLOW_FGC;
 716         tmslow &= ~B43legacy_TMSLOW_PHYRESET;
 717         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 718         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
 719         msleep(1);
 720         tmslow &= ~SSB_TMSLOW_FGC;
 721         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 722         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
 723         msleep(1);
 724
 725         /* Turn Analog ON */
 726         b43legacy_switch_analog(dev, 1);
 727
 728         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 729         macctl &= ~B43legacy_MACCTL_GMODE;
 730         if (flags & B43legacy_TMSLOW_GMODE) {
 731                 macctl |= B43legacy_MACCTL_GMODE;
 732                 dev->phy.gmode = 1;
 733         } else
 734                 dev->phy.gmode = 0;
 735         macctl |= B43legacy_MACCTL_IHR_ENABLED;
 736         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
 737 }
 738
 739 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
 740 {
 741         u32 v0;
 742         u32 v1;
 743         u16 tmp;
 744         struct b43legacy_txstatus stat;
 745
 746         while (1) {
 747                 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
 748                 if (!(v0 & 0x00000001))
 749                         break;
 750                 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
 751
 752                 stat.cookie = (v0 >> 16);
 753                 stat.seq = (v1 & 0x0000FFFF);
 754                 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
 755                 tmp = (v0 & 0x0000FFFF);
 756                 stat.frame_count = ((tmp & 0xF000) >> 12);
 757                 stat.rts_count = ((tmp & 0x0F00) >> 8);
 758                 stat.supp_reason = ((tmp & 0x001C) >> 2);
 759                 stat.pm_indicated = !!(tmp & 0x0080);
 760                 stat.intermediate = !!(tmp & 0x0040);
 761                 stat.for_ampdu = !!(tmp & 0x0020);
 762                 stat.acked = !!(tmp & 0x0002);
 763
 764                 b43legacy_handle_txstatus(dev, &stat);
 765         }
 766 }
 767
 768 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
 769 {
 770         u32 dummy;
 771
 772         if (dev->dev->id.revision < 5)
 773                 return;
 774         /* Read all entries from the microcode TXstatus FIFO
 775          * and throw them away.
 776          */
 777         while (1) {
 778                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
 779                 if (!(dummy & 0x00000001))
 780                         break;
 781                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
 782         }
 783 }
 784
 785 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
 786 {
 787         u32 val = 0;
 788
 789         val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
 790         val <<= 16;
 791         val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
 792
 793         return val;
 794 }
 795
 796 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
 797 {
 798         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
 799                               (jssi & 0x0000FFFF));
 800         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
 801                               (jssi & 0xFFFF0000) >> 16);
 802 }
 803
 804 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
 805 {
 806         b43legacy_jssi_write(dev, 0x7F7F7F7F);
 807         b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
 808                           b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
 809                           | B43legacy_MACCMD_BGNOISE);
 810         B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
 811                             dev->phy.channel);
 812 }
 813
 814 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
 815 {
 816         /* Top half of Link Quality calculation. */
 817
 818         if (dev->noisecalc.calculation_running)
 819                 return;
 820         dev->noisecalc.channel_at_start = dev->phy.channel;
 821         dev->noisecalc.calculation_running = 1;
 822         dev->noisecalc.nr_samples = 0;
 823
 824         b43legacy_generate_noise_sample(dev);
 825 }
 826
 827 static void handle_irq_noise(struct b43legacy_wldev *dev)
 828 {
 829         struct b43legacy_phy *phy = &dev->phy;
 830         u16 tmp;
 831         u8 noise[4];
 832         u8 i;
 833         u8 j;
 834         s32 average;
 835
 836         /* Bottom half of Link Quality calculation. */
 837
 838         B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
 839         if (dev->noisecalc.channel_at_start != phy->channel)
 840                 goto drop_calculation;
 841         *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
 842         if (noise[0] == 0x7F || noise[1] == 0x7F ||
 843             noise[2] == 0x7F || noise[3] == 0x7F)
 844                 goto generate_new;
 845
 846         /* Get the noise samples. */
 847         B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
 848         i = dev->noisecalc.nr_samples;
 849         noise[0] = clamp_val(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 850         noise[1] = clamp_val(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 851         noise[2] = clamp_val(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 852         noise[3] = clamp_val(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 853         dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
 854         dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
 855         dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
 856         dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
 857         dev->noisecalc.nr_samples++;
 858         if (dev->noisecalc.nr_samples == 8) {
 859                 /* Calculate the Link Quality by the noise samples. */
 860                 average = 0;
 861                 for (i = 0; i < 8; i++) {
 862                         for (j = 0; j < 4; j++)
 863                                 average += dev->noisecalc.samples[i][j];
 864                 }
 865                 average /= (8 * 4);
 866                 average *= 125;
 867                 average += 64;
 868                 average /= 128;
 869                 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 870                                              0x40C);
 871                 tmp = (tmp / 128) & 0x1F;
 872                 if (tmp >= 8)
 873                         average += 2;
 874                 else
 875                         average -= 25;
 876                 if (tmp == 8)
 877                         average -= 72;
 878                 else
 879                         average -= 48;
 880
 881                 dev->stats.link_noise = average;
 882 drop_calculation:
 883                 dev->noisecalc.calculation_running = 0;
 884                 return;
 885         }
 886 generate_new:
 887         b43legacy_generate_noise_sample(dev);
 888 }
 889
 890 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
 891 {
 892         if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP)) {
 893                 /* TODO: PS TBTT */
 894         } else {
 895                 if (1/*FIXME: the last PSpoll frame was sent successfully */)
 896                         b43legacy_power_saving_ctl_bits(dev, -1, -1);
 897         }
 898         if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_IBSS))
 899                 dev->dfq_valid = 1;
 900 }
 901
 902 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
 903 {
 904         if (dev->dfq_valid) {
 905                 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
 906                                   b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
 907                                   | B43legacy_MACCMD_DFQ_VALID);
 908                 dev->dfq_valid = 0;
 909         }
 910 }
 911
 912 static void handle_irq_pmq(struct b43legacy_wldev *dev)
 913 {
 914         u32 tmp;
 915
 916         /* TODO: AP mode. */
 917
 918         while (1) {
 919                 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
 920                 if (!(tmp & 0x00000008))
 921                         break;
 922         }
 923         /* 16bit write is odd, but correct. */
 924         b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
 925 }
 926
 927 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
 928                                             const u8 *data, u16 size,
 929                                             u16 ram_offset,
 930                                             u16 shm_size_offset, u8 rate)
 931 {
 932         u32 i;
 933         u32 tmp;
 934         struct b43legacy_plcp_hdr4 plcp;
 935
 936         plcp.data = 0;
 937         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
 938         b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
 939         ram_offset += sizeof(u32);
 940         /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
 941          * So leave the first two bytes of the next write blank.
 942          */
 943         tmp = (u32)(data[0]) << 16;
 944         tmp |= (u32)(data[1]) << 24;
 945         b43legacy_ram_write(dev, ram_offset, tmp);
 946         ram_offset += sizeof(u32);
 947         for (i = 2; i < size; i += sizeof(u32)) {
 948                 tmp = (u32)(data[i + 0]);
 949                 if (i + 1 < size)
 950                         tmp |= (u32)(data[i + 1]) << 8;
 951                 if (i + 2 < size)
 952                         tmp |= (u32)(data[i + 2]) << 16;
 953                 if (i + 3 < size)
 954                         tmp |= (u32)(data[i + 3]) << 24;
 955                 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
 956         }
 957         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
 958                               size + sizeof(struct b43legacy_plcp_hdr6));
 959 }
 960
 961 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
 962                                             u16 ram_offset,
 963                                             u16 shm_size_offset, u8 rate)
 964 {
 965
 966         unsigned int i, len, variable_len;
 967         const struct ieee80211_mgmt *bcn;
 968         const u8 *ie;
 969         bool tim_found = 0;
 970
 971         bcn = (const struct ieee80211_mgmt *)(dev->wl->current_beacon->data);
 972         len = min((size_t)dev->wl->current_beacon->len,
 973                   0x200 - sizeof(struct b43legacy_plcp_hdr6));
 974
 975         b43legacy_write_template_common(dev, (const u8 *)bcn, len, ram_offset,
 976                                         shm_size_offset, rate);
 977
 978         /* Find the position of the TIM and the DTIM_period value
 979          * and write them to SHM. */
 980         ie = bcn->u.beacon.variable;
 981         variable_len = len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
 982         for (i = 0; i < variable_len - 2; ) {
 983                 uint8_t ie_id, ie_len;
 984
 985                 ie_id = ie[i];
 986                 ie_len = ie[i + 1];
 987                 if (ie_id == 5) {
 988                         u16 tim_position;
 989                         u16 dtim_period;
 990                         /* This is the TIM Information Element */
 991
 992                         /* Check whether the ie_len is in the beacon data range. */
 993                         if (variable_len < ie_len + 2 + i)
 994                                 break;
 995                         /* A valid TIM is at least 4 bytes long. */
 996                         if (ie_len < 4)
 997                                 break;
 998                         tim_found = 1;
 999
1000                         tim_position = sizeof(struct b43legacy_plcp_hdr6);
1001                         tim_position += offsetof(struct ieee80211_mgmt,
1002                                                  u.beacon.variable);
1003                         tim_position += i;
1004
1005                         dtim_period = ie[i + 3];
1006
1007                         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1008                                         B43legacy_SHM_SH_TIMPOS, tim_position);
1009                         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1010                                         B43legacy_SHM_SH_DTIMP, dtim_period);
1011                         break;
1012                 }
1013                 i += ie_len + 2;
1014         }
1015         if (!tim_found) {
1016                 b43legacywarn(dev->wl, "Did not find a valid TIM IE in the "
1017                               "beacon template packet. AP or IBSS operation "
1018                               "may be broken.\n");
1019         }
1020 }
1021
1022 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
1023                                             u16 shm_offset, u16 size,
1024                                             struct ieee80211_rate *rate)
1025 {
1026         struct b43legacy_plcp_hdr4 plcp;
1027         u32 tmp;
1028         __le16 dur;
1029
1030         plcp.data = 0;
1031         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate->bitrate);
1032         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1033                                                dev->wl->vif,
1034                                                size,
1035                                                rate);
1036         /* Write PLCP in two parts and timing for packet transfer */
1037         tmp = le32_to_cpu(plcp.data);
1038         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
1039                               tmp & 0xFFFF);
1040         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
1041                               tmp >> 16);
1042         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
1043                               le16_to_cpu(dur));
1044 }
1045
1046 /* Instead of using custom probe response template, this function
1047  * just patches custom beacon template by:
1048  * 1) Changing packet type
1049  * 2) Patching duration field
1050  * 3) Stripping TIM
1051  */
1052 static const u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1053                                                u16 *dest_size,
1054                                                struct ieee80211_rate *rate)
1055 {
1056         const u8 *src_data;
1057         u8 *dest_data;
1058         u16 src_size, elem_size, src_pos, dest_pos;
1059         __le16 dur;
1060         struct ieee80211_hdr *hdr;
1061         size_t ie_start;
1062
1063         src_size = dev->wl->current_beacon->len;
1064         src_data = (const u8 *)dev->wl->current_beacon->data;
1065
1066         /* Get the start offset of the variable IEs in the packet. */
1067         ie_start = offsetof(struct ieee80211_mgmt, u.probe_resp.variable);
1068         B43legacy_WARN_ON(ie_start != offsetof(struct ieee80211_mgmt,
1069                                                u.beacon.variable));
1070
1071         if (B43legacy_WARN_ON(src_size < ie_start))
1072                 return NULL;
1073
1074         dest_data = kmalloc(src_size, GFP_ATOMIC);
1075         if (unlikely(!dest_data))
1076                 return NULL;
1077
1078         /* Copy the static data and all Information Elements, except the TIM. */
1079         memcpy(dest_data, src_data, ie_start);
1080         src_pos = ie_start;
1081         dest_pos = ie_start;
1082         for ( ; src_pos < src_size - 2; src_pos += elem_size) {
1083                 elem_size = src_data[src_pos + 1] + 2;
1084                 if (src_data[src_pos] == 5) {
1085                         /* This is the TIM. */
1086                         continue;
1087                 }
1088                 memcpy(dest_data + dest_pos, src_data + src_pos, elem_size);
1089                 dest_pos += elem_size;
1090         }
1091         *dest_size = dest_pos;
1092         hdr = (struct ieee80211_hdr *)dest_data;
1093
1094         /* Set the frame control. */
1095         hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1096                                          IEEE80211_STYPE_PROBE_RESP);
1097         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1098                                                dev->wl->vif,
1099                                                *dest_size,
1100                                                rate);
1101         hdr->duration_id = dur;
1102
1103         return dest_data;
1104 }
1105
1106 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1107                                                 u16 ram_offset,
1108                                                 u16 shm_size_offset,
1109                                                 struct ieee80211_rate *rate)
1110 {
1111         const u8 *probe_resp_data;
1112         u16 size;
1113
1114         size = dev->wl->current_beacon->len;
1115         probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1116         if (unlikely(!probe_resp_data))
1117                 return;
1118
1119         /* Looks like PLCP headers plus packet timings are stored for
1120          * all possible basic rates
1121          */
1122         b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1123                                         &b43legacy_b_ratetable[0]);
1124         b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1125                                         &b43legacy_b_ratetable[1]);
1126         b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1127                                         &b43legacy_b_ratetable[2]);
1128         b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1129                                         &b43legacy_b_ratetable[3]);
1130
1131         size = min((size_t)size,
1132                    0x200 - sizeof(struct b43legacy_plcp_hdr6));
1133         b43legacy_write_template_common(dev, probe_resp_data,
1134                                         size, ram_offset,
1135                                         shm_size_offset, rate->bitrate);
1136         kfree(probe_resp_data);
1137 }
1138
1139 /* Asynchronously update the packet templates in template RAM.
1140  * Locking: Requires wl->irq_lock to be locked. */
1141 static void b43legacy_update_templates(struct b43legacy_wl *wl)
1142 {
1143         struct sk_buff *beacon;
1144         /* This is the top half of the ansynchronous beacon update. The bottom
1145          * half is the beacon IRQ. Beacon update must be asynchronous to avoid
1146          * sending an invalid beacon. This can happen for example, if the
1147          * firmware transmits a beacon while we are updating it. */
1148
1149         /* We could modify the existing beacon and set the aid bit in the TIM
1150          * field, but that would probably require resizing and moving of data
1151          * within the beacon template. Simply request a new beacon and let
1152          * mac80211 do the hard work. */
1153         beacon = ieee80211_beacon_get(wl->hw, wl->vif);
1154         if (unlikely(!beacon))
1155                 return;
1156
1157         if (wl->current_beacon)
1158                 dev_kfree_skb_any(wl->current_beacon);
1159         wl->current_beacon = beacon;
1160         wl->beacon0_uploaded = 0;
1161         wl->beacon1_uploaded = 0;
1162 }
1163
1164 static void b43legacy_set_ssid(struct b43legacy_wldev *dev,
1165                                const u8 *ssid, u8 ssid_len)
1166 {
1167         u32 tmp;
1168         u16 i;
1169         u16 len;
1170
1171         len = min((u16)ssid_len, (u16)0x100);
1172         for (i = 0; i < len; i += sizeof(u32)) {
1173                 tmp = (u32)(ssid[i + 0]);
1174                 if (i + 1 < len)
1175                         tmp |= (u32)(ssid[i + 1]) << 8;
1176                 if (i + 2 < len)
1177                         tmp |= (u32)(ssid[i + 2]) << 16;
1178                 if (i + 3 < len)
1179                         tmp |= (u32)(ssid[i + 3]) << 24;
1180                 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
1181                                       0x380 + i, tmp);
1182         }
1183         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1184                               0x48, len);
1185 }
1186
1187 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1188                                      u16 beacon_int)
1189 {
1190         b43legacy_time_lock(dev);
1191         if (dev->dev->id.revision >= 3)
1192                 b43legacy_write32(dev, 0x188, (beacon_int << 16));
1193         else {
1194                 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1195                 b43legacy_write16(dev, 0x610, beacon_int);
1196         }
1197         b43legacy_time_unlock(dev);
1198 }
1199
1200 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1201 {
1202         struct b43legacy_wl *wl = dev->wl;
1203         u32 cmd;
1204
1205         if (!b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
1206                 return;
1207
1208         /* This is the bottom half of the asynchronous beacon update. */
1209
1210         cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1211         if (!(cmd & B43legacy_MACCMD_BEACON0_VALID)) {
1212                 if (!wl->beacon0_uploaded) {
1213                         b43legacy_write_beacon_template(dev, 0x68,
1214                                                         B43legacy_SHM_SH_BTL0,
1215                                                         B43legacy_CCK_RATE_1MB);
1216                         b43legacy_write_probe_resp_template(dev, 0x268,
1217                                                             B43legacy_SHM_SH_PRTLEN,
1218                                                             &__b43legacy_ratetable[3]);
1219                         wl->beacon0_uploaded = 1;
1220                 }
1221                 cmd |= B43legacy_MACCMD_BEACON0_VALID;
1222         }
1223         if (!(cmd & B43legacy_MACCMD_BEACON1_VALID)) {
1224                 if (!wl->beacon1_uploaded) {
1225                         b43legacy_write_beacon_template(dev, 0x468,
1226                                                         B43legacy_SHM_SH_BTL1,
1227                                                         B43legacy_CCK_RATE_1MB);
1228                         wl->beacon1_uploaded = 1;
1229                 }
1230                 cmd |= B43legacy_MACCMD_BEACON1_VALID;
1231         }
1232         b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1233 }
1234
1235 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1236 {
1237 }
1238
1239 /* Interrupt handler bottom-half */
1240 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev)
1241 {
1242         u32 reason;
1243         u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1244         u32 merged_dma_reason = 0;
1245         int i;
1246         unsigned long flags;
1247
1248         spin_lock_irqsave(&dev->wl->irq_lock, flags);
1249
1250         B43legacy_WARN_ON(b43legacy_status(dev) <
1251                           B43legacy_STAT_INITIALIZED);
1252
1253         reason = dev->irq_reason;
1254         for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1255                 dma_reason[i] = dev->dma_reason[i];
1256                 merged_dma_reason |= dma_reason[i];
1257         }
1258
1259         if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1260                 b43legacyerr(dev->wl, "MAC transmission error\n");
1261
1262         if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) {
1263                 b43legacyerr(dev->wl, "PHY transmission error\n");
1264                 rmb();
1265                 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
1266                         b43legacyerr(dev->wl, "Too many PHY TX errors, "
1267                                               "restarting the controller\n");
1268                         b43legacy_controller_restart(dev, "PHY TX errors");
1269                 }
1270         }
1271
1272         if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1273                                           B43legacy_DMAIRQ_NONFATALMASK))) {
1274                 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1275                         b43legacyerr(dev->wl, "Fatal DMA error: "
1276                                "0x%08X, 0x%08X, 0x%08X, "
1277                                "0x%08X, 0x%08X, 0x%08X\n",
1278                                dma_reason[0], dma_reason[1],
1279                                dma_reason[2], dma_reason[3],
1280                                dma_reason[4], dma_reason[5]);
1281                         b43legacy_controller_restart(dev, "DMA error");
1282                         mmiowb();
1283                         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1284                         return;
1285                 }
1286                 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1287                         b43legacyerr(dev->wl, "DMA error: "
1288                                "0x%08X, 0x%08X, 0x%08X, "
1289                                "0x%08X, 0x%08X, 0x%08X\n",
1290                                dma_reason[0], dma_reason[1],
1291                                dma_reason[2], dma_reason[3],
1292                                dma_reason[4], dma_reason[5]);
1293         }
1294
1295         if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1296                 handle_irq_ucode_debug(dev);
1297         if (reason & B43legacy_IRQ_TBTT_INDI)
1298                 handle_irq_tbtt_indication(dev);
1299         if (reason & B43legacy_IRQ_ATIM_END)
1300                 handle_irq_atim_end(dev);
1301         if (reason & B43legacy_IRQ_BEACON)
1302                 handle_irq_beacon(dev);
1303         if (reason & B43legacy_IRQ_PMQ)
1304                 handle_irq_pmq(dev);
1305         if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1306                 ;/*TODO*/
1307         if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1308                 handle_irq_noise(dev);
1309
1310         /* Check the DMA reason registers for received data. */
1311         if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1312                 if (b43legacy_using_pio(dev))
1313                         b43legacy_pio_rx(dev->pio.queue0);
1314                 else
1315                         b43legacy_dma_rx(dev->dma.rx_ring0);
1316         }
1317         B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1318         B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1319         if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1320                 if (b43legacy_using_pio(dev))
1321                         b43legacy_pio_rx(dev->pio.queue3);
1322                 else
1323                         b43legacy_dma_rx(dev->dma.rx_ring3);
1324         }
1325         B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1326         B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1327
1328         if (reason & B43legacy_IRQ_TX_OK)
1329                 handle_irq_transmit_status(dev);
1330
1331         b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1332         mmiowb();
1333         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1334 }
1335
1336 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1337                                u16 base, int queueidx)
1338 {
1339         u16 rxctl;
1340
1341         rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1342         if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1343                 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1344         else
1345                 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1346 }
1347
1348 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1349 {
1350         if (b43legacy_using_pio(dev) &&
1351             (dev->dev->id.revision < 3) &&
1352             (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1353                 /* Apply a PIO specific workaround to the dma_reasons */
1354                 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1355                 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1356                 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1357                 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1358         }
1359
1360         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1361
1362         b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1363                           dev->dma_reason[0]);
1364         b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1365                           dev->dma_reason[1]);
1366         b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1367                           dev->dma_reason[2]);
1368         b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1369                           dev->dma_reason[3]);
1370         b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1371                           dev->dma_reason[4]);
1372         b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1373                           dev->dma_reason[5]);
1374 }
1375
1376 /* Interrupt handler top-half */
1377 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1378 {
1379         irqreturn_t ret = IRQ_NONE;
1380         struct b43legacy_wldev *dev = dev_id;
1381         u32 reason;
1382
1383         if (!dev)
1384                 return IRQ_NONE;
1385
1386         spin_lock(&dev->wl->irq_lock);
1387
1388         if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
1389                 goto out;
1390         reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1391         if (reason == 0xffffffff) /* shared IRQ */
1392                 goto out;
1393         ret = IRQ_HANDLED;
1394         reason &= b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
1395         if (!reason)
1396                 goto out;
1397
1398         dev->dma_reason[0] = b43legacy_read32(dev,
1399                                               B43legacy_MMIO_DMA0_REASON)
1400                                               & 0x0001DC00;
1401         dev->dma_reason[1] = b43legacy_read32(dev,
1402                                               B43legacy_MMIO_DMA1_REASON)
1403                                               & 0x0000DC00;
1404         dev->dma_reason[2] = b43legacy_read32(dev,
1405                                               B43legacy_MMIO_DMA2_REASON)
1406                                               & 0x0000DC00;
1407         dev->dma_reason[3] = b43legacy_read32(dev,
1408                                               B43legacy_MMIO_DMA3_REASON)
1409                                               & 0x0001DC00;
1410         dev->dma_reason[4] = b43legacy_read32(dev,
1411                                               B43legacy_MMIO_DMA4_REASON)
1412                                               & 0x0000DC00;
1413         dev->dma_reason[5] = b43legacy_read32(dev,
1414                                               B43legacy_MMIO_DMA5_REASON)
1415                                               & 0x0000DC00;
1416
1417         b43legacy_interrupt_ack(dev, reason);
1418         /* disable all IRQs. They are enabled again in the bottom half. */
1419         dev->irq_savedstate = b43legacy_interrupt_disable(dev,
1420                                                           B43legacy_IRQ_ALL);
1421         /* save the reason code and call our bottom half. */
1422         dev->irq_reason = reason;
1423         tasklet_schedule(&dev->isr_tasklet);
1424 out:
1425         mmiowb();
1426         spin_unlock(&dev->wl->irq_lock);
1427
1428         return ret;
1429 }
1430
1431 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1432 {
1433         release_firmware(dev->fw.ucode);
1434         dev->fw.ucode = NULL;
1435         release_firmware(dev->fw.pcm);
1436         dev->fw.pcm = NULL;
1437         release_firmware(dev->fw.initvals);
1438         dev->fw.initvals = NULL;
1439         release_firmware(dev->fw.initvals_band);
1440         dev->fw.initvals_band = NULL;
1441 }
1442
1443 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1444 {
1445         b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/"
1446                      "Drivers/b43#devicefirmware "
1447                      "and download the correct firmware (version 3).\n");
1448 }
1449
1450 static int do_request_fw(struct b43legacy_wldev *dev,
1451                          const char *name,
1452                          const struct firmware **fw)
1453 {
1454         char path[sizeof(modparam_fwpostfix) + 32];
1455         struct b43legacy_fw_header *hdr;
1456         u32 size;
1457         int err;
1458
1459         if (!name)
1460                 return 0;
1461
1462         snprintf(path, ARRAY_SIZE(path),
1463                  "b43legacy%s/%s.fw",
1464                  modparam_fwpostfix, name);
1465         err = request_firmware(fw, path, dev->dev->dev);
1466         if (err) {
1467                 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1468                        "or load failed.\n", path);
1469                 return err;
1470         }
1471         if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1472                 goto err_format;
1473         hdr = (struct b43legacy_fw_header *)((*fw)->data);
1474         switch (hdr->type) {
1475         case B43legacy_FW_TYPE_UCODE:
1476         case B43legacy_FW_TYPE_PCM:
1477                 size = be32_to_cpu(hdr->size);
1478                 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1479                         goto err_format;
1480                 /* fallthrough */
1481         case B43legacy_FW_TYPE_IV:
1482                 if (hdr->ver != 1)
1483                         goto err_format;
1484                 break;
1485         default:
1486                 goto err_format;
1487         }
1488
1489         return err;
1490
1491 err_format:
1492         b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1493         return -EPROTO;
1494 }
1495
1496 static int b43legacy_request_firmware(struct b43legacy_wldev *dev)
1497 {
1498         struct b43legacy_firmware *fw = &dev->fw;
1499         const u8 rev = dev->dev->id.revision;
1500         const char *filename;
1501         u32 tmshigh;
1502         int err;
1503
1504         tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
1505         if (!fw->ucode) {
1506                 if (rev == 2)
1507                         filename = "ucode2";
1508                 else if (rev == 4)
1509                         filename = "ucode4";
1510                 else
1511                         filename = "ucode5";
1512                 err = do_request_fw(dev, filename, &fw->ucode);
1513                 if (err)
1514                         goto err_load;
1515         }
1516         if (!fw->pcm) {
1517                 if (rev < 5)
1518                         filename = "pcm4";
1519                 else
1520                         filename = "pcm5";
1521                 err = do_request_fw(dev, filename, &fw->pcm);
1522                 if (err)
1523                         goto err_load;
1524         }
1525         if (!fw->initvals) {
1526                 switch (dev->phy.type) {
1527                 case B43legacy_PHYTYPE_B:
1528                 case B43legacy_PHYTYPE_G:
1529                         if ((rev >= 5) && (rev <= 10))
1530                                 filename = "b0g0initvals5";
1531                         else if (rev == 2 || rev == 4)
1532                                 filename = "b0g0initvals2";
1533                         else
1534                                 goto err_no_initvals;
1535                         break;
1536                 default:
1537                         goto err_no_initvals;
1538                 }
1539                 err = do_request_fw(dev, filename, &fw->initvals);
1540                 if (err)
1541                         goto err_load;
1542         }
1543         if (!fw->initvals_band) {
1544                 switch (dev->phy.type) {
1545                 case B43legacy_PHYTYPE_B:
1546                 case B43legacy_PHYTYPE_G:
1547                         if ((rev >= 5) && (rev <= 10))
1548                                 filename = "b0g0bsinitvals5";
1549                         else if (rev >= 11)
1550                                 filename = NULL;
1551                         else if (rev == 2 || rev == 4)
1552                                 filename = NULL;
1553                         else
1554                                 goto err_no_initvals;
1555                         break;
1556                 default:
1557                         goto err_no_initvals;
1558                 }
1559                 err = do_request_fw(dev, filename, &fw->initvals_band);
1560                 if (err)
1561                         goto err_load;
1562         }
1563
1564         return 0;
1565
1566 err_load:
1567         b43legacy_print_fw_helptext(dev->wl);
1568         goto error;
1569
1570 err_no_initvals:
1571         err = -ENODEV;
1572         b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1573                "core rev %u\n", dev->phy.type, rev);
1574         goto error;
1575
1576 error:
1577         b43legacy_release_firmware(dev);
1578         return err;
1579 }
1580
1581 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1582 {
1583         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1584         const __be32 *data;
1585         unsigned int i;
1586         unsigned int len;
1587         u16 fwrev;
1588         u16 fwpatch;
1589         u16 fwdate;
1590         u16 fwtime;
1591         u32 tmp, macctl;
1592         int err = 0;
1593
1594         /* Jump the microcode PSM to offset 0 */
1595         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1596         B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN);
1597         macctl |= B43legacy_MACCTL_PSM_JMP0;
1598         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1599         /* Zero out all microcode PSM registers and shared memory. */
1600         for (i = 0; i < 64; i++)
1601                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0);
1602         for (i = 0; i < 4096; i += 2)
1603                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0);
1604
1605         /* Upload Microcode. */
1606         data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1607         len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1608         b43legacy_shm_control_word(dev,
1609                                    B43legacy_SHM_UCODE |
1610                                    B43legacy_SHM_AUTOINC_W,
1611                                    0x0000);
1612         for (i = 0; i < len; i++) {
1613                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1614                                     be32_to_cpu(data[i]));
1615                 udelay(10);
1616         }
1617
1618         if (dev->fw.pcm) {
1619                 /* Upload PCM data. */
1620                 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1621                 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1622                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1623                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1624                 /* No need for autoinc bit in SHM_HW */
1625                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1626                 for (i = 0; i < len; i++) {
1627                         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1628                                           be32_to_cpu(data[i]));
1629                         udelay(10);
1630                 }
1631         }
1632
1633         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1634                           B43legacy_IRQ_ALL);
1635
1636         /* Start the microcode PSM */
1637         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1638         macctl &= ~B43legacy_MACCTL_PSM_JMP0;
1639         macctl |= B43legacy_MACCTL_PSM_RUN;
1640         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1641
1642         /* Wait for the microcode to load and respond */
1643         i = 0;
1644         while (1) {
1645                 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1646                 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1647                         break;
1648                 i++;
1649                 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1650                         b43legacyerr(dev->wl, "Microcode not responding\n");
1651                         b43legacy_print_fw_helptext(dev->wl);
1652                         err = -ENODEV;
1653                         goto error;
1654                 }
1655                 msleep_interruptible(50);
1656                 if (signal_pending(current)) {
1657                         err = -EINTR;
1658                         goto error;
1659                 }
1660         }
1661         /* dummy read follows */
1662         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1663
1664         /* Get and check the revisions. */
1665         fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1666                                      B43legacy_SHM_SH_UCODEREV);
1667         fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1668                                        B43legacy_SHM_SH_UCODEPATCH);
1669         fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1670                                       B43legacy_SHM_SH_UCODEDATE);
1671         fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1672                                       B43legacy_SHM_SH_UCODETIME);
1673
1674         if (fwrev > 0x128) {
1675                 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1676                              " Only firmware from binary drivers version 3.x"
1677                              " is supported. You must change your firmware"
1678                              " files.\n");
1679                 b43legacy_print_fw_helptext(dev->wl);
1680                 err = -EOPNOTSUPP;
1681                 goto error;
1682         }
1683         b43legacyinfo(dev->wl, "Loading firmware version 0x%X, patch level %u "
1684                       "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1685                       (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1686                       (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F,
1687                       fwtime & 0x1F);
1688
1689         dev->fw.rev = fwrev;
1690         dev->fw.patch = fwpatch;
1691
1692         return 0;
1693
1694 error:
1695         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1696         macctl &= ~B43legacy_MACCTL_PSM_RUN;
1697         macctl |= B43legacy_MACCTL_PSM_JMP0;
1698         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1699
1700         return err;
1701 }
1702
1703 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1704                                     const struct b43legacy_iv *ivals,
1705                                     size_t count,
1706                                     size_t array_size)
1707 {
1708         const struct b43legacy_iv *iv;
1709         u16 offset;
1710         size_t i;
1711         bool bit32;
1712
1713         BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1714         iv = ivals;
1715         for (i = 0; i < count; i++) {
1716                 if (array_size < sizeof(iv->offset_size))
1717                         goto err_format;
1718                 array_size -= sizeof(iv->offset_size);
1719                 offset = be16_to_cpu(iv->offset_size);
1720                 bit32 = !!(offset & B43legacy_IV_32BIT);
1721                 offset &= B43legacy_IV_OFFSET_MASK;
1722                 if (offset >= 0x1000)
1723                         goto err_format;
1724                 if (bit32) {
1725                         u32 value;
1726
1727                         if (array_size < sizeof(iv->data.d32))
1728                                 goto err_format;
1729                         array_size -= sizeof(iv->data.d32);
1730
1731                         value = get_unaligned_be32(&iv->data.d32);
1732                         b43legacy_write32(dev, offset, value);
1733
1734                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1735                                                         sizeof(__be16) +
1736                                                         sizeof(__be32));
1737                 } else {
1738                         u16 value;
1739
1740                         if (array_size < sizeof(iv->data.d16))
1741                                 goto err_format;
1742                         array_size -= sizeof(iv->data.d16);
1743
1744                         value = be16_to_cpu(iv->data.d16);
1745                         b43legacy_write16(dev, offset, value);
1746
1747                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1748                                                         sizeof(__be16) +
1749                                                         sizeof(__be16));
1750                 }
1751         }
1752         if (array_size)
1753                 goto err_format;
1754
1755         return 0;
1756
1757 err_format:
1758         b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1759         b43legacy_print_fw_helptext(dev->wl);
1760
1761         return -EPROTO;
1762 }
1763
1764 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1765 {
1766         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1767         const struct b43legacy_fw_header *hdr;
1768         struct b43legacy_firmware *fw = &dev->fw;
1769         const struct b43legacy_iv *ivals;
1770         size_t count;
1771         int err;
1772
1773         hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1774         ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1775         count = be32_to_cpu(hdr->size);
1776         err = b43legacy_write_initvals(dev, ivals, count,
1777                                  fw->initvals->size - hdr_len);
1778         if (err)
1779                 goto out;
1780         if (fw->initvals_band) {
1781                 hdr = (const struct b43legacy_fw_header *)
1782                       (fw->initvals_band->data);
1783                 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1784                         + hdr_len);
1785                 count = be32_to_cpu(hdr->size);
1786                 err = b43legacy_write_initvals(dev, ivals, count,
1787                                          fw->initvals_band->size - hdr_len);
1788                 if (err)
1789                         goto out;
1790         }
1791 out:
1792
1793         return err;
1794 }
1795
1796 /* Initialize the GPIOs
1797  * http://bcm-specs.sipsolutions.net/GPIO
1798  */
1799 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1800 {
1801         struct ssb_bus *bus = dev->dev->bus;
1802         struct ssb_device *gpiodev, *pcidev = NULL;
1803         u32 mask;
1804         u32 set;
1805
1806         b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1807                           b43legacy_read32(dev,
1808                           B43legacy_MMIO_MACCTL)
1809                           & 0xFFFF3FFF);
1810
1811         b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1812                           b43legacy_read16(dev,
1813                           B43legacy_MMIO_GPIO_MASK)
1814                           | 0x000F);
1815
1816         mask = 0x0000001F;
1817         set = 0x0000000F;
1818         if (dev->dev->bus->chip_id == 0x4301) {
1819                 mask |= 0x0060;
1820                 set |= 0x0060;
1821         }
1822         if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) {
1823                 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1824                                   b43legacy_read16(dev,
1825                                   B43legacy_MMIO_GPIO_MASK)
1826                                   | 0x0200);
1827                 mask |= 0x0200;
1828                 set |= 0x0200;
1829         }
1830         if (dev->dev->id.revision >= 2)
1831                 mask  |= 0x0010; /* FIXME: This is redundant. */
1832
1833 #ifdef CONFIG_SSB_DRIVER_PCICORE
1834         pcidev = bus->pcicore.dev;
1835 #endif
1836         gpiodev = bus->chipco.dev ? : pcidev;
1837         if (!gpiodev)
1838                 return 0;
1839         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1840                     (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1841                      & mask) | set);
1842
1843         return 0;
1844 }
1845
1846 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1847 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1848 {
1849         struct ssb_bus *bus = dev->dev->bus;
1850         struct ssb_device *gpiodev, *pcidev = NULL;
1851
1852 #ifdef CONFIG_SSB_DRIVER_PCICORE
1853         pcidev = bus->pcicore.dev;
1854 #endif
1855         gpiodev = bus->chipco.dev ? : pcidev;
1856         if (!gpiodev)
1857                 return;
1858         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1859 }
1860
1861 /* http://bcm-specs.sipsolutions.net/EnableMac */
1862 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1863 {
1864         dev->mac_suspended--;
1865         B43legacy_WARN_ON(dev->mac_suspended < 0);
1866         B43legacy_WARN_ON(irqs_disabled());
1867         if (dev->mac_suspended == 0) {
1868                 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1869                                   b43legacy_read32(dev,
1870                                   B43legacy_MMIO_MACCTL)
1871                                   | B43legacy_MACCTL_ENABLED);
1872                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1873                                   B43legacy_IRQ_MAC_SUSPENDED);
1874                 /* the next two are dummy reads */
1875                 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1876                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1877                 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1878
1879                 /* Re-enable IRQs. */
1880                 spin_lock_irq(&dev->wl->irq_lock);
1881                 b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1882                 spin_unlock_irq(&dev->wl->irq_lock);
1883         }
1884 }
1885
1886 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1887 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1888 {
1889         int i;
1890         u32 tmp;
1891
1892         might_sleep();
1893         B43legacy_WARN_ON(irqs_disabled());
1894         B43legacy_WARN_ON(dev->mac_suspended < 0);
1895
1896         if (dev->mac_suspended == 0) {
1897                 /* Mask IRQs before suspending MAC. Otherwise
1898                  * the MAC stays busy and won't suspend. */
1899                 spin_lock_irq(&dev->wl->irq_lock);
1900                 tmp = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
1901                 spin_unlock_irq(&dev->wl->irq_lock);
1902                 b43legacy_synchronize_irq(dev);
1903                 dev->irq_savedstate = tmp;
1904
1905                 b43legacy_power_saving_ctl_bits(dev, -1, 1);
1906                 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1907                                   b43legacy_read32(dev,
1908                                   B43legacy_MMIO_MACCTL)
1909                                   & ~B43legacy_MACCTL_ENABLED);
1910                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1911                 for (i = 40; i; i--) {
1912                         tmp = b43legacy_read32(dev,
1913                                                B43legacy_MMIO_GEN_IRQ_REASON);
1914                         if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
1915                                 goto out;
1916                         msleep(1);
1917                 }
1918                 b43legacyerr(dev->wl, "MAC suspend failed\n");
1919         }
1920 out:
1921         dev->mac_suspended++;
1922 }
1923
1924 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
1925 {
1926         struct b43legacy_wl *wl = dev->wl;
1927         u32 ctl;
1928         u16 cfp_pretbtt;
1929
1930         ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1931         /* Reset status to STA infrastructure mode. */
1932         ctl &= ~B43legacy_MACCTL_AP;
1933         ctl &= ~B43legacy_MACCTL_KEEP_CTL;
1934         ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
1935         ctl &= ~B43legacy_MACCTL_KEEP_BAD;
1936         ctl &= ~B43legacy_MACCTL_PROMISC;
1937         ctl &= ~B43legacy_MACCTL_BEACPROMISC;
1938         ctl |= B43legacy_MACCTL_INFRA;
1939
1940         if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
1941                 ctl |= B43legacy_MACCTL_AP;
1942         else if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_IBSS))
1943                 ctl &= ~B43legacy_MACCTL_INFRA;
1944
1945         if (wl->filter_flags & FIF_CONTROL)
1946                 ctl |= B43legacy_MACCTL_KEEP_CTL;
1947         if (wl->filter_flags & FIF_FCSFAIL)
1948                 ctl |= B43legacy_MACCTL_KEEP_BAD;
1949         if (wl->filter_flags & FIF_PLCPFAIL)
1950                 ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
1951         if (wl->filter_flags & FIF_PROMISC_IN_BSS)
1952                 ctl |= B43legacy_MACCTL_PROMISC;
1953         if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
1954                 ctl |= B43legacy_MACCTL_BEACPROMISC;
1955
1956         /* Workaround: On old hardware the HW-MAC-address-filter
1957          * doesn't work properly, so always run promisc in filter
1958          * it in software. */
1959         if (dev->dev->id.revision <= 4)
1960                 ctl |= B43legacy_MACCTL_PROMISC;
1961
1962         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
1963
1964         cfp_pretbtt = 2;
1965         if ((ctl & B43legacy_MACCTL_INFRA) &&
1966             !(ctl & B43legacy_MACCTL_AP)) {
1967                 if (dev->dev->bus->chip_id == 0x4306 &&
1968                     dev->dev->bus->chip_rev == 3)
1969                         cfp_pretbtt = 100;
1970                 else
1971                         cfp_pretbtt = 50;
1972         }
1973         b43legacy_write16(dev, 0x612, cfp_pretbtt);
1974 }
1975
1976 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
1977                                         u16 rate,
1978                                         int is_ofdm)
1979 {
1980         u16 offset;
1981
1982         if (is_ofdm) {
1983                 offset = 0x480;
1984                 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
1985         } else {
1986                 offset = 0x4C0;
1987                 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
1988         }
1989         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
1990                               b43legacy_shm_read16(dev,
1991                               B43legacy_SHM_SHARED, offset));
1992 }
1993
1994 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
1995 {
1996         switch (dev->phy.type) {
1997         case B43legacy_PHYTYPE_G:
1998                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
1999                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
2000                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
2001                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
2002                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
2003                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
2004                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
2005                 /* fallthrough */
2006         case B43legacy_PHYTYPE_B:
2007                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
2008                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
2009                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
2010                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
2011                 break;
2012         default:
2013                 B43legacy_BUG_ON(1);
2014         }
2015 }
2016
2017 /* Set the TX-Antenna for management frames sent by firmware. */
2018 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
2019                                           int antenna)
2020 {
2021         u16 ant = 0;
2022         u16 tmp;
2023
2024         switch (antenna) {
2025         case B43legacy_ANTENNA0:
2026                 ant |= B43legacy_TX4_PHY_ANT0;
2027                 break;
2028         case B43legacy_ANTENNA1:
2029                 ant |= B43legacy_TX4_PHY_ANT1;
2030                 break;
2031         case B43legacy_ANTENNA_AUTO:
2032                 ant |= B43legacy_TX4_PHY_ANTLAST;
2033                 break;
2034         default:
2035                 B43legacy_BUG_ON(1);
2036         }
2037
2038         /* FIXME We also need to set the other flags of the PHY control
2039          * field somewhere. */
2040
2041         /* For Beacons */
2042         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2043                                    B43legacy_SHM_SH_BEACPHYCTL);
2044         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2045         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2046                               B43legacy_SHM_SH_BEACPHYCTL, tmp);
2047         /* For ACK/CTS */
2048         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2049                                    B43legacy_SHM_SH_ACKCTSPHYCTL);
2050         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2051         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2052                               B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
2053         /* For Probe Resposes */
2054         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2055                                    B43legacy_SHM_SH_PRPHYCTL);
2056         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2057         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2058                               B43legacy_SHM_SH_PRPHYCTL, tmp);
2059 }
2060
2061 /* This is the opposite of b43legacy_chip_init() */
2062 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
2063 {
2064         b43legacy_radio_turn_off(dev, 1);
2065         b43legacy_gpio_cleanup(dev);
2066         /* firmware is released later */
2067 }
2068
2069 /* Initialize the chip
2070  * http://bcm-specs.sipsolutions.net/ChipInit
2071  */
2072 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2073 {
2074         struct b43legacy_phy *phy = &dev->phy;
2075         int err;
2076         int tmp;
2077         u32 value32, macctl;
2078         u16 value16;
2079
2080         /* Initialize the MAC control */
2081         macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED;
2082         if (dev->phy.gmode)
2083                 macctl |= B43legacy_MACCTL_GMODE;
2084         macctl |= B43legacy_MACCTL_INFRA;
2085         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2086
2087         err = b43legacy_request_firmware(dev);
2088         if (err)
2089                 goto out;
2090         err = b43legacy_upload_microcode(dev);
2091         if (err)
2092                 goto out; /* firmware is released later */
2093
2094         err = b43legacy_gpio_init(dev);
2095         if (err)
2096                 goto out; /* firmware is released later */
2097
2098         err = b43legacy_upload_initvals(dev);
2099         if (err)
2100                 goto err_gpio_clean;
2101         b43legacy_radio_turn_on(dev);
2102
2103         b43legacy_write16(dev, 0x03E6, 0x0000);
2104         err = b43legacy_phy_init(dev);
2105         if (err)
2106                 goto err_radio_off;
2107
2108         /* Select initial Interference Mitigation. */
2109         tmp = phy->interfmode;
2110         phy->interfmode = B43legacy_INTERFMODE_NONE;
2111         b43legacy_radio_set_interference_mitigation(dev, tmp);
2112
2113         b43legacy_phy_set_antenna_diversity(dev);
2114         b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2115
2116         if (phy->type == B43legacy_PHYTYPE_B) {
2117                 value16 = b43legacy_read16(dev, 0x005E);
2118                 value16 |= 0x0004;
2119                 b43legacy_write16(dev, 0x005E, value16);
2120         }
2121         b43legacy_write32(dev, 0x0100, 0x01000000);
2122         if (dev->dev->id.revision < 5)
2123                 b43legacy_write32(dev, 0x010C, 0x01000000);
2124
2125         value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2126         value32 &= ~B43legacy_MACCTL_INFRA;
2127         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2128         value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2129         value32 |= B43legacy_MACCTL_INFRA;
2130         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2131
2132         if (b43legacy_using_pio(dev)) {
2133                 b43legacy_write32(dev, 0x0210, 0x00000100);
2134                 b43legacy_write32(dev, 0x0230, 0x00000100);
2135                 b43legacy_write32(dev, 0x0250, 0x00000100);
2136                 b43legacy_write32(dev, 0x0270, 0x00000100);
2137                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2138                                       0x0000);
2139         }
2140
2141         /* Probe Response Timeout value */
2142         /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2143         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2144
2145         /* Initially set the wireless operation mode. */
2146         b43legacy_adjust_opmode(dev);
2147
2148         if (dev->dev->id.revision < 3) {
2149                 b43legacy_write16(dev, 0x060E, 0x0000);
2150                 b43legacy_write16(dev, 0x0610, 0x8000);
2151                 b43legacy_write16(dev, 0x0604, 0x0000);
2152                 b43legacy_write16(dev, 0x0606, 0x0200);
2153         } else {
2154                 b43legacy_write32(dev, 0x0188, 0x80000000);
2155                 b43legacy_write32(dev, 0x018C, 0x02000000);
2156         }
2157         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2158         b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2159         b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2160         b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2161         b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2162         b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2163         b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2164
2165         value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2166         value32 |= 0x00100000;
2167         ssb_write32(dev->dev, SSB_TMSLOW, value32);
2168
2169         b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2170                           dev->dev->bus->chipco.fast_pwrup_delay);
2171
2172         /* PHY TX errors counter. */
2173         atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2174
2175         B43legacy_WARN_ON(err != 0);
2176         b43legacydbg(dev->wl, "Chip initialized\n");
2177 out:
2178         return err;
2179
2180 err_radio_off:
2181         b43legacy_radio_turn_off(dev, 1);
2182 err_gpio_clean:
2183         b43legacy_gpio_cleanup(dev);
2184         goto out;
2185 }
2186
2187 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2188 {
2189         struct b43legacy_phy *phy = &dev->phy;
2190
2191         if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2192                 return;
2193
2194         b43legacy_mac_suspend(dev);
2195         b43legacy_phy_lo_g_measure(dev);
2196         b43legacy_mac_enable(dev);
2197 }
2198
2199 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2200 {
2201         b43legacy_phy_lo_mark_all_unused(dev);
2202         if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
2203                 b43legacy_mac_suspend(dev);
2204                 b43legacy_calc_nrssi_slope(dev);
2205                 b43legacy_mac_enable(dev);
2206         }
2207 }
2208
2209 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2210 {
2211         /* Update device statistics. */
2212         b43legacy_calculate_link_quality(dev);
2213 }
2214
2215 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2216 {
2217         b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2218
2219         atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2220         wmb();
2221 }
2222
2223 static void do_periodic_work(struct b43legacy_wldev *dev)
2224 {
2225         unsigned int state;
2226
2227         state = dev->periodic_state;
2228         if (state % 8 == 0)
2229                 b43legacy_periodic_every120sec(dev);
2230         if (state % 4 == 0)
2231                 b43legacy_periodic_every60sec(dev);
2232         if (state % 2 == 0)
2233                 b43legacy_periodic_every30sec(dev);
2234         b43legacy_periodic_every15sec(dev);
2235 }
2236
2237 /* Periodic work locking policy:
2238  *      The whole periodic work handler is protected by
2239  *      wl->mutex. If another lock is needed somewhere in the
2240  *      pwork callchain, it's aquired in-place, where it's needed.
2241  */
2242 static void b43legacy_periodic_work_handler(struct work_struct *work)
2243 {
2244         struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
2245                                              periodic_work.work);
2246         struct b43legacy_wl *wl = dev->wl;
2247         unsigned long delay;
2248
2249         mutex_lock(&wl->mutex);
2250
2251         if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2252                 goto out;
2253         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2254                 goto out_requeue;
2255
2256         do_periodic_work(dev);
2257
2258         dev->periodic_state++;
2259 out_requeue:
2260         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2261                 delay = msecs_to_jiffies(50);
2262         else
2263                 delay = round_jiffies_relative(HZ * 15);
2264         queue_delayed_work(wl->hw->workqueue, &dev->periodic_work, delay);
2265 out:
2266         mutex_unlock(&wl->mutex);
2267 }
2268
2269 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2270 {
2271         struct delayed_work *work = &dev->periodic_work;
2272
2273         dev->periodic_state = 0;
2274         INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2275         queue_delayed_work(dev->wl->hw->workqueue, work, 0);
2276 }
2277
2278 /* Validate access to the chip (SHM) */
2279 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2280 {
2281         u32 value;
2282         u32 shm_backup;
2283
2284         shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2285         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2286         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2287                                  0xAA5555AA)
2288                 goto error;
2289         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2290         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2291                                  0x55AAAA55)
2292                 goto error;
2293         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2294
2295         value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2296         if ((value | B43legacy_MACCTL_GMODE) !=
2297             (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2298                 goto error;
2299
2300         value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2301         if (value)
2302                 goto error;
2303
2304         return 0;
2305 error:
2306         b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2307         return -ENODEV;
2308 }
2309
2310 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2311 {
2312         dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2313         B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2314         dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2315                                         0x0056);
2316         /* KTP is a word address, but we address SHM bytewise.
2317          * So multiply by two.
2318          */
2319         dev->ktp *= 2;
2320         if (dev->dev->id.revision >= 5)
2321                 /* Number of RCMTA address slots */
2322                 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2323                                   dev->max_nr_keys - 8);
2324 }
2325
2326 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2327 {
2328         struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2329         unsigned long flags;
2330
2331         /* Don't take wl->mutex here, as it could deadlock with
2332          * hwrng internal locking. It's not needed to take
2333          * wl->mutex here, anyway. */
2334
2335         spin_lock_irqsave(&wl->irq_lock, flags);
2336         *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2337         spin_unlock_irqrestore(&wl->irq_lock, flags);
2338
2339         return (sizeof(u16));
2340 }
2341
2342 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2343 {
2344         if (wl->rng_initialized)
2345                 hwrng_unregister(&wl->rng);
2346 }
2347
2348 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2349 {
2350         int err;
2351
2352         snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2353                  "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2354         wl->rng.name = wl->rng_name;
2355         wl->rng.data_read = b43legacy_rng_read;
2356         wl->rng.priv = (unsigned long)wl;
2357         wl->rng_initialized = 1;
2358         err = hwrng_register(&wl->rng);
2359         if (err) {
2360                 wl->rng_initialized = 0;
2361                 b43legacyerr(wl, "Failed to register the random "
2362                        "number generator (%d)\n", err);
2363         }
2364
2365         return err;
2366 }
2367
2368 static int b43legacy_op_tx(struct ieee80211_hw *hw,
2369                            struct sk_buff *skb)
2370 {
2371         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2372         struct b43legacy_wldev *dev = wl->current_dev;
2373         int err = -ENODEV;
2374         unsigned long flags;
2375
2376         if (unlikely(!dev))
2377                 goto out;
2378         if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
2379                 goto out;
2380         /* DMA-TX is done without a global lock. */
2381         if (b43legacy_using_pio(dev)) {
2382                 spin_lock_irqsave(&wl->irq_lock, flags);
2383                 err = b43legacy_pio_tx(dev, skb);
2384                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2385         } else
2386                 err = b43legacy_dma_tx(dev, skb);
2387 out:
2388         if (unlikely(err)) {
2389                 /* Drop the packet. */
2390                 dev_kfree_skb_any(skb);
2391         }
2392         return NETDEV_TX_OK;
2393 }
2394
2395 static int b43legacy_op_conf_tx(struct ieee80211_hw *hw, u16 queue,
2396                                 const struct ieee80211_tx_queue_params *params)
2397 {
2398         return 0;
2399 }
2400
2401 static int b43legacy_op_get_tx_stats(struct ieee80211_hw *hw,
2402                                      struct ieee80211_tx_queue_stats *stats)
2403 {
2404         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2405         struct b43legacy_wldev *dev = wl->current_dev;
2406         unsigned long flags;
2407         int err = -ENODEV;
2408
2409         if (!dev)
2410                 goto out;
2411         spin_lock_irqsave(&wl->irq_lock, flags);
2412         if (likely(b43legacy_status(dev) >= B43legacy_STAT_STARTED)) {
2413                 if (b43legacy_using_pio(dev))
2414                         b43legacy_pio_get_tx_stats(dev, stats);
2415                 else
2416                         b43legacy_dma_get_tx_stats(dev, stats);
2417                 err = 0;
2418         }
2419         spin_unlock_irqrestore(&wl->irq_lock, flags);
2420 out:
2421         return err;
2422 }
2423
2424 static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
2425                                   struct ieee80211_low_level_stats *stats)
2426 {
2427         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2428         unsigned long flags;
2429
2430         spin_lock_irqsave(&wl->irq_lock, flags);
2431         memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2432         spin_unlock_irqrestore(&wl->irq_lock, flags);
2433
2434         return 0;
2435 }
2436
2437 static const char *phymode_to_string(unsigned int phymode)
2438 {
2439         switch (phymode) {
2440         case B43legacy_PHYMODE_B:
2441                 return "B";
2442         case B43legacy_PHYMODE_G:
2443                 return "G";
2444         default:
2445                 B43legacy_BUG_ON(1);
2446         }
2447         return "";
2448 }
2449
2450 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2451                                   unsigned int phymode,
2452                                   struct b43legacy_wldev **dev,
2453                                   bool *gmode)
2454 {
2455         struct b43legacy_wldev *d;
2456
2457         list_for_each_entry(d, &wl->devlist, list) {
2458                 if (d->phy.possible_phymodes & phymode) {
2459                         /* Ok, this device supports the PHY-mode.
2460                          * Set the gmode bit. */
2461                         *gmode = 1;
2462                         *dev = d;
2463
2464                         return 0;
2465                 }
2466         }
2467
2468         return -ESRCH;
2469 }
2470
2471 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2472 {
2473         struct ssb_device *sdev = dev->dev;
2474         u32 tmslow;
2475
2476         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2477         tmslow &= ~B43legacy_TMSLOW_GMODE;
2478         tmslow |= B43legacy_TMSLOW_PHYRESET;
2479         tmslow |= SSB_TMSLOW_FGC;
2480         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2481         msleep(1);
2482
2483         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2484         tmslow &= ~SSB_TMSLOW_FGC;
2485         tmslow |= B43legacy_TMSLOW_PHYRESET;
2486         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2487         msleep(1);
2488 }
2489
2490 /* Expects wl->mutex locked */
2491 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2492                                       unsigned int new_mode)
2493 {
2494         struct b43legacy_wldev *up_dev;
2495         struct b43legacy_wldev *down_dev;
2496         int err;
2497         bool gmode = 0;
2498         int prev_status;
2499
2500         err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2501         if (err) {
2502                 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2503                        phymode_to_string(new_mode));
2504                 return err;
2505         }
2506         if ((up_dev == wl->current_dev) &&
2507             (!!wl->current_dev->phy.gmode == !!gmode))
2508                 /* This device is already running. */
2509                 return 0;
2510         b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2511                phymode_to_string(new_mode));
2512         down_dev = wl->current_dev;
2513
2514         prev_status = b43legacy_status(down_dev);
2515         /* Shutdown the currently running core. */
2516         if (prev_status >= B43legacy_STAT_STARTED)
2517                 b43legacy_wireless_core_stop(down_dev);
2518         if (prev_status >= B43legacy_STAT_INITIALIZED)
2519                 b43legacy_wireless_core_exit(down_dev);
2520
2521         if (down_dev != up_dev)
2522                 /* We switch to a different core, so we put PHY into
2523                  * RESET on the old core. */
2524                 b43legacy_put_phy_into_reset(down_dev);
2525
2526         /* Now start the new core. */
2527         up_dev->phy.gmode = gmode;
2528         if (prev_status >= B43legacy_STAT_INITIALIZED) {
2529                 err = b43legacy_wireless_core_init(up_dev);
2530                 if (err) {
2531                         b43legacyerr(wl, "Fatal: Could not initialize device"
2532                                      " for newly selected %s-PHY mode\n",
2533                                      phymode_to_string(new_mode));
2534                         goto init_failure;
2535                 }
2536         }
2537         if (prev_status >= B43legacy_STAT_STARTED) {
2538                 err = b43legacy_wireless_core_start(up_dev);
2539                 if (err) {
2540                         b43legacyerr(wl, "Fatal: Coult not start device for "
2541                                "newly selected %s-PHY mode\n",
2542                                phymode_to_string(new_mode));
2543                         b43legacy_wireless_core_exit(up_dev);
2544                         goto init_failure;
2545                 }
2546         }
2547         B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2548
2549         b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2550
2551         wl->current_dev = up_dev;
2552
2553         return 0;
2554 init_failure:
2555         /* Whoops, failed to init the new core. No core is operating now. */
2556         wl->current_dev = NULL;
2557         return err;
2558 }
2559
2560 static int b43legacy_antenna_from_ieee80211(u8 antenna)
2561 {
2562         switch (antenna) {
2563         case 0: /* default/diversity */
2564                 return B43legacy_ANTENNA_DEFAULT;
2565         case 1: /* Antenna 0 */
2566                 return B43legacy_ANTENNA0;
2567         case 2: /* Antenna 1 */
2568                 return B43legacy_ANTENNA1;
2569         default:
2570                 return B43legacy_ANTENNA_DEFAULT;
2571         }
2572 }
2573
2574 static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2575                                    struct ieee80211_conf *conf)
2576 {
2577         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2578         struct b43legacy_wldev *dev;
2579         struct b43legacy_phy *phy;
2580         unsigned long flags;
2581         unsigned int new_phymode = 0xFFFF;
2582         int antenna_tx;
2583         int antenna_rx;
2584         int err = 0;
2585         u32 savedirqs;
2586
2587         antenna_tx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_tx);
2588         antenna_rx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_rx);
2589
2590         mutex_lock(&wl->mutex);
2591         dev = wl->current_dev;
2592         phy = &dev->phy;
2593
2594         /* Switch the PHY mode (if necessary). */
2595         switch (conf->channel->band) {
2596         case IEEE80211_BAND_2GHZ:
2597                 if (phy->type == B43legacy_PHYTYPE_B)
2598                         new_phymode = B43legacy_PHYMODE_B;
2599                 else
2600                         new_phymode = B43legacy_PHYMODE_G;
2601                 break;
2602         default:
2603                 B43legacy_WARN_ON(1);
2604         }
2605         err = b43legacy_switch_phymode(wl, new_phymode);
2606         if (err)
2607                 goto out_unlock_mutex;
2608
2609         /* Disable IRQs while reconfiguring the device.
2610          * This makes it possible to drop the spinlock throughout
2611          * the reconfiguration process. */
2612         spin_lock_irqsave(&wl->irq_lock, flags);
2613         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2614                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2615                 goto out_unlock_mutex;
2616         }
2617         savedirqs = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
2618         spin_unlock_irqrestore(&wl->irq_lock, flags);
2619         b43legacy_synchronize_irq(dev);
2620
2621         /* Switch to the requested channel.
2622          * The firmware takes care of races with the TX handler. */
2623         if (conf->channel->hw_value != phy->channel)
2624                 b43legacy_radio_selectchannel(dev, conf->channel->hw_value, 0);
2625
2626         /* Enable/Disable ShortSlot timing. */
2627         if ((!!(conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME))
2628              != dev->short_slot) {
2629                 B43legacy_WARN_ON(phy->type != B43legacy_PHYTYPE_G);
2630                 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME)
2631                         b43legacy_short_slot_timing_enable(dev);
2632                 else
2633                         b43legacy_short_slot_timing_disable(dev);
2634         }
2635
2636         dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
2637
2638         /* Adjust the desired TX power level. */
2639         if (conf->power_level != 0) {
2640                 if (conf->power_level != phy->power_level) {
2641                         phy->power_level = conf->power_level;
2642                         b43legacy_phy_xmitpower(dev);
2643                 }
2644         }
2645
2646         /* Antennas for RX and management frame TX. */
2647         b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2648
2649         /* Update templates for AP mode. */
2650         if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
2651                 b43legacy_set_beacon_int(dev, conf->beacon_int);
2652
2653
2654         if (!!conf->radio_enabled != phy->radio_on) {
2655                 if (conf->radio_enabled) {
2656                         b43legacy_radio_turn_on(dev);
2657                         b43legacyinfo(dev->wl, "Radio turned on by software\n");
2658                         if (!dev->radio_hw_enable)
2659                                 b43legacyinfo(dev->wl, "The hardware RF-kill"
2660                                               " button still turns the radio"
2661                                               " physically off. Press the"
2662                                               " button to turn it on.\n");
2663                 } else {
2664                         b43legacy_radio_turn_off(dev, 0);
2665                         b43legacyinfo(dev->wl, "Radio turned off by"
2666                                       " software\n");
2667                 }
2668         }
2669
2670         spin_lock_irqsave(&wl->irq_lock, flags);
2671         b43legacy_interrupt_enable(dev, savedirqs);
2672         mmiowb();
2673         spin_unlock_irqrestore(&wl->irq_lock, flags);
2674 out_unlock_mutex:
2675         mutex_unlock(&wl->mutex);
2676
2677         return err;
2678 }
2679
2680 static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
2681                                           unsigned int changed,
2682                                           unsigned int *fflags,
2683                                           int mc_count,
2684                                           struct dev_addr_list *mc_list)
2685 {
2686         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2687         struct b43legacy_wldev *dev = wl->current_dev;
2688         unsigned long flags;
2689
2690         if (!dev) {
2691                 *fflags = 0;
2692                 return;
2693         }
2694
2695         spin_lock_irqsave(&wl->irq_lock, flags);
2696         *fflags &= FIF_PROMISC_IN_BSS |
2697                   FIF_ALLMULTI |
2698                   FIF_FCSFAIL |
2699                   FIF_PLCPFAIL |
2700                   FIF_CONTROL |
2701                   FIF_OTHER_BSS |
2702                   FIF_BCN_PRBRESP_PROMISC;
2703
2704         changed &= FIF_PROMISC_IN_BSS |
2705                    FIF_ALLMULTI |
2706                    FIF_FCSFAIL |
2707                    FIF_PLCPFAIL |
2708                    FIF_CONTROL |
2709                    FIF_OTHER_BSS |
2710                    FIF_BCN_PRBRESP_PROMISC;
2711
2712         wl->filter_flags = *fflags;
2713
2714         if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2715                 b43legacy_adjust_opmode(dev);
2716         spin_unlock_irqrestore(&wl->irq_lock, flags);
2717 }
2718
2719 static int b43legacy_op_config_interface(struct ieee80211_hw *hw,
2720                                          struct ieee80211_vif *vif,
2721                                          struct ieee80211_if_conf *conf)
2722 {
2723         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2724         struct b43legacy_wldev *dev = wl->current_dev;
2725         unsigned long flags;
2726
2727         if (!dev)
2728                 return -ENODEV;
2729         mutex_lock(&wl->mutex);
2730         spin_lock_irqsave(&wl->irq_lock, flags);
2731         B43legacy_WARN_ON(wl->vif != vif);
2732         if (conf->bssid)
2733                 memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2734         else
2735                 memset(wl->bssid, 0, ETH_ALEN);
2736         if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2737                 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP)) {
2738                         B43legacy_WARN_ON(vif->type != IEEE80211_IF_TYPE_AP);
2739                         b43legacy_set_ssid(dev, conf->ssid, conf->ssid_len);
2740                         if (conf->changed & IEEE80211_IFCC_BEACON)
2741                                 b43legacy_update_templates(wl);
2742                 } else if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_IBSS)) {
2743                         if (conf->changed & IEEE80211_IFCC_BEACON)
2744                                 b43legacy_update_templates(wl);
2745                 }
2746                 b43legacy_write_mac_bssid_templates(dev);
2747         }
2748         spin_unlock_irqrestore(&wl->irq_lock, flags);
2749         mutex_unlock(&wl->mutex);
2750
2751         return 0;
2752 }
2753
2754 /* Locking: wl->mutex */
2755 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2756 {
2757         struct b43legacy_wl *wl = dev->wl;
2758         unsigned long flags;
2759
2760         if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2761                 return;
2762
2763         /* Disable and sync interrupts. We must do this before than
2764          * setting the status to INITIALIZED, as the interrupt handler
2765          * won't care about IRQs then. */
2766         spin_lock_irqsave(&wl->irq_lock, flags);
2767         dev->irq_savedstate = b43legacy_interrupt_disable(dev,
2768                                                           B43legacy_IRQ_ALL);
2769         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2770         spin_unlock_irqrestore(&wl->irq_lock, flags);
2771         b43legacy_synchronize_irq(dev);
2772
2773         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2774
2775         mutex_unlock(&wl->mutex);
2776         /* Must unlock as it would otherwise deadlock. No races here.
2777          * Cancel the possibly running self-rearming periodic work. */
2778         cancel_delayed_work_sync(&dev->periodic_work);
2779         mutex_lock(&wl->mutex);
2780
2781         ieee80211_stop_queues(wl->hw); /* FIXME this could cause a deadlock */
2782
2783         b43legacy_mac_suspend(dev);
2784         free_irq(dev->dev->irq, dev);
2785         b43legacydbg(wl, "Wireless interface stopped\n");
2786 }
2787
2788 /* Locking: wl->mutex */
2789 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2790 {
2791         int err;
2792
2793         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2794
2795         drain_txstatus_queue(dev);
2796         err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2797                           IRQF_SHARED, KBUILD_MODNAME, dev);
2798         if (err) {
2799                 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2800                        dev->dev->irq);
2801                 goto out;
2802         }
2803         /* We are ready to run. */
2804         b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2805
2806         /* Start data flow (TX/RX) */
2807         b43legacy_mac_enable(dev);
2808         b43legacy_interrupt_enable(dev, dev->irq_savedstate);
2809
2810         /* Start maintenance work */
2811         b43legacy_periodic_tasks_setup(dev);
2812
2813         b43legacydbg(dev->wl, "Wireless interface started\n");
2814 out:
2815         return err;
2816 }
2817
2818 /* Get PHY and RADIO versioning numbers */
2819 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2820 {
2821         struct b43legacy_phy *phy = &dev->phy;
2822         u32 tmp;
2823         u8 analog_type;
2824         u8 phy_type;
2825         u8 phy_rev;
2826         u16 radio_manuf;
2827         u16 radio_ver;
2828         u16 radio_rev;
2829         int unsupported = 0;
2830
2831         /* Get PHY versioning */
2832         tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
2833         analog_type = (tmp & B43legacy_PHYVER_ANALOG)
2834                       >> B43legacy_PHYVER_ANALOG_SHIFT;
2835         phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
2836         phy_rev = (tmp & B43legacy_PHYVER_VERSION);
2837         switch (phy_type) {
2838         case B43legacy_PHYTYPE_B:
2839                 if (phy_rev != 2 && phy_rev != 4
2840                     && phy_rev != 6 && phy_rev != 7)
2841                         unsupported = 1;
2842                 break;
2843         case B43legacy_PHYTYPE_G:
2844                 if (phy_rev > 8)
2845                         unsupported = 1;
2846                 break;
2847         default:
2848                 unsupported = 1;
2849         };
2850         if (unsupported) {
2851                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
2852                        "(Analog %u, Type %u, Revision %u)\n",
2853                        analog_type, phy_type, phy_rev);
2854                 return -EOPNOTSUPP;
2855         }
2856         b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
2857                analog_type, phy_type, phy_rev);
2858
2859
2860         /* Get RADIO versioning */
2861         if (dev->dev->bus->chip_id == 0x4317) {
2862                 if (dev->dev->bus->chip_rev == 0)
2863                         tmp = 0x3205017F;
2864                 else if (dev->dev->bus->chip_rev == 1)
2865                         tmp = 0x4205017F;
2866                 else
2867                         tmp = 0x5205017F;
2868         } else {
2869                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2870                                   B43legacy_RADIOCTL_ID);
2871                 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
2872                 tmp <<= 16;
2873                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2874                                   B43legacy_RADIOCTL_ID);
2875                 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
2876         }
2877         radio_manuf = (tmp & 0x00000FFF);
2878         radio_ver = (tmp & 0x0FFFF000) >> 12;
2879         radio_rev = (tmp & 0xF0000000) >> 28;
2880         switch (phy_type) {
2881         case B43legacy_PHYTYPE_B:
2882                 if ((radio_ver & 0xFFF0) != 0x2050)
2883                         unsupported = 1;
2884                 break;
2885         case B43legacy_PHYTYPE_G:
2886                 if (radio_ver != 0x2050)
2887                         unsupported = 1;
2888                 break;
2889         default:
2890                 B43legacy_BUG_ON(1);
2891         }
2892         if (unsupported) {
2893                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
2894                        "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
2895                        radio_manuf, radio_ver, radio_rev);
2896                 return -EOPNOTSUPP;
2897         }
2898         b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
2899                      " Revision %u\n", radio_manuf, radio_ver, radio_rev);
2900
2901
2902         phy->radio_manuf = radio_manuf;
2903         phy->radio_ver = radio_ver;
2904         phy->radio_rev = radio_rev;
2905
2906         phy->analog = analog_type;
2907         phy->type = phy_type;
2908         phy->rev = phy_rev;
2909
2910         return 0;
2911 }
2912
2913 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
2914                                       struct b43legacy_phy *phy)
2915 {
2916         struct b43legacy_lopair *lo;
2917         int i;
2918
2919         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
2920         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
2921
2922         /* Assume the radio is enabled. If it's not enabled, the state will
2923          * immediately get fixed on the first periodic work run. */
2924         dev->radio_hw_enable = 1;
2925
2926         phy->savedpctlreg = 0xFFFF;
2927         phy->aci_enable = 0;
2928         phy->aci_wlan_automatic = 0;
2929         phy->aci_hw_rssi = 0;
2930
2931         lo = phy->_lo_pairs;
2932         if (lo)
2933                 memset(lo, 0, sizeof(struct b43legacy_lopair) *
2934                                      B43legacy_LO_COUNT);
2935         phy->max_lb_gain = 0;
2936         phy->trsw_rx_gain = 0;
2937
2938         /* Set default attenuation values. */
2939         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
2940         phy->rfatt = b43legacy_default_radio_attenuation(dev);
2941         phy->txctl1 = b43legacy_default_txctl1(dev);
2942         phy->txpwr_offset = 0;
2943
2944         /* NRSSI */
2945         phy->nrssislope = 0;
2946         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
2947                 phy->nrssi[i] = -1000;
2948         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
2949                 phy->nrssi_lt[i] = i;
2950
2951         phy->lofcal = 0xFFFF;
2952         phy->initval = 0xFFFF;
2953
2954         phy->interfmode = B43legacy_INTERFMODE_NONE;
2955         phy->channel = 0xFF;
2956 }
2957
2958 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
2959 {
2960         /* Flags */
2961         dev->dfq_valid = 0;
2962
2963         /* Stats */
2964         memset(&dev->stats, 0, sizeof(dev->stats));
2965
2966         setup_struct_phy_for_init(dev, &dev->phy);
2967
2968         /* IRQ related flags */
2969         dev->irq_reason = 0;
2970         memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
2971         dev->irq_savedstate = B43legacy_IRQ_MASKTEMPLATE;
2972
2973         dev->mac_suspended = 1;
2974
2975         /* Noise calculation context */
2976         memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
2977 }
2978
2979 static void b43legacy_imcfglo_timeouts_workaround(struct b43legacy_wldev *dev)
2980 {
2981 #ifdef CONFIG_SSB_DRIVER_PCICORE
2982         struct ssb_bus *bus = dev->dev->bus;
2983         u32 tmp;
2984
2985         if (bus->pcicore.dev &&
2986             bus->pcicore.dev->id.coreid == SSB_DEV_PCI &&
2987             bus->pcicore.dev->id.revision <= 5) {
2988                 /* IMCFGLO timeouts workaround. */
2989                 tmp = ssb_read32(dev->dev, SSB_IMCFGLO);
2990                 tmp &= ~SSB_IMCFGLO_REQTO;
2991                 tmp &= ~SSB_IMCFGLO_SERTO;
2992                 switch (bus->bustype) {
2993                 case SSB_BUSTYPE_PCI:
2994                 case SSB_BUSTYPE_PCMCIA:
2995                         tmp |= 0x32;
2996                         break;
2997                 case SSB_BUSTYPE_SSB:
2998                         tmp |= 0x53;
2999                         break;
3000                 }
3001                 ssb_write32(dev->dev, SSB_IMCFGLO, tmp);
3002         }
3003 #endif /* CONFIG_SSB_DRIVER_PCICORE */
3004 }
3005
3006 /* Write the short and long frame retry limit values. */
3007 static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev,
3008                                        unsigned int short_retry,
3009                                        unsigned int long_retry)
3010 {
3011         /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
3012          * the chip-internal counter. */
3013         short_retry = min(short_retry, (unsigned int)0xF);
3014         long_retry = min(long_retry, (unsigned int)0xF);
3015
3016         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry);
3017         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry);
3018 }
3019
3020 static void b43legacy_set_synth_pu_delay(struct b43legacy_wldev *dev,
3021                                           bool idle) {
3022         u16 pu_delay = 1050;
3023
3024         if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_IBSS) || idle)
3025                 pu_delay = 500;
3026         if ((dev->phy.radio_ver == 0x2050) && (dev->phy.radio_rev == 8))
3027                 pu_delay = max(pu_delay, (u16)2400);
3028
3029         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3030                               B43legacy_SHM_SH_SPUWKUP, pu_delay);
3031 }
3032
3033 /* Set the TSF CFP pre-TargetBeaconTransmissionTime. */
3034 static void b43legacy_set_pretbtt(struct b43legacy_wldev *dev)
3035 {
3036         u16 pretbtt;
3037
3038         /* The time value is in microseconds. */
3039         if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_IBSS))
3040                 pretbtt = 2;
3041         else
3042                 pretbtt = 250;
3043         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3044                               B43legacy_SHM_SH_PRETBTT, pretbtt);
3045         b43legacy_write16(dev, B43legacy_MMIO_TSF_CFP_PRETBTT, pretbtt);
3046 }
3047
3048 /* Shutdown a wireless core */
3049 /* Locking: wl->mutex */
3050 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
3051 {
3052         struct b43legacy_phy *phy = &dev->phy;
3053         u32 macctl;
3054
3055         B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
3056         if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
3057                 return;
3058         b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
3059
3060         /* Stop the microcode PSM. */
3061         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
3062         macctl &= ~B43legacy_MACCTL_PSM_RUN;
3063         macctl |= B43legacy_MACCTL_PSM_JMP0;
3064         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
3065
3066         b43legacy_leds_exit(dev);
3067         b43legacy_rng_exit(dev->wl);
3068         b43legacy_pio_free(dev);
3069         b43legacy_dma_free(dev);
3070         b43legacy_chip_exit(dev);
3071         b43legacy_radio_turn_off(dev, 1);
3072         b43legacy_switch_analog(dev, 0);
3073         if (phy->dyn_tssi_tbl)
3074                 kfree(phy->tssi2dbm);
3075         kfree(phy->lo_control);
3076         phy->lo_control = NULL;
3077         if (dev->wl->current_beacon) {
3078                 dev_kfree_skb_any(dev->wl->current_beacon);
3079                 dev->wl->current_beacon = NULL;
3080         }
3081
3082         ssb_device_disable(dev->dev, 0);
3083         ssb_bus_may_powerdown(dev->dev->bus);
3084 }
3085
3086 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3087 {
3088         struct b43legacy_phy *phy = &dev->phy;
3089         int i;
3090
3091         /* Set default attenuation values. */
3092         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3093         phy->rfatt = b43legacy_default_radio_attenuation(dev);
3094         phy->txctl1 = b43legacy_default_txctl1(dev);
3095         phy->txctl2 = 0xFFFF;
3096         phy->txpwr_offset = 0;
3097
3098         /* NRSSI */
3099         phy->nrssislope = 0;
3100         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3101                 phy->nrssi[i] = -1000;
3102         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3103                 phy->nrssi_lt[i] = i;
3104
3105         phy->lofcal = 0xFFFF;
3106         phy->initval = 0xFFFF;
3107
3108         phy->aci_enable = 0;
3109         phy->aci_wlan_automatic = 0;
3110         phy->aci_hw_rssi = 0;
3111
3112         phy->antenna_diversity = 0xFFFF;
3113         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3114         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3115
3116         /* Flags */
3117         phy->calibrated = 0;
3118
3119         if (phy->_lo_pairs)
3120                 memset(phy->_lo_pairs, 0,
3121                        sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3122         memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3123 }
3124
3125 /* Initialize a wireless core */
3126 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3127 {
3128         struct b43legacy_wl *wl = dev->wl;
3129         struct ssb_bus *bus = dev->dev->bus;
3130         struct b43legacy_phy *phy = &dev->phy;
3131         struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3132         int err;
3133         u32 hf;
3134         u32 tmp;
3135
3136         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3137
3138         err = ssb_bus_powerup(bus, 0);
3139         if (err)
3140                 goto out;
3141         if (!ssb_device_is_enabled(dev->dev)) {
3142                 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3143                 b43legacy_wireless_core_reset(dev, tmp);
3144         }
3145
3146         if ((phy->type == B43legacy_PHYTYPE_B) ||
3147             (phy->type == B43legacy_PHYTYPE_G)) {
3148                 phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair)
3149                                          * B43legacy_LO_COUNT,
3150                                          GFP_KERNEL);
3151                 if (!phy->_lo_pairs)
3152                         return -ENOMEM;
3153         }
3154         setup_struct_wldev_for_init(dev);
3155
3156         err = b43legacy_phy_init_tssi2dbm_table(dev);
3157         if (err)
3158                 goto err_kfree_lo_control;
3159
3160         /* Enable IRQ routing to this device. */
3161         ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3162
3163         b43legacy_imcfglo_timeouts_workaround(dev);
3164         prepare_phy_data_for_init(dev);
3165         b43legacy_phy_calibrate(dev);
3166         err = b43legacy_chip_init(dev);
3167         if (err)
3168                 goto err_kfree_tssitbl;
3169         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3170                               B43legacy_SHM_SH_WLCOREREV,
3171                               dev->dev->id.revision);
3172         hf = b43legacy_hf_read(dev);
3173         if (phy->type == B43legacy_PHYTYPE_G) {
3174                 hf |= B43legacy_HF_SYMW;
3175                 if (phy->rev == 1)
3176                         hf |= B43legacy_HF_GDCW;
3177                 if (sprom->boardflags_lo & B43legacy_BFL_PACTRL)
3178                         hf |= B43legacy_HF_OFDMPABOOST;
3179         } else if (phy->type == B43legacy_PHYTYPE_B) {
3180                 hf |= B43legacy_HF_SYMW;
3181                 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3182                         hf &= ~B43legacy_HF_GDCW;
3183         }
3184         b43legacy_hf_write(dev, hf);
3185
3186         b43legacy_set_retry_limits(dev,
3187                                    B43legacy_DEFAULT_SHORT_RETRY_LIMIT,
3188                                    B43legacy_DEFAULT_LONG_RETRY_LIMIT);
3189
3190         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3191                               0x0044, 3);
3192         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3193                               0x0046, 2);
3194
3195         /* Disable sending probe responses from firmware.
3196          * Setting the MaxTime to one usec will always trigger
3197          * a timeout, so we never send any probe resp.
3198          * A timeout of zero is infinite. */
3199         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3200                               B43legacy_SHM_SH_PRMAXTIME, 1);
3201
3202         b43legacy_rate_memory_init(dev);
3203
3204         /* Minimum Contention Window */
3205         if (phy->type == B43legacy_PHYTYPE_B)
3206                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3207                                       0x0003, 31);
3208         else
3209                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3210                                       0x0003, 15);
3211         /* Maximum Contention Window */
3212         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3213                               0x0004, 1023);
3214
3215         do {
3216                 if (b43legacy_using_pio(dev))
3217                         err = b43legacy_pio_init(dev);
3218                 else {
3219                         err = b43legacy_dma_init(dev);
3220                         if (!err)
3221                                 b43legacy_qos_init(dev);
3222                 }
3223         } while (err == -EAGAIN);
3224         if (err)
3225                 goto err_chip_exit;
3226
3227         b43legacy_set_synth_pu_delay(dev, 1);
3228
3229         ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3230         b43legacy_upload_card_macaddress(dev);
3231         b43legacy_security_init(dev);
3232         b43legacy_rng_init(wl);
3233
3234         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3235
3236         b43legacy_leds_init(dev);
3237 out:
3238         return err;
3239
3240 err_chip_exit:
3241         b43legacy_chip_exit(dev);
3242 err_kfree_tssitbl:
3243         if (phy->dyn_tssi_tbl)
3244                 kfree(phy->tssi2dbm);
3245 err_kfree_lo_control:
3246         kfree(phy->lo_control);
3247         phy->lo_control = NULL;
3248         ssb_bus_may_powerdown(bus);
3249         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3250         return err;
3251 }
3252
3253 static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3254                                       struct ieee80211_if_init_conf *conf)
3255 {
3256         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3257         struct b43legacy_wldev *dev;
3258         unsigned long flags;
3259         int err = -EOPNOTSUPP;
3260
3261         /* TODO: allow WDS/AP devices to coexist */
3262
3263         if (conf->type != IEEE80211_IF_TYPE_AP &&
3264             conf->type != IEEE80211_IF_TYPE_STA &&
3265             conf->type != IEEE80211_IF_TYPE_WDS &&
3266             conf->type != IEEE80211_IF_TYPE_IBSS)
3267                 return -EOPNOTSUPP;
3268
3269         mutex_lock(&wl->mutex);
3270         if (wl->operating)
3271                 goto out_mutex_unlock;
3272
3273         b43legacydbg(wl, "Adding Interface type %d\n", conf->type);
3274
3275         dev = wl->current_dev;
3276         wl->operating = 1;
3277         wl->vif = conf->vif;
3278         wl->if_type = conf->type;
3279         memcpy(wl->mac_addr, conf->mac_addr, ETH_ALEN);
3280
3281         spin_lock_irqsave(&wl->irq_lock, flags);
3282         b43legacy_adjust_opmode(dev);
3283         b43legacy_set_pretbtt(dev);
3284         b43legacy_set_synth_pu_delay(dev, 0);
3285         b43legacy_upload_card_macaddress(dev);
3286         spin_unlock_irqrestore(&wl->irq_lock, flags);
3287
3288         err = 0;
3289  out_mutex_unlock:
3290         mutex_unlock(&wl->mutex);
3291
3292         return err;
3293 }
3294
3295 static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
3296                                           struct ieee80211_if_init_conf *conf)
3297 {
3298         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3299         struct b43legacy_wldev *dev = wl->current_dev;
3300         unsigned long flags;
3301
3302         b43legacydbg(wl, "Removing Interface type %d\n", conf->type);
3303
3304         mutex_lock(&wl->mutex);
3305
3306         B43legacy_WARN_ON(!wl->operating);
3307         B43legacy_WARN_ON(wl->vif != conf->vif);
3308         wl->vif = NULL;
3309
3310         wl->operating = 0;
3311
3312         spin_lock_irqsave(&wl->irq_lock, flags);
3313         b43legacy_adjust_opmode(dev);
3314         memset(wl->mac_addr, 0, ETH_ALEN);
3315         b43legacy_upload_card_macaddress(dev);
3316         spin_unlock_irqrestore(&wl->irq_lock, flags);
3317
3318         mutex_unlock(&wl->mutex);
3319 }
3320
3321 static int b43legacy_op_start(struct ieee80211_hw *hw)
3322 {
3323         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3324         struct b43legacy_wldev *dev = wl->current_dev;
3325         int did_init = 0;
3326         int err = 0;
3327         bool do_rfkill_exit = 0;
3328
3329         /* First register RFkill.
3330          * LEDs that are registered later depend on it. */
3331         b43legacy_rfkill_init(dev);
3332
3333         /* Kill all old instance specific information to make sure
3334          * the card won't use it in the short timeframe between start
3335          * and mac80211 reconfiguring it. */
3336         memset(wl->bssid, 0, ETH_ALEN);
3337         memset(wl->mac_addr, 0, ETH_ALEN);
3338         wl->filter_flags = 0;
3339
3340         mutex_lock(&wl->mutex);
3341
3342         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3343                 err = b43legacy_wireless_core_init(dev);
3344                 if (err) {
3345                         do_rfkill_exit = 1;
3346                         goto out_mutex_unlock;
3347                 }
3348                 did_init = 1;
3349         }
3350
3351         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3352                 err = b43legacy_wireless_core_start(dev);
3353                 if (err) {
3354                         if (did_init)
3355                                 b43legacy_wireless_core_exit(dev);
3356                         do_rfkill_exit = 1;
3357                         goto out_mutex_unlock;
3358                 }
3359         }
3360
3361 out_mutex_unlock:
3362         mutex_unlock(&wl->mutex);
3363
3364         if (do_rfkill_exit)
3365                 b43legacy_rfkill_exit(dev);
3366
3367         return err;
3368 }
3369
3370 static void b43legacy_op_stop(struct ieee80211_hw *hw)
3371 {
3372         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3373         struct b43legacy_wldev *dev = wl->current_dev;
3374
3375         b43legacy_rfkill_exit(dev);
3376
3377         mutex_lock(&wl->mutex);
3378         if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3379                 b43legacy_wireless_core_stop(dev);
3380         b43legacy_wireless_core_exit(dev);
3381         mutex_unlock(&wl->mutex);
3382 }
3383
3384 static int b43legacy_op_set_retry_limit(struct ieee80211_hw *hw,
3385                                         u32 short_retry_limit,
3386                                         u32 long_retry_limit)
3387 {
3388         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3389         struct b43legacy_wldev *dev;
3390         int err = 0;
3391
3392         mutex_lock(&wl->mutex);
3393         dev = wl->current_dev;
3394         if (unlikely(!dev ||
3395                      (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED))) {
3396                 err = -ENODEV;
3397                 goto out_unlock;
3398         }
3399         b43legacy_set_retry_limits(dev, short_retry_limit, long_retry_limit);
3400 out_unlock:
3401         mutex_unlock(&wl->mutex);
3402
3403         return err;
3404 }
3405
3406 static int b43legacy_op_beacon_set_tim(struct ieee80211_hw *hw,
3407                                        int aid, int set)
3408 {
3409         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3410         unsigned long flags;
3411
3412         spin_lock_irqsave(&wl->irq_lock, flags);
3413         b43legacy_update_templates(wl);
3414         spin_unlock_irqrestore(&wl->irq_lock, flags);
3415
3416         return 0;
3417 }
3418
3419 static const struct ieee80211_ops b43legacy_hw_ops = {
3420         .tx                     = b43legacy_op_tx,
3421         .conf_tx                = b43legacy_op_conf_tx,
3422         .add_interface          = b43legacy_op_add_interface,
3423         .remove_interface       = b43legacy_op_remove_interface,
3424         .config                 = b43legacy_op_dev_config,
3425         .config_interface       = b43legacy_op_config_interface,
3426         .configure_filter       = b43legacy_op_configure_filter,
3427         .get_stats              = b43legacy_op_get_stats,
3428         .get_tx_stats           = b43legacy_op_get_tx_stats,
3429         .start                  = b43legacy_op_start,
3430         .stop                   = b43legacy_op_stop,
3431         .set_retry_limit        = b43legacy_op_set_retry_limit,
3432         .set_tim                = b43legacy_op_beacon_set_tim,
3433 };
3434
3435 /* Hard-reset the chip. Do not call this directly.
3436  * Use b43legacy_controller_restart()
3437  */
3438 static void b43legacy_chip_reset(struct work_struct *work)
3439 {
3440         struct b43legacy_wldev *dev =
3441                 container_of(work, struct b43legacy_wldev, restart_work);
3442         struct b43legacy_wl *wl = dev->wl;
3443         int err = 0;
3444         int prev_status;
3445
3446         mutex_lock(&wl->mutex);
3447
3448         prev_status = b43legacy_status(dev);
3449         /* Bring the device down... */
3450         if (prev_status >= B43legacy_STAT_STARTED)
3451                 b43legacy_wireless_core_stop(dev);
3452         if (prev_status >= B43legacy_STAT_INITIALIZED)
3453                 b43legacy_wireless_core_exit(dev);
3454
3455         /* ...and up again. */
3456         if (prev_status >= B43legacy_STAT_INITIALIZED) {
3457                 err = b43legacy_wireless_core_init(dev);
3458                 if (err)
3459                         goto out;
3460         }
3461         if (prev_status >= B43legacy_STAT_STARTED) {
3462                 err = b43legacy_wireless_core_start(dev);
3463                 if (err) {
3464                         b43legacy_wireless_core_exit(dev);
3465                         goto out;
3466                 }
3467         }
3468 out:
3469         if (err)
3470                 wl->current_dev = NULL; /* Failed to init the dev. */
3471         mutex_unlock(&wl->mutex);
3472         if (err)
3473                 b43legacyerr(wl, "Controller restart FAILED\n");
3474         else
3475                 b43legacyinfo(wl, "Controller restarted\n");
3476 }
3477
3478 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3479                                  int have_bphy,
3480                                  int have_gphy)
3481 {
3482         struct ieee80211_hw *hw = dev->wl->hw;
3483         struct b43legacy_phy *phy = &dev->phy;
3484
3485         phy->possible_phymodes = 0;
3486         if (have_bphy) {
3487                 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3488                         &b43legacy_band_2GHz_BPHY;
3489                 phy->possible_phymodes |= B43legacy_PHYMODE_B;
3490         }
3491
3492         if (have_gphy) {
3493                 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3494                         &b43legacy_band_2GHz_GPHY;
3495                 phy->possible_phymodes |= B43legacy_PHYMODE_G;
3496         }
3497
3498         return 0;
3499 }
3500
3501 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3502 {
3503         /* We release firmware that late to not be required to re-request
3504          * is all the time when we reinit the core. */
3505         b43legacy_release_firmware(dev);
3506 }
3507
3508 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3509 {
3510         struct b43legacy_wl *wl = dev->wl;
3511         struct ssb_bus *bus = dev->dev->bus;
3512         struct pci_dev *pdev = bus->host_pci;
3513         int err;
3514         int have_bphy = 0;
3515         int have_gphy = 0;
3516         u32 tmp;
3517
3518         /* Do NOT do any device initialization here.
3519          * Do it in wireless_core_init() instead.
3520          * This function is for gathering basic information about the HW, only.
3521          * Also some structs may be set up here. But most likely you want to
3522          * have that in core_init(), too.
3523          */
3524
3525         err = ssb_bus_powerup(bus, 0);
3526         if (err) {
3527                 b43legacyerr(wl, "Bus powerup failed\n");
3528                 goto out;
3529         }
3530         /* Get the PHY type. */
3531         if (dev->dev->id.revision >= 5) {
3532                 u32 tmshigh;
3533
3534                 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3535                 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3536                 if (!have_gphy)
3537                         have_bphy = 1;
3538         } else if (dev->dev->id.revision == 4)
3539                 have_gphy = 1;
3540         else
3541                 have_bphy = 1;
3542
3543         dev->phy.gmode = (have_gphy || have_bphy);
3544         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3545         b43legacy_wireless_core_reset(dev, tmp);
3546
3547         err = b43legacy_phy_versioning(dev);
3548         if (err)
3549                 goto err_powerdown;
3550         /* Check if this device supports multiband. */
3551         if (!pdev ||
3552             (pdev->device != 0x4312 &&
3553              pdev->device != 0x4319 &&
3554              pdev->device != 0x4324)) {
3555                 /* No multiband support. */
3556                 have_bphy = 0;
3557                 have_gphy = 0;
3558                 switch (dev->phy.type) {
3559                 case B43legacy_PHYTYPE_B:
3560                         have_bphy = 1;
3561                         break;
3562                 case B43legacy_PHYTYPE_G:
3563                         have_gphy = 1;
3564                         break;
3565                 default:
3566                         B43legacy_BUG_ON(1);
3567                 }
3568         }
3569         dev->phy.gmode = (have_gphy || have_bphy);
3570         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3571         b43legacy_wireless_core_reset(dev, tmp);
3572
3573         err = b43legacy_validate_chipaccess(dev);
3574         if (err)
3575                 goto err_powerdown;
3576         err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3577         if (err)
3578                 goto err_powerdown;
3579
3580         /* Now set some default "current_dev" */
3581         if (!wl->current_dev)
3582                 wl->current_dev = dev;
3583         INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3584
3585         b43legacy_radio_turn_off(dev, 1);
3586         b43legacy_switch_analog(dev, 0);
3587         ssb_device_disable(dev->dev, 0);
3588         ssb_bus_may_powerdown(bus);
3589
3590 out:
3591         return err;
3592
3593 err_powerdown:
3594         ssb_bus_may_powerdown(bus);
3595         return err;
3596 }
3597
3598 static void b43legacy_one_core_detach(struct ssb_device *dev)
3599 {
3600         struct b43legacy_wldev *wldev;
3601         struct b43legacy_wl *wl;
3602
3603         /* Do not cancel ieee80211-workqueue based work here.
3604          * See comment in b43legacy_remove(). */
3605
3606         wldev = ssb_get_drvdata(dev);
3607         wl = wldev->wl;
3608         b43legacy_debugfs_remove_device(wldev);
3609         b43legacy_wireless_core_detach(wldev);
3610         list_del(&wldev->list);
3611         wl->nr_devs--;
3612         ssb_set_drvdata(dev, NULL);
3613         kfree(wldev);
3614 }
3615
3616 static int b43legacy_one_core_attach(struct ssb_device *dev,
3617                                      struct b43legacy_wl *wl)
3618 {
3619         struct b43legacy_wldev *wldev;
3620         struct pci_dev *pdev;
3621         int err = -ENOMEM;
3622
3623         if (!list_empty(&wl->devlist)) {
3624                 /* We are not the first core on this chip. */
3625                 pdev = dev->bus->host_pci;
3626                 /* Only special chips support more than one wireless
3627                  * core, although some of the other chips have more than
3628                  * one wireless core as well. Check for this and
3629                  * bail out early.
3630                  */
3631                 if (!pdev ||
3632                     ((pdev->device != 0x4321) &&
3633                      (pdev->device != 0x4313) &&
3634                      (pdev->device != 0x431A))) {
3635                         b43legacydbg(wl, "Ignoring unconnected 802.11 core\n");
3636                         return -ENODEV;
3637                 }
3638         }
3639
3640         wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3641         if (!wldev)
3642                 goto out;
3643
3644         wldev->dev = dev;
3645         wldev->wl = wl;
3646         b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3647         wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3648         tasklet_init(&wldev->isr_tasklet,
3649                      (void (*)(unsigned long))b43legacy_interrupt_tasklet,
3650                      (unsigned long)wldev);
3651         if (modparam_pio)
3652                 wldev->__using_pio = 1;
3653         INIT_LIST_HEAD(&wldev->list);
3654
3655         err = b43legacy_wireless_core_attach(wldev);
3656         if (err)
3657                 goto err_kfree_wldev;
3658
3659         list_add(&wldev->list, &wl->devlist);
3660         wl->nr_devs++;
3661         ssb_set_drvdata(dev, wldev);
3662         b43legacy_debugfs_add_device(wldev);
3663 out:
3664         return err;
3665
3666 err_kfree_wldev:
3667         kfree(wldev);
3668         return err;
3669 }
3670
3671 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3672 {
3673         /* boardflags workarounds */
3674         if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3675             bus->boardinfo.type == 0x4E &&
3676             bus->boardinfo.rev > 0x40)
3677                 bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;
3678 }
3679
3680 static void b43legacy_wireless_exit(struct ssb_device *dev,
3681                                   struct b43legacy_wl *wl)
3682 {
3683         struct ieee80211_hw *hw = wl->hw;
3684
3685         ssb_set_devtypedata(dev, NULL);
3686         ieee80211_free_hw(hw);
3687 }
3688
3689 static int b43legacy_wireless_init(struct ssb_device *dev)
3690 {
3691         struct ssb_sprom *sprom = &dev->bus->sprom;
3692         struct ieee80211_hw *hw;
3693         struct b43legacy_wl *wl;
3694         int err = -ENOMEM;
3695
3696         b43legacy_sprom_fixup(dev->bus);
3697
3698         hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3699         if (!hw) {
3700                 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3701                 goto out;
3702         }
3703
3704         /* fill hw info */
3705         hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
3706                     IEEE80211_HW_RX_INCLUDES_FCS |
3707                     IEEE80211_HW_SIGNAL_DBM |
3708                     IEEE80211_HW_NOISE_DBM;
3709         hw->queues = 1; /* FIXME: hardware has more queues */
3710         SET_IEEE80211_DEV(hw, dev->dev);
3711         if (is_valid_ether_addr(sprom->et1mac))
3712                 SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
3713         else
3714                 SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);
3715
3716         /* Get and initialize struct b43legacy_wl */
3717         wl = hw_to_b43legacy_wl(hw);
3718         memset(wl, 0, sizeof(*wl));
3719         wl->hw = hw;
3720         spin_lock_init(&wl->irq_lock);
3721         spin_lock_init(&wl->leds_lock);
3722         mutex_init(&wl->mutex);
3723         INIT_LIST_HEAD(&wl->devlist);
3724
3725         ssb_set_devtypedata(dev, wl);
3726         b43legacyinfo(wl, "Broadcom %04X WLAN found\n", dev->bus->chip_id);
3727         err = 0;
3728 out:
3729         return err;
3730 }
3731
3732 static int b43legacy_probe(struct ssb_device *dev,
3733                          const struct ssb_device_id *id)
3734 {
3735         struct b43legacy_wl *wl;
3736         int err;
3737         int first = 0;
3738
3739         wl = ssb_get_devtypedata(dev);
3740         if (!wl) {
3741                 /* Probing the first core - setup common struct b43legacy_wl */
3742                 first = 1;
3743                 err = b43legacy_wireless_init(dev);
3744                 if (err)
3745                         goto out;
3746                 wl = ssb_get_devtypedata(dev);
3747                 B43legacy_WARN_ON(!wl);
3748         }
3749         err = b43legacy_one_core_attach(dev, wl);
3750         if (err)
3751                 goto err_wireless_exit;
3752
3753         if (first) {
3754                 err = ieee80211_register_hw(wl->hw);
3755                 if (err)
3756                         goto err_one_core_detach;
3757         }
3758
3759 out:
3760         return err;
3761
3762 err_one_core_detach:
3763         b43legacy_one_core_detach(dev);
3764 err_wireless_exit:
3765         if (first)
3766                 b43legacy_wireless_exit(dev, wl);
3767         return err;
3768 }
3769
3770 static void b43legacy_remove(struct ssb_device *dev)
3771 {
3772         struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3773         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3774
3775         /* We must cancel any work here before unregistering from ieee80211,
3776          * as the ieee80211 unreg will destroy the workqueue. */
3777         cancel_work_sync(&wldev->restart_work);
3778
3779         B43legacy_WARN_ON(!wl);
3780         if (wl->current_dev == wldev)
3781                 ieee80211_unregister_hw(wl->hw);
3782
3783         b43legacy_one_core_detach(dev);
3784
3785         if (list_empty(&wl->devlist))
3786                 /* Last core on the chip unregistered.
3787                  * We can destroy common struct b43legacy_wl.
3788                  */
3789                 b43legacy_wireless_exit(dev, wl);
3790 }
3791
3792 /* Perform a hardware reset. This can be called from any context. */
3793 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3794                                   const char *reason)
3795 {
3796         /* Must avoid requeueing, if we are in shutdown. */
3797         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3798                 return;
3799         b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3800         queue_work(dev->wl->hw->workqueue, &dev->restart_work);
3801 }
3802
3803 #ifdef CONFIG_PM
3804
3805 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3806 {
3807         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3808         struct b43legacy_wl *wl = wldev->wl;
3809
3810         b43legacydbg(wl, "Suspending...\n");
3811
3812         mutex_lock(&wl->mutex);
3813         wldev->suspend_init_status = b43legacy_status(wldev);
3814         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3815                 b43legacy_wireless_core_stop(wldev);
3816         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3817                 b43legacy_wireless_core_exit(wldev);
3818         mutex_unlock(&wl->mutex);
3819
3820         b43legacydbg(wl, "Device suspended.\n");
3821
3822         return 0;
3823 }
3824
3825 static int b43legacy_resume(struct ssb_device *dev)
3826 {
3827         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3828         struct b43legacy_wl *wl = wldev->wl;
3829         int err = 0;
3830
3831         b43legacydbg(wl, "Resuming...\n");
3832
3833         mutex_lock(&wl->mutex);
3834         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3835                 err = b43legacy_wireless_core_init(wldev);
3836                 if (err) {
3837                         b43legacyerr(wl, "Resume failed at core init\n");
3838                         goto out;
3839                 }
3840         }
3841         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3842                 err = b43legacy_wireless_core_start(wldev);
3843                 if (err) {
3844                         b43legacy_wireless_core_exit(wldev);
3845                         b43legacyerr(wl, "Resume failed at core start\n");
3846                         goto out;
3847                 }
3848         }
3849         mutex_unlock(&wl->mutex);
3850
3851         b43legacydbg(wl, "Device resumed.\n");
3852 out:
3853         return err;
3854 }
3855
3856 #else   /* CONFIG_PM */
3857 # define b43legacy_suspend      NULL
3858 # define b43legacy_resume               NULL
3859 #endif  /* CONFIG_PM */
3860
3861 static struct ssb_driver b43legacy_ssb_driver = {
3862         .name           = KBUILD_MODNAME,
3863         .id_table       = b43legacy_ssb_tbl,
3864         .probe          = b43legacy_probe,
3865         .remove         = b43legacy_remove,
3866         .suspend        = b43legacy_suspend,
3867         .resume         = b43legacy_resume,
3868 };
3869
3870 static void b43legacy_print_driverinfo(void)
3871 {
3872         const char *feat_pci = "", *feat_leds = "", *feat_rfkill = "",
3873                    *feat_pio = "", *feat_dma = "";
3874
3875 #ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT
3876         feat_pci = "P";
3877 #endif
3878 #ifdef CONFIG_B43LEGACY_LEDS
3879         feat_leds = "L";
3880 #endif
3881 #ifdef CONFIG_B43LEGACY_RFKILL
3882         feat_rfkill = "R";
3883 #endif
3884 #ifdef CONFIG_B43LEGACY_PIO
3885         feat_pio = "I";
3886 #endif
3887 #ifdef CONFIG_B43LEGACY_DMA
3888         feat_dma = "D";
3889 #endif
3890         printk(KERN_INFO "Broadcom 43xx-legacy driver loaded "
3891                "[ Features: %s%s%s%s%s, Firmware-ID: "
3892                B43legacy_SUPPORTED_FIRMWARE_ID " ]\n",
3893                feat_pci, feat_leds, feat_rfkill, feat_pio, feat_dma);
3894 }
3895
3896 static int __init b43legacy_init(void)
3897 {
3898         int err;
3899
3900         b43legacy_debugfs_init();
3901
3902         err = ssb_driver_register(&b43legacy_ssb_driver);
3903         if (err)
3904                 goto err_dfs_exit;
3905
3906         b43legacy_print_driverinfo();
3907
3908         return err;
3909
3910 err_dfs_exit:
3911         b43legacy_debugfs_exit();
3912         return err;
3913 }
3914
3915 static void __exit b43legacy_exit(void)
3916 {
3917         ssb_driver_unregister(&b43legacy_ssb_driver);
3918         b43legacy_debugfs_exit();
3919 }
3920
3921 module_init(b43legacy_init)
3922 module_exit(b43legacy_exit)