2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
13 #include <linux/config.h>
14 #include <linux/string.h>
15 #include <linux/sched.h>
16 #include <linux/threads.h>
17 #include <linux/init.h>
18 #include <linux/module.h>
20 #include <asm/oprofile_impl.h>
21 #include <asm/cputable.h>
23 struct cpu_spec* cur_cpu_spec = NULL;
25 EXPORT_SYMBOL(cur_cpu_spec);
29 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
30 * the responsibility of the appropriate CPU save/restore functions to
31 * eventually copy these settings over. Those save/restore aren't yet
32 * part of the cputable though. That has to be fixed for both ppc32
36 extern void __setup_cpu_power3(unsigned long offset, struct cpu_spec* spec);
37 extern void __setup_cpu_power4(unsigned long offset, struct cpu_spec* spec);
38 extern void __setup_cpu_be(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
42 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
43 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
44 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
45 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
46 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
47 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
48 #endif /* CONFIG_PPC32 */
49 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
51 /* This table only contains "desktop" CPUs, it need to be filled with embedded
54 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
56 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
59 /* We only set the spe features if the kernel was compiled with
63 #define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE
65 #define PPC_FEATURE_SPE_COMP 0
68 struct cpu_spec cpu_specs[] = {
71 .pvr_mask = 0xffff0000,
72 .pvr_value = 0x00400000,
73 .cpu_name = "POWER3 (630)",
74 .cpu_features = CPU_FTRS_POWER3,
75 .cpu_user_features = COMMON_USER_PPC64,
79 .cpu_setup = __setup_cpu_power3,
80 #ifdef CONFIG_OPROFILE
81 .oprofile_cpu_type = "ppc64/power3",
82 .oprofile_model = &op_model_rs64,
86 .pvr_mask = 0xffff0000,
87 .pvr_value = 0x00410000,
88 .cpu_name = "POWER3 (630+)",
89 .cpu_features = CPU_FTRS_POWER3,
90 .cpu_user_features = COMMON_USER_PPC64,
94 .cpu_setup = __setup_cpu_power3,
95 #ifdef CONFIG_OPROFILE
96 .oprofile_cpu_type = "ppc64/power3",
97 .oprofile_model = &op_model_rs64,
101 .pvr_mask = 0xffff0000,
102 .pvr_value = 0x00330000,
103 .cpu_name = "RS64-II (northstar)",
104 .cpu_features = CPU_FTRS_RS64,
105 .cpu_user_features = COMMON_USER_PPC64,
109 .cpu_setup = __setup_cpu_power3,
110 #ifdef CONFIG_OPROFILE
111 .oprofile_cpu_type = "ppc64/rs64",
112 .oprofile_model = &op_model_rs64,
116 .pvr_mask = 0xffff0000,
117 .pvr_value = 0x00340000,
118 .cpu_name = "RS64-III (pulsar)",
119 .cpu_features = CPU_FTRS_RS64,
120 .cpu_user_features = COMMON_USER_PPC64,
124 .cpu_setup = __setup_cpu_power3,
125 #ifdef CONFIG_OPROFILE
126 .oprofile_cpu_type = "ppc64/rs64",
127 .oprofile_model = &op_model_rs64,
131 .pvr_mask = 0xffff0000,
132 .pvr_value = 0x00360000,
133 .cpu_name = "RS64-III (icestar)",
134 .cpu_features = CPU_FTRS_RS64,
135 .cpu_user_features = COMMON_USER_PPC64,
139 .cpu_setup = __setup_cpu_power3,
140 #ifdef CONFIG_OPROFILE
141 .oprofile_cpu_type = "ppc64/rs64",
142 .oprofile_model = &op_model_rs64,
146 .pvr_mask = 0xffff0000,
147 .pvr_value = 0x00370000,
148 .cpu_name = "RS64-IV (sstar)",
149 .cpu_features = CPU_FTRS_RS64,
150 .cpu_user_features = COMMON_USER_PPC64,
154 .cpu_setup = __setup_cpu_power3,
155 #ifdef CONFIG_OPROFILE
156 .oprofile_cpu_type = "ppc64/rs64",
157 .oprofile_model = &op_model_rs64,
161 .pvr_mask = 0xffff0000,
162 .pvr_value = 0x00350000,
163 .cpu_name = "POWER4 (gp)",
164 .cpu_features = CPU_FTRS_POWER4,
165 .cpu_user_features = COMMON_USER_PPC64,
169 .cpu_setup = __setup_cpu_power4,
170 #ifdef CONFIG_OPROFILE
171 .oprofile_cpu_type = "ppc64/power4",
172 .oprofile_model = &op_model_rs64,
176 .pvr_mask = 0xffff0000,
177 .pvr_value = 0x00380000,
178 .cpu_name = "POWER4+ (gq)",
179 .cpu_features = CPU_FTRS_POWER4,
180 .cpu_user_features = COMMON_USER_PPC64,
184 .cpu_setup = __setup_cpu_power4,
185 #ifdef CONFIG_OPROFILE
186 .oprofile_cpu_type = "ppc64/power4",
187 .oprofile_model = &op_model_power4,
191 .pvr_mask = 0xffff0000,
192 .pvr_value = 0x00390000,
193 .cpu_name = "PPC970",
194 .cpu_features = CPU_FTRS_PPC970,
195 .cpu_user_features = COMMON_USER_PPC64 |
196 PPC_FEATURE_HAS_ALTIVEC_COMP,
200 .cpu_setup = __setup_cpu_ppc970,
201 #ifdef CONFIG_OPROFILE
202 .oprofile_cpu_type = "ppc64/970",
203 .oprofile_model = &op_model_power4,
206 #endif /* CONFIG_PPC64 */
207 #if defined(CONFIG_PPC64) || defined(CONFIG_POWER4)
209 .pvr_mask = 0xffff0000,
210 .pvr_value = 0x003c0000,
211 .cpu_name = "PPC970FX",
213 .cpu_features = CPU_FTRS_970_32,
215 .cpu_features = CPU_FTRS_PPC970,
217 .cpu_user_features = COMMON_USER_PPC64 |
218 PPC_FEATURE_HAS_ALTIVEC_COMP,
222 .cpu_setup = __setup_cpu_ppc970,
223 #ifdef CONFIG_OPROFILE
224 .oprofile_cpu_type = "ppc64/970",
225 .oprofile_model = &op_model_power4,
228 #endif /* defined(CONFIG_PPC64) || defined(CONFIG_POWER4) */
231 .pvr_mask = 0xffff0000,
232 .pvr_value = 0x00440000,
233 .cpu_name = "PPC970MP",
234 .cpu_features = CPU_FTRS_PPC970,
235 .cpu_user_features = COMMON_USER_PPC64 |
236 PPC_FEATURE_HAS_ALTIVEC_COMP,
239 .cpu_setup = __setup_cpu_ppc970,
240 #ifdef CONFIG_OPROFILE
241 .oprofile_cpu_type = "ppc64/970",
242 .oprofile_model = &op_model_power4,
246 .pvr_mask = 0xffff0000,
247 .pvr_value = 0x003a0000,
248 .cpu_name = "POWER5 (gr)",
249 .cpu_features = CPU_FTRS_POWER5,
250 .cpu_user_features = COMMON_USER_PPC64,
254 .cpu_setup = __setup_cpu_power4,
255 #ifdef CONFIG_OPROFILE
256 .oprofile_cpu_type = "ppc64/power5",
257 .oprofile_model = &op_model_power4,
261 .pvr_mask = 0xffff0000,
262 .pvr_value = 0x003b0000,
263 .cpu_name = "POWER5 (gs)",
264 .cpu_features = CPU_FTRS_POWER5,
265 .cpu_user_features = COMMON_USER_PPC64,
269 .cpu_setup = __setup_cpu_power4,
270 #ifdef CONFIG_OPROFILE
271 .oprofile_cpu_type = "ppc64/power5",
272 .oprofile_model = &op_model_power4,
276 .pvr_mask = 0xffff0000,
277 .pvr_value = 0x00700000,
278 .cpu_name = "Cell Broadband Engine",
279 .cpu_features = CPU_FTRS_CELL,
280 .cpu_user_features = COMMON_USER_PPC64 |
281 PPC_FEATURE_HAS_ALTIVEC_COMP,
284 .cpu_setup = __setup_cpu_be,
286 { /* default match */
287 .pvr_mask = 0x00000000,
288 .pvr_value = 0x00000000,
289 .cpu_name = "POWER4 (compatible)",
290 .cpu_features = CPU_FTRS_COMPATIBLE,
291 .cpu_user_features = COMMON_USER_PPC64,
295 .cpu_setup = __setup_cpu_power4,
297 #endif /* CONFIG_PPC64 */
301 .pvr_mask = 0xffff0000,
302 .pvr_value = 0x00010000,
304 .cpu_features = CPU_FTRS_PPC601,
305 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
306 PPC_FEATURE_UNIFIED_CACHE,
311 .pvr_mask = 0xffff0000,
312 .pvr_value = 0x00030000,
314 .cpu_features = CPU_FTRS_603,
315 .cpu_user_features = COMMON_USER,
318 .cpu_setup = __setup_cpu_603
321 .pvr_mask = 0xffff0000,
322 .pvr_value = 0x00060000,
324 .cpu_features = CPU_FTRS_603,
325 .cpu_user_features = COMMON_USER,
328 .cpu_setup = __setup_cpu_603
331 .pvr_mask = 0xffff0000,
332 .pvr_value = 0x00070000,
334 .cpu_features = CPU_FTRS_603,
335 .cpu_user_features = COMMON_USER,
338 .cpu_setup = __setup_cpu_603
341 .pvr_mask = 0xffff0000,
342 .pvr_value = 0x00040000,
344 .cpu_features = CPU_FTRS_604,
345 .cpu_user_features = COMMON_USER,
349 .cpu_setup = __setup_cpu_604
352 .pvr_mask = 0xfffff000,
353 .pvr_value = 0x00090000,
355 .cpu_features = CPU_FTRS_604,
356 .cpu_user_features = COMMON_USER,
360 .cpu_setup = __setup_cpu_604
363 .pvr_mask = 0xffff0000,
364 .pvr_value = 0x00090000,
366 .cpu_features = CPU_FTRS_604,
367 .cpu_user_features = COMMON_USER,
371 .cpu_setup = __setup_cpu_604
374 .pvr_mask = 0xffff0000,
375 .pvr_value = 0x000a0000,
377 .cpu_features = CPU_FTRS_604,
378 .cpu_user_features = COMMON_USER,
382 .cpu_setup = __setup_cpu_604
384 { /* 740/750 (0x4202, don't support TAU ?) */
385 .pvr_mask = 0xffffffff,
386 .pvr_value = 0x00084202,
387 .cpu_name = "740/750",
388 .cpu_features = CPU_FTRS_740_NOTAU,
389 .cpu_user_features = COMMON_USER,
393 .cpu_setup = __setup_cpu_750
395 { /* 750CX (80100 and 8010x?) */
396 .pvr_mask = 0xfffffff0,
397 .pvr_value = 0x00080100,
399 .cpu_features = CPU_FTRS_750,
400 .cpu_user_features = COMMON_USER,
404 .cpu_setup = __setup_cpu_750cx
406 { /* 750CX (82201 and 82202) */
407 .pvr_mask = 0xfffffff0,
408 .pvr_value = 0x00082200,
410 .cpu_features = CPU_FTRS_750,
411 .cpu_user_features = COMMON_USER,
415 .cpu_setup = __setup_cpu_750cx
417 { /* 750CXe (82214) */
418 .pvr_mask = 0xfffffff0,
419 .pvr_value = 0x00082210,
420 .cpu_name = "750CXe",
421 .cpu_features = CPU_FTRS_750,
422 .cpu_user_features = COMMON_USER,
426 .cpu_setup = __setup_cpu_750cx
428 { /* 750CXe "Gekko" (83214) */
429 .pvr_mask = 0xffffffff,
430 .pvr_value = 0x00083214,
431 .cpu_name = "750CXe",
432 .cpu_features = CPU_FTRS_750,
433 .cpu_user_features = COMMON_USER,
437 .cpu_setup = __setup_cpu_750cx
440 .pvr_mask = 0xfffff000,
441 .pvr_value = 0x00083000,
442 .cpu_name = "745/755",
443 .cpu_features = CPU_FTRS_750,
444 .cpu_user_features = COMMON_USER,
448 .cpu_setup = __setup_cpu_750
450 { /* 750FX rev 1.x */
451 .pvr_mask = 0xffffff00,
452 .pvr_value = 0x70000100,
454 .cpu_features = CPU_FTRS_750FX1,
455 .cpu_user_features = COMMON_USER,
459 .cpu_setup = __setup_cpu_750
461 { /* 750FX rev 2.0 must disable HID0[DPM] */
462 .pvr_mask = 0xffffffff,
463 .pvr_value = 0x70000200,
465 .cpu_features = CPU_FTRS_750FX2,
466 .cpu_user_features = COMMON_USER,
470 .cpu_setup = __setup_cpu_750
472 { /* 750FX (All revs except 2.0) */
473 .pvr_mask = 0xffff0000,
474 .pvr_value = 0x70000000,
476 .cpu_features = CPU_FTRS_750FX,
477 .cpu_user_features = COMMON_USER,
481 .cpu_setup = __setup_cpu_750fx
484 .pvr_mask = 0xffff0000,
485 .pvr_value = 0x70020000,
487 .cpu_features = CPU_FTRS_750GX,
488 .cpu_user_features = COMMON_USER,
492 .cpu_setup = __setup_cpu_750fx
494 { /* 740/750 (L2CR bit need fixup for 740) */
495 .pvr_mask = 0xffff0000,
496 .pvr_value = 0x00080000,
497 .cpu_name = "740/750",
498 .cpu_features = CPU_FTRS_740,
499 .cpu_user_features = COMMON_USER,
503 .cpu_setup = __setup_cpu_750
505 { /* 7400 rev 1.1 ? (no TAU) */
506 .pvr_mask = 0xffffffff,
507 .pvr_value = 0x000c1101,
508 .cpu_name = "7400 (1.1)",
509 .cpu_features = CPU_FTRS_7400_NOTAU,
510 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
514 .cpu_setup = __setup_cpu_7400
517 .pvr_mask = 0xffff0000,
518 .pvr_value = 0x000c0000,
520 .cpu_features = CPU_FTRS_7400,
521 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
525 .cpu_setup = __setup_cpu_7400
528 .pvr_mask = 0xffff0000,
529 .pvr_value = 0x800c0000,
531 .cpu_features = CPU_FTRS_7400,
532 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
536 .cpu_setup = __setup_cpu_7410
538 { /* 7450 2.0 - no doze/nap */
539 .pvr_mask = 0xffffffff,
540 .pvr_value = 0x80000200,
542 .cpu_features = CPU_FTRS_7450_20,
543 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
547 .cpu_setup = __setup_cpu_745x
550 .pvr_mask = 0xffffffff,
551 .pvr_value = 0x80000201,
553 .cpu_features = CPU_FTRS_7450_21,
554 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
558 .cpu_setup = __setup_cpu_745x
560 { /* 7450 2.3 and newer */
561 .pvr_mask = 0xffff0000,
562 .pvr_value = 0x80000000,
564 .cpu_features = CPU_FTRS_7450_23,
565 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
569 .cpu_setup = __setup_cpu_745x
572 .pvr_mask = 0xffffff00,
573 .pvr_value = 0x80010100,
575 .cpu_features = CPU_FTRS_7455_1,
576 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
580 .cpu_setup = __setup_cpu_745x
583 .pvr_mask = 0xffffffff,
584 .pvr_value = 0x80010200,
586 .cpu_features = CPU_FTRS_7455_20,
587 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
591 .cpu_setup = __setup_cpu_745x
594 .pvr_mask = 0xffff0000,
595 .pvr_value = 0x80010000,
597 .cpu_features = CPU_FTRS_7455,
598 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
602 .cpu_setup = __setup_cpu_745x
604 { /* 7447/7457 Rev 1.0 */
605 .pvr_mask = 0xffffffff,
606 .pvr_value = 0x80020100,
607 .cpu_name = "7447/7457",
608 .cpu_features = CPU_FTRS_7447_10,
609 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
613 .cpu_setup = __setup_cpu_745x
615 { /* 7447/7457 Rev 1.1 */
616 .pvr_mask = 0xffffffff,
617 .pvr_value = 0x80020101,
618 .cpu_name = "7447/7457",
619 .cpu_features = CPU_FTRS_7447_10,
620 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
624 .cpu_setup = __setup_cpu_745x
626 { /* 7447/7457 Rev 1.2 and later */
627 .pvr_mask = 0xffff0000,
628 .pvr_value = 0x80020000,
629 .cpu_name = "7447/7457",
630 .cpu_features = CPU_FTRS_7447,
631 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
635 .cpu_setup = __setup_cpu_745x
638 .pvr_mask = 0xffff0000,
639 .pvr_value = 0x80030000,
641 .cpu_features = CPU_FTRS_7447A,
642 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
646 .cpu_setup = __setup_cpu_745x
649 .pvr_mask = 0xffff0000,
650 .pvr_value = 0x80040000,
652 .cpu_features = CPU_FTRS_7447A,
653 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
657 .cpu_setup = __setup_cpu_745x
659 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
660 .pvr_mask = 0x7fff0000,
661 .pvr_value = 0x00810000,
663 .cpu_features = CPU_FTRS_82XX,
664 .cpu_user_features = COMMON_USER,
667 .cpu_setup = __setup_cpu_603
669 { /* All G2_LE (603e core, plus some) have the same pvr */
670 .pvr_mask = 0x7fff0000,
671 .pvr_value = 0x00820000,
673 .cpu_features = CPU_FTRS_G2_LE,
674 .cpu_user_features = COMMON_USER,
677 .cpu_setup = __setup_cpu_603
679 { /* e300 (a 603e core, plus some) on 83xx */
680 .pvr_mask = 0x7fff0000,
681 .pvr_value = 0x00830000,
683 .cpu_features = CPU_FTRS_E300,
684 .cpu_user_features = COMMON_USER,
687 .cpu_setup = __setup_cpu_603
689 { /* default match, we assume split I/D cache & TB (non-601)... */
690 .pvr_mask = 0x00000000,
691 .pvr_value = 0x00000000,
692 .cpu_name = "(generic PPC)",
693 .cpu_features = CPU_FTRS_CLASSIC32,
694 .cpu_user_features = COMMON_USER,
698 #endif /* CLASSIC_PPC */
701 .pvr_mask = 0xffff0000,
702 .pvr_value = 0x00500000,
704 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
705 * if the 8xx code is there.... */
706 .cpu_features = CPU_FTRS_8XX,
707 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
711 #endif /* CONFIG_8xx */
714 .pvr_mask = 0xffffff00,
715 .pvr_value = 0x00200200,
717 .cpu_features = CPU_FTRS_40X,
718 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
723 .pvr_mask = 0xffffff00,
724 .pvr_value = 0x00201400,
725 .cpu_name = "403GCX",
726 .cpu_features = CPU_FTRS_40X,
727 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
732 .pvr_mask = 0xffff0000,
733 .pvr_value = 0x00200000,
734 .cpu_name = "403G ??",
735 .cpu_features = CPU_FTRS_40X,
736 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
741 .pvr_mask = 0xffff0000,
742 .pvr_value = 0x40110000,
744 .cpu_features = CPU_FTRS_40X,
745 .cpu_user_features = PPC_FEATURE_32 |
746 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
751 .pvr_mask = 0xffff0000,
752 .pvr_value = 0x40130000,
753 .cpu_name = "STB03xxx",
754 .cpu_features = CPU_FTRS_40X,
755 .cpu_user_features = PPC_FEATURE_32 |
756 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
761 .pvr_mask = 0xffff0000,
762 .pvr_value = 0x41810000,
763 .cpu_name = "STB04xxx",
764 .cpu_features = CPU_FTRS_40X,
765 .cpu_user_features = PPC_FEATURE_32 |
766 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
771 .pvr_mask = 0xffff0000,
772 .pvr_value = 0x41610000,
773 .cpu_name = "NP405L",
774 .cpu_features = CPU_FTRS_40X,
775 .cpu_user_features = PPC_FEATURE_32 |
776 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
781 .pvr_mask = 0xffff0000,
782 .pvr_value = 0x40B10000,
783 .cpu_name = "NP4GS3",
784 .cpu_features = CPU_FTRS_40X,
785 .cpu_user_features = PPC_FEATURE_32 |
786 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
791 .pvr_mask = 0xffff0000,
792 .pvr_value = 0x41410000,
793 .cpu_name = "NP405H",
794 .cpu_features = CPU_FTRS_40X,
795 .cpu_user_features = PPC_FEATURE_32 |
796 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
801 .pvr_mask = 0xffff0000,
802 .pvr_value = 0x50910000,
803 .cpu_name = "405GPr",
804 .cpu_features = CPU_FTRS_40X,
805 .cpu_user_features = PPC_FEATURE_32 |
806 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
811 .pvr_mask = 0xffff0000,
812 .pvr_value = 0x51510000,
813 .cpu_name = "STBx25xx",
814 .cpu_features = CPU_FTRS_40X,
815 .cpu_user_features = PPC_FEATURE_32 |
816 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
821 .pvr_mask = 0xffff0000,
822 .pvr_value = 0x41F10000,
824 .cpu_features = CPU_FTRS_40X,
825 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
829 { /* Xilinx Virtex-II Pro */
830 .pvr_mask = 0xffff0000,
831 .pvr_value = 0x20010000,
832 .cpu_name = "Virtex-II Pro",
833 .cpu_features = CPU_FTRS_40X,
834 .cpu_user_features = PPC_FEATURE_32 |
835 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
840 .pvr_mask = 0xffff0000,
841 .pvr_value = 0x51210000,
843 .cpu_features = CPU_FTRS_40X,
844 .cpu_user_features = PPC_FEATURE_32 |
845 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
850 #endif /* CONFIG_40x */
853 .pvr_mask = 0xf0000fff,
854 .pvr_value = 0x40000850,
855 .cpu_name = "440EP Rev. A",
856 .cpu_features = CPU_FTRS_44X,
857 .cpu_user_features = COMMON_USER, /* 440EP has an FPU */
862 .pvr_mask = 0xf0000fff,
863 .pvr_value = 0x400008d3,
864 .cpu_name = "440EP Rev. B",
865 .cpu_features = CPU_FTRS_44X,
866 .cpu_user_features = COMMON_USER, /* 440EP has an FPU */
871 .pvr_mask = 0xf0000fff,
872 .pvr_value = 0x40000440,
873 .cpu_name = "440GP Rev. B",
874 .cpu_features = CPU_FTRS_44X,
875 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
880 .pvr_mask = 0xf0000fff,
881 .pvr_value = 0x40000481,
882 .cpu_name = "440GP Rev. C",
883 .cpu_features = CPU_FTRS_44X,
884 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
889 .pvr_mask = 0xf0000fff,
890 .pvr_value = 0x50000850,
891 .cpu_name = "440GX Rev. A",
892 .cpu_features = CPU_FTRS_44X,
893 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
898 .pvr_mask = 0xf0000fff,
899 .pvr_value = 0x50000851,
900 .cpu_name = "440GX Rev. B",
901 .cpu_features = CPU_FTRS_44X,
902 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
907 .pvr_mask = 0xf0000fff,
908 .pvr_value = 0x50000892,
909 .cpu_name = "440GX Rev. C",
910 .cpu_features = CPU_FTRS_44X,
911 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
916 .pvr_mask = 0xf0000fff,
917 .pvr_value = 0x50000894,
918 .cpu_name = "440GX Rev. F",
919 .cpu_features = CPU_FTRS_44X,
920 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
925 .pvr_mask = 0xff000fff,
926 .pvr_value = 0x53000891,
927 .cpu_name = "440SP Rev. A",
928 .cpu_features = CPU_FTRS_44X,
929 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
933 #endif /* CONFIG_44x */
934 #ifdef CONFIG_FSL_BOOKE
936 .pvr_mask = 0xfff00000,
937 .pvr_value = 0x81000000,
938 .cpu_name = "e200z5",
939 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
940 .cpu_features = CPU_FTRS_E200,
941 .cpu_user_features = PPC_FEATURE_32 |
942 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_EFP_SINGLE |
943 PPC_FEATURE_UNIFIED_CACHE,
947 .pvr_mask = 0xfff00000,
948 .pvr_value = 0x81100000,
949 .cpu_name = "e200z6",
950 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
951 .cpu_features = CPU_FTRS_E200,
952 .cpu_user_features = PPC_FEATURE_32 |
953 PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
954 PPC_FEATURE_HAS_EFP_SINGLE |
955 PPC_FEATURE_UNIFIED_CACHE,
959 .pvr_mask = 0xffff0000,
960 .pvr_value = 0x80200000,
962 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
963 .cpu_features = CPU_FTRS_E500,
964 .cpu_user_features = PPC_FEATURE_32 |
965 PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
966 PPC_FEATURE_HAS_EFP_SINGLE,
972 .pvr_mask = 0xffff0000,
973 .pvr_value = 0x80210000,
974 .cpu_name = "e500v2",
975 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
976 .cpu_features = CPU_FTRS_E500_2,
977 .cpu_user_features = PPC_FEATURE_32 |
978 PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
979 PPC_FEATURE_HAS_EFP_SINGLE | PPC_FEATURE_HAS_EFP_DOUBLE,
986 { /* default match */
987 .pvr_mask = 0x00000000,
988 .pvr_value = 0x00000000,
989 .cpu_name = "(generic PPC)",
990 .cpu_features = CPU_FTRS_GENERIC_32,
991 .cpu_user_features = PPC_FEATURE_32,
995 #endif /* !CLASSIC_PPC */
996 #endif /* CONFIG_PPC32 */