git.oblomov.eu Git - linux-2.6/blob - arch/powerpc/platforms/cell/smp.c

   1 /*
   2  * SMP support for BPA machines.
   3  *
   4  * Dave Engebretsen, Peter Bergner, and
   5  * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com
   6  *
   7  * Plus various changes from other IBM teams...
   8  *
   9  *      This program is free software; you can redistribute it and/or
  10  *      modify it under the terms of the GNU General Public License
  11  *      as published by the Free Software Foundation; either version
  12  *      2 of the License, or (at your option) any later version.
  13  */
  14
  15 #undef DEBUG
  16
  17 #include <linux/kernel.h>
  18 #include <linux/module.h>
  19 #include <linux/sched.h>
  20 #include <linux/smp.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/delay.h>
  23 #include <linux/init.h>
  24 #include <linux/spinlock.h>
  25 #include <linux/cache.h>
  26 #include <linux/err.h>
  27 #include <linux/sysdev.h>
  28 #include <linux/cpu.h>
  29
  30 #include <asm/ptrace.h>
  31 #include <asm/atomic.h>
  32 #include <asm/irq.h>
  33 #include <asm/page.h>
  34 #include <asm/pgtable.h>
  35 #include <asm/io.h>
  36 #include <asm/prom.h>
  37 #include <asm/smp.h>
  38 #include <asm/paca.h>
  39 #include <asm/time.h>
  40 #include <asm/machdep.h>
  41 #include <asm/cputable.h>
  42 #include <asm/firmware.h>
  43 #include <asm/system.h>
  44 #include <asm/rtas.h>
  45
  46 #include "interrupt.h"
  47
  48 #ifdef DEBUG
  49 #define DBG(fmt...) udbg_printf(fmt)
  50 #else
  51 #define DBG(fmt...)
  52 #endif
  53
  54 /*
  55  * The primary thread of each non-boot processor is recorded here before
  56  * smp init.
  57  */
  58 static cpumask_t of_spin_map;
  59
  60 extern void pSeries_secondary_smp_init(unsigned long);
  61
  62 /**
  63  * smp_startup_cpu() - start the given cpu
  64  *
  65  * At boot time, there is nothing to do for primary threads which were
  66  * started from Open Firmware.  For anything else, call RTAS with the
  67  * appropriate start location.
  68  *
  69  * Returns:
  70  *      0       - failure
  71  *      1       - success
  72  */
  73 static inline int __devinit smp_startup_cpu(unsigned int lcpu)
  74 {
  75         int status;
  76         unsigned long start_here = __pa((u32)*((unsigned long *)
  77                                                pSeries_secondary_smp_init));
  78         unsigned int pcpu;
  79         int start_cpu;
  80
  81         if (cpu_isset(lcpu, of_spin_map))
  82                 /* Already started by OF and sitting in spin loop */
  83                 return 1;
  84
  85         pcpu = get_hard_smp_processor_id(lcpu);
  86
  87         /* Fixup atomic count: it exited inside IRQ handler. */
  88         task_thread_info(paca[lcpu].__current)->preempt_count   = 0;
  89
  90         /*
  91          * If the RTAS start-cpu token does not exist then presume the
  92          * cpu is already spinning.
  93          */
  94         start_cpu = rtas_token("start-cpu");
  95         if (start_cpu == RTAS_UNKNOWN_SERVICE)
  96                 return 1;
  97
  98         status = rtas_call(start_cpu, 3, 1, NULL, pcpu, start_here, lcpu);
  99         if (status != 0) {
 100                 printk(KERN_ERR "start-cpu failed: %i\n", status);
 101                 return 0;
 102         }
 103
 104         return 1;
 105 }
 106
 107 static void smp_iic_message_pass(int target, int msg)
 108 {
 109         unsigned int i;
 110
 111         if (target < NR_CPUS) {
 112                 iic_cause_IPI(target, msg);
 113         } else {
 114                 for_each_online_cpu(i) {
 115                         if (target == MSG_ALL_BUT_SELF
 116                             && i == smp_processor_id())
 117                                 continue;
 118                         iic_cause_IPI(i, msg);
 119                 }
 120         }
 121 }
 122
 123 static int __init smp_iic_probe(void)
 124 {
 125         iic_request_IPIs();
 126
 127         return cpus_weight(cpu_possible_map);
 128 }
 129
 130 static void __devinit smp_iic_setup_cpu(int cpu)
 131 {
 132         if (cpu != boot_cpuid)
 133                 iic_setup_cpu();
 134 }
 135
 136 static DEFINE_SPINLOCK(timebase_lock);
 137 static unsigned long timebase = 0;
 138
 139 static void __devinit cell_give_timebase(void)
 140 {
 141         spin_lock(&timebase_lock);
 142         rtas_call(rtas_token("freeze-time-base"), 0, 1, NULL);
 143         timebase = get_tb();
 144         spin_unlock(&timebase_lock);
 145
 146         while (timebase)
 147                 barrier();
 148         rtas_call(rtas_token("thaw-time-base"), 0, 1, NULL);
 149 }
 150
 151 static void __devinit cell_take_timebase(void)
 152 {
 153         while (!timebase)
 154                 barrier();
 155         spin_lock(&timebase_lock);
 156         set_tb(timebase >> 32, timebase & 0xffffffff);
 157         timebase = 0;
 158         spin_unlock(&timebase_lock);
 159 }
 160
 161 static void __devinit smp_cell_kick_cpu(int nr)
 162 {
 163         BUG_ON(nr < 0 || nr >= NR_CPUS);
 164
 165         if (!smp_startup_cpu(nr))
 166                 return;
 167
 168         /*
 169          * The processor is currently spinning, waiting for the
 170          * cpu_start field to become non-zero After we set cpu_start,
 171          * the processor will continue on to secondary_start
 172          */
 173         paca[nr].cpu_start = 1;
 174 }
 175
 176 static int smp_cell_cpu_bootable(unsigned int nr)
 177 {
 178         /* Special case - we inhibit secondary thread startup
 179          * during boot if the user requests it.  Odd-numbered
 180          * cpus are assumed to be secondary threads.
 181          */
 182         if (system_state < SYSTEM_RUNNING &&
 183             cpu_has_feature(CPU_FTR_SMT) &&
 184             !smt_enabled_at_boot && nr % 2 != 0)
 185                 return 0;
 186
 187         return 1;
 188 }
 189 static struct smp_ops_t bpa_iic_smp_ops = {
 190         .message_pass   = smp_iic_message_pass,
 191         .probe          = smp_iic_probe,
 192         .kick_cpu       = smp_cell_kick_cpu,
 193         .setup_cpu      = smp_iic_setup_cpu,
 194         .cpu_bootable   = smp_cell_cpu_bootable,
 195 };
 196
 197 /* This is called very early */
 198 void __init smp_init_cell(void)
 199 {
 200         int i;
 201
 202         DBG(" -> smp_init_cell()\n");
 203
 204         smp_ops = &bpa_iic_smp_ops;
 205
 206         /* Mark threads which are still spinning in hold loops. */
 207         if (cpu_has_feature(CPU_FTR_SMT)) {
 208                 for_each_present_cpu(i) {
 209                         if (i % 2 == 0)
 210                                 /*
 211                                  * Even-numbered logical cpus correspond to
 212                                  * primary threads.
 213                                  */
 214                                 cpu_set(i, of_spin_map);
 215                 }
 216         } else {
 217                 of_spin_map = cpu_present_map;
 218         }
 219
 220         cpu_clear(boot_cpuid, of_spin_map);
 221
 222         /* Non-lpar has additional take/give timebase */
 223         if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) {
 224                 smp_ops->give_timebase = cell_give_timebase;
 225                 smp_ops->take_timebase = cell_take_timebase;
 226         }
 227
 228         DBG(" <- smp_init_cell()\n");
 229 }