1 /*******************************************************************************
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
30 #include <net/ip6_checksum.h>
32 char e1000_driver_name[] = "e1000";
33 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
34 #ifndef CONFIG_E1000_NAPI
37 #define DRIVERNAPI "-NAPI"
39 #define DRV_VERSION "7.3.20-k2"DRIVERNAPI
40 char e1000_driver_version[] = DRV_VERSION;
41 static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
43 /* e1000_pci_tbl - PCI Device ID Table
45 * Last entry must be all 0s
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
50 static struct pci_device_id e1000_pci_tbl[] = {
51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
76 INTEL_E1000_ETHERNET_DEVICE(0x1049),
77 INTEL_E1000_ETHERNET_DEVICE(0x104A),
78 INTEL_E1000_ETHERNET_DEVICE(0x104B),
79 INTEL_E1000_ETHERNET_DEVICE(0x104C),
80 INTEL_E1000_ETHERNET_DEVICE(0x104D),
81 INTEL_E1000_ETHERNET_DEVICE(0x105E),
82 INTEL_E1000_ETHERNET_DEVICE(0x105F),
83 INTEL_E1000_ETHERNET_DEVICE(0x1060),
84 INTEL_E1000_ETHERNET_DEVICE(0x1075),
85 INTEL_E1000_ETHERNET_DEVICE(0x1076),
86 INTEL_E1000_ETHERNET_DEVICE(0x1077),
87 INTEL_E1000_ETHERNET_DEVICE(0x1078),
88 INTEL_E1000_ETHERNET_DEVICE(0x1079),
89 INTEL_E1000_ETHERNET_DEVICE(0x107A),
90 INTEL_E1000_ETHERNET_DEVICE(0x107B),
91 INTEL_E1000_ETHERNET_DEVICE(0x107C),
92 INTEL_E1000_ETHERNET_DEVICE(0x107D),
93 INTEL_E1000_ETHERNET_DEVICE(0x107E),
94 INTEL_E1000_ETHERNET_DEVICE(0x107F),
95 INTEL_E1000_ETHERNET_DEVICE(0x108A),
96 INTEL_E1000_ETHERNET_DEVICE(0x108B),
97 INTEL_E1000_ETHERNET_DEVICE(0x108C),
98 INTEL_E1000_ETHERNET_DEVICE(0x1096),
99 INTEL_E1000_ETHERNET_DEVICE(0x1098),
100 INTEL_E1000_ETHERNET_DEVICE(0x1099),
101 INTEL_E1000_ETHERNET_DEVICE(0x109A),
102 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
103 INTEL_E1000_ETHERNET_DEVICE(0x10A5),
104 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
105 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
106 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
107 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
108 INTEL_E1000_ETHERNET_DEVICE(0x10BC),
109 INTEL_E1000_ETHERNET_DEVICE(0x10C4),
110 INTEL_E1000_ETHERNET_DEVICE(0x10C5),
111 INTEL_E1000_ETHERNET_DEVICE(0x10D5),
112 INTEL_E1000_ETHERNET_DEVICE(0x10D9),
113 INTEL_E1000_ETHERNET_DEVICE(0x10DA),
114 /* required last entry */
118 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
120 int e1000_up(struct e1000_adapter *adapter);
121 void e1000_down(struct e1000_adapter *adapter);
122 void e1000_reinit_locked(struct e1000_adapter *adapter);
123 void e1000_reset(struct e1000_adapter *adapter);
124 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
125 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
126 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
127 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
128 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
129 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
130 struct e1000_tx_ring *txdr);
131 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
132 struct e1000_rx_ring *rxdr);
133 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
134 struct e1000_tx_ring *tx_ring);
135 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
136 struct e1000_rx_ring *rx_ring);
137 void e1000_update_stats(struct e1000_adapter *adapter);
139 static int e1000_init_module(void);
140 static void e1000_exit_module(void);
141 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
142 static void __devexit e1000_remove(struct pci_dev *pdev);
143 static int e1000_alloc_queues(struct e1000_adapter *adapter);
144 static int e1000_sw_init(struct e1000_adapter *adapter);
145 static int e1000_open(struct net_device *netdev);
146 static int e1000_close(struct net_device *netdev);
147 static void e1000_configure_tx(struct e1000_adapter *adapter);
148 static void e1000_configure_rx(struct e1000_adapter *adapter);
149 static void e1000_setup_rctl(struct e1000_adapter *adapter);
150 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
151 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
152 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
153 struct e1000_tx_ring *tx_ring);
154 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
155 struct e1000_rx_ring *rx_ring);
156 static void e1000_set_multi(struct net_device *netdev);
157 static void e1000_update_phy_info(unsigned long data);
158 static void e1000_watchdog(unsigned long data);
159 static void e1000_82547_tx_fifo_stall(unsigned long data);
160 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
161 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
162 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
163 static int e1000_set_mac(struct net_device *netdev, void *p);
164 static irqreturn_t e1000_intr(int irq, void *data);
165 static irqreturn_t e1000_intr_msi(int irq, void *data);
166 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
167 struct e1000_tx_ring *tx_ring);
168 #ifdef CONFIG_E1000_NAPI
169 static int e1000_clean(struct napi_struct *napi, int budget);
170 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
171 struct e1000_rx_ring *rx_ring,
172 int *work_done, int work_to_do);
173 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
174 struct e1000_rx_ring *rx_ring,
175 int *work_done, int work_to_do);
177 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
178 struct e1000_rx_ring *rx_ring);
179 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
180 struct e1000_rx_ring *rx_ring);
182 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
183 struct e1000_rx_ring *rx_ring,
185 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
186 struct e1000_rx_ring *rx_ring,
188 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
189 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
191 void e1000_set_ethtool_ops(struct net_device *netdev);
192 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
193 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
194 static void e1000_tx_timeout(struct net_device *dev);
195 static void e1000_reset_task(struct work_struct *work);
196 static void e1000_smartspeed(struct e1000_adapter *adapter);
197 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
198 struct sk_buff *skb);
200 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
201 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
202 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
203 static void e1000_restore_vlan(struct e1000_adapter *adapter);
205 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
207 static int e1000_resume(struct pci_dev *pdev);
209 static void e1000_shutdown(struct pci_dev *pdev);
211 #ifdef CONFIG_NET_POLL_CONTROLLER
212 /* for netdump / net console */
213 static void e1000_netpoll (struct net_device *netdev);
216 extern void e1000_check_options(struct e1000_adapter *adapter);
218 #define COPYBREAK_DEFAULT 256
219 static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
220 module_param(copybreak, uint, 0644);
221 MODULE_PARM_DESC(copybreak,
222 "Maximum size of packet that is copied to a new buffer on receive");
224 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
225 pci_channel_state_t state);
226 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
227 static void e1000_io_resume(struct pci_dev *pdev);
229 static struct pci_error_handlers e1000_err_handler = {
230 .error_detected = e1000_io_error_detected,
231 .slot_reset = e1000_io_slot_reset,
232 .resume = e1000_io_resume,
235 static struct pci_driver e1000_driver = {
236 .name = e1000_driver_name,
237 .id_table = e1000_pci_tbl,
238 .probe = e1000_probe,
239 .remove = __devexit_p(e1000_remove),
241 /* Power Managment Hooks */
242 .suspend = e1000_suspend,
243 .resume = e1000_resume,
245 .shutdown = e1000_shutdown,
246 .err_handler = &e1000_err_handler
249 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
250 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
251 MODULE_LICENSE("GPL");
252 MODULE_VERSION(DRV_VERSION);
254 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
255 module_param(debug, int, 0);
256 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
259 * e1000_init_module - Driver Registration Routine
261 * e1000_init_module is the first routine called when the driver is
262 * loaded. All it does is register with the PCI subsystem.
266 e1000_init_module(void)
269 printk(KERN_INFO "%s - version %s\n",
270 e1000_driver_string, e1000_driver_version);
272 printk(KERN_INFO "%s\n", e1000_copyright);
274 ret = pci_register_driver(&e1000_driver);
275 if (copybreak != COPYBREAK_DEFAULT) {
277 printk(KERN_INFO "e1000: copybreak disabled\n");
279 printk(KERN_INFO "e1000: copybreak enabled for "
280 "packets <= %u bytes\n", copybreak);
285 module_init(e1000_init_module);
288 * e1000_exit_module - Driver Exit Cleanup Routine
290 * e1000_exit_module is called just before the driver is removed
295 e1000_exit_module(void)
297 pci_unregister_driver(&e1000_driver);
300 module_exit(e1000_exit_module);
302 static int e1000_request_irq(struct e1000_adapter *adapter)
304 struct net_device *netdev = adapter->netdev;
305 void (*handler) = &e1000_intr;
306 int irq_flags = IRQF_SHARED;
309 if (adapter->hw.mac_type >= e1000_82571) {
310 adapter->have_msi = !pci_enable_msi(adapter->pdev);
311 if (adapter->have_msi) {
312 handler = &e1000_intr_msi;
317 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
320 if (adapter->have_msi)
321 pci_disable_msi(adapter->pdev);
323 "Unable to allocate interrupt Error: %d\n", err);
329 static void e1000_free_irq(struct e1000_adapter *adapter)
331 struct net_device *netdev = adapter->netdev;
333 free_irq(adapter->pdev->irq, netdev);
335 if (adapter->have_msi)
336 pci_disable_msi(adapter->pdev);
340 * e1000_irq_disable - Mask off interrupt generation on the NIC
341 * @adapter: board private structure
345 e1000_irq_disable(struct e1000_adapter *adapter)
347 atomic_inc(&adapter->irq_sem);
348 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
349 E1000_WRITE_FLUSH(&adapter->hw);
350 synchronize_irq(adapter->pdev->irq);
354 * e1000_irq_enable - Enable default interrupt generation settings
355 * @adapter: board private structure
359 e1000_irq_enable(struct e1000_adapter *adapter)
361 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
362 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
363 E1000_WRITE_FLUSH(&adapter->hw);
368 e1000_update_mng_vlan(struct e1000_adapter *adapter)
370 struct net_device *netdev = adapter->netdev;
371 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
372 uint16_t old_vid = adapter->mng_vlan_id;
373 if (adapter->vlgrp) {
374 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
375 if (adapter->hw.mng_cookie.status &
376 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
377 e1000_vlan_rx_add_vid(netdev, vid);
378 adapter->mng_vlan_id = vid;
380 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
382 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
384 !vlan_group_get_device(adapter->vlgrp, old_vid))
385 e1000_vlan_rx_kill_vid(netdev, old_vid);
387 adapter->mng_vlan_id = vid;
392 * e1000_release_hw_control - release control of the h/w to f/w
393 * @adapter: address of board private structure
395 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
396 * For ASF and Pass Through versions of f/w this means that the
397 * driver is no longer loaded. For AMT version (only with 82573) i
398 * of the f/w this means that the network i/f is closed.
403 e1000_release_hw_control(struct e1000_adapter *adapter)
408 /* Let firmware taken over control of h/w */
409 switch (adapter->hw.mac_type) {
411 swsm = E1000_READ_REG(&adapter->hw, SWSM);
412 E1000_WRITE_REG(&adapter->hw, SWSM,
413 swsm & ~E1000_SWSM_DRV_LOAD);
417 case e1000_80003es2lan:
419 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
420 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
421 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
429 * e1000_get_hw_control - get control of the h/w from f/w
430 * @adapter: address of board private structure
432 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
433 * For ASF and Pass Through versions of f/w this means that
434 * the driver is loaded. For AMT version (only with 82573)
435 * of the f/w this means that the network i/f is open.
440 e1000_get_hw_control(struct e1000_adapter *adapter)
445 /* Let firmware know the driver has taken over */
446 switch (adapter->hw.mac_type) {
448 swsm = E1000_READ_REG(&adapter->hw, SWSM);
449 E1000_WRITE_REG(&adapter->hw, SWSM,
450 swsm | E1000_SWSM_DRV_LOAD);
454 case e1000_80003es2lan:
456 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
457 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
458 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
466 e1000_init_manageability(struct e1000_adapter *adapter)
468 if (adapter->en_mng_pt) {
469 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
471 /* disable hardware interception of ARP */
472 manc &= ~(E1000_MANC_ARP_EN);
474 /* enable receiving management packets to the host */
475 /* this will probably generate destination unreachable messages
476 * from the host OS, but the packets will be handled on SMBUS */
477 if (adapter->hw.has_manc2h) {
478 uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
480 manc |= E1000_MANC_EN_MNG2HOST;
481 #define E1000_MNG2HOST_PORT_623 (1 << 5)
482 #define E1000_MNG2HOST_PORT_664 (1 << 6)
483 manc2h |= E1000_MNG2HOST_PORT_623;
484 manc2h |= E1000_MNG2HOST_PORT_664;
485 E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h);
488 E1000_WRITE_REG(&adapter->hw, MANC, manc);
493 e1000_release_manageability(struct e1000_adapter *adapter)
495 if (adapter->en_mng_pt) {
496 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
498 /* re-enable hardware interception of ARP */
499 manc |= E1000_MANC_ARP_EN;
501 if (adapter->hw.has_manc2h)
502 manc &= ~E1000_MANC_EN_MNG2HOST;
504 /* don't explicitly have to mess with MANC2H since
505 * MANC has an enable disable that gates MANC2H */
507 E1000_WRITE_REG(&adapter->hw, MANC, manc);
512 * e1000_configure - configure the hardware for RX and TX
513 * @adapter = private board structure
515 static void e1000_configure(struct e1000_adapter *adapter)
517 struct net_device *netdev = adapter->netdev;
520 e1000_set_multi(netdev);
522 e1000_restore_vlan(adapter);
523 e1000_init_manageability(adapter);
525 e1000_configure_tx(adapter);
526 e1000_setup_rctl(adapter);
527 e1000_configure_rx(adapter);
528 /* call E1000_DESC_UNUSED which always leaves
529 * at least 1 descriptor unused to make sure
530 * next_to_use != next_to_clean */
531 for (i = 0; i < adapter->num_rx_queues; i++) {
532 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
533 adapter->alloc_rx_buf(adapter, ring,
534 E1000_DESC_UNUSED(ring));
537 adapter->tx_queue_len = netdev->tx_queue_len;
540 int e1000_up(struct e1000_adapter *adapter)
542 /* hardware has been reset, we need to reload some things */
543 e1000_configure(adapter);
545 clear_bit(__E1000_DOWN, &adapter->flags);
547 #ifdef CONFIG_E1000_NAPI
548 napi_enable(&adapter->napi);
550 e1000_irq_enable(adapter);
552 /* fire a link change interrupt to start the watchdog */
553 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
558 * e1000_power_up_phy - restore link in case the phy was powered down
559 * @adapter: address of board private structure
561 * The phy may be powered down to save power and turn off link when the
562 * driver is unloaded and wake on lan is not enabled (among others)
563 * *** this routine MUST be followed by a call to e1000_reset ***
567 void e1000_power_up_phy(struct e1000_adapter *adapter)
569 uint16_t mii_reg = 0;
571 /* Just clear the power down bit to wake the phy back up */
572 if (adapter->hw.media_type == e1000_media_type_copper) {
573 /* according to the manual, the phy will retain its
574 * settings across a power-down/up cycle */
575 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
576 mii_reg &= ~MII_CR_POWER_DOWN;
577 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
581 static void e1000_power_down_phy(struct e1000_adapter *adapter)
583 /* Power down the PHY so no link is implied when interface is down *
584 * The PHY cannot be powered down if any of the following is TRUE *
587 * (c) SoL/IDER session is active */
588 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
589 adapter->hw.media_type == e1000_media_type_copper) {
590 uint16_t mii_reg = 0;
592 switch (adapter->hw.mac_type) {
595 case e1000_82545_rev_3:
597 case e1000_82546_rev_3:
599 case e1000_82541_rev_2:
601 case e1000_82547_rev_2:
602 if (E1000_READ_REG(&adapter->hw, MANC) &
609 case e1000_80003es2lan:
611 if (e1000_check_mng_mode(&adapter->hw) ||
612 e1000_check_phy_reset_block(&adapter->hw))
618 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
619 mii_reg |= MII_CR_POWER_DOWN;
620 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
628 e1000_down(struct e1000_adapter *adapter)
630 struct net_device *netdev = adapter->netdev;
632 /* signal that we're down so the interrupt handler does not
633 * reschedule our watchdog timer */
634 set_bit(__E1000_DOWN, &adapter->flags);
636 #ifdef CONFIG_E1000_NAPI
637 napi_disable(&adapter->napi);
639 e1000_irq_disable(adapter);
641 del_timer_sync(&adapter->tx_fifo_stall_timer);
642 del_timer_sync(&adapter->watchdog_timer);
643 del_timer_sync(&adapter->phy_info_timer);
645 netdev->tx_queue_len = adapter->tx_queue_len;
646 adapter->link_speed = 0;
647 adapter->link_duplex = 0;
648 netif_carrier_off(netdev);
649 netif_stop_queue(netdev);
651 e1000_reset(adapter);
652 e1000_clean_all_tx_rings(adapter);
653 e1000_clean_all_rx_rings(adapter);
657 e1000_reinit_locked(struct e1000_adapter *adapter)
659 WARN_ON(in_interrupt());
660 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
664 clear_bit(__E1000_RESETTING, &adapter->flags);
668 e1000_reset(struct e1000_adapter *adapter)
670 uint32_t pba = 0, tx_space, min_tx_space, min_rx_space;
671 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
672 boolean_t legacy_pba_adjust = FALSE;
674 /* Repartition Pba for greater than 9k mtu
675 * To take effect CTRL.RST is required.
678 switch (adapter->hw.mac_type) {
679 case e1000_82542_rev2_0:
680 case e1000_82542_rev2_1:
685 case e1000_82541_rev_2:
686 legacy_pba_adjust = TRUE;
690 case e1000_82545_rev_3:
692 case e1000_82546_rev_3:
696 case e1000_82547_rev_2:
697 legacy_pba_adjust = TRUE;
702 case e1000_80003es2lan:
710 case e1000_undefined:
715 if (legacy_pba_adjust == TRUE) {
716 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
717 pba -= 8; /* allocate more FIFO for Tx */
719 if (adapter->hw.mac_type == e1000_82547) {
720 adapter->tx_fifo_head = 0;
721 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
722 adapter->tx_fifo_size =
723 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
724 atomic_set(&adapter->tx_fifo_stall, 0);
726 } else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
727 /* adjust PBA for jumbo frames */
728 E1000_WRITE_REG(&adapter->hw, PBA, pba);
730 /* To maintain wire speed transmits, the Tx FIFO should be
731 * large enough to accomodate two full transmit packets,
732 * rounded up to the next 1KB and expressed in KB. Likewise,
733 * the Rx FIFO should be large enough to accomodate at least
734 * one full receive packet and is similarly rounded up and
735 * expressed in KB. */
736 pba = E1000_READ_REG(&adapter->hw, PBA);
737 /* upper 16 bits has Tx packet buffer allocation size in KB */
738 tx_space = pba >> 16;
739 /* lower 16 bits has Rx packet buffer allocation size in KB */
741 /* don't include ethernet FCS because hardware appends/strips */
742 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
744 min_tx_space = min_rx_space;
746 min_tx_space = ALIGN(min_tx_space, 1024);
748 min_rx_space = ALIGN(min_rx_space, 1024);
751 /* If current Tx allocation is less than the min Tx FIFO size,
752 * and the min Tx FIFO size is less than the current Rx FIFO
753 * allocation, take space away from current Rx allocation */
754 if (tx_space < min_tx_space &&
755 ((min_tx_space - tx_space) < pba)) {
756 pba = pba - (min_tx_space - tx_space);
758 /* PCI/PCIx hardware has PBA alignment constraints */
759 switch (adapter->hw.mac_type) {
760 case e1000_82545 ... e1000_82546_rev_3:
761 pba &= ~(E1000_PBA_8K - 1);
767 /* if short on rx space, rx wins and must trump tx
768 * adjustment or use Early Receive if available */
769 if (pba < min_rx_space) {
770 switch (adapter->hw.mac_type) {
772 /* ERT enabled in e1000_configure_rx */
782 E1000_WRITE_REG(&adapter->hw, PBA, pba);
784 /* flow control settings */
785 /* Set the FC high water mark to 90% of the FIFO size.
786 * Required to clear last 3 LSB */
787 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
788 /* We can't use 90% on small FIFOs because the remainder
789 * would be less than 1 full frame. In this case, we size
790 * it to allow at least a full frame above the high water
792 if (pba < E1000_PBA_16K)
793 fc_high_water_mark = (pba * 1024) - 1600;
795 adapter->hw.fc_high_water = fc_high_water_mark;
796 adapter->hw.fc_low_water = fc_high_water_mark - 8;
797 if (adapter->hw.mac_type == e1000_80003es2lan)
798 adapter->hw.fc_pause_time = 0xFFFF;
800 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
801 adapter->hw.fc_send_xon = 1;
802 adapter->hw.fc = adapter->hw.original_fc;
804 /* Allow time for pending master requests to run */
805 e1000_reset_hw(&adapter->hw);
806 if (adapter->hw.mac_type >= e1000_82544)
807 E1000_WRITE_REG(&adapter->hw, WUC, 0);
809 if (e1000_init_hw(&adapter->hw))
810 DPRINTK(PROBE, ERR, "Hardware Error\n");
811 e1000_update_mng_vlan(adapter);
813 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
814 if (adapter->hw.mac_type >= e1000_82544 &&
815 adapter->hw.mac_type <= e1000_82547_rev_2 &&
816 adapter->hw.autoneg == 1 &&
817 adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
818 uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL);
819 /* clear phy power management bit if we are in gig only mode,
820 * which if enabled will attempt negotiation to 100Mb, which
821 * can cause a loss of link at power off or driver unload */
822 ctrl &= ~E1000_CTRL_SWDPIN3;
823 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
826 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
827 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
829 e1000_reset_adaptive(&adapter->hw);
830 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
832 if (!adapter->smart_power_down &&
833 (adapter->hw.mac_type == e1000_82571 ||
834 adapter->hw.mac_type == e1000_82572)) {
835 uint16_t phy_data = 0;
836 /* speed up time to link by disabling smart power down, ignore
837 * the return value of this function because there is nothing
838 * different we would do if it failed */
839 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
841 phy_data &= ~IGP02E1000_PM_SPD;
842 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
846 e1000_release_manageability(adapter);
850 * e1000_probe - Device Initialization Routine
851 * @pdev: PCI device information struct
852 * @ent: entry in e1000_pci_tbl
854 * Returns 0 on success, negative on failure
856 * e1000_probe initializes an adapter identified by a pci_dev structure.
857 * The OS initialization, configuring of the adapter private structure,
858 * and a hardware reset occur.
862 e1000_probe(struct pci_dev *pdev,
863 const struct pci_device_id *ent)
865 struct net_device *netdev;
866 struct e1000_adapter *adapter;
867 unsigned long mmio_start, mmio_len;
868 unsigned long flash_start, flash_len;
870 static int cards_found = 0;
871 static int global_quad_port_a = 0; /* global ksp3 port a indication */
872 int i, err, pci_using_dac;
873 uint16_t eeprom_data = 0;
874 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
875 DECLARE_MAC_BUF(mac);
877 if ((err = pci_enable_device(pdev)))
880 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
881 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
884 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
885 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
886 E1000_ERR("No usable DMA configuration, aborting\n");
892 if ((err = pci_request_regions(pdev, e1000_driver_name)))
895 pci_set_master(pdev);
898 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
900 goto err_alloc_etherdev;
902 SET_NETDEV_DEV(netdev, &pdev->dev);
904 pci_set_drvdata(pdev, netdev);
905 adapter = netdev_priv(netdev);
906 adapter->netdev = netdev;
907 adapter->pdev = pdev;
908 adapter->hw.back = adapter;
909 adapter->msg_enable = (1 << debug) - 1;
911 mmio_start = pci_resource_start(pdev, BAR_0);
912 mmio_len = pci_resource_len(pdev, BAR_0);
915 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
916 if (!adapter->hw.hw_addr)
919 for (i = BAR_1; i <= BAR_5; i++) {
920 if (pci_resource_len(pdev, i) == 0)
922 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
923 adapter->hw.io_base = pci_resource_start(pdev, i);
928 netdev->open = &e1000_open;
929 netdev->stop = &e1000_close;
930 netdev->hard_start_xmit = &e1000_xmit_frame;
931 netdev->get_stats = &e1000_get_stats;
932 netdev->set_multicast_list = &e1000_set_multi;
933 netdev->set_mac_address = &e1000_set_mac;
934 netdev->change_mtu = &e1000_change_mtu;
935 netdev->do_ioctl = &e1000_ioctl;
936 e1000_set_ethtool_ops(netdev);
937 netdev->tx_timeout = &e1000_tx_timeout;
938 netdev->watchdog_timeo = 5 * HZ;
939 #ifdef CONFIG_E1000_NAPI
940 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
942 netdev->vlan_rx_register = e1000_vlan_rx_register;
943 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
944 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
945 #ifdef CONFIG_NET_POLL_CONTROLLER
946 netdev->poll_controller = e1000_netpoll;
948 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
950 netdev->mem_start = mmio_start;
951 netdev->mem_end = mmio_start + mmio_len;
952 netdev->base_addr = adapter->hw.io_base;
954 adapter->bd_number = cards_found;
956 /* setup the private structure */
958 if ((err = e1000_sw_init(adapter)))
962 /* Flash BAR mapping must happen after e1000_sw_init
963 * because it depends on mac_type */
964 if ((adapter->hw.mac_type == e1000_ich8lan) &&
965 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
966 flash_start = pci_resource_start(pdev, 1);
967 flash_len = pci_resource_len(pdev, 1);
968 adapter->hw.flash_address = ioremap(flash_start, flash_len);
969 if (!adapter->hw.flash_address)
973 if (e1000_check_phy_reset_block(&adapter->hw))
974 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
976 if (adapter->hw.mac_type >= e1000_82543) {
977 netdev->features = NETIF_F_SG |
981 NETIF_F_HW_VLAN_FILTER;
982 if (adapter->hw.mac_type == e1000_ich8lan)
983 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
986 if ((adapter->hw.mac_type >= e1000_82544) &&
987 (adapter->hw.mac_type != e1000_82547))
988 netdev->features |= NETIF_F_TSO;
990 if (adapter->hw.mac_type > e1000_82547_rev_2)
991 netdev->features |= NETIF_F_TSO6;
993 netdev->features |= NETIF_F_HIGHDMA;
995 netdev->features |= NETIF_F_LLTX;
997 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
999 /* initialize eeprom parameters */
1001 if (e1000_init_eeprom_params(&adapter->hw)) {
1002 E1000_ERR("EEPROM initialization failed\n");
1006 /* before reading the EEPROM, reset the controller to
1007 * put the device in a known good starting state */
1009 e1000_reset_hw(&adapter->hw);
1011 /* make sure the EEPROM is good */
1013 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1014 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1018 /* copy the MAC address out of the EEPROM */
1020 if (e1000_read_mac_addr(&adapter->hw))
1021 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1022 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
1023 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1025 if (!is_valid_ether_addr(netdev->perm_addr)) {
1026 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1030 e1000_get_bus_info(&adapter->hw);
1032 init_timer(&adapter->tx_fifo_stall_timer);
1033 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
1034 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
1036 init_timer(&adapter->watchdog_timer);
1037 adapter->watchdog_timer.function = &e1000_watchdog;
1038 adapter->watchdog_timer.data = (unsigned long) adapter;
1040 init_timer(&adapter->phy_info_timer);
1041 adapter->phy_info_timer.function = &e1000_update_phy_info;
1042 adapter->phy_info_timer.data = (unsigned long) adapter;
1044 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1046 e1000_check_options(adapter);
1048 /* Initial Wake on LAN setting
1049 * If APM wake is enabled in the EEPROM,
1050 * enable the ACPI Magic Packet filter
1053 switch (adapter->hw.mac_type) {
1054 case e1000_82542_rev2_0:
1055 case e1000_82542_rev2_1:
1059 e1000_read_eeprom(&adapter->hw,
1060 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1061 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1064 e1000_read_eeprom(&adapter->hw,
1065 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1066 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1069 case e1000_82546_rev_3:
1071 case e1000_80003es2lan:
1072 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1073 e1000_read_eeprom(&adapter->hw,
1074 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1079 e1000_read_eeprom(&adapter->hw,
1080 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1083 if (eeprom_data & eeprom_apme_mask)
1084 adapter->eeprom_wol |= E1000_WUFC_MAG;
1086 /* now that we have the eeprom settings, apply the special cases
1087 * where the eeprom may be wrong or the board simply won't support
1088 * wake on lan on a particular port */
1089 switch (pdev->device) {
1090 case E1000_DEV_ID_82546GB_PCIE:
1091 adapter->eeprom_wol = 0;
1093 case E1000_DEV_ID_82546EB_FIBER:
1094 case E1000_DEV_ID_82546GB_FIBER:
1095 case E1000_DEV_ID_82571EB_FIBER:
1096 /* Wake events only supported on port A for dual fiber
1097 * regardless of eeprom setting */
1098 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
1099 adapter->eeprom_wol = 0;
1101 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1102 case E1000_DEV_ID_82571EB_QUAD_COPPER:
1103 case E1000_DEV_ID_82571EB_QUAD_FIBER:
1104 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
1105 case E1000_DEV_ID_82571PT_QUAD_COPPER:
1106 /* if quad port adapter, disable WoL on all but port A */
1107 if (global_quad_port_a != 0)
1108 adapter->eeprom_wol = 0;
1110 adapter->quad_port_a = 1;
1111 /* Reset for multiple quad port adapters */
1112 if (++global_quad_port_a == 4)
1113 global_quad_port_a = 0;
1117 /* initialize the wol settings based on the eeprom settings */
1118 adapter->wol = adapter->eeprom_wol;
1120 /* print bus type/speed/width info */
1122 struct e1000_hw *hw = &adapter->hw;
1123 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1124 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1125 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1126 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1127 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1128 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1129 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1130 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1131 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1132 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1133 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1137 printk("%s\n", print_mac(mac, netdev->dev_addr));
1139 /* reset the hardware with the new settings */
1140 e1000_reset(adapter);
1142 /* If the controller is 82573 and f/w is AMT, do not set
1143 * DRV_LOAD until the interface is up. For all other cases,
1144 * let the f/w know that the h/w is now under the control
1146 if (adapter->hw.mac_type != e1000_82573 ||
1147 !e1000_check_mng_mode(&adapter->hw))
1148 e1000_get_hw_control(adapter);
1150 /* tell the stack to leave us alone until e1000_open() is called */
1151 netif_carrier_off(netdev);
1152 netif_stop_queue(netdev);
1154 strcpy(netdev->name, "eth%d");
1155 if ((err = register_netdev(netdev)))
1158 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1164 e1000_release_hw_control(adapter);
1166 if (!e1000_check_phy_reset_block(&adapter->hw))
1167 e1000_phy_hw_reset(&adapter->hw);
1169 if (adapter->hw.flash_address)
1170 iounmap(adapter->hw.flash_address);
1172 #ifdef CONFIG_E1000_NAPI
1173 for (i = 0; i < adapter->num_rx_queues; i++)
1174 dev_put(&adapter->polling_netdev[i]);
1177 kfree(adapter->tx_ring);
1178 kfree(adapter->rx_ring);
1179 #ifdef CONFIG_E1000_NAPI
1180 kfree(adapter->polling_netdev);
1183 iounmap(adapter->hw.hw_addr);
1185 free_netdev(netdev);
1187 pci_release_regions(pdev);
1190 pci_disable_device(pdev);
1195 * e1000_remove - Device Removal Routine
1196 * @pdev: PCI device information struct
1198 * e1000_remove is called by the PCI subsystem to alert the driver
1199 * that it should release a PCI device. The could be caused by a
1200 * Hot-Plug event, or because the driver is going to be removed from
1204 static void __devexit
1205 e1000_remove(struct pci_dev *pdev)
1207 struct net_device *netdev = pci_get_drvdata(pdev);
1208 struct e1000_adapter *adapter = netdev_priv(netdev);
1209 #ifdef CONFIG_E1000_NAPI
1213 cancel_work_sync(&adapter->reset_task);
1215 e1000_release_manageability(adapter);
1217 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1218 * would have already happened in close and is redundant. */
1219 e1000_release_hw_control(adapter);
1221 #ifdef CONFIG_E1000_NAPI
1222 for (i = 0; i < adapter->num_rx_queues; i++)
1223 dev_put(&adapter->polling_netdev[i]);
1226 unregister_netdev(netdev);
1228 if (!e1000_check_phy_reset_block(&adapter->hw))
1229 e1000_phy_hw_reset(&adapter->hw);
1231 kfree(adapter->tx_ring);
1232 kfree(adapter->rx_ring);
1233 #ifdef CONFIG_E1000_NAPI
1234 kfree(adapter->polling_netdev);
1237 iounmap(adapter->hw.hw_addr);
1238 if (adapter->hw.flash_address)
1239 iounmap(adapter->hw.flash_address);
1240 pci_release_regions(pdev);
1242 free_netdev(netdev);
1244 pci_disable_device(pdev);
1248 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1249 * @adapter: board private structure to initialize
1251 * e1000_sw_init initializes the Adapter private data structure.
1252 * Fields are initialized based on PCI device information and
1253 * OS network device settings (MTU size).
1256 static int __devinit
1257 e1000_sw_init(struct e1000_adapter *adapter)
1259 struct e1000_hw *hw = &adapter->hw;
1260 struct net_device *netdev = adapter->netdev;
1261 struct pci_dev *pdev = adapter->pdev;
1262 #ifdef CONFIG_E1000_NAPI
1266 /* PCI config space info */
1268 hw->vendor_id = pdev->vendor;
1269 hw->device_id = pdev->device;
1270 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1271 hw->subsystem_id = pdev->subsystem_device;
1272 hw->revision_id = pdev->revision;
1274 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1276 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1277 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1278 hw->max_frame_size = netdev->mtu +
1279 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1280 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1282 /* identify the MAC */
1284 if (e1000_set_mac_type(hw)) {
1285 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1289 switch (hw->mac_type) {
1294 case e1000_82541_rev_2:
1295 case e1000_82547_rev_2:
1296 hw->phy_init_script = 1;
1300 e1000_set_media_type(hw);
1302 hw->wait_autoneg_complete = FALSE;
1303 hw->tbi_compatibility_en = TRUE;
1304 hw->adaptive_ifs = TRUE;
1306 /* Copper options */
1308 if (hw->media_type == e1000_media_type_copper) {
1309 hw->mdix = AUTO_ALL_MODES;
1310 hw->disable_polarity_correction = FALSE;
1311 hw->master_slave = E1000_MASTER_SLAVE;
1314 adapter->num_tx_queues = 1;
1315 adapter->num_rx_queues = 1;
1317 if (e1000_alloc_queues(adapter)) {
1318 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1322 #ifdef CONFIG_E1000_NAPI
1323 for (i = 0; i < adapter->num_rx_queues; i++) {
1324 adapter->polling_netdev[i].priv = adapter;
1325 dev_hold(&adapter->polling_netdev[i]);
1326 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1328 spin_lock_init(&adapter->tx_queue_lock);
1331 /* Explicitly disable IRQ since the NIC can be in any state. */
1332 atomic_set(&adapter->irq_sem, 0);
1333 e1000_irq_disable(adapter);
1335 spin_lock_init(&adapter->stats_lock);
1337 set_bit(__E1000_DOWN, &adapter->flags);
1343 * e1000_alloc_queues - Allocate memory for all rings
1344 * @adapter: board private structure to initialize
1346 * We allocate one ring per queue at run-time since we don't know the
1347 * number of queues at compile-time. The polling_netdev array is
1348 * intended for Multiqueue, but should work fine with a single queue.
1351 static int __devinit
1352 e1000_alloc_queues(struct e1000_adapter *adapter)
1354 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1355 sizeof(struct e1000_tx_ring), GFP_KERNEL);
1356 if (!adapter->tx_ring)
1359 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1360 sizeof(struct e1000_rx_ring), GFP_KERNEL);
1361 if (!adapter->rx_ring) {
1362 kfree(adapter->tx_ring);
1366 #ifdef CONFIG_E1000_NAPI
1367 adapter->polling_netdev = kcalloc(adapter->num_rx_queues,
1368 sizeof(struct net_device),
1370 if (!adapter->polling_netdev) {
1371 kfree(adapter->tx_ring);
1372 kfree(adapter->rx_ring);
1377 return E1000_SUCCESS;
1381 * e1000_open - Called when a network interface is made active
1382 * @netdev: network interface device structure
1384 * Returns 0 on success, negative value on failure
1386 * The open entry point is called when a network interface is made
1387 * active by the system (IFF_UP). At this point all resources needed
1388 * for transmit and receive operations are allocated, the interrupt
1389 * handler is registered with the OS, the watchdog timer is started,
1390 * and the stack is notified that the interface is ready.
1394 e1000_open(struct net_device *netdev)
1396 struct e1000_adapter *adapter = netdev_priv(netdev);
1399 /* disallow open during test */
1400 if (test_bit(__E1000_TESTING, &adapter->flags))
1403 /* allocate transmit descriptors */
1404 err = e1000_setup_all_tx_resources(adapter);
1408 /* allocate receive descriptors */
1409 err = e1000_setup_all_rx_resources(adapter);
1413 e1000_power_up_phy(adapter);
1415 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1416 if ((adapter->hw.mng_cookie.status &
1417 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1418 e1000_update_mng_vlan(adapter);
1421 /* If AMT is enabled, let the firmware know that the network
1422 * interface is now open */
1423 if (adapter->hw.mac_type == e1000_82573 &&
1424 e1000_check_mng_mode(&adapter->hw))
1425 e1000_get_hw_control(adapter);
1427 /* before we allocate an interrupt, we must be ready to handle it.
1428 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1429 * as soon as we call pci_request_irq, so we have to setup our
1430 * clean_rx handler before we do so. */
1431 e1000_configure(adapter);
1433 err = e1000_request_irq(adapter);
1437 /* From here on the code is the same as e1000_up() */
1438 clear_bit(__E1000_DOWN, &adapter->flags);
1440 #ifdef CONFIG_E1000_NAPI
1441 napi_enable(&adapter->napi);
1444 e1000_irq_enable(adapter);
1446 /* fire a link status change interrupt to start the watchdog */
1447 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
1449 return E1000_SUCCESS;
1452 e1000_release_hw_control(adapter);
1453 e1000_power_down_phy(adapter);
1454 e1000_free_all_rx_resources(adapter);
1456 e1000_free_all_tx_resources(adapter);
1458 e1000_reset(adapter);
1464 * e1000_close - Disables a network interface
1465 * @netdev: network interface device structure
1467 * Returns 0, this is not allowed to fail
1469 * The close entry point is called when an interface is de-activated
1470 * by the OS. The hardware is still under the drivers control, but
1471 * needs to be disabled. A global MAC reset is issued to stop the
1472 * hardware, and all transmit and receive resources are freed.
1476 e1000_close(struct net_device *netdev)
1478 struct e1000_adapter *adapter = netdev_priv(netdev);
1480 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1481 e1000_down(adapter);
1482 e1000_power_down_phy(adapter);
1483 e1000_free_irq(adapter);
1485 e1000_free_all_tx_resources(adapter);
1486 e1000_free_all_rx_resources(adapter);
1488 /* kill manageability vlan ID if supported, but not if a vlan with
1489 * the same ID is registered on the host OS (let 8021q kill it) */
1490 if ((adapter->hw.mng_cookie.status &
1491 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1493 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
1494 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1497 /* If AMT is enabled, let the firmware know that the network
1498 * interface is now closed */
1499 if (adapter->hw.mac_type == e1000_82573 &&
1500 e1000_check_mng_mode(&adapter->hw))
1501 e1000_release_hw_control(adapter);
1507 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1508 * @adapter: address of board private structure
1509 * @start: address of beginning of memory
1510 * @len: length of memory
1513 e1000_check_64k_bound(struct e1000_adapter *adapter,
1514 void *start, unsigned long len)
1516 unsigned long begin = (unsigned long) start;
1517 unsigned long end = begin + len;
1519 /* First rev 82545 and 82546 need to not allow any memory
1520 * write location to cross 64k boundary due to errata 23 */
1521 if (adapter->hw.mac_type == e1000_82545 ||
1522 adapter->hw.mac_type == e1000_82546) {
1523 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1530 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1531 * @adapter: board private structure
1532 * @txdr: tx descriptor ring (for a specific queue) to setup
1534 * Return 0 on success, negative on failure
1538 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1539 struct e1000_tx_ring *txdr)
1541 struct pci_dev *pdev = adapter->pdev;
1544 size = sizeof(struct e1000_buffer) * txdr->count;
1545 txdr->buffer_info = vmalloc(size);
1546 if (!txdr->buffer_info) {
1548 "Unable to allocate memory for the transmit descriptor ring\n");
1551 memset(txdr->buffer_info, 0, size);
1553 /* round up to nearest 4K */
1555 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1556 txdr->size = ALIGN(txdr->size, 4096);
1558 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1561 vfree(txdr->buffer_info);
1563 "Unable to allocate memory for the transmit descriptor ring\n");
1567 /* Fix for errata 23, can't cross 64kB boundary */
1568 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1569 void *olddesc = txdr->desc;
1570 dma_addr_t olddma = txdr->dma;
1571 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1572 "at %p\n", txdr->size, txdr->desc);
1573 /* Try again, without freeing the previous */
1574 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1575 /* Failed allocation, critical failure */
1577 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1578 goto setup_tx_desc_die;
1581 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1583 pci_free_consistent(pdev, txdr->size, txdr->desc,
1585 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1587 "Unable to allocate aligned memory "
1588 "for the transmit descriptor ring\n");
1589 vfree(txdr->buffer_info);
1592 /* Free old allocation, new allocation was successful */
1593 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1596 memset(txdr->desc, 0, txdr->size);
1598 txdr->next_to_use = 0;
1599 txdr->next_to_clean = 0;
1600 spin_lock_init(&txdr->tx_lock);
1606 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1607 * (Descriptors) for all queues
1608 * @adapter: board private structure
1610 * Return 0 on success, negative on failure
1614 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1618 for (i = 0; i < adapter->num_tx_queues; i++) {
1619 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1622 "Allocation for Tx Queue %u failed\n", i);
1623 for (i-- ; i >= 0; i--)
1624 e1000_free_tx_resources(adapter,
1625 &adapter->tx_ring[i]);
1634 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1635 * @adapter: board private structure
1637 * Configure the Tx unit of the MAC after a reset.
1641 e1000_configure_tx(struct e1000_adapter *adapter)
1644 struct e1000_hw *hw = &adapter->hw;
1645 uint32_t tdlen, tctl, tipg, tarc;
1646 uint32_t ipgr1, ipgr2;
1648 /* Setup the HW Tx Head and Tail descriptor pointers */
1650 switch (adapter->num_tx_queues) {
1653 tdba = adapter->tx_ring[0].dma;
1654 tdlen = adapter->tx_ring[0].count *
1655 sizeof(struct e1000_tx_desc);
1656 E1000_WRITE_REG(hw, TDLEN, tdlen);
1657 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1658 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1659 E1000_WRITE_REG(hw, TDT, 0);
1660 E1000_WRITE_REG(hw, TDH, 0);
1661 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1662 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1666 /* Set the default values for the Tx Inter Packet Gap timer */
1667 if (adapter->hw.mac_type <= e1000_82547_rev_2 &&
1668 (hw->media_type == e1000_media_type_fiber ||
1669 hw->media_type == e1000_media_type_internal_serdes))
1670 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1672 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1674 switch (hw->mac_type) {
1675 case e1000_82542_rev2_0:
1676 case e1000_82542_rev2_1:
1677 tipg = DEFAULT_82542_TIPG_IPGT;
1678 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1679 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1681 case e1000_80003es2lan:
1682 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1683 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1686 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1687 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1690 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1691 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1692 E1000_WRITE_REG(hw, TIPG, tipg);
1694 /* Set the Tx Interrupt Delay register */
1696 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1697 if (hw->mac_type >= e1000_82540)
1698 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1700 /* Program the Transmit Control Register */
1702 tctl = E1000_READ_REG(hw, TCTL);
1703 tctl &= ~E1000_TCTL_CT;
1704 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1705 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1707 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1708 tarc = E1000_READ_REG(hw, TARC0);
1709 /* set the speed mode bit, we'll clear it if we're not at
1710 * gigabit link later */
1712 E1000_WRITE_REG(hw, TARC0, tarc);
1713 } else if (hw->mac_type == e1000_80003es2lan) {
1714 tarc = E1000_READ_REG(hw, TARC0);
1716 E1000_WRITE_REG(hw, TARC0, tarc);
1717 tarc = E1000_READ_REG(hw, TARC1);
1719 E1000_WRITE_REG(hw, TARC1, tarc);
1722 e1000_config_collision_dist(hw);
1724 /* Setup Transmit Descriptor Settings for eop descriptor */
1725 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1727 /* only set IDE if we are delaying interrupts using the timers */
1728 if (adapter->tx_int_delay)
1729 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1731 if (hw->mac_type < e1000_82543)
1732 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1734 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1736 /* Cache if we're 82544 running in PCI-X because we'll
1737 * need this to apply a workaround later in the send path. */
1738 if (hw->mac_type == e1000_82544 &&
1739 hw->bus_type == e1000_bus_type_pcix)
1740 adapter->pcix_82544 = 1;
1742 E1000_WRITE_REG(hw, TCTL, tctl);
1747 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1748 * @adapter: board private structure
1749 * @rxdr: rx descriptor ring (for a specific queue) to setup
1751 * Returns 0 on success, negative on failure
1755 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1756 struct e1000_rx_ring *rxdr)
1758 struct pci_dev *pdev = adapter->pdev;
1761 size = sizeof(struct e1000_buffer) * rxdr->count;
1762 rxdr->buffer_info = vmalloc(size);
1763 if (!rxdr->buffer_info) {
1765 "Unable to allocate memory for the receive descriptor ring\n");
1768 memset(rxdr->buffer_info, 0, size);
1770 rxdr->ps_page = kcalloc(rxdr->count, sizeof(struct e1000_ps_page),
1772 if (!rxdr->ps_page) {
1773 vfree(rxdr->buffer_info);
1775 "Unable to allocate memory for the receive descriptor ring\n");
1779 rxdr->ps_page_dma = kcalloc(rxdr->count,
1780 sizeof(struct e1000_ps_page_dma),
1782 if (!rxdr->ps_page_dma) {
1783 vfree(rxdr->buffer_info);
1784 kfree(rxdr->ps_page);
1786 "Unable to allocate memory for the receive descriptor ring\n");
1790 if (adapter->hw.mac_type <= e1000_82547_rev_2)
1791 desc_len = sizeof(struct e1000_rx_desc);
1793 desc_len = sizeof(union e1000_rx_desc_packet_split);
1795 /* Round up to nearest 4K */
1797 rxdr->size = rxdr->count * desc_len;
1798 rxdr->size = ALIGN(rxdr->size, 4096);
1800 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1804 "Unable to allocate memory for the receive descriptor ring\n");
1806 vfree(rxdr->buffer_info);
1807 kfree(rxdr->ps_page);
1808 kfree(rxdr->ps_page_dma);
1812 /* Fix for errata 23, can't cross 64kB boundary */
1813 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1814 void *olddesc = rxdr->desc;
1815 dma_addr_t olddma = rxdr->dma;
1816 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1817 "at %p\n", rxdr->size, rxdr->desc);
1818 /* Try again, without freeing the previous */
1819 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1820 /* Failed allocation, critical failure */
1822 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1824 "Unable to allocate memory "
1825 "for the receive descriptor ring\n");
1826 goto setup_rx_desc_die;
1829 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1831 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1833 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1835 "Unable to allocate aligned memory "
1836 "for the receive descriptor ring\n");
1837 goto setup_rx_desc_die;
1839 /* Free old allocation, new allocation was successful */
1840 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1843 memset(rxdr->desc, 0, rxdr->size);
1845 rxdr->next_to_clean = 0;
1846 rxdr->next_to_use = 0;
1852 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1853 * (Descriptors) for all queues
1854 * @adapter: board private structure
1856 * Return 0 on success, negative on failure
1860 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1864 for (i = 0; i < adapter->num_rx_queues; i++) {
1865 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1868 "Allocation for Rx Queue %u failed\n", i);
1869 for (i-- ; i >= 0; i--)
1870 e1000_free_rx_resources(adapter,
1871 &adapter->rx_ring[i]);
1880 * e1000_setup_rctl - configure the receive control registers
1881 * @adapter: Board private structure
1883 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1884 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1886 e1000_setup_rctl(struct e1000_adapter *adapter)
1888 uint32_t rctl, rfctl;
1889 uint32_t psrctl = 0;
1890 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1894 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1896 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1898 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1899 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1900 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1902 if (adapter->hw.tbi_compatibility_on == 1)
1903 rctl |= E1000_RCTL_SBP;
1905 rctl &= ~E1000_RCTL_SBP;
1907 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1908 rctl &= ~E1000_RCTL_LPE;
1910 rctl |= E1000_RCTL_LPE;
1912 /* Setup buffer sizes */
1913 rctl &= ~E1000_RCTL_SZ_4096;
1914 rctl |= E1000_RCTL_BSEX;
1915 switch (adapter->rx_buffer_len) {
1916 case E1000_RXBUFFER_256:
1917 rctl |= E1000_RCTL_SZ_256;
1918 rctl &= ~E1000_RCTL_BSEX;
1920 case E1000_RXBUFFER_512:
1921 rctl |= E1000_RCTL_SZ_512;
1922 rctl &= ~E1000_RCTL_BSEX;
1924 case E1000_RXBUFFER_1024:
1925 rctl |= E1000_RCTL_SZ_1024;
1926 rctl &= ~E1000_RCTL_BSEX;
1928 case E1000_RXBUFFER_2048:
1930 rctl |= E1000_RCTL_SZ_2048;
1931 rctl &= ~E1000_RCTL_BSEX;
1933 case E1000_RXBUFFER_4096:
1934 rctl |= E1000_RCTL_SZ_4096;
1936 case E1000_RXBUFFER_8192:
1937 rctl |= E1000_RCTL_SZ_8192;
1939 case E1000_RXBUFFER_16384:
1940 rctl |= E1000_RCTL_SZ_16384;
1944 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1945 /* 82571 and greater support packet-split where the protocol
1946 * header is placed in skb->data and the packet data is
1947 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1948 * In the case of a non-split, skb->data is linearly filled,
1949 * followed by the page buffers. Therefore, skb->data is
1950 * sized to hold the largest protocol header.
1952 /* allocations using alloc_page take too long for regular MTU
1953 * so only enable packet split for jumbo frames */
1954 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1955 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
1956 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
1957 adapter->rx_ps_pages = pages;
1959 adapter->rx_ps_pages = 0;
1961 if (adapter->rx_ps_pages) {
1962 /* Configure extra packet-split registers */
1963 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1964 rfctl |= E1000_RFCTL_EXTEN;
1965 /* disable packet split support for IPv6 extension headers,
1966 * because some malformed IPv6 headers can hang the RX */
1967 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
1968 E1000_RFCTL_NEW_IPV6_EXT_DIS);
1970 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1972 rctl |= E1000_RCTL_DTYP_PS;
1974 psrctl |= adapter->rx_ps_bsize0 >>
1975 E1000_PSRCTL_BSIZE0_SHIFT;
1977 switch (adapter->rx_ps_pages) {
1979 psrctl |= PAGE_SIZE <<
1980 E1000_PSRCTL_BSIZE3_SHIFT;
1982 psrctl |= PAGE_SIZE <<
1983 E1000_PSRCTL_BSIZE2_SHIFT;
1985 psrctl |= PAGE_SIZE >>
1986 E1000_PSRCTL_BSIZE1_SHIFT;
1990 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1993 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1997 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1998 * @adapter: board private structure
2000 * Configure the Rx unit of the MAC after a reset.
2004 e1000_configure_rx(struct e1000_adapter *adapter)
2007 struct e1000_hw *hw = &adapter->hw;
2008 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2010 if (adapter->rx_ps_pages) {
2011 /* this is a 32 byte descriptor */
2012 rdlen = adapter->rx_ring[0].count *
2013 sizeof(union e1000_rx_desc_packet_split);
2014 adapter->clean_rx = e1000_clean_rx_irq_ps;
2015 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
2017 rdlen = adapter->rx_ring[0].count *
2018 sizeof(struct e1000_rx_desc);
2019 adapter->clean_rx = e1000_clean_rx_irq;
2020 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2023 /* disable receives while setting up the descriptors */
2024 rctl = E1000_READ_REG(hw, RCTL);
2025 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
2027 /* set the Receive Delay Timer Register */
2028 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
2030 if (hw->mac_type >= e1000_82540) {
2031 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
2032 if (adapter->itr_setting != 0)
2033 E1000_WRITE_REG(hw, ITR,
2034 1000000000 / (adapter->itr * 256));
2037 if (hw->mac_type >= e1000_82571) {
2038 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
2039 /* Reset delay timers after every interrupt */
2040 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2041 #ifdef CONFIG_E1000_NAPI
2042 /* Auto-Mask interrupts upon ICR access */
2043 ctrl_ext |= E1000_CTRL_EXT_IAME;
2044 E1000_WRITE_REG(hw, IAM, 0xffffffff);
2046 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
2047 E1000_WRITE_FLUSH(hw);
2050 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2051 * the Base and Length of the Rx Descriptor Ring */
2052 switch (adapter->num_rx_queues) {
2055 rdba = adapter->rx_ring[0].dma;
2056 E1000_WRITE_REG(hw, RDLEN, rdlen);
2057 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
2058 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
2059 E1000_WRITE_REG(hw, RDT, 0);
2060 E1000_WRITE_REG(hw, RDH, 0);
2061 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2062 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
2066 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
2067 if (hw->mac_type >= e1000_82543) {
2068 rxcsum = E1000_READ_REG(hw, RXCSUM);
2069 if (adapter->rx_csum == TRUE) {
2070 rxcsum |= E1000_RXCSUM_TUOFL;
2072 /* Enable 82571 IPv4 payload checksum for UDP fragments
2073 * Must be used in conjunction with packet-split. */
2074 if ((hw->mac_type >= e1000_82571) &&
2075 (adapter->rx_ps_pages)) {
2076 rxcsum |= E1000_RXCSUM_IPPCSE;
2079 rxcsum &= ~E1000_RXCSUM_TUOFL;
2080 /* don't need to clear IPPCSE as it defaults to 0 */
2082 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
2085 /* enable early receives on 82573, only takes effect if using > 2048
2086 * byte total frame size. for example only for jumbo frames */
2087 #define E1000_ERT_2048 0x100
2088 if (hw->mac_type == e1000_82573)
2089 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
2091 /* Enable Receives */
2092 E1000_WRITE_REG(hw, RCTL, rctl);
2096 * e1000_free_tx_resources - Free Tx Resources per Queue
2097 * @adapter: board private structure
2098 * @tx_ring: Tx descriptor ring for a specific queue
2100 * Free all transmit software resources
2104 e1000_free_tx_resources(struct e1000_adapter *adapter,
2105 struct e1000_tx_ring *tx_ring)
2107 struct pci_dev *pdev = adapter->pdev;
2109 e1000_clean_tx_ring(adapter, tx_ring);
2111 vfree(tx_ring->buffer_info);
2112 tx_ring->buffer_info = NULL;
2114 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2116 tx_ring->desc = NULL;
2120 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2121 * @adapter: board private structure
2123 * Free all transmit software resources
2127 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
2131 for (i = 0; i < adapter->num_tx_queues; i++)
2132 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
2136 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2137 struct e1000_buffer *buffer_info)
2139 if (buffer_info->dma) {
2140 pci_unmap_page(adapter->pdev,
2142 buffer_info->length,
2144 buffer_info->dma = 0;
2146 if (buffer_info->skb) {
2147 dev_kfree_skb_any(buffer_info->skb);
2148 buffer_info->skb = NULL;
2150 /* buffer_info must be completely set up in the transmit path */
2154 * e1000_clean_tx_ring - Free Tx Buffers
2155 * @adapter: board private structure
2156 * @tx_ring: ring to be cleaned
2160 e1000_clean_tx_ring(struct e1000_adapter *adapter,
2161 struct e1000_tx_ring *tx_ring)
2163 struct e1000_buffer *buffer_info;
2167 /* Free all the Tx ring sk_buffs */
2169 for (i = 0; i < tx_ring->count; i++) {
2170 buffer_info = &tx_ring->buffer_info[i];
2171 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2174 size = sizeof(struct e1000_buffer) * tx_ring->count;
2175 memset(tx_ring->buffer_info, 0, size);
2177 /* Zero out the descriptor ring */
2179 memset(tx_ring->desc, 0, tx_ring->size);
2181 tx_ring->next_to_use = 0;
2182 tx_ring->next_to_clean = 0;
2183 tx_ring->last_tx_tso = 0;
2185 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2186 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2190 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2191 * @adapter: board private structure
2195 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2199 for (i = 0; i < adapter->num_tx_queues; i++)
2200 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2204 * e1000_free_rx_resources - Free Rx Resources
2205 * @adapter: board private structure
2206 * @rx_ring: ring to clean the resources from
2208 * Free all receive software resources
2212 e1000_free_rx_resources(struct e1000_adapter *adapter,
2213 struct e1000_rx_ring *rx_ring)
2215 struct pci_dev *pdev = adapter->pdev;
2217 e1000_clean_rx_ring(adapter, rx_ring);
2219 vfree(rx_ring->buffer_info);
2220 rx_ring->buffer_info = NULL;
2221 kfree(rx_ring->ps_page);
2222 rx_ring->ps_page = NULL;
2223 kfree(rx_ring->ps_page_dma);
2224 rx_ring->ps_page_dma = NULL;
2226 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2228 rx_ring->desc = NULL;
2232 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2233 * @adapter: board private structure
2235 * Free all receive software resources
2239 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2243 for (i = 0; i < adapter->num_rx_queues; i++)
2244 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2248 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2249 * @adapter: board private structure
2250 * @rx_ring: ring to free buffers from
2254 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2255 struct e1000_rx_ring *rx_ring)
2257 struct e1000_buffer *buffer_info;
2258 struct e1000_ps_page *ps_page;
2259 struct e1000_ps_page_dma *ps_page_dma;
2260 struct pci_dev *pdev = adapter->pdev;
2264 /* Free all the Rx ring sk_buffs */
2265 for (i = 0; i < rx_ring->count; i++) {
2266 buffer_info = &rx_ring->buffer_info[i];
2267 if (buffer_info->skb) {
2268 pci_unmap_single(pdev,
2270 buffer_info->length,
2271 PCI_DMA_FROMDEVICE);
2273 dev_kfree_skb(buffer_info->skb);
2274 buffer_info->skb = NULL;
2276 ps_page = &rx_ring->ps_page[i];
2277 ps_page_dma = &rx_ring->ps_page_dma[i];
2278 for (j = 0; j < adapter->rx_ps_pages; j++) {
2279 if (!ps_page->ps_page[j]) break;
2280 pci_unmap_page(pdev,
2281 ps_page_dma->ps_page_dma[j],
2282 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2283 ps_page_dma->ps_page_dma[j] = 0;
2284 put_page(ps_page->ps_page[j]);
2285 ps_page->ps_page[j] = NULL;
2289 size = sizeof(struct e1000_buffer) * rx_ring->count;
2290 memset(rx_ring->buffer_info, 0, size);
2291 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2292 memset(rx_ring->ps_page, 0, size);
2293 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2294 memset(rx_ring->ps_page_dma, 0, size);
2296 /* Zero out the descriptor ring */
2298 memset(rx_ring->desc, 0, rx_ring->size);
2300 rx_ring->next_to_clean = 0;
2301 rx_ring->next_to_use = 0;
2303 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2304 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2308 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2309 * @adapter: board private structure
2313 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2317 for (i = 0; i < adapter->num_rx_queues; i++)
2318 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2321 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2322 * and memory write and invalidate disabled for certain operations
2325 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2327 struct net_device *netdev = adapter->netdev;
2330 e1000_pci_clear_mwi(&adapter->hw);
2332 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2333 rctl |= E1000_RCTL_RST;
2334 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2335 E1000_WRITE_FLUSH(&adapter->hw);
2338 if (netif_running(netdev))
2339 e1000_clean_all_rx_rings(adapter);
2343 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2345 struct net_device *netdev = adapter->netdev;
2348 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2349 rctl &= ~E1000_RCTL_RST;
2350 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2351 E1000_WRITE_FLUSH(&adapter->hw);
2354 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2355 e1000_pci_set_mwi(&adapter->hw);
2357 if (netif_running(netdev)) {
2358 /* No need to loop, because 82542 supports only 1 queue */
2359 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2360 e1000_configure_rx(adapter);
2361 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2366 * e1000_set_mac - Change the Ethernet Address of the NIC
2367 * @netdev: network interface device structure
2368 * @p: pointer to an address structure
2370 * Returns 0 on success, negative on failure
2374 e1000_set_mac(struct net_device *netdev, void *p)
2376 struct e1000_adapter *adapter = netdev_priv(netdev);
2377 struct sockaddr *addr = p;
2379 if (!is_valid_ether_addr(addr->sa_data))
2380 return -EADDRNOTAVAIL;
2382 /* 82542 2.0 needs to be in reset to write receive address registers */
2384 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2385 e1000_enter_82542_rst(adapter);
2387 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2388 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2390 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2392 /* With 82571 controllers, LAA may be overwritten (with the default)
2393 * due to controller reset from the other port. */
2394 if (adapter->hw.mac_type == e1000_82571) {
2395 /* activate the work around */
2396 adapter->hw.laa_is_present = 1;
2398 /* Hold a copy of the LAA in RAR[14] This is done so that
2399 * between the time RAR[0] gets clobbered and the time it
2400 * gets fixed (in e1000_watchdog), the actual LAA is in one
2401 * of the RARs and no incoming packets directed to this port
2402 * are dropped. Eventaully the LAA will be in RAR[0] and
2404 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2405 E1000_RAR_ENTRIES - 1);
2408 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2409 e1000_leave_82542_rst(adapter);
2415 * e1000_set_multi - Multicast and Promiscuous mode set
2416 * @netdev: network interface device structure
2418 * The set_multi entry point is called whenever the multicast address
2419 * list or the network interface flags are updated. This routine is
2420 * responsible for configuring the hardware for proper multicast,
2421 * promiscuous mode, and all-multi behavior.
2425 e1000_set_multi(struct net_device *netdev)
2427 struct e1000_adapter *adapter = netdev_priv(netdev);
2428 struct e1000_hw *hw = &adapter->hw;
2429 struct dev_mc_list *mc_ptr;
2431 uint32_t hash_value;
2432 int i, rar_entries = E1000_RAR_ENTRIES;
2433 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2434 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2435 E1000_NUM_MTA_REGISTERS;
2437 if (adapter->hw.mac_type == e1000_ich8lan)
2438 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2440 /* reserve RAR[14] for LAA over-write work-around */
2441 if (adapter->hw.mac_type == e1000_82571)
2444 /* Check for Promiscuous and All Multicast modes */
2446 rctl = E1000_READ_REG(hw, RCTL);
2448 if (netdev->flags & IFF_PROMISC) {
2449 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2450 } else if (netdev->flags & IFF_ALLMULTI) {
2451 rctl |= E1000_RCTL_MPE;
2452 rctl &= ~E1000_RCTL_UPE;
2454 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2457 E1000_WRITE_REG(hw, RCTL, rctl);
2459 /* 82542 2.0 needs to be in reset to write receive address registers */
2461 if (hw->mac_type == e1000_82542_rev2_0)
2462 e1000_enter_82542_rst(adapter);
2464 /* load the first 14 multicast address into the exact filters 1-14
2465 * RAR 0 is used for the station MAC adddress
2466 * if there are not 14 addresses, go ahead and clear the filters
2467 * -- with 82571 controllers only 0-13 entries are filled here
2469 mc_ptr = netdev->mc_list;
2471 for (i = 1; i < rar_entries; i++) {
2473 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2474 mc_ptr = mc_ptr->next;
2476 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2477 E1000_WRITE_FLUSH(hw);
2478 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2479 E1000_WRITE_FLUSH(hw);
2483 /* clear the old settings from the multicast hash table */
2485 for (i = 0; i < mta_reg_count; i++) {
2486 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2487 E1000_WRITE_FLUSH(hw);
2490 /* load any remaining addresses into the hash table */
2492 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2493 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2494 e1000_mta_set(hw, hash_value);
2497 if (hw->mac_type == e1000_82542_rev2_0)
2498 e1000_leave_82542_rst(adapter);
2501 /* Need to wait a few seconds after link up to get diagnostic information from
2505 e1000_update_phy_info(unsigned long data)
2507 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2508 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2512 * e1000_82547_tx_fifo_stall - Timer Call-back
2513 * @data: pointer to adapter cast into an unsigned long
2517 e1000_82547_tx_fifo_stall(unsigned long data)
2519 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2520 struct net_device *netdev = adapter->netdev;
2523 if (atomic_read(&adapter->tx_fifo_stall)) {
2524 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2525 E1000_READ_REG(&adapter->hw, TDH)) &&
2526 (E1000_READ_REG(&adapter->hw, TDFT) ==
2527 E1000_READ_REG(&adapter->hw, TDFH)) &&
2528 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2529 E1000_READ_REG(&adapter->hw, TDFHS))) {
2530 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2531 E1000_WRITE_REG(&adapter->hw, TCTL,
2532 tctl & ~E1000_TCTL_EN);
2533 E1000_WRITE_REG(&adapter->hw, TDFT,
2534 adapter->tx_head_addr);
2535 E1000_WRITE_REG(&adapter->hw, TDFH,
2536 adapter->tx_head_addr);
2537 E1000_WRITE_REG(&adapter->hw, TDFTS,
2538 adapter->tx_head_addr);
2539 E1000_WRITE_REG(&adapter->hw, TDFHS,
2540 adapter->tx_head_addr);
2541 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2542 E1000_WRITE_FLUSH(&adapter->hw);
2544 adapter->tx_fifo_head = 0;
2545 atomic_set(&adapter->tx_fifo_stall, 0);
2546 netif_wake_queue(netdev);
2548 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2554 * e1000_watchdog - Timer Call-back
2555 * @data: pointer to adapter cast into an unsigned long
2558 e1000_watchdog(unsigned long data)
2560 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2561 struct net_device *netdev = adapter->netdev;
2562 struct e1000_tx_ring *txdr = adapter->tx_ring;
2563 uint32_t link, tctl;
2566 ret_val = e1000_check_for_link(&adapter->hw);
2567 if ((ret_val == E1000_ERR_PHY) &&
2568 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2569 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2570 /* See e1000_kumeran_lock_loss_workaround() */
2572 "Gigabit has been disabled, downgrading speed\n");
2575 if (adapter->hw.mac_type == e1000_82573) {
2576 e1000_enable_tx_pkt_filtering(&adapter->hw);
2577 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2578 e1000_update_mng_vlan(adapter);
2581 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2582 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2583 link = !adapter->hw.serdes_link_down;
2585 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2588 if (!netif_carrier_ok(netdev)) {
2590 boolean_t txb2b = 1;
2591 e1000_get_speed_and_duplex(&adapter->hw,
2592 &adapter->link_speed,
2593 &adapter->link_duplex);
2595 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
2596 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
2597 "Flow Control: %s\n",
2598 adapter->link_speed,
2599 adapter->link_duplex == FULL_DUPLEX ?
2600 "Full Duplex" : "Half Duplex",
2601 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2602 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2603 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2604 E1000_CTRL_TFCE) ? "TX" : "None" )));
2606 /* tweak tx_queue_len according to speed/duplex
2607 * and adjust the timeout factor */
2608 netdev->tx_queue_len = adapter->tx_queue_len;
2609 adapter->tx_timeout_factor = 1;
2610 switch (adapter->link_speed) {
2613 netdev->tx_queue_len = 10;
2614 adapter->tx_timeout_factor = 8;
2618 netdev->tx_queue_len = 100;
2619 /* maybe add some timeout factor ? */
2623 if ((adapter->hw.mac_type == e1000_82571 ||
2624 adapter->hw.mac_type == e1000_82572) &&
2627 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2628 tarc0 &= ~(1 << 21);
2629 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2632 /* disable TSO for pcie and 10/100 speeds, to avoid
2633 * some hardware issues */
2634 if (!adapter->tso_force &&
2635 adapter->hw.bus_type == e1000_bus_type_pci_express){
2636 switch (adapter->link_speed) {
2640 "10/100 speed: disabling TSO\n");
2641 netdev->features &= ~NETIF_F_TSO;
2642 netdev->features &= ~NETIF_F_TSO6;
2645 netdev->features |= NETIF_F_TSO;
2646 netdev->features |= NETIF_F_TSO6;
2654 /* enable transmits in the hardware, need to do this
2655 * after setting TARC0 */
2656 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2657 tctl |= E1000_TCTL_EN;
2658 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2660 netif_carrier_on(netdev);
2661 netif_wake_queue(netdev);
2662 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2663 adapter->smartspeed = 0;
2665 /* make sure the receive unit is started */
2666 if (adapter->hw.rx_needs_kicking) {
2667 struct e1000_hw *hw = &adapter->hw;
2668 uint32_t rctl = E1000_READ_REG(hw, RCTL);
2669 E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN);
2673 if (netif_carrier_ok(netdev)) {
2674 adapter->link_speed = 0;
2675 adapter->link_duplex = 0;
2676 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2677 netif_carrier_off(netdev);
2678 netif_stop_queue(netdev);
2679 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2681 /* 80003ES2LAN workaround--
2682 * For packet buffer work-around on link down event;
2683 * disable receives in the ISR and
2684 * reset device here in the watchdog
2686 if (adapter->hw.mac_type == e1000_80003es2lan)
2688 schedule_work(&adapter->reset_task);
2691 e1000_smartspeed(adapter);
2694 e1000_update_stats(adapter);
2696 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2697 adapter->tpt_old = adapter->stats.tpt;
2698 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2699 adapter->colc_old = adapter->stats.colc;
2701 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2702 adapter->gorcl_old = adapter->stats.gorcl;
2703 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2704 adapter->gotcl_old = adapter->stats.gotcl;
2706 e1000_update_adaptive(&adapter->hw);
2708 if (!netif_carrier_ok(netdev)) {
2709 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2710 /* We've lost link, so the controller stops DMA,
2711 * but we've got queued Tx work that's never going
2712 * to get done, so reset controller to flush Tx.
2713 * (Do the reset outside of interrupt context). */
2714 adapter->tx_timeout_count++;
2715 schedule_work(&adapter->reset_task);
2719 /* Cause software interrupt to ensure rx ring is cleaned */
2720 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2722 /* Force detection of hung controller every watchdog period */
2723 adapter->detect_tx_hung = TRUE;
2725 /* With 82571 controllers, LAA may be overwritten due to controller
2726 * reset from the other port. Set the appropriate LAA in RAR[0] */
2727 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2728 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2730 /* Reset the timer */
2731 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
2734 enum latency_range {
2738 latency_invalid = 255
2742 * e1000_update_itr - update the dynamic ITR value based on statistics
2743 * Stores a new ITR value based on packets and byte
2744 * counts during the last interrupt. The advantage of per interrupt
2745 * computation is faster updates and more accurate ITR for the current
2746 * traffic pattern. Constants in this function were computed
2747 * based on theoretical maximum wire speed and thresholds were set based
2748 * on testing data as well as attempting to minimize response time
2749 * while increasing bulk throughput.
2750 * this functionality is controlled by the InterruptThrottleRate module
2751 * parameter (see e1000_param.c)
2752 * @adapter: pointer to adapter
2753 * @itr_setting: current adapter->itr
2754 * @packets: the number of packets during this measurement interval
2755 * @bytes: the number of bytes during this measurement interval
2757 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2758 uint16_t itr_setting,
2762 unsigned int retval = itr_setting;
2763 struct e1000_hw *hw = &adapter->hw;
2765 if (unlikely(hw->mac_type < e1000_82540))
2766 goto update_itr_done;
2769 goto update_itr_done;
2771 switch (itr_setting) {
2772 case lowest_latency:
2773 /* jumbo frames get bulk treatment*/
2774 if (bytes/packets > 8000)
2775 retval = bulk_latency;
2776 else if ((packets < 5) && (bytes > 512))
2777 retval = low_latency;
2779 case low_latency: /* 50 usec aka 20000 ints/s */
2780 if (bytes > 10000) {
2781 /* jumbo frames need bulk latency setting */
2782 if (bytes/packets > 8000)
2783 retval = bulk_latency;
2784 else if ((packets < 10) || ((bytes/packets) > 1200))
2785 retval = bulk_latency;
2786 else if ((packets > 35))
2787 retval = lowest_latency;
2788 } else if (bytes/packets > 2000)
2789 retval = bulk_latency;
2790 else if (packets <= 2 && bytes < 512)
2791 retval = lowest_latency;
2793 case bulk_latency: /* 250 usec aka 4000 ints/s */
2794 if (bytes > 25000) {
2796 retval = low_latency;
2797 } else if (bytes < 6000) {
2798 retval = low_latency;
2807 static void e1000_set_itr(struct e1000_adapter *adapter)
2809 struct e1000_hw *hw = &adapter->hw;
2810 uint16_t current_itr;
2811 uint32_t new_itr = adapter->itr;
2813 if (unlikely(hw->mac_type < e1000_82540))
2816 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2817 if (unlikely(adapter->link_speed != SPEED_1000)) {
2823 adapter->tx_itr = e1000_update_itr(adapter,
2825 adapter->total_tx_packets,
2826 adapter->total_tx_bytes);
2827 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2828 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2829 adapter->tx_itr = low_latency;
2831 adapter->rx_itr = e1000_update_itr(adapter,
2833 adapter->total_rx_packets,
2834 adapter->total_rx_bytes);
2835 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2836 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2837 adapter->rx_itr = low_latency;
2839 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2841 switch (current_itr) {
2842 /* counts and packets in update_itr are dependent on these numbers */
2843 case lowest_latency:
2847 new_itr = 20000; /* aka hwitr = ~200 */
2857 if (new_itr != adapter->itr) {
2858 /* this attempts to bias the interrupt rate towards Bulk
2859 * by adding intermediate steps when interrupt rate is
2861 new_itr = new_itr > adapter->itr ?
2862 min(adapter->itr + (new_itr >> 2), new_itr) :
2864 adapter->itr = new_itr;
2865 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
2871 #define E1000_TX_FLAGS_CSUM 0x00000001
2872 #define E1000_TX_FLAGS_VLAN 0x00000002
2873 #define E1000_TX_FLAGS_TSO 0x00000004
2874 #define E1000_TX_FLAGS_IPV4 0x00000008
2875 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2876 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2879 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2880 struct sk_buff *skb)
2882 struct e1000_context_desc *context_desc;
2883 struct e1000_buffer *buffer_info;
2885 uint32_t cmd_length = 0;
2886 uint16_t ipcse = 0, tucse, mss;
2887 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2890 if (skb_is_gso(skb)) {
2891 if (skb_header_cloned(skb)) {
2892 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2897 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2898 mss = skb_shinfo(skb)->gso_size;
2899 if (skb->protocol == htons(ETH_P_IP)) {
2900 struct iphdr *iph = ip_hdr(skb);
2903 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2907 cmd_length = E1000_TXD_CMD_IP;
2908 ipcse = skb_transport_offset(skb) - 1;
2909 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2910 ipv6_hdr(skb)->payload_len = 0;
2911 tcp_hdr(skb)->check =
2912 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2913 &ipv6_hdr(skb)->daddr,
2917 ipcss = skb_network_offset(skb);
2918 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
2919 tucss = skb_transport_offset(skb);
2920 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
2923 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2924 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2926 i = tx_ring->next_to_use;
2927 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2928 buffer_info = &tx_ring->buffer_info[i];
2930 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2931 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2932 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2933 context_desc->upper_setup.tcp_fields.tucss = tucss;
2934 context_desc->upper_setup.tcp_fields.tucso = tucso;
2935 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2936 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2937 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2938 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2940 buffer_info->time_stamp = jiffies;
2941 buffer_info->next_to_watch = i;
2943 if (++i == tx_ring->count) i = 0;
2944 tx_ring->next_to_use = i;
2952 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2953 struct sk_buff *skb)
2955 struct e1000_context_desc *context_desc;
2956 struct e1000_buffer *buffer_info;
2960 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2961 css = skb_transport_offset(skb);
2963 i = tx_ring->next_to_use;
2964 buffer_info = &tx_ring->buffer_info[i];
2965 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2967 context_desc->lower_setup.ip_config = 0;
2968 context_desc->upper_setup.tcp_fields.tucss = css;
2969 context_desc->upper_setup.tcp_fields.tucso =
2970 css + skb->csum_offset;
2971 context_desc->upper_setup.tcp_fields.tucse = 0;
2972 context_desc->tcp_seg_setup.data = 0;
2973 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2975 buffer_info->time_stamp = jiffies;
2976 buffer_info->next_to_watch = i;
2978 if (unlikely(++i == tx_ring->count)) i = 0;
2979 tx_ring->next_to_use = i;
2987 #define E1000_MAX_TXD_PWR 12
2988 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2991 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2992 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2993 unsigned int nr_frags, unsigned int mss)
2995 struct e1000_buffer *buffer_info;
2996 unsigned int len = skb->len;
2997 unsigned int offset = 0, size, count = 0, i;
2999 len -= skb->data_len;
3001 i = tx_ring->next_to_use;
3004 buffer_info = &tx_ring->buffer_info[i];
3005 size = min(len, max_per_txd);
3006 /* Workaround for Controller erratum --
3007 * descriptor for non-tso packet in a linear SKB that follows a
3008 * tso gets written back prematurely before the data is fully
3009 * DMA'd to the controller */
3010 if (!skb->data_len && tx_ring->last_tx_tso &&
3012 tx_ring->last_tx_tso = 0;
3016 /* Workaround for premature desc write-backs
3017 * in TSO mode. Append 4-byte sentinel desc */
3018 if (unlikely(mss && !nr_frags && size == len && size > 8))
3020 /* work-around for errata 10 and it applies
3021 * to all controllers in PCI-X mode
3022 * The fix is to make sure that the first descriptor of a
3023 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
3025 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3026 (size > 2015) && count == 0))
3029 /* Workaround for potential 82544 hang in PCI-X. Avoid
3030 * terminating buffers within evenly-aligned dwords. */
3031 if (unlikely(adapter->pcix_82544 &&
3032 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
3036 buffer_info->length = size;
3038 pci_map_single(adapter->pdev,
3042 buffer_info->time_stamp = jiffies;
3043 buffer_info->next_to_watch = i;
3048 if (unlikely(++i == tx_ring->count)) i = 0;
3051 for (f = 0; f < nr_frags; f++) {
3052 struct skb_frag_struct *frag;
3054 frag = &skb_shinfo(skb)->frags[f];
3056 offset = frag->page_offset;
3059 buffer_info = &tx_ring->buffer_info[i];
3060 size = min(len, max_per_txd);
3061 /* Workaround for premature desc write-backs
3062 * in TSO mode. Append 4-byte sentinel desc */
3063 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
3065 /* Workaround for potential 82544 hang in PCI-X.
3066 * Avoid terminating buffers within evenly-aligned
3068 if (unlikely(adapter->pcix_82544 &&
3069 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3073 buffer_info->length = size;
3075 pci_map_page(adapter->pdev,
3080 buffer_info->time_stamp = jiffies;
3081 buffer_info->next_to_watch = i;
3086 if (unlikely(++i == tx_ring->count)) i = 0;
3090 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3091 tx_ring->buffer_info[i].skb = skb;
3092 tx_ring->buffer_info[first].next_to_watch = i;
3098 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3099 int tx_flags, int count)
3101 struct e1000_tx_desc *tx_desc = NULL;
3102 struct e1000_buffer *buffer_info;
3103 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3106 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
3107 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3109 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3111 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
3112 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3115 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
3116 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3117 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3120 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
3121 txd_lower |= E1000_TXD_CMD_VLE;
3122 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3125 i = tx_ring->next_to_use;
3128 buffer_info = &tx_ring->buffer_info[i];
3129 tx_desc = E1000_TX_DESC(*tx_ring, i);
3130 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3131 tx_desc->lower.data =
3132 cpu_to_le32(txd_lower | buffer_info->length);
3133 tx_desc->upper.data = cpu_to_le32(txd_upper);
3134 if (unlikely(++i == tx_ring->count)) i = 0;
3137 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3139 /* Force memory writes to complete before letting h/w
3140 * know there are new descriptors to fetch. (Only
3141 * applicable for weak-ordered memory model archs,
3142 * such as IA-64). */
3145 tx_ring->next_to_use = i;
3146 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
3147 /* we need this if more than one processor can write to our tail
3148 * at a time, it syncronizes IO on IA64/Altix systems */
3153 * 82547 workaround to avoid controller hang in half-duplex environment.
3154 * The workaround is to avoid queuing a large packet that would span
3155 * the internal Tx FIFO ring boundary by notifying the stack to resend
3156 * the packet at a later time. This gives the Tx FIFO an opportunity to
3157 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3158 * to the beginning of the Tx FIFO.
3161 #define E1000_FIFO_HDR 0x10
3162 #define E1000_82547_PAD_LEN 0x3E0
3165 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
3167 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3168 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
3170 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
3172 if (adapter->link_duplex != HALF_DUPLEX)
3173 goto no_fifo_stall_required;
3175 if (atomic_read(&adapter->tx_fifo_stall))
3178 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
3179 atomic_set(&adapter->tx_fifo_stall, 1);
3183 no_fifo_stall_required:
3184 adapter->tx_fifo_head += skb_fifo_len;
3185 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
3186 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3190 #define MINIMUM_DHCP_PACKET_SIZE 282
3192 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
3194 struct e1000_hw *hw = &adapter->hw;
3195 uint16_t length, offset;
3196 if (vlan_tx_tag_present(skb)) {
3197 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
3198 ( adapter->hw.mng_cookie.status &
3199 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3202 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
3203 struct ethhdr *eth = (struct ethhdr *) skb->data;
3204 if ((htons(ETH_P_IP) == eth->h_proto)) {
3205 const struct iphdr *ip =
3206 (struct iphdr *)((uint8_t *)skb->data+14);
3207 if (IPPROTO_UDP == ip->protocol) {
3208 struct udphdr *udp =
3209 (struct udphdr *)((uint8_t *)ip +
3211 if (ntohs(udp->dest) == 67) {
3212 offset = (uint8_t *)udp + 8 - skb->data;
3213 length = skb->len - offset;
3215 return e1000_mng_write_dhcp_info(hw,
3225 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3227 struct e1000_adapter *adapter = netdev_priv(netdev);
3228 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3230 netif_stop_queue(netdev);
3231 /* Herbert's original patch had:
3232 * smp_mb__after_netif_stop_queue();
3233 * but since that doesn't exist yet, just open code it. */
3236 /* We need to check again in a case another CPU has just
3237 * made room available. */
3238 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3242 netif_start_queue(netdev);
3243 ++adapter->restart_queue;
3247 static int e1000_maybe_stop_tx(struct net_device *netdev,
3248 struct e1000_tx_ring *tx_ring, int size)
3250 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3252 return __e1000_maybe_stop_tx(netdev, size);
3255 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3257 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3259 struct e1000_adapter *adapter = netdev_priv(netdev);
3260 struct e1000_tx_ring *tx_ring;
3261 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3262 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3263 unsigned int tx_flags = 0;
3264 unsigned int len = skb->len - skb->data_len;
3265 unsigned long flags;
3266 unsigned int nr_frags;
3272 /* This goes back to the question of how to logically map a tx queue
3273 * to a flow. Right now, performance is impacted slightly negatively
3274 * if using multiple tx queues. If the stack breaks away from a
3275 * single qdisc implementation, we can look at this again. */
3276 tx_ring = adapter->tx_ring;
3278 if (unlikely(skb->len <= 0)) {
3279 dev_kfree_skb_any(skb);
3280 return NETDEV_TX_OK;
3283 /* 82571 and newer doesn't need the workaround that limited descriptor
3285 if (adapter->hw.mac_type >= e1000_82571)
3288 mss = skb_shinfo(skb)->gso_size;
3289 /* The controller does a simple calculation to
3290 * make sure there is enough room in the FIFO before
3291 * initiating the DMA for each buffer. The calc is:
3292 * 4 = ceil(buffer len/mss). To make sure we don't
3293 * overrun the FIFO, adjust the max buffer len if mss
3297 max_per_txd = min(mss << 2, max_per_txd);
3298 max_txd_pwr = fls(max_per_txd) - 1;
3300 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3301 * points to just header, pull a few bytes of payload from
3302 * frags into skb->data */
3303 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3304 if (skb->data_len && hdr_len == len) {
3305 switch (adapter->hw.mac_type) {
3306 unsigned int pull_size;
3308 /* Make sure we have room to chop off 4 bytes,
3309 * and that the end alignment will work out to
3310 * this hardware's requirements
3311 * NOTE: this is a TSO only workaround
3312 * if end byte alignment not correct move us
3313 * into the next dword */
3314 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
3321 pull_size = min((unsigned int)4, skb->data_len);
3322 if (!__pskb_pull_tail(skb, pull_size)) {
3324 "__pskb_pull_tail failed.\n");
3325 dev_kfree_skb_any(skb);
3326 return NETDEV_TX_OK;
3328 len = skb->len - skb->data_len;
3337 /* reserve a descriptor for the offload context */
3338 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3342 /* Controller Erratum workaround */
3343 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
3346 count += TXD_USE_COUNT(len, max_txd_pwr);
3348 if (adapter->pcix_82544)
3351 /* work-around for errata 10 and it applies to all controllers
3352 * in PCI-X mode, so add one more descriptor to the count
3354 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3358 nr_frags = skb_shinfo(skb)->nr_frags;
3359 for (f = 0; f < nr_frags; f++)
3360 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3362 if (adapter->pcix_82544)
3366 if (adapter->hw.tx_pkt_filtering &&
3367 (adapter->hw.mac_type == e1000_82573))
3368 e1000_transfer_dhcp_info(adapter, skb);
3370 if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags))
3371 /* Collision - tell upper layer to requeue */
3372 return NETDEV_TX_LOCKED;
3374 /* need: count + 2 desc gap to keep tail from touching
3375 * head, otherwise try next time */
3376 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
3377 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3378 return NETDEV_TX_BUSY;
3381 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3382 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3383 netif_stop_queue(netdev);
3384 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3385 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3386 return NETDEV_TX_BUSY;
3390 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3391 tx_flags |= E1000_TX_FLAGS_VLAN;
3392 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3395 first = tx_ring->next_to_use;
3397 tso = e1000_tso(adapter, tx_ring, skb);
3399 dev_kfree_skb_any(skb);
3400 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3401 return NETDEV_TX_OK;
3405 tx_ring->last_tx_tso = 1;
3406 tx_flags |= E1000_TX_FLAGS_TSO;
3407 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3408 tx_flags |= E1000_TX_FLAGS_CSUM;
3410 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3411 * 82571 hardware supports TSO capabilities for IPv6 as well...
3412 * no longer assume, we must. */
3413 if (likely(skb->protocol == htons(ETH_P_IP)))
3414 tx_flags |= E1000_TX_FLAGS_IPV4;
3416 e1000_tx_queue(adapter, tx_ring, tx_flags,
3417 e1000_tx_map(adapter, tx_ring, skb, first,
3418 max_per_txd, nr_frags, mss));
3420 netdev->trans_start = jiffies;
3422 /* Make sure there is space in the ring for the next send. */
3423 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3425 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3426 return NETDEV_TX_OK;
3430 * e1000_tx_timeout - Respond to a Tx Hang
3431 * @netdev: network interface device structure
3435 e1000_tx_timeout(struct net_device *netdev)
3437 struct e1000_adapter *adapter = netdev_priv(netdev);
3439 /* Do the reset outside of interrupt context */
3440 adapter->tx_timeout_count++;
3441 schedule_work(&adapter->reset_task);
3445 e1000_reset_task(struct work_struct *work)
3447 struct e1000_adapter *adapter =
3448 container_of(work, struct e1000_adapter, reset_task);
3450 e1000_reinit_locked(adapter);
3454 * e1000_get_stats - Get System Network Statistics
3455 * @netdev: network interface device structure
3457 * Returns the address of the device statistics structure.
3458 * The statistics are actually updated from the timer callback.
3461 static struct net_device_stats *
3462 e1000_get_stats(struct net_device *netdev)
3464 struct e1000_adapter *adapter = netdev_priv(netdev);
3466 /* only return the current stats */
3467 return &adapter->net_stats;
3471 * e1000_change_mtu - Change the Maximum Transfer Unit
3472 * @netdev: network interface device structure
3473 * @new_mtu: new value for maximum frame size
3475 * Returns 0 on success, negative on failure
3479 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3481 struct e1000_adapter *adapter = netdev_priv(netdev);
3482 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3483 uint16_t eeprom_data = 0;
3485 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3486 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3487 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3491 /* Adapter-specific max frame size limits. */
3492 switch (adapter->hw.mac_type) {
3493 case e1000_undefined ... e1000_82542_rev2_1:
3495 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3496 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3501 /* Jumbo Frames not supported if:
3502 * - this is not an 82573L device
3503 * - ASPM is enabled in any way (0x1A bits 3:2) */
3504 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3506 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3507 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3508 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3510 "Jumbo Frames not supported.\n");
3515 /* ERT will be enabled later to enable wire speed receives */
3517 /* fall through to get support */
3520 case e1000_80003es2lan:
3521 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3522 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3523 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3528 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3532 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3533 * means we reserve 2 more, this pushes us to allocate from the next
3535 * i.e. RXBUFFER_2048 --> size-4096 slab */
3537 if (max_frame <= E1000_RXBUFFER_256)
3538 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3539 else if (max_frame <= E1000_RXBUFFER_512)
3540 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3541 else if (max_frame <= E1000_RXBUFFER_1024)
3542 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3543 else if (max_frame <= E1000_RXBUFFER_2048)
3544 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3545 else if (max_frame <= E1000_RXBUFFER_4096)
3546 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3547 else if (max_frame <= E1000_RXBUFFER_8192)
3548 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3549 else if (max_frame <= E1000_RXBUFFER_16384)
3550 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3552 /* adjust allocation if LPE protects us, and we aren't using SBP */
3553 if (!adapter->hw.tbi_compatibility_on &&
3554 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3555 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3556 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3558 netdev->mtu = new_mtu;
3559 adapter->hw.max_frame_size = max_frame;
3561 if (netif_running(netdev))
3562 e1000_reinit_locked(adapter);
3568 * e1000_update_stats - Update the board statistics counters
3569 * @adapter: board private structure
3573 e1000_update_stats(struct e1000_adapter *adapter)
3575 struct e1000_hw *hw = &adapter->hw;
3576 struct pci_dev *pdev = adapter->pdev;
3577 unsigned long flags;
3580 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3583 * Prevent stats update while adapter is being reset, or if the pci
3584 * connection is down.
3586 if (adapter->link_speed == 0)
3588 if (pci_channel_offline(pdev))
3591 spin_lock_irqsave(&adapter->stats_lock, flags);
3593 /* these counters are modified from e1000_adjust_tbi_stats,
3594 * called from the interrupt context, so they must only
3595 * be written while holding adapter->stats_lock
3598 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3599 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3600 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3601 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3602 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3603 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3604 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3606 if (adapter->hw.mac_type != e1000_ich8lan) {
3607 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3608 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3609 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3610 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3611 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3612 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3615 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3616 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3617 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3618 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3619 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3620 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3621 adapter->stats.dc += E1000_READ_REG(hw, DC);
3622 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3623 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3624 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3625 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3626 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3627 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3628 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3629 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3630 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3631 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3632 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3633 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3634 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3635 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3636 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3637 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3638 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3639 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3640 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3642 if (adapter->hw.mac_type != e1000_ich8lan) {
3643 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3644 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3645 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3646 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3647 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3648 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3651 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3652 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3654 /* used for adaptive IFS */
3656 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3657 adapter->stats.tpt += hw->tx_packet_delta;
3658 hw->collision_delta = E1000_READ_REG(hw, COLC);
3659 adapter->stats.colc += hw->collision_delta;
3661 if (hw->mac_type >= e1000_82543) {
3662 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3663 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3664 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3665 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3666 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3667 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3669 if (hw->mac_type > e1000_82547_rev_2) {
3670 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3671 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3673 if (adapter->hw.mac_type != e1000_ich8lan) {
3674 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3675 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3676 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3677 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3678 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3679 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3680 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3684 /* Fill out the OS statistics structure */
3685 adapter->net_stats.rx_packets = adapter->stats.gprc;
3686 adapter->net_stats.tx_packets = adapter->stats.gptc;
3687 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3688 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3689 adapter->net_stats.multicast = adapter->stats.mprc;
3690 adapter->net_stats.collisions = adapter->stats.colc;
3694 /* RLEC on some newer hardware can be incorrect so build
3695 * our own version based on RUC and ROC */
3696 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3697 adapter->stats.crcerrs + adapter->stats.algnerrc +
3698 adapter->stats.ruc + adapter->stats.roc +
3699 adapter->stats.cexterr;
3700 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3701 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3702 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3703 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3704 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3707 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3708 adapter->net_stats.tx_errors = adapter->stats.txerrc;
3709 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3710 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3711 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3712 if (adapter->hw.bad_tx_carr_stats_fd &&
3713 adapter->link_duplex == FULL_DUPLEX) {
3714 adapter->net_stats.tx_carrier_errors = 0;
3715 adapter->stats.tncrs = 0;
3718 /* Tx Dropped needs to be maintained elsewhere */
3721 if (hw->media_type == e1000_media_type_copper) {
3722 if ((adapter->link_speed == SPEED_1000) &&
3723 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3724 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3725 adapter->phy_stats.idle_errors += phy_tmp;
3728 if ((hw->mac_type <= e1000_82546) &&
3729 (hw->phy_type == e1000_phy_m88) &&
3730 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3731 adapter->phy_stats.receive_errors += phy_tmp;
3734 /* Management Stats */
3735 if (adapter->hw.has_smbus) {
3736 adapter->stats.mgptc += E1000_READ_REG(hw, MGTPTC);
3737 adapter->stats.mgprc += E1000_READ_REG(hw, MGTPRC);
3738 adapter->stats.mgpdc += E1000_READ_REG(hw, MGTPDC);
3741 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3745 * e1000_intr_msi - Interrupt Handler
3746 * @irq: interrupt number
3747 * @data: pointer to a network interface device structure
3751 e1000_intr_msi(int irq, void *data)
3753 struct net_device *netdev = data;
3754 struct e1000_adapter *adapter = netdev_priv(netdev);
3755 struct e1000_hw *hw = &adapter->hw;
3756 #ifndef CONFIG_E1000_NAPI
3759 uint32_t icr = E1000_READ_REG(hw, ICR);
3761 #ifdef CONFIG_E1000_NAPI
3762 /* read ICR disables interrupts using IAM, so keep up with our
3763 * enable/disable accounting */
3764 atomic_inc(&adapter->irq_sem);
3766 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3767 hw->get_link_status = 1;
3768 /* 80003ES2LAN workaround-- For packet buffer work-around on
3769 * link down event; disable receives here in the ISR and reset
3770 * adapter in watchdog */
3771 if (netif_carrier_ok(netdev) &&
3772 (adapter->hw.mac_type == e1000_80003es2lan)) {
3773 /* disable receives */
3774 uint32_t rctl = E1000_READ_REG(hw, RCTL);
3775 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3777 /* guard against interrupt when we're going down */
3778 if (!test_bit(__E1000_DOWN, &adapter->flags))
3779 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3782 #ifdef CONFIG_E1000_NAPI
3783 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
3784 adapter->total_tx_bytes = 0;
3785 adapter->total_tx_packets = 0;
3786 adapter->total_rx_bytes = 0;
3787 adapter->total_rx_packets = 0;
3788 __netif_rx_schedule(netdev, &adapter->napi);
3790 e1000_irq_enable(adapter);
3792 adapter->total_tx_bytes = 0;
3793 adapter->total_rx_bytes = 0;
3794 adapter->total_tx_packets = 0;
3795 adapter->total_rx_packets = 0;
3797 for (i = 0; i < E1000_MAX_INTR; i++)
3798 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3799 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3802 if (likely(adapter->itr_setting & 3))
3803 e1000_set_itr(adapter);
3810 * e1000_intr - Interrupt Handler
3811 * @irq: interrupt number
3812 * @data: pointer to a network interface device structure
3816 e1000_intr(int irq, void *data)
3818 struct net_device *netdev = data;
3819 struct e1000_adapter *adapter = netdev_priv(netdev);
3820 struct e1000_hw *hw = &adapter->hw;
3821 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
3822 #ifndef CONFIG_E1000_NAPI
3826 return IRQ_NONE; /* Not our interrupt */
3828 #ifdef CONFIG_E1000_NAPI
3829 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3830 * not set, then the adapter didn't send an interrupt */
3831 if (unlikely(hw->mac_type >= e1000_82571 &&
3832 !(icr & E1000_ICR_INT_ASSERTED)))
3835 /* Interrupt Auto-Mask...upon reading ICR,
3836 * interrupts are masked. No need for the
3837 * IMC write, but it does mean we should
3838 * account for it ASAP. */
3839 if (likely(hw->mac_type >= e1000_82571))
3840 atomic_inc(&adapter->irq_sem);
3843 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3844 hw->get_link_status = 1;
3845 /* 80003ES2LAN workaround--
3846 * For packet buffer work-around on link down event;
3847 * disable receives here in the ISR and
3848 * reset adapter in watchdog
3850 if (netif_carrier_ok(netdev) &&
3851 (adapter->hw.mac_type == e1000_80003es2lan)) {
3852 /* disable receives */
3853 rctl = E1000_READ_REG(hw, RCTL);
3854 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3856 /* guard against interrupt when we're going down */
3857 if (!test_bit(__E1000_DOWN, &adapter->flags))
3858 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3861 #ifdef CONFIG_E1000_NAPI
3862 if (unlikely(hw->mac_type < e1000_82571)) {
3863 /* disable interrupts, without the synchronize_irq bit */
3864 atomic_inc(&adapter->irq_sem);
3865 E1000_WRITE_REG(hw, IMC, ~0);
3866 E1000_WRITE_FLUSH(hw);
3868 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
3869 adapter->total_tx_bytes = 0;
3870 adapter->total_tx_packets = 0;
3871 adapter->total_rx_bytes = 0;
3872 adapter->total_rx_packets = 0;
3873 __netif_rx_schedule(netdev, &adapter->napi);
3875 /* this really should not happen! if it does it is basically a
3876 * bug, but not a hard error, so enable ints and continue */
3877 e1000_irq_enable(adapter);
3879 /* Writing IMC and IMS is needed for 82547.
3880 * Due to Hub Link bus being occupied, an interrupt
3881 * de-assertion message is not able to be sent.
3882 * When an interrupt assertion message is generated later,
3883 * two messages are re-ordered and sent out.
3884 * That causes APIC to think 82547 is in de-assertion
3885 * state, while 82547 is in assertion state, resulting
3886 * in dead lock. Writing IMC forces 82547 into
3887 * de-assertion state.
3889 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
3890 atomic_inc(&adapter->irq_sem);
3891 E1000_WRITE_REG(hw, IMC, ~0);
3894 adapter->total_tx_bytes = 0;
3895 adapter->total_rx_bytes = 0;
3896 adapter->total_tx_packets = 0;
3897 adapter->total_rx_packets = 0;
3899 for (i = 0; i < E1000_MAX_INTR; i++)
3900 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3901 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3904 if (likely(adapter->itr_setting & 3))
3905 e1000_set_itr(adapter);
3907 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3908 e1000_irq_enable(adapter);
3914 #ifdef CONFIG_E1000_NAPI
3916 * e1000_clean - NAPI Rx polling callback
3917 * @adapter: board private structure
3921 e1000_clean(struct napi_struct *napi, int budget)
3923 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
3924 struct net_device *poll_dev = adapter->netdev;
3925 int tx_cleaned = 0, work_done = 0;
3927 /* Must NOT use netdev_priv macro here. */
3928 adapter = poll_dev->priv;
3930 /* Keep link state information with original netdev */
3931 if (!netif_carrier_ok(poll_dev))
3934 /* e1000_clean is called per-cpu. This lock protects
3935 * tx_ring[0] from being cleaned by multiple cpus
3936 * simultaneously. A failure obtaining the lock means
3937 * tx_ring[0] is currently being cleaned anyway. */
3938 if (spin_trylock(&adapter->tx_queue_lock)) {
3939 tx_cleaned = e1000_clean_tx_irq(adapter,
3940 &adapter->tx_ring[0]);
3941 spin_unlock(&adapter->tx_queue_lock);
3944 adapter->clean_rx(adapter, &adapter->rx_ring[0],
3945 &work_done, budget);
3947 /* If no Tx and not enough Rx work done, exit the polling mode */
3948 if ((!tx_cleaned && (work_done < budget)) ||
3949 !netif_running(poll_dev)) {
3951 if (likely(adapter->itr_setting & 3))
3952 e1000_set_itr(adapter);
3953 netif_rx_complete(poll_dev, napi);
3954 e1000_irq_enable(adapter);
3962 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3963 * @adapter: board private structure
3967 e1000_clean_tx_irq(struct e1000_adapter *adapter,
3968 struct e1000_tx_ring *tx_ring)
3970 struct net_device *netdev = adapter->netdev;
3971 struct e1000_tx_desc *tx_desc, *eop_desc;
3972 struct e1000_buffer *buffer_info;
3973 unsigned int i, eop;
3974 #ifdef CONFIG_E1000_NAPI
3975 unsigned int count = 0;
3977 boolean_t cleaned = FALSE;
3978 unsigned int total_tx_bytes=0, total_tx_packets=0;
3980 i = tx_ring->next_to_clean;
3981 eop = tx_ring->buffer_info[i].next_to_watch;
3982 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3984 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
3985 for (cleaned = FALSE; !cleaned; ) {
3986 tx_desc = E1000_TX_DESC(*tx_ring, i);
3987 buffer_info = &tx_ring->buffer_info[i];
3988 cleaned = (i == eop);
3991 struct sk_buff *skb = buffer_info->skb;
3992 unsigned int segs, bytecount;
3993 segs = skb_shinfo(skb)->gso_segs ?: 1;
3994 /* multiply data chunks by size of headers */
3995 bytecount = ((segs - 1) * skb_headlen(skb)) +
3997 total_tx_packets += segs;
3998 total_tx_bytes += bytecount;
4000 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
4001 tx_desc->upper.data = 0;
4003 if (unlikely(++i == tx_ring->count)) i = 0;
4006 eop = tx_ring->buffer_info[i].next_to_watch;
4007 eop_desc = E1000_TX_DESC(*tx_ring, eop);
4008 #ifdef CONFIG_E1000_NAPI
4009 #define E1000_TX_WEIGHT 64
4010 /* weight of a sort for tx, to avoid endless transmit cleanup */
4011 if (count++ == E1000_TX_WEIGHT) break;
4015 tx_ring->next_to_clean = i;
4017 #define TX_WAKE_THRESHOLD 32
4018 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
4019 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
4020 /* Make sure that anybody stopping the queue after this
4021 * sees the new next_to_clean.
4024 if (netif_queue_stopped(netdev)) {
4025 netif_wake_queue(netdev);
4026 ++adapter->restart_queue;
4030 if (adapter->detect_tx_hung) {
4031 /* Detect a transmit hang in hardware, this serializes the
4032 * check with the clearing of time_stamp and movement of i */
4033 adapter->detect_tx_hung = FALSE;
4034 if (tx_ring->buffer_info[eop].dma &&
4035 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
4036 (adapter->tx_timeout_factor * HZ))
4037 && !(E1000_READ_REG(&adapter->hw, STATUS) &
4038 E1000_STATUS_TXOFF)) {
4040 /* detected Tx unit hang */
4041 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
4045 " next_to_use <%x>\n"
4046 " next_to_clean <%x>\n"
4047 "buffer_info[next_to_clean]\n"
4048 " time_stamp <%lx>\n"
4049 " next_to_watch <%x>\n"
4051 " next_to_watch.status <%x>\n",
4052 (unsigned long)((tx_ring - adapter->tx_ring) /
4053 sizeof(struct e1000_tx_ring)),
4054 readl(adapter->hw.hw_addr + tx_ring->tdh),
4055 readl(adapter->hw.hw_addr + tx_ring->tdt),
4056 tx_ring->next_to_use,
4057 tx_ring->next_to_clean,
4058 tx_ring->buffer_info[eop].time_stamp,
4061 eop_desc->upper.fields.status);
4062 netif_stop_queue(netdev);
4065 adapter->total_tx_bytes += total_tx_bytes;
4066 adapter->total_tx_packets += total_tx_packets;
4071 * e1000_rx_checksum - Receive Checksum Offload for 82543
4072 * @adapter: board private structure
4073 * @status_err: receive descriptor status and error fields
4074 * @csum: receive descriptor csum field
4075 * @sk_buff: socket buffer with received data
4079 e1000_rx_checksum(struct e1000_adapter *adapter,
4080 uint32_t status_err, uint32_t csum,
4081 struct sk_buff *skb)
4083 uint16_t status = (uint16_t)status_err;
4084 uint8_t errors = (uint8_t)(status_err >> 24);
4085 skb->ip_summed = CHECKSUM_NONE;
4087 /* 82543 or newer only */
4088 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
4089 /* Ignore Checksum bit is set */
4090 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
4091 /* TCP/UDP checksum error bit is set */
4092 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
4093 /* let the stack verify checksum errors */
4094 adapter->hw_csum_err++;
4097 /* TCP/UDP Checksum has not been calculated */
4098 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
4099 if (!(status & E1000_RXD_STAT_TCPCS))
4102 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
4105 /* It must be a TCP or UDP packet with a valid checksum */
4106 if (likely(status & E1000_RXD_STAT_TCPCS)) {
4107 /* TCP checksum is good */
4108 skb->ip_summed = CHECKSUM_UNNECESSARY;
4109 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
4110 /* IP fragment with UDP payload */
4111 /* Hardware complements the payload checksum, so we undo it
4112 * and then put the value in host order for further stack use.
4114 csum = ntohl(csum ^ 0xFFFF);
4116 skb->ip_summed = CHECKSUM_COMPLETE;
4118 adapter->hw_csum_good++;
4122 * e1000_clean_rx_irq - Send received data up the network stack; legacy
4123 * @adapter: board private structure
4127 #ifdef CONFIG_E1000_NAPI
4128 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4129 struct e1000_rx_ring *rx_ring,
4130 int *work_done, int work_to_do)
4132 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4133 struct e1000_rx_ring *rx_ring)
4136 struct net_device *netdev = adapter->netdev;
4137 struct pci_dev *pdev = adapter->pdev;
4138 struct e1000_rx_desc *rx_desc, *next_rxd;
4139 struct e1000_buffer *buffer_info, *next_buffer;
4140 unsigned long flags;
4144 int cleaned_count = 0;
4145 boolean_t cleaned = FALSE;
4146 unsigned int total_rx_bytes=0, total_rx_packets=0;
4148 i = rx_ring->next_to_clean;
4149 rx_desc = E1000_RX_DESC(*rx_ring, i);
4150 buffer_info = &rx_ring->buffer_info[i];
4152 while (rx_desc->status & E1000_RXD_STAT_DD) {
4153 struct sk_buff *skb;
4156 #ifdef CONFIG_E1000_NAPI
4157 if (*work_done >= work_to_do)
4161 status = rx_desc->status;
4162 skb = buffer_info->skb;
4163 buffer_info->skb = NULL;
4165 prefetch(skb->data - NET_IP_ALIGN);
4167 if (++i == rx_ring->count) i = 0;
4168 next_rxd = E1000_RX_DESC(*rx_ring, i);
4171 next_buffer = &rx_ring->buffer_info[i];
4175 pci_unmap_single(pdev,
4177 buffer_info->length,
4178 PCI_DMA_FROMDEVICE);
4180 length = le16_to_cpu(rx_desc->length);
4182 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4183 /* All receives must fit into a single buffer */
4184 E1000_DBG("%s: Receive packet consumed multiple"
4185 " buffers\n", netdev->name);
4187 buffer_info->skb = skb;
4191 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
4192 last_byte = *(skb->data + length - 1);
4193 if (TBI_ACCEPT(&adapter->hw, status,
4194 rx_desc->errors, length, last_byte)) {
4195 spin_lock_irqsave(&adapter->stats_lock, flags);
4196 e1000_tbi_adjust_stats(&adapter->hw,
4199 spin_unlock_irqrestore(&adapter->stats_lock,
4204 buffer_info->skb = skb;
4209 /* adjust length to remove Ethernet CRC, this must be
4210 * done after the TBI_ACCEPT workaround above */
4213 /* probably a little skewed due to removing CRC */
4214 total_rx_bytes += length;
4217 /* code added for copybreak, this should improve
4218 * performance for small packets with large amounts
4219 * of reassembly being done in the stack */
4220 if (length < copybreak) {
4221 struct sk_buff *new_skb =
4222 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
4224 skb_reserve(new_skb, NET_IP_ALIGN);
4225 skb_copy_to_linear_data_offset(new_skb,
4231 /* save the skb in buffer_info as good */
4232 buffer_info->skb = skb;
4235 /* else just continue with the old one */
4237 /* end copybreak code */
4238 skb_put(skb, length);
4240 /* Receive Checksum Offload */
4241 e1000_rx_checksum(adapter,
4242 (uint32_t)(status) |
4243 ((uint32_t)(rx_desc->errors) << 24),
4244 le16_to_cpu(rx_desc->csum), skb);
4246 skb->protocol = eth_type_trans(skb, netdev);
4247 #ifdef CONFIG_E1000_NAPI
4248 if (unlikely(adapter->vlgrp &&
4249 (status & E1000_RXD_STAT_VP))) {
4250 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4251 le16_to_cpu(rx_desc->special) &
4252 E1000_RXD_SPC_VLAN_MASK);
4254 netif_receive_skb(skb);
4256 #else /* CONFIG_E1000_NAPI */
4257 if (unlikely(adapter->vlgrp &&
4258 (status & E1000_RXD_STAT_VP))) {
4259 vlan_hwaccel_rx(skb, adapter->vlgrp,
4260 le16_to_cpu(rx_desc->special) &
4261 E1000_RXD_SPC_VLAN_MASK);
4265 #endif /* CONFIG_E1000_NAPI */
4266 netdev->last_rx = jiffies;
4269 rx_desc->status = 0;
4271 /* return some buffers to hardware, one at a time is too slow */
4272 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4273 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4277 /* use prefetched values */
4279 buffer_info = next_buffer;
4281 rx_ring->next_to_clean = i;
4283 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4285 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4287 adapter->total_rx_packets += total_rx_packets;
4288 adapter->total_rx_bytes += total_rx_bytes;
4293 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
4294 * @adapter: board private structure
4298 #ifdef CONFIG_E1000_NAPI
4299 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4300 struct e1000_rx_ring *rx_ring,
4301 int *work_done, int work_to_do)
4303 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4304 struct e1000_rx_ring *rx_ring)
4307 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
4308 struct net_device *netdev = adapter->netdev;
4309 struct pci_dev *pdev = adapter->pdev;
4310 struct e1000_buffer *buffer_info, *next_buffer;
4311 struct e1000_ps_page *ps_page;
4312 struct e1000_ps_page_dma *ps_page_dma;
4313 struct sk_buff *skb;
4315 uint32_t length, staterr;
4316 int cleaned_count = 0;
4317 boolean_t cleaned = FALSE;
4318 unsigned int total_rx_bytes=0, total_rx_packets=0;
4320 i = rx_ring->next_to_clean;
4321 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4322 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4323 buffer_info = &rx_ring->buffer_info[i];
4325 while (staterr & E1000_RXD_STAT_DD) {
4326 ps_page = &rx_ring->ps_page[i];
4327 ps_page_dma = &rx_ring->ps_page_dma[i];
4328 #ifdef CONFIG_E1000_NAPI
4329 if (unlikely(*work_done >= work_to_do))
4333 skb = buffer_info->skb;
4335 /* in the packet split case this is header only */
4336 prefetch(skb->data - NET_IP_ALIGN);
4338 if (++i == rx_ring->count) i = 0;
4339 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
4342 next_buffer = &rx_ring->buffer_info[i];
4346 pci_unmap_single(pdev, buffer_info->dma,
4347 buffer_info->length,
4348 PCI_DMA_FROMDEVICE);
4350 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
4351 E1000_DBG("%s: Packet Split buffers didn't pick up"
4352 " the full packet\n", netdev->name);
4353 dev_kfree_skb_irq(skb);
4357 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
4358 dev_kfree_skb_irq(skb);
4362 length = le16_to_cpu(rx_desc->wb.middle.length0);
4364 if (unlikely(!length)) {
4365 E1000_DBG("%s: Last part of the packet spanning"
4366 " multiple descriptors\n", netdev->name);
4367 dev_kfree_skb_irq(skb);
4372 skb_put(skb, length);
4375 /* this looks ugly, but it seems compiler issues make it
4376 more efficient than reusing j */
4377 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4379 /* page alloc/put takes too long and effects small packet
4380 * throughput, so unsplit small packets and save the alloc/put*/
4381 if (l1 && (l1 <= copybreak) && ((length + l1) <= adapter->rx_ps_bsize0)) {
4383 /* there is no documentation about how to call
4384 * kmap_atomic, so we can't hold the mapping
4386 pci_dma_sync_single_for_cpu(pdev,
4387 ps_page_dma->ps_page_dma[0],
4389 PCI_DMA_FROMDEVICE);
4390 vaddr = kmap_atomic(ps_page->ps_page[0],
4391 KM_SKB_DATA_SOFTIRQ);
4392 memcpy(skb_tail_pointer(skb), vaddr, l1);
4393 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4394 pci_dma_sync_single_for_device(pdev,
4395 ps_page_dma->ps_page_dma[0],
4396 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4397 /* remove the CRC */
4404 for (j = 0; j < adapter->rx_ps_pages; j++) {
4405 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
4407 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4408 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4409 ps_page_dma->ps_page_dma[j] = 0;
4410 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4412 ps_page->ps_page[j] = NULL;
4414 skb->data_len += length;
4415 skb->truesize += length;
4418 /* strip the ethernet crc, problem is we're using pages now so
4419 * this whole operation can get a little cpu intensive */
4420 pskb_trim(skb, skb->len - 4);
4423 total_rx_bytes += skb->len;
4426 e1000_rx_checksum(adapter, staterr,
4427 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
4428 skb->protocol = eth_type_trans(skb, netdev);
4430 if (likely(rx_desc->wb.upper.header_status &
4431 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
4432 adapter->rx_hdr_split++;
4433 #ifdef CONFIG_E1000_NAPI
4434 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4435 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4436 le16_to_cpu(rx_desc->wb.middle.vlan) &
4437 E1000_RXD_SPC_VLAN_MASK);
4439 netif_receive_skb(skb);
4441 #else /* CONFIG_E1000_NAPI */
4442 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4443 vlan_hwaccel_rx(skb, adapter->vlgrp,
4444 le16_to_cpu(rx_desc->wb.middle.vlan) &
4445 E1000_RXD_SPC_VLAN_MASK);
4449 #endif /* CONFIG_E1000_NAPI */
4450 netdev->last_rx = jiffies;
4453 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
4454 buffer_info->skb = NULL;
4456 /* return some buffers to hardware, one at a time is too slow */
4457 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4458 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4462 /* use prefetched values */
4464 buffer_info = next_buffer;
4466 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4468 rx_ring->next_to_clean = i;
4470 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4472 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4474 adapter->total_rx_packets += total_rx_packets;
4475 adapter->total_rx_bytes += total_rx_bytes;
4480 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4481 * @adapter: address of board private structure
4485 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4486 struct e1000_rx_ring *rx_ring,
4489 struct net_device *netdev = adapter->netdev;
4490 struct pci_dev *pdev = adapter->pdev;
4491 struct e1000_rx_desc *rx_desc;
4492 struct e1000_buffer *buffer_info;
4493 struct sk_buff *skb;
4495 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4497 i = rx_ring->next_to_use;
4498 buffer_info = &rx_ring->buffer_info[i];
4500 while (cleaned_count--) {
4501 skb = buffer_info->skb;
4507 skb = netdev_alloc_skb(netdev, bufsz);
4508 if (unlikely(!skb)) {
4509 /* Better luck next round */
4510 adapter->alloc_rx_buff_failed++;
4514 /* Fix for errata 23, can't cross 64kB boundary */
4515 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4516 struct sk_buff *oldskb = skb;
4517 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4518 "at %p\n", bufsz, skb->data);
4519 /* Try again, without freeing the previous */
4520 skb = netdev_alloc_skb(netdev, bufsz);
4521 /* Failed allocation, critical failure */
4523 dev_kfree_skb(oldskb);
4527 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4530 dev_kfree_skb(oldskb);
4531 break; /* while !buffer_info->skb */
4534 /* Use new allocation */
4535 dev_kfree_skb(oldskb);
4537 /* Make buffer alignment 2 beyond a 16 byte boundary
4538 * this will result in a 16 byte aligned IP header after
4539 * the 14 byte MAC header is removed
4541 skb_reserve(skb, NET_IP_ALIGN);
4543 buffer_info->skb = skb;
4544 buffer_info->length = adapter->rx_buffer_len;
4546 buffer_info->dma = pci_map_single(pdev,
4548 adapter->rx_buffer_len,
4549 PCI_DMA_FROMDEVICE);
4551 /* Fix for errata 23, can't cross 64kB boundary */
4552 if (!e1000_check_64k_bound(adapter,
4553 (void *)(unsigned long)buffer_info->dma,
4554 adapter->rx_buffer_len)) {
4555 DPRINTK(RX_ERR, ERR,
4556 "dma align check failed: %u bytes at %p\n",
4557 adapter->rx_buffer_len,
4558 (void *)(unsigned long)buffer_info->dma);
4560 buffer_info->skb = NULL;
4562 pci_unmap_single(pdev, buffer_info->dma,
4563 adapter->rx_buffer_len,
4564 PCI_DMA_FROMDEVICE);
4566 break; /* while !buffer_info->skb */
4568 rx_desc = E1000_RX_DESC(*rx_ring, i);
4569 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4571 if (unlikely(++i == rx_ring->count))
4573 buffer_info = &rx_ring->buffer_info[i];
4576 if (likely(rx_ring->next_to_use != i)) {
4577 rx_ring->next_to_use = i;
4578 if (unlikely(i-- == 0))
4579 i = (rx_ring->count - 1);
4581 /* Force memory writes to complete before letting h/w
4582 * know there are new descriptors to fetch. (Only
4583 * applicable for weak-ordered memory model archs,
4584 * such as IA-64). */
4586 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4591 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4592 * @adapter: address of board private structure
4596 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4597 struct e1000_rx_ring *rx_ring,
4600 struct net_device *netdev = adapter->netdev;
4601 struct pci_dev *pdev = adapter->pdev;
4602 union e1000_rx_desc_packet_split *rx_desc;
4603 struct e1000_buffer *buffer_info;
4604 struct e1000_ps_page *ps_page;
4605 struct e1000_ps_page_dma *ps_page_dma;
4606 struct sk_buff *skb;
4609 i = rx_ring->next_to_use;
4610 buffer_info = &rx_ring->buffer_info[i];
4611 ps_page = &rx_ring->ps_page[i];
4612 ps_page_dma = &rx_ring->ps_page_dma[i];
4614 while (cleaned_count--) {
4615 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4617 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
4618 if (j < adapter->rx_ps_pages) {
4619 if (likely(!ps_page->ps_page[j])) {
4620 ps_page->ps_page[j] =
4621 alloc_page(GFP_ATOMIC);
4622 if (unlikely(!ps_page->ps_page[j])) {
4623 adapter->alloc_rx_buff_failed++;
4626 ps_page_dma->ps_page_dma[j] =
4628 ps_page->ps_page[j],
4630 PCI_DMA_FROMDEVICE);
4632 /* Refresh the desc even if buffer_addrs didn't
4633 * change because each write-back erases
4636 rx_desc->read.buffer_addr[j+1] =
4637 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4639 rx_desc->read.buffer_addr[j+1] = ~0;
4642 skb = netdev_alloc_skb(netdev,
4643 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4645 if (unlikely(!skb)) {
4646 adapter->alloc_rx_buff_failed++;
4650 /* Make buffer alignment 2 beyond a 16 byte boundary
4651 * this will result in a 16 byte aligned IP header after
4652 * the 14 byte MAC header is removed
4654 skb_reserve(skb, NET_IP_ALIGN);
4656 buffer_info->skb = skb;
4657 buffer_info->length = adapter->rx_ps_bsize0;
4658 buffer_info->dma = pci_map_single(pdev, skb->data,
4659 adapter->rx_ps_bsize0,
4660 PCI_DMA_FROMDEVICE);
4662 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4664 if (unlikely(++i == rx_ring->count)) i = 0;
4665 buffer_info = &rx_ring->buffer_info[i];
4666 ps_page = &rx_ring->ps_page[i];
4667 ps_page_dma = &rx_ring->ps_page_dma[i];
4671 if (likely(rx_ring->next_to_use != i)) {
4672 rx_ring->next_to_use = i;
4673 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4675 /* Force memory writes to complete before letting h/w
4676 * know there are new descriptors to fetch. (Only
4677 * applicable for weak-ordered memory model archs,
4678 * such as IA-64). */
4680 /* Hardware increments by 16 bytes, but packet split
4681 * descriptors are 32 bytes...so we increment tail
4684 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4689 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4694 e1000_smartspeed(struct e1000_adapter *adapter)
4696 uint16_t phy_status;
4699 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4700 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4703 if (adapter->smartspeed == 0) {
4704 /* If Master/Slave config fault is asserted twice,
4705 * we assume back-to-back */
4706 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4707 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4708 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4709 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4710 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4711 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4712 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4713 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4715 adapter->smartspeed++;
4716 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4717 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4719 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4720 MII_CR_RESTART_AUTO_NEG);
4721 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4726 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4727 /* If still no link, perhaps using 2/3 pair cable */
4728 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4729 phy_ctrl |= CR_1000T_MS_ENABLE;
4730 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4731 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4732 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4733 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4734 MII_CR_RESTART_AUTO_NEG);
4735 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4738 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4739 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4740 adapter->smartspeed = 0;
4751 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4757 return e1000_mii_ioctl(netdev, ifr, cmd);
4771 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4773 struct e1000_adapter *adapter = netdev_priv(netdev);
4774 struct mii_ioctl_data *data = if_mii(ifr);
4778 unsigned long flags;
4780 if (adapter->hw.media_type != e1000_media_type_copper)
4785 data->phy_id = adapter->hw.phy_addr;
4788 if (!capable(CAP_NET_ADMIN))
4790 spin_lock_irqsave(&adapter->stats_lock, flags);
4791 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4793 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4796 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4799 if (!capable(CAP_NET_ADMIN))
4801 if (data->reg_num & ~(0x1F))
4803 mii_reg = data->val_in;
4804 spin_lock_irqsave(&adapter->stats_lock, flags);
4805 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
4807 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4810 if (adapter->hw.media_type == e1000_media_type_copper) {
4811 switch (data->reg_num) {
4813 if (mii_reg & MII_CR_POWER_DOWN)
4815 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4816 adapter->hw.autoneg = 1;
4817 adapter->hw.autoneg_advertised = 0x2F;
4820 spddplx = SPEED_1000;
4821 else if (mii_reg & 0x2000)
4822 spddplx = SPEED_100;
4825 spddplx += (mii_reg & 0x100)
4828 retval = e1000_set_spd_dplx(adapter,
4831 spin_unlock_irqrestore(
4832 &adapter->stats_lock,
4837 if (netif_running(adapter->netdev))
4838 e1000_reinit_locked(adapter);
4840 e1000_reset(adapter);
4842 case M88E1000_PHY_SPEC_CTRL:
4843 case M88E1000_EXT_PHY_SPEC_CTRL:
4844 if (e1000_phy_reset(&adapter->hw)) {
4845 spin_unlock_irqrestore(
4846 &adapter->stats_lock, flags);
4852 switch (data->reg_num) {
4854 if (mii_reg & MII_CR_POWER_DOWN)
4856 if (netif_running(adapter->netdev))
4857 e1000_reinit_locked(adapter);
4859 e1000_reset(adapter);
4863 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4868 return E1000_SUCCESS;
4872 e1000_pci_set_mwi(struct e1000_hw *hw)
4874 struct e1000_adapter *adapter = hw->back;
4875 int ret_val = pci_set_mwi(adapter->pdev);
4878 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4882 e1000_pci_clear_mwi(struct e1000_hw *hw)
4884 struct e1000_adapter *adapter = hw->back;
4886 pci_clear_mwi(adapter->pdev);
4890 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4892 struct e1000_adapter *adapter = hw->back;
4894 pci_read_config_word(adapter->pdev, reg, value);
4898 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4900 struct e1000_adapter *adapter = hw->back;
4902 pci_write_config_word(adapter->pdev, reg, *value);
4906 e1000_pcix_get_mmrbc(struct e1000_hw *hw)
4908 struct e1000_adapter *adapter = hw->back;
4909 return pcix_get_mmrbc(adapter->pdev);
4913 e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
4915 struct e1000_adapter *adapter = hw->back;
4916 pcix_set_mmrbc(adapter->pdev, mmrbc);
4920 e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4922 struct e1000_adapter *adapter = hw->back;
4923 uint16_t cap_offset;
4925 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4927 return -E1000_ERR_CONFIG;
4929 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4931 return E1000_SUCCESS;
4935 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4941 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4943 struct e1000_adapter *adapter = netdev_priv(netdev);
4944 uint32_t ctrl, rctl;
4946 e1000_irq_disable(adapter);
4947 adapter->vlgrp = grp;
4950 /* enable VLAN tag insert/strip */
4951 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4952 ctrl |= E1000_CTRL_VME;
4953 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4955 if (adapter->hw.mac_type != e1000_ich8lan) {
4956 /* enable VLAN receive filtering */
4957 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4958 rctl |= E1000_RCTL_VFE;
4959 rctl &= ~E1000_RCTL_CFIEN;
4960 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4961 e1000_update_mng_vlan(adapter);
4964 /* disable VLAN tag insert/strip */
4965 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4966 ctrl &= ~E1000_CTRL_VME;
4967 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4969 if (adapter->hw.mac_type != e1000_ich8lan) {
4970 /* disable VLAN filtering */
4971 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4972 rctl &= ~E1000_RCTL_VFE;
4973 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4974 if (adapter->mng_vlan_id !=
4975 (uint16_t)E1000_MNG_VLAN_NONE) {
4976 e1000_vlan_rx_kill_vid(netdev,
4977 adapter->mng_vlan_id);
4978 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4983 e1000_irq_enable(adapter);
4987 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4989 struct e1000_adapter *adapter = netdev_priv(netdev);
4990 uint32_t vfta, index;
4992 if ((adapter->hw.mng_cookie.status &
4993 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4994 (vid == adapter->mng_vlan_id))
4996 /* add VID to filter table */
4997 index = (vid >> 5) & 0x7F;
4998 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4999 vfta |= (1 << (vid & 0x1F));
5000 e1000_write_vfta(&adapter->hw, index, vfta);
5004 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
5006 struct e1000_adapter *adapter = netdev_priv(netdev);
5007 uint32_t vfta, index;
5009 e1000_irq_disable(adapter);
5010 vlan_group_set_device(adapter->vlgrp, vid, NULL);
5011 e1000_irq_enable(adapter);
5013 if ((adapter->hw.mng_cookie.status &
5014 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5015 (vid == adapter->mng_vlan_id)) {
5016 /* release control to f/w */
5017 e1000_release_hw_control(adapter);
5021 /* remove VID from filter table */
5022 index = (vid >> 5) & 0x7F;
5023 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5024 vfta &= ~(1 << (vid & 0x1F));
5025 e1000_write_vfta(&adapter->hw, index, vfta);
5029 e1000_restore_vlan(struct e1000_adapter *adapter)
5031 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
5033 if (adapter->vlgrp) {
5035 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5036 if (!vlan_group_get_device(adapter->vlgrp, vid))
5038 e1000_vlan_rx_add_vid(adapter->netdev, vid);
5044 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
5046 adapter->hw.autoneg = 0;
5048 /* Fiber NICs only allow 1000 gbps Full duplex */
5049 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
5050 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
5051 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5056 case SPEED_10 + DUPLEX_HALF:
5057 adapter->hw.forced_speed_duplex = e1000_10_half;
5059 case SPEED_10 + DUPLEX_FULL:
5060 adapter->hw.forced_speed_duplex = e1000_10_full;
5062 case SPEED_100 + DUPLEX_HALF:
5063 adapter->hw.forced_speed_duplex = e1000_100_half;
5065 case SPEED_100 + DUPLEX_FULL:
5066 adapter->hw.forced_speed_duplex = e1000_100_full;
5068 case SPEED_1000 + DUPLEX_FULL:
5069 adapter->hw.autoneg = 1;
5070 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
5072 case SPEED_1000 + DUPLEX_HALF: /* not supported */
5074 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5081 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
5083 struct net_device *netdev = pci_get_drvdata(pdev);
5084 struct e1000_adapter *adapter = netdev_priv(netdev);
5085 uint32_t ctrl, ctrl_ext, rctl, status;
5086 uint32_t wufc = adapter->wol;
5091 netif_device_detach(netdev);
5093 if (netif_running(netdev)) {
5094 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
5095 e1000_down(adapter);
5099 retval = pci_save_state(pdev);
5104 status = E1000_READ_REG(&adapter->hw, STATUS);
5105 if (status & E1000_STATUS_LU)
5106 wufc &= ~E1000_WUFC_LNKC;
5109 e1000_setup_rctl(adapter);
5110 e1000_set_multi(netdev);
5112 /* turn on all-multi mode if wake on multicast is enabled */
5113 if (wufc & E1000_WUFC_MC) {
5114 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5115 rctl |= E1000_RCTL_MPE;
5116 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5119 if (adapter->hw.mac_type >= e1000_82540) {
5120 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5121 /* advertise wake from D3Cold */
5122 #define E1000_CTRL_ADVD3WUC 0x00100000
5123 /* phy power management enable */
5124 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5125 ctrl |= E1000_CTRL_ADVD3WUC |
5126 E1000_CTRL_EN_PHY_PWR_MGMT;
5127 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5130 if (adapter->hw.media_type == e1000_media_type_fiber ||
5131 adapter->hw.media_type == e1000_media_type_internal_serdes) {
5132 /* keep the laser running in D3 */
5133 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
5134 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
5135 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
5138 /* Allow time for pending master requests to run */
5139 e1000_disable_pciex_master(&adapter->hw);
5141 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
5142 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
5143 pci_enable_wake(pdev, PCI_D3hot, 1);
5144 pci_enable_wake(pdev, PCI_D3cold, 1);
5146 E1000_WRITE_REG(&adapter->hw, WUC, 0);
5147 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
5148 pci_enable_wake(pdev, PCI_D3hot, 0);
5149 pci_enable_wake(pdev, PCI_D3cold, 0);
5152 e1000_release_manageability(adapter);
5154 /* make sure adapter isn't asleep if manageability is enabled */
5155 if (adapter->en_mng_pt) {
5156 pci_enable_wake(pdev, PCI_D3hot, 1);
5157 pci_enable_wake(pdev, PCI_D3cold, 1);
5160 if (adapter->hw.phy_type == e1000_phy_igp_3)
5161 e1000_phy_powerdown_workaround(&adapter->hw);
5163 if (netif_running(netdev))
5164 e1000_free_irq(adapter);
5166 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5167 * would have already happened in close and is redundant. */
5168 e1000_release_hw_control(adapter);
5170 pci_disable_device(pdev);
5172 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5179 e1000_resume(struct pci_dev *pdev)
5181 struct net_device *netdev = pci_get_drvdata(pdev);
5182 struct e1000_adapter *adapter = netdev_priv(netdev);
5185 pci_set_power_state(pdev, PCI_D0);
5186 pci_restore_state(pdev);
5187 if ((err = pci_enable_device(pdev))) {
5188 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5191 pci_set_master(pdev);
5193 pci_enable_wake(pdev, PCI_D3hot, 0);
5194 pci_enable_wake(pdev, PCI_D3cold, 0);
5196 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
5199 e1000_power_up_phy(adapter);
5200 e1000_reset(adapter);
5201 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5203 e1000_init_manageability(adapter);
5205 if (netif_running(netdev))
5208 netif_device_attach(netdev);
5210 /* If the controller is 82573 and f/w is AMT, do not set
5211 * DRV_LOAD until the interface is up. For all other cases,
5212 * let the f/w know that the h/w is now under the control
5214 if (adapter->hw.mac_type != e1000_82573 ||
5215 !e1000_check_mng_mode(&adapter->hw))
5216 e1000_get_hw_control(adapter);
5222 static void e1000_shutdown(struct pci_dev *pdev)
5224 e1000_suspend(pdev, PMSG_SUSPEND);
5227 #ifdef CONFIG_NET_POLL_CONTROLLER
5229 * Polling 'interrupt' - used by things like netconsole to send skbs
5230 * without having to re-enable interrupts. It's not called while
5231 * the interrupt routine is executing.
5234 e1000_netpoll(struct net_device *netdev)
5236 struct e1000_adapter *adapter = netdev_priv(netdev);
5238 disable_irq(adapter->pdev->irq);
5239 e1000_intr(adapter->pdev->irq, netdev);
5240 e1000_clean_tx_irq(adapter, adapter->tx_ring);
5241 #ifndef CONFIG_E1000_NAPI
5242 adapter->clean_rx(adapter, adapter->rx_ring);
5244 enable_irq(adapter->pdev->irq);
5249 * e1000_io_error_detected - called when PCI error is detected
5250 * @pdev: Pointer to PCI device
5251 * @state: The current pci conneection state
5253 * This function is called after a PCI bus error affecting
5254 * this device has been detected.
5256 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5258 struct net_device *netdev = pci_get_drvdata(pdev);
5259 struct e1000_adapter *adapter = netdev->priv;
5261 netif_device_detach(netdev);
5263 if (netif_running(netdev))
5264 e1000_down(adapter);
5265 pci_disable_device(pdev);
5267 /* Request a slot slot reset. */
5268 return PCI_ERS_RESULT_NEED_RESET;
5272 * e1000_io_slot_reset - called after the pci bus has been reset.
5273 * @pdev: Pointer to PCI device
5275 * Restart the card from scratch, as if from a cold-boot. Implementation
5276 * resembles the first-half of the e1000_resume routine.
5278 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5280 struct net_device *netdev = pci_get_drvdata(pdev);
5281 struct e1000_adapter *adapter = netdev->priv;
5283 if (pci_enable_device(pdev)) {
5284 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
5285 return PCI_ERS_RESULT_DISCONNECT;
5287 pci_set_master(pdev);
5289 pci_enable_wake(pdev, PCI_D3hot, 0);
5290 pci_enable_wake(pdev, PCI_D3cold, 0);
5292 e1000_reset(adapter);
5293 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5295 return PCI_ERS_RESULT_RECOVERED;
5299 * e1000_io_resume - called when traffic can start flowing again.
5300 * @pdev: Pointer to PCI device
5302 * This callback is called when the error recovery driver tells us that
5303 * its OK to resume normal operation. Implementation resembles the
5304 * second-half of the e1000_resume routine.
5306 static void e1000_io_resume(struct pci_dev *pdev)
5308 struct net_device *netdev = pci_get_drvdata(pdev);
5309 struct e1000_adapter *adapter = netdev->priv;
5311 e1000_init_manageability(adapter);
5313 if (netif_running(netdev)) {
5314 if (e1000_up(adapter)) {
5315 printk("e1000: can't bring device back up after reset\n");
5320 netif_device_attach(netdev);
5322 /* If the controller is 82573 and f/w is AMT, do not set
5323 * DRV_LOAD until the interface is up. For all other cases,
5324 * let the f/w know that the h/w is now under the control
5326 if (adapter->hw.mac_type != e1000_82573 ||
5327 !e1000_check_mng_mode(&adapter->hw))
5328 e1000_get_hw_control(adapter);