2 w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
4 Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 Supports following chips:
26 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
27 as99127f 7 3 0 3 0x31 0x12c3 yes no
28 as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
29 w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
30 w83627hf 9 3 2 3 0x21 0x5ca3 yes yes(LPC)
31 w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
32 w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
36 #include <linux/module.h>
37 #include <linux/init.h>
38 #include <linux/slab.h>
39 #include <linux/jiffies.h>
40 #include <linux/i2c.h>
41 #include <linux/i2c-isa.h>
42 #include <linux/hwmon.h>
43 #include <linux/hwmon-vid.h>
44 #include <linux/err.h>
48 /* Addresses to scan */
49 static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25,
50 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b,
51 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
52 static unsigned short isa_address = 0x290;
54 /* Insmod parameters */
55 I2C_CLIENT_INSMOD_5(w83781d, w83782d, w83783s, w83627hf, as99127f);
56 I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
57 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
60 module_param(init, bool, 0);
61 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
63 /* Constants specified below */
65 /* Length of ISA address segment */
66 #define W83781D_EXTENT 8
68 /* Where are the ISA address/data registers relative to the base address */
69 #define W83781D_ADDR_REG_OFFSET 5
70 #define W83781D_DATA_REG_OFFSET 6
72 /* The W83781D registers */
73 /* The W83782D registers for nr=7,8 are in bank 5 */
74 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
75 (0x554 + (((nr) - 7) * 2)))
76 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
77 (0x555 + (((nr) - 7) * 2)))
78 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
81 #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
82 #define W83781D_REG_FAN(nr) (0x27 + (nr))
84 #define W83781D_REG_BANK 0x4E
85 #define W83781D_REG_TEMP2_CONFIG 0x152
86 #define W83781D_REG_TEMP3_CONFIG 0x252
87 #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
88 ((nr == 2) ? (0x0150) : \
90 #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
91 ((nr == 2) ? (0x153) : \
93 #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
94 ((nr == 2) ? (0x155) : \
97 #define W83781D_REG_CONFIG 0x40
98 #define W83781D_REG_ALARM1 0x41
99 #define W83781D_REG_ALARM2 0x42
100 #define W83781D_REG_ALARM3 0x450 /* not on W83781D */
102 #define W83781D_REG_IRQ 0x4C
103 #define W83781D_REG_BEEP_CONFIG 0x4D
104 #define W83781D_REG_BEEP_INTS1 0x56
105 #define W83781D_REG_BEEP_INTS2 0x57
106 #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
108 #define W83781D_REG_VID_FANDIV 0x47
110 #define W83781D_REG_CHIPID 0x49
111 #define W83781D_REG_WCHIPID 0x58
112 #define W83781D_REG_CHIPMAN 0x4F
113 #define W83781D_REG_PIN 0x4B
116 #define W83781D_REG_VBAT 0x5D
118 /* PWM 782D (1-4) and 783S (1-2) only */
119 #define W83781D_REG_PWM1 0x5B /* 782d and 783s/627hf datasheets disagree */
120 /* on which is which; */
121 #define W83781D_REG_PWM2 0x5A /* We follow the 782d convention here, */
122 /* However 782d is probably wrong. */
123 #define W83781D_REG_PWM3 0x5E
124 #define W83781D_REG_PWM4 0x5F
125 #define W83781D_REG_PWMCLK12 0x5C
126 #define W83781D_REG_PWMCLK34 0x45C
127 static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2,
128 W83781D_REG_PWM3, W83781D_REG_PWM4
131 #define W83781D_REG_PWM(nr) (regpwm[(nr) - 1])
133 #define W83781D_REG_I2C_ADDR 0x48
134 #define W83781D_REG_I2C_SUBADDR 0x4A
136 /* The following are undocumented in the data sheets however we
137 received the information in an email from Winbond tech support */
138 /* Sensor selection - not on 781d */
139 #define W83781D_REG_SCFG1 0x5D
140 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
142 #define W83781D_REG_SCFG2 0x59
143 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
145 #define W83781D_DEFAULT_BETA 3435
147 /* RT Table registers */
148 #define W83781D_REG_RT_IDX 0x50
149 #define W83781D_REG_RT_VAL 0x51
151 /* Conversions. Rounding and limit checking is only done on the TO_REG
152 variants. Note that you should be a bit careful with which arguments
153 these macros are called: arguments may be evaluated more than once.
154 Fixing this is just not worth it. */
155 #define IN_TO_REG(val) (SENSORS_LIMIT((((val) * 10 + 8)/16),0,255))
156 #define IN_FROM_REG(val) (((val) * 16) / 10)
159 FAN_TO_REG(long rpm, int div)
163 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
164 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
167 #define FAN_FROM_REG(val,div) ((val) == 0 ? -1 : \
168 ((val) == 255 ? 0 : \
169 1350000 / ((val) * (div))))
171 #define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
172 : (val)) / 1000, 0, 0xff))
173 #define TEMP_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) * 1000)
175 #define PWM_FROM_REG(val) (val)
176 #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
177 #define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \
178 (val) ^ 0x7fff : (val))
179 #define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \
180 (~(val)) & 0x7fff : (val) & 0xffffff)
182 #define BEEP_ENABLE_TO_REG(val) ((val) ? 1 : 0)
183 #define BEEP_ENABLE_FROM_REG(val) ((val) ? 1 : 0)
185 #define DIV_FROM_REG(val) (1 << (val))
188 DIV_TO_REG(long val, enum chips type)
191 val = SENSORS_LIMIT(val, 1,
193 || type == as99127f) ? 8 : 128)) >> 1;
194 for (i = 0; i < 7; i++) {
202 /* There are some complications in a module like this. First off, W83781D chips
203 may be both present on the SMBus and the ISA bus, and we have to handle
204 those cases separately at some places. Second, there might be several
205 W83781D chips available (well, actually, that is probably never done; but
206 it is a clean illustration of how to handle a case like that). Finally,
207 a specific chip may be attached to *both* ISA and SMBus, and we would
208 not like to detect it double. Fortunately, in the case of the W83781D at
209 least, a register tells us what SMBus address we are on, so that helps
210 a bit - except if there could be more than one SMBus. Groan. No solution
213 /* This module may seem overly long and complicated. In fact, it is not so
214 bad. Quite a lot of bookkeeping is done. A real driver can often cut
217 /* For each registered W83781D, we need to keep some data in memory. That
218 data is pointed to by w83781d_list[NR]->data. The structure itself is
219 dynamically allocated, at the same time when a new w83781d client is
221 struct w83781d_data {
222 struct i2c_client client;
223 struct class_device *class_dev;
224 struct semaphore lock;
227 struct semaphore update_lock;
228 char valid; /* !=0 if following fields are valid */
229 unsigned long last_updated; /* In jiffies */
231 struct i2c_client *lm75[2]; /* for secondary I2C addresses */
232 /* array of 2 pointers to subclients */
234 u8 in[9]; /* Register value - 8 & 9 for 782D only */
235 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
236 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
237 u8 fan[3]; /* Register value */
238 u8 fan_min[3]; /* Register value */
240 u8 temp_max; /* Register value */
241 u8 temp_max_hyst; /* Register value */
242 u16 temp_add[2]; /* Register value */
243 u16 temp_max_add[2]; /* Register value */
244 u16 temp_max_hyst_add[2]; /* Register value */
245 u8 fan_div[3]; /* Register encoding, shifted right */
246 u8 vid; /* Register encoding, combined */
247 u32 alarms; /* Register encoding, combined */
248 u32 beep_mask; /* Register encoding, combined */
249 u8 beep_enable; /* Boolean */
250 u8 pwm[4]; /* Register value */
251 u8 pwmenable[4]; /* Boolean */
252 u16 sens[3]; /* 782D/783S only.
253 1 = pentium diode; 2 = 3904 diode;
254 3000-5000 = thermistor beta.
256 Other Betas unimplemented */
260 static int w83781d_attach_adapter(struct i2c_adapter *adapter);
261 static int w83781d_isa_attach_adapter(struct i2c_adapter *adapter);
262 static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind);
263 static int w83781d_detach_client(struct i2c_client *client);
265 static int w83781d_read_value(struct i2c_client *client, u16 register);
266 static int w83781d_write_value(struct i2c_client *client, u16 register,
268 static struct w83781d_data *w83781d_update_device(struct device *dev);
269 static void w83781d_init_client(struct i2c_client *client);
271 static struct i2c_driver w83781d_driver = {
272 .owner = THIS_MODULE,
274 .id = I2C_DRIVERID_W83781D,
275 .flags = I2C_DF_NOTIFY,
276 .attach_adapter = w83781d_attach_adapter,
277 .detach_client = w83781d_detach_client,
280 static struct i2c_driver w83781d_isa_driver = {
281 .owner = THIS_MODULE,
282 .name = "w83781d-isa",
283 .attach_adapter = w83781d_isa_attach_adapter,
284 .detach_client = w83781d_detach_client,
288 /* following are the sysfs callback functions */
289 #define show_in_reg(reg) \
290 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
292 struct w83781d_data *data = w83781d_update_device(dev); \
293 return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr] * 10)); \
299 #define store_in_reg(REG, reg) \
300 static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
302 struct i2c_client *client = to_i2c_client(dev); \
303 struct w83781d_data *data = i2c_get_clientdata(client); \
306 val = simple_strtoul(buf, NULL, 10) / 10; \
308 down(&data->update_lock); \
309 data->in_##reg[nr] = IN_TO_REG(val); \
310 w83781d_write_value(client, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
312 up(&data->update_lock); \
315 store_in_reg(MIN, min);
316 store_in_reg(MAX, max);
318 #define sysfs_in_offset(offset) \
320 show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
322 return show_in(dev, buf, offset); \
324 static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
326 #define sysfs_in_reg_offset(reg, offset) \
327 static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
329 return show_in_##reg (dev, buf, offset); \
331 static ssize_t store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
333 return store_in_##reg (dev, buf, count, offset); \
335 static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_in_##reg##offset, store_regs_in_##reg##offset);
337 #define sysfs_in_offsets(offset) \
338 sysfs_in_offset(offset); \
339 sysfs_in_reg_offset(min, offset); \
340 sysfs_in_reg_offset(max, offset);
352 #define device_create_file_in(client, offset) \
354 device_create_file(&client->dev, &dev_attr_in##offset##_input); \
355 device_create_file(&client->dev, &dev_attr_in##offset##_min); \
356 device_create_file(&client->dev, &dev_attr_in##offset##_max); \
359 #define show_fan_reg(reg) \
360 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
362 struct w83781d_data *data = w83781d_update_device(dev); \
363 return sprintf(buf,"%ld\n", \
364 FAN_FROM_REG(data->reg[nr-1], (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
367 show_fan_reg(fan_min);
370 store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
372 struct i2c_client *client = to_i2c_client(dev);
373 struct w83781d_data *data = i2c_get_clientdata(client);
376 val = simple_strtoul(buf, NULL, 10);
378 down(&data->update_lock);
379 data->fan_min[nr - 1] =
380 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
381 w83781d_write_value(client, W83781D_REG_FAN_MIN(nr),
382 data->fan_min[nr - 1]);
384 up(&data->update_lock);
388 #define sysfs_fan_offset(offset) \
389 static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
391 return show_fan(dev, buf, offset); \
393 static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
395 #define sysfs_fan_min_offset(offset) \
396 static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
398 return show_fan_min(dev, buf, offset); \
400 static ssize_t store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
402 return store_fan_min(dev, buf, count, offset); \
404 static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, show_regs_fan_min##offset, store_regs_fan_min##offset);
407 sysfs_fan_min_offset(1);
409 sysfs_fan_min_offset(2);
411 sysfs_fan_min_offset(3);
413 #define device_create_file_fan(client, offset) \
415 device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
416 device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
419 #define show_temp_reg(reg) \
420 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
422 struct w83781d_data *data = w83781d_update_device(dev); \
423 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
424 return sprintf(buf,"%d\n", \
425 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
426 } else { /* TEMP1 */ \
427 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
431 show_temp_reg(temp_max);
432 show_temp_reg(temp_max_hyst);
434 #define store_temp_reg(REG, reg) \
435 static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
437 struct i2c_client *client = to_i2c_client(dev); \
438 struct w83781d_data *data = i2c_get_clientdata(client); \
441 val = simple_strtol(buf, NULL, 10); \
443 down(&data->update_lock); \
445 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
446 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
447 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
448 data->temp_##reg##_add[nr-2]); \
449 } else { /* TEMP1 */ \
450 data->temp_##reg = TEMP_TO_REG(val); \
451 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
455 up(&data->update_lock); \
458 store_temp_reg(OVER, max);
459 store_temp_reg(HYST, max_hyst);
461 #define sysfs_temp_offset(offset) \
463 show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
465 return show_temp(dev, buf, offset); \
467 static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
469 #define sysfs_temp_reg_offset(reg, offset) \
470 static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
472 return show_temp_##reg (dev, buf, offset); \
474 static ssize_t store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
476 return store_temp_##reg (dev, buf, count, offset); \
478 static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
480 #define sysfs_temp_offsets(offset) \
481 sysfs_temp_offset(offset); \
482 sysfs_temp_reg_offset(max, offset); \
483 sysfs_temp_reg_offset(max_hyst, offset);
485 sysfs_temp_offsets(1);
486 sysfs_temp_offsets(2);
487 sysfs_temp_offsets(3);
489 #define device_create_file_temp(client, offset) \
491 device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
492 device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
493 device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
497 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
499 struct w83781d_data *data = w83781d_update_device(dev);
500 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
504 DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
505 #define device_create_file_vid(client) \
506 device_create_file(&client->dev, &dev_attr_cpu0_vid);
508 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
510 struct w83781d_data *data = w83781d_update_device(dev);
511 return sprintf(buf, "%ld\n", (long) data->vrm);
515 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
517 struct i2c_client *client = to_i2c_client(dev);
518 struct w83781d_data *data = i2c_get_clientdata(client);
521 val = simple_strtoul(buf, NULL, 10);
528 DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
529 #define device_create_file_vrm(client) \
530 device_create_file(&client->dev, &dev_attr_vrm);
532 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
534 struct w83781d_data *data = w83781d_update_device(dev);
535 return sprintf(buf, "%u\n", data->alarms);
539 DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
540 #define device_create_file_alarms(client) \
541 device_create_file(&client->dev, &dev_attr_alarms);
542 static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
544 struct w83781d_data *data = w83781d_update_device(dev);
545 return sprintf(buf, "%ld\n",
546 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
548 static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf)
550 struct w83781d_data *data = w83781d_update_device(dev);
551 return sprintf(buf, "%ld\n",
552 (long)BEEP_ENABLE_FROM_REG(data->beep_enable));
555 #define BEEP_ENABLE 0 /* Store beep_enable */
556 #define BEEP_MASK 1 /* Store beep_mask */
559 store_beep_reg(struct device *dev, const char *buf, size_t count,
562 struct i2c_client *client = to_i2c_client(dev);
563 struct w83781d_data *data = i2c_get_clientdata(client);
566 val = simple_strtoul(buf, NULL, 10);
568 down(&data->update_lock);
570 if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
571 data->beep_mask = BEEP_MASK_TO_REG(val, data->type);
572 w83781d_write_value(client, W83781D_REG_BEEP_INTS1,
573 data->beep_mask & 0xff);
575 if ((data->type != w83781d) && (data->type != as99127f)) {
576 w83781d_write_value(client, W83781D_REG_BEEP_INTS3,
577 ((data->beep_mask) >> 16) & 0xff);
580 val2 = (data->beep_mask >> 8) & 0x7f;
581 } else { /* We are storing beep_enable */
582 val2 = w83781d_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
583 data->beep_enable = BEEP_ENABLE_TO_REG(val);
586 w83781d_write_value(client, W83781D_REG_BEEP_INTS2,
587 val2 | data->beep_enable << 7);
589 up(&data->update_lock);
593 #define sysfs_beep(REG, reg) \
594 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
596 return show_beep_##reg(dev, attr, buf); \
598 static ssize_t store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
600 return store_beep_reg(dev, buf, count, BEEP_##REG); \
602 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, show_regs_beep_##reg, store_regs_beep_##reg);
604 sysfs_beep(ENABLE, enable);
605 sysfs_beep(MASK, mask);
607 #define device_create_file_beep(client) \
609 device_create_file(&client->dev, &dev_attr_beep_enable); \
610 device_create_file(&client->dev, &dev_attr_beep_mask); \
614 show_fan_div_reg(struct device *dev, char *buf, int nr)
616 struct w83781d_data *data = w83781d_update_device(dev);
617 return sprintf(buf, "%ld\n",
618 (long) DIV_FROM_REG(data->fan_div[nr - 1]));
621 /* Note: we save and restore the fan minimum here, because its value is
622 determined in part by the fan divisor. This follows the principle of
623 least suprise; the user doesn't expect the fan minimum to change just
624 because the divisor changed. */
626 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
628 struct i2c_client *client = to_i2c_client(dev);
629 struct w83781d_data *data = i2c_get_clientdata(client);
632 unsigned long val = simple_strtoul(buf, NULL, 10);
634 down(&data->update_lock);
637 min = FAN_FROM_REG(data->fan_min[nr],
638 DIV_FROM_REG(data->fan_div[nr]));
640 data->fan_div[nr] = DIV_TO_REG(val, data->type);
642 reg = (w83781d_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
643 & (nr==0 ? 0xcf : 0x3f))
644 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
645 w83781d_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
647 /* w83781d and as99127f don't have extended divisor bits */
648 if (data->type != w83781d && data->type != as99127f) {
649 reg = (w83781d_read_value(client, W83781D_REG_VBAT)
651 | ((data->fan_div[nr] & 0x04) << (3 + nr));
652 w83781d_write_value(client, W83781D_REG_VBAT, reg);
655 /* Restore fan_min */
656 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
657 w83781d_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
659 up(&data->update_lock);
663 #define sysfs_fan_div(offset) \
664 static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
666 return show_fan_div_reg(dev, buf, offset); \
668 static ssize_t store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
670 return store_fan_div_reg(dev, buf, count, offset - 1); \
672 static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, show_regs_fan_div_##offset, store_regs_fan_div_##offset);
678 #define device_create_file_fan_div(client, offset) \
680 device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
684 show_pwm_reg(struct device *dev, char *buf, int nr)
686 struct w83781d_data *data = w83781d_update_device(dev);
687 return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr - 1]));
691 show_pwmenable_reg(struct device *dev, char *buf, int nr)
693 struct w83781d_data *data = w83781d_update_device(dev);
694 return sprintf(buf, "%ld\n", (long) data->pwmenable[nr - 1]);
698 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
700 struct i2c_client *client = to_i2c_client(dev);
701 struct w83781d_data *data = i2c_get_clientdata(client);
704 val = simple_strtoul(buf, NULL, 10);
706 down(&data->update_lock);
707 data->pwm[nr - 1] = PWM_TO_REG(val);
708 w83781d_write_value(client, W83781D_REG_PWM(nr), data->pwm[nr - 1]);
709 up(&data->update_lock);
714 store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr)
716 struct i2c_client *client = to_i2c_client(dev);
717 struct w83781d_data *data = i2c_get_clientdata(client);
720 val = simple_strtoul(buf, NULL, 10);
722 down(&data->update_lock);
727 reg = w83781d_read_value(client, W83781D_REG_PWMCLK12);
728 w83781d_write_value(client, W83781D_REG_PWMCLK12,
729 (reg & 0xf7) | (val << 3));
731 reg = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
732 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG,
733 (reg & 0xef) | (!val << 4));
735 data->pwmenable[nr - 1] = val;
739 up(&data->update_lock);
743 up(&data->update_lock);
747 #define sysfs_pwm(offset) \
748 static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
750 return show_pwm_reg(dev, buf, offset); \
752 static ssize_t store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, \
753 const char *buf, size_t count) \
755 return store_pwm_reg(dev, buf, count, offset); \
757 static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
758 show_regs_pwm_##offset, store_regs_pwm_##offset);
760 #define sysfs_pwmenable(offset) \
761 static ssize_t show_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
763 return show_pwmenable_reg(dev, buf, offset); \
765 static ssize_t store_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, \
766 const char *buf, size_t count) \
768 return store_pwmenable_reg(dev, buf, count, offset); \
770 static DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
771 show_regs_pwmenable_##offset, store_regs_pwmenable_##offset);
775 sysfs_pwmenable(2); /* only PWM2 can be enabled/disabled */
779 #define device_create_file_pwm(client, offset) \
781 device_create_file(&client->dev, &dev_attr_pwm##offset); \
784 #define device_create_file_pwmenable(client, offset) \
786 device_create_file(&client->dev, &dev_attr_pwm##offset##_enable); \
790 show_sensor_reg(struct device *dev, char *buf, int nr)
792 struct w83781d_data *data = w83781d_update_device(dev);
793 return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
797 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
799 struct i2c_client *client = to_i2c_client(dev);
800 struct w83781d_data *data = i2c_get_clientdata(client);
803 val = simple_strtoul(buf, NULL, 10);
805 down(&data->update_lock);
808 case 1: /* PII/Celeron diode */
809 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
810 w83781d_write_value(client, W83781D_REG_SCFG1,
811 tmp | BIT_SCFG1[nr - 1]);
812 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
813 w83781d_write_value(client, W83781D_REG_SCFG2,
814 tmp | BIT_SCFG2[nr - 1]);
815 data->sens[nr - 1] = val;
818 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
819 w83781d_write_value(client, W83781D_REG_SCFG1,
820 tmp | BIT_SCFG1[nr - 1]);
821 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
822 w83781d_write_value(client, W83781D_REG_SCFG2,
823 tmp & ~BIT_SCFG2[nr - 1]);
824 data->sens[nr - 1] = val;
826 case W83781D_DEFAULT_BETA: /* thermistor */
827 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
828 w83781d_write_value(client, W83781D_REG_SCFG1,
829 tmp & ~BIT_SCFG1[nr - 1]);
830 data->sens[nr - 1] = val;
833 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or %d\n",
834 (long) val, W83781D_DEFAULT_BETA);
838 up(&data->update_lock);
842 #define sysfs_sensor(offset) \
843 static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
845 return show_sensor_reg(dev, buf, offset); \
847 static ssize_t store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
849 return store_sensor_reg(dev, buf, count, offset); \
851 static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, show_regs_sensor_##offset, store_regs_sensor_##offset);
857 #define device_create_file_sensor(client, offset) \
859 device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
862 /* This function is called when:
863 * w83781d_driver is inserted (when this module is loaded), for each
865 * when a new adapter is inserted (and w83781d_driver is still present) */
867 w83781d_attach_adapter(struct i2c_adapter *adapter)
869 if (!(adapter->class & I2C_CLASS_HWMON))
871 return i2c_probe(adapter, &addr_data, w83781d_detect);
875 w83781d_isa_attach_adapter(struct i2c_adapter *adapter)
877 return w83781d_detect(adapter, isa_address, -1);
880 /* Assumes that adapter is of I2C, not ISA variety.
881 * OTHERWISE DON'T CALL THIS
884 w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
885 struct i2c_client *new_client)
889 const char *client_name = "";
890 struct w83781d_data *data = i2c_get_clientdata(new_client);
892 data->lm75[0] = kmalloc(sizeof(struct i2c_client), GFP_KERNEL);
893 if (!(data->lm75[0])) {
897 memset(data->lm75[0], 0x00, sizeof (struct i2c_client));
899 id = i2c_adapter_id(adapter);
901 if (force_subclients[0] == id && force_subclients[1] == address) {
902 for (i = 2; i <= 3; i++) {
903 if (force_subclients[i] < 0x48 ||
904 force_subclients[i] > 0x4f) {
905 dev_err(&new_client->dev, "Invalid subclient "
906 "address %d; must be 0x48-0x4f\n",
907 force_subclients[i]);
912 w83781d_write_value(new_client, W83781D_REG_I2C_SUBADDR,
913 (force_subclients[2] & 0x07) |
914 ((force_subclients[3] & 0x07) << 4));
915 data->lm75[0]->addr = force_subclients[2];
917 val1 = w83781d_read_value(new_client, W83781D_REG_I2C_SUBADDR);
918 data->lm75[0]->addr = 0x48 + (val1 & 0x07);
921 if (kind != w83783s) {
923 data->lm75[1] = kmalloc(sizeof(struct i2c_client), GFP_KERNEL);
924 if (!(data->lm75[1])) {
928 memset(data->lm75[1], 0x0, sizeof(struct i2c_client));
930 if (force_subclients[0] == id &&
931 force_subclients[1] == address) {
932 data->lm75[1]->addr = force_subclients[3];
934 data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07);
936 if (data->lm75[0]->addr == data->lm75[1]->addr) {
937 dev_err(&new_client->dev,
938 "Duplicate addresses 0x%x for subclients.\n",
939 data->lm75[0]->addr);
946 client_name = "w83781d subclient";
947 else if (kind == w83782d)
948 client_name = "w83782d subclient";
949 else if (kind == w83783s)
950 client_name = "w83783s subclient";
951 else if (kind == w83627hf)
952 client_name = "w83627hf subclient";
953 else if (kind == as99127f)
954 client_name = "as99127f subclient";
956 for (i = 0; i <= 1; i++) {
957 /* store all data in w83781d */
958 i2c_set_clientdata(data->lm75[i], NULL);
959 data->lm75[i]->adapter = adapter;
960 data->lm75[i]->driver = &w83781d_driver;
961 data->lm75[i]->flags = 0;
962 strlcpy(data->lm75[i]->name, client_name,
964 if ((err = i2c_attach_client(data->lm75[i]))) {
965 dev_err(&new_client->dev, "Subclient %d "
966 "registration at address 0x%x "
967 "failed.\n", i, data->lm75[i]->addr);
978 /* Undo inits in case of errors */
980 i2c_detach_client(data->lm75[0]);
983 kfree(data->lm75[1]);
986 kfree(data->lm75[0]);
992 w83781d_detect(struct i2c_adapter *adapter, int address, int kind)
994 int i = 0, val1 = 0, val2;
995 struct i2c_client *new_client;
996 struct w83781d_data *data;
998 const char *client_name = "";
999 int is_isa = i2c_is_isa_adapter(adapter);
1000 enum vendor { winbond, asus } vendid;
1003 && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1008 /* Prevent users from forcing a kind for a bus it isn't supposed
1009 to possibly be on */
1010 if (is_isa && (kind == as99127f || kind == w83783s)) {
1011 dev_err(&adapter->dev,
1012 "Cannot force I2C-only chip for ISA address 0x%02x.\n",
1019 if (!request_region(address, W83781D_EXTENT,
1020 w83781d_isa_driver.name)) {
1021 dev_dbg(&adapter->dev, "Request of region "
1022 "0x%x-0x%x for w83781d failed\n", address,
1023 address + W83781D_EXTENT - 1);
1028 /* Probe whether there is anything available on this address. Already
1029 done for SMBus clients */
1033 #define REALLY_SLOW_IO
1034 /* We need the timeouts for at least some LM78-like
1035 chips. But only if we read 'undefined' registers. */
1036 i = inb_p(address + 1);
1037 if (inb_p(address + 2) != i
1038 || inb_p(address + 3) != i
1039 || inb_p(address + 7) != i) {
1040 dev_dbg(&adapter->dev, "Detection of w83781d "
1041 "chip failed at step 1\n");
1045 #undef REALLY_SLOW_IO
1047 /* Let's just hope nothing breaks here */
1048 i = inb_p(address + 5) & 0x7f;
1049 outb_p(~i & 0x7f, address + 5);
1050 val2 = inb_p(address + 5) & 0x7f;
1051 if (val2 != (~i & 0x7f)) {
1052 outb_p(i, address + 5);
1053 dev_dbg(&adapter->dev, "Detection of w83781d "
1054 "chip failed at step 2 (0x%x != "
1055 "0x%x at 0x%x)\n", val2, ~i & 0x7f,
1063 /* OK. For now, we presume we have a valid client. We now create the
1064 client structure, even though we cannot fill it completely yet.
1065 But it allows us to access w83781d_{read,write}_value. */
1067 if (!(data = kmalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1071 memset(data, 0, sizeof(struct w83781d_data));
1073 new_client = &data->client;
1074 i2c_set_clientdata(new_client, data);
1075 new_client->addr = address;
1076 init_MUTEX(&data->lock);
1077 new_client->adapter = adapter;
1078 new_client->driver = is_isa ? &w83781d_isa_driver : &w83781d_driver;
1079 new_client->flags = 0;
1081 /* Now, we do the remaining detection. */
1083 /* The w8378?d may be stuck in some other bank than bank 0. This may
1084 make reading other information impossible. Specify a force=... or
1085 force_*=... parameter, and the Winbond will be reset to the right
1088 if (w83781d_read_value(new_client, W83781D_REG_CONFIG) & 0x80) {
1089 dev_dbg(&new_client->dev, "Detection failed at step "
1094 val1 = w83781d_read_value(new_client, W83781D_REG_BANK);
1095 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1096 /* Check for Winbond or Asus ID if in bank 0 */
1097 if ((!(val1 & 0x07)) &&
1098 (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
1099 || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) {
1100 dev_dbg(&new_client->dev, "Detection failed at step "
1105 /* If Winbond SMBus, check address at 0x48.
1106 Asus doesn't support, except for as99127f rev.2 */
1107 if ((!is_isa) && (((!(val1 & 0x80)) && (val2 == 0xa3)) ||
1108 ((val1 & 0x80) && (val2 == 0x5c)))) {
1109 if (w83781d_read_value
1110 (new_client, W83781D_REG_I2C_ADDR) != address) {
1111 dev_dbg(&new_client->dev, "Detection failed "
1119 /* We have either had a force parameter, or we have already detected the
1120 Winbond. Put it now into bank 0 and Vendor ID High Byte */
1121 w83781d_write_value(new_client, W83781D_REG_BANK,
1122 (w83781d_read_value(new_client,
1123 W83781D_REG_BANK) & 0x78) |
1126 /* Determine the chip type. */
1129 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1132 else if (val2 == 0x12)
1135 dev_dbg(&new_client->dev, "Chip was made by neither "
1136 "Winbond nor Asus?\n");
1141 val1 = w83781d_read_value(new_client, W83781D_REG_WCHIPID);
1142 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1144 else if (val1 == 0x30 && vendid == winbond)
1146 else if (val1 == 0x40 && vendid == winbond && !is_isa
1149 else if (val1 == 0x21 && vendid == winbond)
1151 else if (val1 == 0x31 && !is_isa && address >= 0x28)
1155 dev_warn(&new_client->dev, "Ignoring 'force' "
1156 "parameter for unknown chip at "
1157 "adapter %d, address 0x%02x\n",
1158 i2c_adapter_id(adapter), address);
1164 if (kind == w83781d) {
1165 client_name = "w83781d";
1166 } else if (kind == w83782d) {
1167 client_name = "w83782d";
1168 } else if (kind == w83783s) {
1169 client_name = "w83783s";
1170 } else if (kind == w83627hf) {
1171 client_name = "w83627hf";
1172 } else if (kind == as99127f) {
1173 client_name = "as99127f";
1176 /* Fill in the remaining client fields and put into the global list */
1177 strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1181 init_MUTEX(&data->update_lock);
1183 /* Tell the I2C layer a new client has arrived */
1184 if ((err = i2c_attach_client(new_client)))
1187 /* attach secondary i2c lm75-like clients */
1189 if ((err = w83781d_detect_subclients(adapter, address,
1193 data->lm75[0] = NULL;
1194 data->lm75[1] = NULL;
1197 /* Initialize the chip */
1198 w83781d_init_client(new_client);
1200 /* A few vars need to be filled upon startup */
1201 for (i = 1; i <= 3; i++) {
1202 data->fan_min[i - 1] = w83781d_read_value(new_client,
1203 W83781D_REG_FAN_MIN(i));
1205 if (kind != w83781d && kind != as99127f)
1206 for (i = 0; i < 4; i++)
1207 data->pwmenable[i] = 1;
1209 /* Register sysfs hooks */
1210 data->class_dev = hwmon_device_register(&new_client->dev);
1211 if (IS_ERR(data->class_dev)) {
1212 err = PTR_ERR(data->class_dev);
1216 device_create_file_in(new_client, 0);
1217 if (kind != w83783s)
1218 device_create_file_in(new_client, 1);
1219 device_create_file_in(new_client, 2);
1220 device_create_file_in(new_client, 3);
1221 device_create_file_in(new_client, 4);
1222 device_create_file_in(new_client, 5);
1223 device_create_file_in(new_client, 6);
1224 if (kind != as99127f && kind != w83781d && kind != w83783s) {
1225 device_create_file_in(new_client, 7);
1226 device_create_file_in(new_client, 8);
1229 device_create_file_fan(new_client, 1);
1230 device_create_file_fan(new_client, 2);
1231 device_create_file_fan(new_client, 3);
1233 device_create_file_temp(new_client, 1);
1234 device_create_file_temp(new_client, 2);
1235 if (kind != w83783s)
1236 device_create_file_temp(new_client, 3);
1238 device_create_file_vid(new_client);
1239 device_create_file_vrm(new_client);
1241 device_create_file_fan_div(new_client, 1);
1242 device_create_file_fan_div(new_client, 2);
1243 device_create_file_fan_div(new_client, 3);
1245 device_create_file_alarms(new_client);
1247 device_create_file_beep(new_client);
1249 if (kind != w83781d && kind != as99127f) {
1250 device_create_file_pwm(new_client, 1);
1251 device_create_file_pwm(new_client, 2);
1252 device_create_file_pwmenable(new_client, 2);
1254 if (kind == w83782d && !is_isa) {
1255 device_create_file_pwm(new_client, 3);
1256 device_create_file_pwm(new_client, 4);
1259 if (kind != as99127f && kind != w83781d) {
1260 device_create_file_sensor(new_client, 1);
1261 device_create_file_sensor(new_client, 2);
1262 if (kind != w83783s)
1263 device_create_file_sensor(new_client, 3);
1269 if (data->lm75[1]) {
1270 i2c_detach_client(data->lm75[1]);
1271 kfree(data->lm75[1]);
1273 if (data->lm75[0]) {
1274 i2c_detach_client(data->lm75[0]);
1275 kfree(data->lm75[0]);
1278 i2c_detach_client(new_client);
1283 release_region(address, W83781D_EXTENT);
1289 w83781d_detach_client(struct i2c_client *client)
1291 struct w83781d_data *data = i2c_get_clientdata(client);
1296 hwmon_device_unregister(data->class_dev);
1298 if (i2c_is_isa_client(client))
1299 release_region(client->addr, W83781D_EXTENT);
1301 if ((err = i2c_detach_client(client)))
1315 /* The SMBus locks itself, usually, but nothing may access the Winbond between
1316 bank switches. ISA access must always be locked explicitly!
1317 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1318 would slow down the W83781D access and should not be necessary.
1319 There are some ugly typecasts here, but the good news is - they should
1320 nowhere else be necessary! */
1322 w83781d_read_value(struct i2c_client *client, u16 reg)
1324 struct w83781d_data *data = i2c_get_clientdata(client);
1325 int res, word_sized, bank;
1326 struct i2c_client *cl;
1329 if (i2c_is_isa_client(client)) {
1330 word_sized = (((reg & 0xff00) == 0x100)
1331 || ((reg & 0xff00) == 0x200))
1332 && (((reg & 0x00ff) == 0x50)
1333 || ((reg & 0x00ff) == 0x53)
1334 || ((reg & 0x00ff) == 0x55));
1336 outb_p(W83781D_REG_BANK,
1337 client->addr + W83781D_ADDR_REG_OFFSET);
1339 client->addr + W83781D_DATA_REG_OFFSET);
1341 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1342 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1344 outb_p((reg & 0xff) + 1,
1345 client->addr + W83781D_ADDR_REG_OFFSET);
1347 (res << 8) + inb_p(client->addr +
1348 W83781D_DATA_REG_OFFSET);
1351 outb_p(W83781D_REG_BANK,
1352 client->addr + W83781D_ADDR_REG_OFFSET);
1353 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1356 bank = (reg >> 8) & 0x0f;
1359 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1361 if (bank == 0 || bank > 2) {
1362 res = i2c_smbus_read_byte_data(client, reg & 0xff);
1364 /* switch to subclient */
1365 cl = data->lm75[bank - 1];
1366 /* convert from ISA to LM75 I2C addresses */
1367 switch (reg & 0xff) {
1368 case 0x50: /* TEMP */
1369 res = swab16(i2c_smbus_read_word_data(cl, 0));
1371 case 0x52: /* CONFIG */
1372 res = i2c_smbus_read_byte_data(cl, 1);
1374 case 0x53: /* HYST */
1375 res = swab16(i2c_smbus_read_word_data(cl, 2));
1377 case 0x55: /* OVER */
1379 res = swab16(i2c_smbus_read_word_data(cl, 3));
1384 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1391 w83781d_write_value(struct i2c_client *client, u16 reg, u16 value)
1393 struct w83781d_data *data = i2c_get_clientdata(client);
1394 int word_sized, bank;
1395 struct i2c_client *cl;
1398 if (i2c_is_isa_client(client)) {
1399 word_sized = (((reg & 0xff00) == 0x100)
1400 || ((reg & 0xff00) == 0x200))
1401 && (((reg & 0x00ff) == 0x53)
1402 || ((reg & 0x00ff) == 0x55));
1404 outb_p(W83781D_REG_BANK,
1405 client->addr + W83781D_ADDR_REG_OFFSET);
1407 client->addr + W83781D_DATA_REG_OFFSET);
1409 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1412 client->addr + W83781D_DATA_REG_OFFSET);
1413 outb_p((reg & 0xff) + 1,
1414 client->addr + W83781D_ADDR_REG_OFFSET);
1416 outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET);
1418 outb_p(W83781D_REG_BANK,
1419 client->addr + W83781D_ADDR_REG_OFFSET);
1420 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1423 bank = (reg >> 8) & 0x0f;
1426 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1428 if (bank == 0 || bank > 2) {
1429 i2c_smbus_write_byte_data(client, reg & 0xff,
1432 /* switch to subclient */
1433 cl = data->lm75[bank - 1];
1434 /* convert from ISA to LM75 I2C addresses */
1435 switch (reg & 0xff) {
1436 case 0x52: /* CONFIG */
1437 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1439 case 0x53: /* HYST */
1440 i2c_smbus_write_word_data(cl, 2, swab16(value));
1442 case 0x55: /* OVER */
1443 i2c_smbus_write_word_data(cl, 3, swab16(value));
1448 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1454 /* Called when we have found a new W83781D. It should set limits, etc. */
1456 w83781d_init_client(struct i2c_client *client)
1458 struct w83781d_data *data = i2c_get_clientdata(client);
1460 int type = data->type;
1463 if (init && type != as99127f) { /* this resets registers we don't have
1464 documentation for on the as99127f */
1465 /* save these registers */
1466 i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
1467 p = w83781d_read_value(client, W83781D_REG_PWMCLK12);
1468 /* Reset all except Watchdog values and last conversion values
1469 This sets fan-divs to 2, among others */
1470 w83781d_write_value(client, W83781D_REG_CONFIG, 0x80);
1471 /* Restore the registers and disable power-on abnormal beep.
1472 This saves FAN 1/2/3 input/output values set by BIOS. */
1473 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1474 w83781d_write_value(client, W83781D_REG_PWMCLK12, p);
1475 /* Disable master beep-enable (reset turns it on).
1476 Individual beep_mask should be reset to off but for some reason
1477 disabling this bit helps some people not get beeped */
1478 w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1481 data->vrm = vid_which_vrm();
1483 if ((type != w83781d) && (type != as99127f)) {
1484 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
1485 for (i = 1; i <= 3; i++) {
1486 if (!(tmp & BIT_SCFG1[i - 1])) {
1487 data->sens[i - 1] = W83781D_DEFAULT_BETA;
1489 if (w83781d_read_value
1491 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1492 data->sens[i - 1] = 1;
1494 data->sens[i - 1] = 2;
1496 if (type == w83783s && i == 2)
1501 if (init && type != as99127f) {
1503 tmp = w83781d_read_value(client, W83781D_REG_TEMP2_CONFIG);
1505 dev_warn(&client->dev, "Enabling temp2, readings "
1506 "might not make sense\n");
1507 w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG,
1512 if (type != w83783s) {
1513 tmp = w83781d_read_value(client,
1514 W83781D_REG_TEMP3_CONFIG);
1516 dev_warn(&client->dev, "Enabling temp3, "
1517 "readings might not make sense\n");
1518 w83781d_write_value(client,
1519 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1523 if (type != w83781d) {
1524 /* enable comparator mode for temp2 and temp3 so
1525 alarm indication will work correctly */
1526 i = w83781d_read_value(client, W83781D_REG_IRQ);
1528 w83781d_write_value(client, W83781D_REG_IRQ,
1533 /* Start monitoring */
1534 w83781d_write_value(client, W83781D_REG_CONFIG,
1535 (w83781d_read_value(client,
1536 W83781D_REG_CONFIG) & 0xf7)
1540 static struct w83781d_data *w83781d_update_device(struct device *dev)
1542 struct i2c_client *client = to_i2c_client(dev);
1543 struct w83781d_data *data = i2c_get_clientdata(client);
1546 down(&data->update_lock);
1548 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1550 dev_dbg(dev, "Starting device update\n");
1552 for (i = 0; i <= 8; i++) {
1553 if (data->type == w83783s && i == 1)
1554 continue; /* 783S has no in1 */
1556 w83781d_read_value(client, W83781D_REG_IN(i));
1558 w83781d_read_value(client, W83781D_REG_IN_MIN(i));
1560 w83781d_read_value(client, W83781D_REG_IN_MAX(i));
1561 if ((data->type != w83782d)
1562 && (data->type != w83627hf) && (i == 6))
1565 for (i = 1; i <= 3; i++) {
1567 w83781d_read_value(client, W83781D_REG_FAN(i));
1568 data->fan_min[i - 1] =
1569 w83781d_read_value(client, W83781D_REG_FAN_MIN(i));
1571 if (data->type != w83781d && data->type != as99127f) {
1572 for (i = 1; i <= 4; i++) {
1574 w83781d_read_value(client,
1575 W83781D_REG_PWM(i));
1576 if ((data->type != w83782d
1577 || i2c_is_isa_client(client))
1581 /* Only PWM2 can be disabled */
1582 data->pwmenable[1] = (w83781d_read_value(client,
1583 W83781D_REG_PWMCLK12) & 0x08) >> 3;
1586 data->temp = w83781d_read_value(client, W83781D_REG_TEMP(1));
1588 w83781d_read_value(client, W83781D_REG_TEMP_OVER(1));
1589 data->temp_max_hyst =
1590 w83781d_read_value(client, W83781D_REG_TEMP_HYST(1));
1592 w83781d_read_value(client, W83781D_REG_TEMP(2));
1593 data->temp_max_add[0] =
1594 w83781d_read_value(client, W83781D_REG_TEMP_OVER(2));
1595 data->temp_max_hyst_add[0] =
1596 w83781d_read_value(client, W83781D_REG_TEMP_HYST(2));
1597 if (data->type != w83783s) {
1599 w83781d_read_value(client, W83781D_REG_TEMP(3));
1600 data->temp_max_add[1] =
1601 w83781d_read_value(client,
1602 W83781D_REG_TEMP_OVER(3));
1603 data->temp_max_hyst_add[1] =
1604 w83781d_read_value(client,
1605 W83781D_REG_TEMP_HYST(3));
1607 i = w83781d_read_value(client, W83781D_REG_VID_FANDIV);
1608 data->vid = i & 0x0f;
1609 data->vid |= (w83781d_read_value(client,
1610 W83781D_REG_CHIPID) & 0x01) << 4;
1611 data->fan_div[0] = (i >> 4) & 0x03;
1612 data->fan_div[1] = (i >> 6) & 0x03;
1613 data->fan_div[2] = (w83781d_read_value(client,
1614 W83781D_REG_PIN) >> 6) & 0x03;
1615 if ((data->type != w83781d) && (data->type != as99127f)) {
1616 i = w83781d_read_value(client, W83781D_REG_VBAT);
1617 data->fan_div[0] |= (i >> 3) & 0x04;
1618 data->fan_div[1] |= (i >> 4) & 0x04;
1619 data->fan_div[2] |= (i >> 5) & 0x04;
1622 w83781d_read_value(client,
1623 W83781D_REG_ALARM1) +
1624 (w83781d_read_value(client, W83781D_REG_ALARM2) << 8);
1625 if ((data->type == w83782d) || (data->type == w83627hf)) {
1627 w83781d_read_value(client,
1628 W83781D_REG_ALARM3) << 16;
1630 i = w83781d_read_value(client, W83781D_REG_BEEP_INTS2);
1631 data->beep_enable = i >> 7;
1632 data->beep_mask = ((i & 0x7f) << 8) +
1633 w83781d_read_value(client, W83781D_REG_BEEP_INTS1);
1634 if ((data->type != w83781d) && (data->type != as99127f)) {
1636 w83781d_read_value(client,
1637 W83781D_REG_BEEP_INTS3) << 16;
1639 data->last_updated = jiffies;
1643 up(&data->update_lock);
1649 sensors_w83781d_init(void)
1653 res = i2c_add_driver(&w83781d_driver);
1657 res = i2c_isa_add_driver(&w83781d_isa_driver);
1659 i2c_del_driver(&w83781d_driver);
1667 sensors_w83781d_exit(void)
1669 i2c_isa_del_driver(&w83781d_isa_driver);
1670 i2c_del_driver(&w83781d_driver);
1673 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1674 "Philip Edelbrock <phil@netroedge.com>, "
1675 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1676 MODULE_DESCRIPTION("W83781D driver");
1677 MODULE_LICENSE("GPL");
1679 module_init(sensors_w83781d_init);
1680 module_exit(sensors_w83781d_exit);