git.oblomov.eu Git - linux-2.6/blob - drivers/acpi/processor_idle.c

   1 /*
   2  * processor_idle - idle state submodule to the ACPI processor driver
   3  *
   4  *  Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
   5  *  Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
   6  *  Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
   7  *  Copyright (C) 2004  Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
   8  *                      - Added processor hotplug support
   9  *  Copyright (C) 2005  Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
  10  *                      - Added support for C3 on SMP
  11  *
  12  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  13  *
  14  *  This program is free software; you can redistribute it and/or modify
  15  *  it under the terms of the GNU General Public License as published by
  16  *  the Free Software Foundation; either version 2 of the License, or (at
  17  *  your option) any later version.
  18  *
  19  *  This program is distributed in the hope that it will be useful, but
  20  *  WITHOUT ANY WARRANTY; without even the implied warranty of
  21  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  22  *  General Public License for more details.
  23  *
  24  *  You should have received a copy of the GNU General Public License along
  25  *  with this program; if not, write to the Free Software Foundation, Inc.,
  26  *  59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  27  *
  28  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  29  */
  30
  31 #include <linux/kernel.h>
  32 #include <linux/module.h>
  33 #include <linux/init.h>
  34 #include <linux/cpufreq.h>
  35 #include <linux/proc_fs.h>
  36 #include <linux/seq_file.h>
  37 #include <linux/acpi.h>
  38 #include <linux/dmi.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/sched.h>        /* need_resched() */
  41 #include <linux/latency.h>
  42 #include <linux/clockchips.h>
  43
  44 /*
  45  * Include the apic definitions for x86 to have the APIC timer related defines
  46  * available also for UP (on SMP it gets magically included via linux/smp.h).
  47  * asm/acpi.h is not an option, as it would require more include magic. Also
  48  * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
  49  */
  50 #ifdef CONFIG_X86
  51 #include <asm/apic.h>
  52 #endif
  53
  54 #include <asm/io.h>
  55 #include <asm/uaccess.h>
  56
  57 #include <acpi/acpi_bus.h>
  58 #include <acpi/processor.h>
  59
  60 #define ACPI_PROCESSOR_COMPONENT        0x01000000
  61 #define ACPI_PROCESSOR_CLASS            "processor"
  62 #define _COMPONENT              ACPI_PROCESSOR_COMPONENT
  63 ACPI_MODULE_NAME("processor_idle");
  64 #define ACPI_PROCESSOR_FILE_POWER       "power"
  65 #define US_TO_PM_TIMER_TICKS(t)         ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
  66 #define PM_TIMER_TICK_NS                (1000000000ULL/PM_TIMER_FREQUENCY)
  67 #define C2_OVERHEAD                     4       /* 1us (3.579 ticks per us) */
  68 #define C3_OVERHEAD                     4       /* 1us (3.579 ticks per us) */
  69 static void (*pm_idle_save) (void) __read_mostly;
  70 module_param(max_cstate, uint, 0644);
  71
  72 static unsigned int nocst __read_mostly;
  73 module_param(nocst, uint, 0000);
  74
  75 /*
  76  * bm_history -- bit-mask with a bit per jiffy of bus-master activity
  77  * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms
  78  * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms
  79  * 100 HZ: 0x0000000F: 4 jiffies = 40ms
  80  * reduce history for more aggressive entry into C3
  81  */
  82 static unsigned int bm_history __read_mostly =
  83     (HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1));
  84 module_param(bm_history, uint, 0644);
  85 /* --------------------------------------------------------------------------
  86                                 Power Management
  87    -------------------------------------------------------------------------- */
  88
  89 /*
  90  * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
  91  * For now disable this. Probably a bug somewhere else.
  92  *
  93  * To skip this limit, boot/load with a large max_cstate limit.
  94  */
  95 static int set_max_cstate(struct dmi_system_id *id)
  96 {
  97         if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
  98                 return 0;
  99
 100         printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
 101                " Override with \"processor.max_cstate=%d\"\n", id->ident,
 102                (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
 103
 104         max_cstate = (long)id->driver_data;
 105
 106         return 0;
 107 }
 108
 109 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
 110    callers to only run once -AK */
 111 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
 112         { set_max_cstate, "IBM ThinkPad R40e", {
 113           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 114           DMI_MATCH(DMI_BIOS_VERSION,"1SET70WW")}, (void *)1},
 115         { set_max_cstate, "IBM ThinkPad R40e", {
 116           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 117           DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1},
 118         { set_max_cstate, "IBM ThinkPad R40e", {
 119           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 120           DMI_MATCH(DMI_BIOS_VERSION,"1SET43WW") }, (void*)1},
 121         { set_max_cstate, "IBM ThinkPad R40e", {
 122           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 123           DMI_MATCH(DMI_BIOS_VERSION,"1SET45WW") }, (void*)1},
 124         { set_max_cstate, "IBM ThinkPad R40e", {
 125           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 126           DMI_MATCH(DMI_BIOS_VERSION,"1SET47WW") }, (void*)1},
 127         { set_max_cstate, "IBM ThinkPad R40e", {
 128           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 129           DMI_MATCH(DMI_BIOS_VERSION,"1SET50WW") }, (void*)1},
 130         { set_max_cstate, "IBM ThinkPad R40e", {
 131           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 132           DMI_MATCH(DMI_BIOS_VERSION,"1SET52WW") }, (void*)1},
 133         { set_max_cstate, "IBM ThinkPad R40e", {
 134           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 135           DMI_MATCH(DMI_BIOS_VERSION,"1SET55WW") }, (void*)1},
 136         { set_max_cstate, "IBM ThinkPad R40e", {
 137           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 138           DMI_MATCH(DMI_BIOS_VERSION,"1SET56WW") }, (void*)1},
 139         { set_max_cstate, "IBM ThinkPad R40e", {
 140           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 141           DMI_MATCH(DMI_BIOS_VERSION,"1SET59WW") }, (void*)1},
 142         { set_max_cstate, "IBM ThinkPad R40e", {
 143           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 144           DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }, (void*)1},
 145         { set_max_cstate, "IBM ThinkPad R40e", {
 146           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 147           DMI_MATCH(DMI_BIOS_VERSION,"1SET61WW") }, (void*)1},
 148         { set_max_cstate, "IBM ThinkPad R40e", {
 149           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 150           DMI_MATCH(DMI_BIOS_VERSION,"1SET62WW") }, (void*)1},
 151         { set_max_cstate, "IBM ThinkPad R40e", {
 152           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 153           DMI_MATCH(DMI_BIOS_VERSION,"1SET64WW") }, (void*)1},
 154         { set_max_cstate, "IBM ThinkPad R40e", {
 155           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 156           DMI_MATCH(DMI_BIOS_VERSION,"1SET65WW") }, (void*)1},
 157         { set_max_cstate, "IBM ThinkPad R40e", {
 158           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 159           DMI_MATCH(DMI_BIOS_VERSION,"1SET68WW") }, (void*)1},
 160         { set_max_cstate, "Medion 41700", {
 161           DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
 162           DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1},
 163         { set_max_cstate, "Clevo 5600D", {
 164           DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
 165           DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
 166          (void *)2},
 167         {},
 168 };
 169
 170 static inline u32 ticks_elapsed(u32 t1, u32 t2)
 171 {
 172         if (t2 >= t1)
 173                 return (t2 - t1);
 174         else if (!(acpi_gbl_FADT.flags & ACPI_FADT_32BIT_TIMER))
 175                 return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
 176         else
 177                 return ((0xFFFFFFFF - t1) + t2);
 178 }
 179
 180 static void
 181 acpi_processor_power_activate(struct acpi_processor *pr,
 182                               struct acpi_processor_cx *new)
 183 {
 184         struct acpi_processor_cx *old;
 185
 186         if (!pr || !new)
 187                 return;
 188
 189         old = pr->power.state;
 190
 191         if (old)
 192                 old->promotion.count = 0;
 193         new->demotion.count = 0;
 194
 195         /* Cleanup from old state. */
 196         if (old) {
 197                 switch (old->type) {
 198                 case ACPI_STATE_C3:
 199                         /* Disable bus master reload */
 200                         if (new->type != ACPI_STATE_C3 && pr->flags.bm_check)
 201                                 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
 202                         break;
 203                 }
 204         }
 205
 206         /* Prepare to use new state. */
 207         switch (new->type) {
 208         case ACPI_STATE_C3:
 209                 /* Enable bus master reload */
 210                 if (old->type != ACPI_STATE_C3 && pr->flags.bm_check)
 211                         acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
 212                 break;
 213         }
 214
 215         pr->power.state = new;
 216
 217         return;
 218 }
 219
 220 static void acpi_safe_halt(void)
 221 {
 222         current_thread_info()->status &= ~TS_POLLING;
 223         /*
 224          * TS_POLLING-cleared state must be visible before we
 225          * test NEED_RESCHED:
 226          */
 227         smp_mb();
 228         if (!need_resched())
 229                 safe_halt();
 230         current_thread_info()->status |= TS_POLLING;
 231 }
 232
 233 static atomic_t c3_cpu_count;
 234
 235 /* Common C-state entry for C2, C3, .. */
 236 static void acpi_cstate_enter(struct acpi_processor_cx *cstate)
 237 {
 238         if (cstate->space_id == ACPI_CSTATE_FFH) {
 239                 /* Call into architectural FFH based C-state */
 240                 acpi_processor_ffh_cstate_enter(cstate);
 241         } else {
 242                 int unused;
 243                 /* IO port based C-state */
 244                 inb(cstate->address);
 245                 /* Dummy wait op - must do something useless after P_LVL2 read
 246                    because chipsets cannot guarantee that STPCLK# signal
 247                    gets asserted in time to freeze execution properly. */
 248                 unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
 249         }
 250 }
 251
 252 #ifdef ARCH_APICTIMER_STOPS_ON_C3
 253
 254 /*
 255  * Some BIOS implementations switch to C3 in the published C2 state.
 256  * This seems to be a common problem on AMD boxen, but other vendors
 257  * are affected too. We pick the most conservative approach: we assume
 258  * that the local APIC stops in both C2 and C3.
 259  */
 260 static void acpi_timer_check_state(int state, struct acpi_processor *pr,
 261                                    struct acpi_processor_cx *cx)
 262 {
 263         struct acpi_processor_power *pwr = &pr->power;
 264         u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
 265
 266         /*
 267          * Check, if one of the previous states already marked the lapic
 268          * unstable
 269          */
 270         if (pwr->timer_broadcast_on_state < state)
 271                 return;
 272
 273         if (cx->type >= type)
 274                 pr->power.timer_broadcast_on_state = state;
 275 }
 276
 277 static void acpi_propagate_timer_broadcast(struct acpi_processor *pr)
 278 {
 279 #ifdef CONFIG_GENERIC_CLOCKEVENTS
 280         unsigned long reason;
 281
 282         reason = pr->power.timer_broadcast_on_state < INT_MAX ?
 283                 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
 284
 285         clockevents_notify(reason, &pr->id);
 286 #else
 287         cpumask_t mask = cpumask_of_cpu(pr->id);
 288
 289         if (pr->power.timer_broadcast_on_state < INT_MAX)
 290                 on_each_cpu(switch_APIC_timer_to_ipi, &mask, 1, 1);
 291         else
 292                 on_each_cpu(switch_ipi_to_APIC_timer, &mask, 1, 1);
 293 #endif
 294 }
 295
 296 /* Power(C) State timer broadcast control */
 297 static void acpi_state_timer_broadcast(struct acpi_processor *pr,
 298                                        struct acpi_processor_cx *cx,
 299                                        int broadcast)
 300 {
 301 #ifdef CONFIG_GENERIC_CLOCKEVENTS
 302
 303         int state = cx - pr->power.states;
 304
 305         if (state >= pr->power.timer_broadcast_on_state) {
 306                 unsigned long reason;
 307
 308                 reason = broadcast ?  CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
 309                         CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
 310                 clockevents_notify(reason, &pr->id);
 311         }
 312 #endif
 313 }
 314
 315 #else
 316
 317 static void acpi_timer_check_state(int state, struct acpi_processor *pr,
 318                                    struct acpi_processor_cx *cstate) { }
 319 static void acpi_propagate_timer_broadcast(struct acpi_processor *pr) { }
 320 static void acpi_state_timer_broadcast(struct acpi_processor *pr,
 321                                        struct acpi_processor_cx *cx,
 322                                        int broadcast)
 323 {
 324 }
 325
 326 #endif
 327
 328 static void acpi_processor_idle(void)
 329 {
 330         struct acpi_processor *pr = NULL;
 331         struct acpi_processor_cx *cx = NULL;
 332         struct acpi_processor_cx *next_state = NULL;
 333         int sleep_ticks = 0;
 334         u32 t1, t2 = 0;
 335
 336         /*
 337          * Interrupts must be disabled during bus mastering calculations and
 338          * for C2/C3 transitions.
 339          */
 340         local_irq_disable();
 341
 342         pr = processors[smp_processor_id()];
 343         if (!pr) {
 344                 local_irq_enable();
 345                 return;
 346         }
 347
 348         /*
 349          * Check whether we truly need to go idle, or should
 350          * reschedule:
 351          */
 352         if (unlikely(need_resched())) {
 353                 local_irq_enable();
 354                 return;
 355         }
 356
 357         cx = pr->power.state;
 358         if (!cx) {
 359                 if (pm_idle_save)
 360                         pm_idle_save();
 361                 else
 362                         acpi_safe_halt();
 363                 return;
 364         }
 365
 366         /*
 367          * Check BM Activity
 368          * -----------------
 369          * Check for bus mastering activity (if required), record, and check
 370          * for demotion.
 371          */
 372         if (pr->flags.bm_check) {
 373                 u32 bm_status = 0;
 374                 unsigned long diff = jiffies - pr->power.bm_check_timestamp;
 375
 376                 if (diff > 31)
 377                         diff = 31;
 378
 379                 pr->power.bm_activity <<= diff;
 380
 381                 acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
 382                 if (bm_status) {
 383                         pr->power.bm_activity |= 0x1;
 384                         acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
 385                 }
 386                 /*
 387                  * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
 388                  * the true state of bus mastering activity; forcing us to
 389                  * manually check the BMIDEA bit of each IDE channel.
 390                  */
 391                 else if (errata.piix4.bmisx) {
 392                         if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
 393                             || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
 394                                 pr->power.bm_activity |= 0x1;
 395                 }
 396
 397                 pr->power.bm_check_timestamp = jiffies;
 398
 399                 /*
 400                  * If bus mastering is or was active this jiffy, demote
 401                  * to avoid a faulty transition.  Note that the processor
 402                  * won't enter a low-power state during this call (to this
 403                  * function) but should upon the next.
 404                  *
 405                  * TBD: A better policy might be to fallback to the demotion
 406                  *      state (use it for this quantum only) istead of
 407                  *      demoting -- and rely on duration as our sole demotion
 408                  *      qualification.  This may, however, introduce DMA
 409                  *      issues (e.g. floppy DMA transfer overrun/underrun).
 410                  */
 411                 if ((pr->power.bm_activity & 0x1) &&
 412                     cx->demotion.threshold.bm) {
 413                         local_irq_enable();
 414                         next_state = cx->demotion.state;
 415                         goto end;
 416                 }
 417         }
 418
 419 #ifdef CONFIG_HOTPLUG_CPU
 420         /*
 421          * Check for P_LVL2_UP flag before entering C2 and above on
 422          * an SMP system. We do it here instead of doing it at _CST/P_LVL
 423          * detection phase, to work cleanly with logical CPU hotplug.
 424          */
 425         if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
 426             !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
 427                 cx = &pr->power.states[ACPI_STATE_C1];
 428 #endif
 429
 430         /*
 431          * Sleep:
 432          * ------
 433          * Invoke the current Cx state to put the processor to sleep.
 434          */
 435         if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) {
 436                 current_thread_info()->status &= ~TS_POLLING;
 437                 /*
 438                  * TS_POLLING-cleared state must be visible before we
 439                  * test NEED_RESCHED:
 440                  */
 441                 smp_mb();
 442                 if (need_resched()) {
 443                         current_thread_info()->status |= TS_POLLING;
 444                         local_irq_enable();
 445                         return;
 446                 }
 447         }
 448
 449         switch (cx->type) {
 450
 451         case ACPI_STATE_C1:
 452                 /*
 453                  * Invoke C1.
 454                  * Use the appropriate idle routine, the one that would
 455                  * be used without acpi C-states.
 456                  */
 457                 if (pm_idle_save)
 458                         pm_idle_save();
 459                 else
 460                         acpi_safe_halt();
 461
 462                 /*
 463                  * TBD: Can't get time duration while in C1, as resumes
 464                  *      go to an ISR rather than here.  Need to instrument
 465                  *      base interrupt handler.
 466                  *
 467                  * Note: the TSC better not stop in C1, sched_clock() will
 468                  *       skew otherwise.
 469                  */
 470                 sleep_ticks = 0xFFFFFFFF;
 471                 break;
 472
 473         case ACPI_STATE_C2:
 474                 /* Get start time (ticks) */
 475                 t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
 476                 /* Tell the scheduler that we are going deep-idle: */
 477                 sched_clock_idle_sleep_event();
 478                 /* Invoke C2 */
 479                 acpi_state_timer_broadcast(pr, cx, 1);
 480                 acpi_cstate_enter(cx);
 481                 /* Get end time (ticks) */
 482                 t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
 483
 484 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC)
 485                 /* TSC halts in C2, so notify users */
 486                 mark_tsc_unstable("possible TSC halt in C2");
 487 #endif
 488                 /* Compute time (ticks) that we were actually asleep */
 489                 sleep_ticks = ticks_elapsed(t1, t2);
 490
 491                 /* Tell the scheduler how much we idled: */
 492                 sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
 493
 494                 /* Re-enable interrupts */
 495                 local_irq_enable();
 496                 /* Do not account our idle-switching overhead: */
 497                 sleep_ticks -= cx->latency_ticks + C2_OVERHEAD;
 498
 499                 current_thread_info()->status |= TS_POLLING;
 500                 acpi_state_timer_broadcast(pr, cx, 0);
 501                 break;
 502
 503         case ACPI_STATE_C3:
 504                 /*
 505                  * disable bus master
 506                  * bm_check implies we need ARB_DIS
 507                  * !bm_check implies we need cache flush
 508                  * bm_control implies whether we can do ARB_DIS
 509                  *
 510                  * That leaves a case where bm_check is set and bm_control is
 511                  * not set. In that case we cannot do much, we enter C3
 512                  * without doing anything.
 513                  */
 514                 if (pr->flags.bm_check && pr->flags.bm_control) {
 515                         if (atomic_inc_return(&c3_cpu_count) ==
 516                             num_online_cpus()) {
 517                                 /*
 518                                  * All CPUs are trying to go to C3
 519                                  * Disable bus master arbitration
 520                                  */
 521                                 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1);
 522                         }
 523                 } else if (!pr->flags.bm_check) {
 524                         /* SMP with no shared cache... Invalidate cache  */
 525                         ACPI_FLUSH_CPU_CACHE();
 526                 }
 527
 528                 /* Get start time (ticks) */
 529                 t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
 530                 /* Invoke C3 */
 531                 acpi_state_timer_broadcast(pr, cx, 1);
 532                 /* Tell the scheduler that we are going deep-idle: */
 533                 sched_clock_idle_sleep_event();
 534                 acpi_cstate_enter(cx);
 535                 /* Get end time (ticks) */
 536                 t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
 537                 if (pr->flags.bm_check && pr->flags.bm_control) {
 538                         /* Enable bus master arbitration */
 539                         atomic_dec(&c3_cpu_count);
 540                         acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0);
 541                 }
 542
 543 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC)
 544                 /* TSC halts in C3, so notify users */
 545                 mark_tsc_unstable("TSC halts in C3");
 546 #endif
 547                 /* Compute time (ticks) that we were actually asleep */
 548                 sleep_ticks = ticks_elapsed(t1, t2);
 549                 /* Tell the scheduler how much we idled: */
 550                 sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
 551
 552                 /* Re-enable interrupts */
 553                 local_irq_enable();
 554                 /* Do not account our idle-switching overhead: */
 555                 sleep_ticks -= cx->latency_ticks + C3_OVERHEAD;
 556
 557                 current_thread_info()->status |= TS_POLLING;
 558                 acpi_state_timer_broadcast(pr, cx, 0);
 559                 break;
 560
 561         default:
 562                 local_irq_enable();
 563                 return;
 564         }
 565         cx->usage++;
 566         if ((cx->type != ACPI_STATE_C1) && (sleep_ticks > 0))
 567                 cx->time += sleep_ticks;
 568
 569         next_state = pr->power.state;
 570
 571 #ifdef CONFIG_HOTPLUG_CPU
 572         /* Don't do promotion/demotion */
 573         if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) &&
 574             !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) {
 575                 next_state = cx;
 576                 goto end;
 577         }
 578 #endif
 579
 580         /*
 581          * Promotion?
 582          * ----------
 583          * Track the number of longs (time asleep is greater than threshold)
 584          * and promote when the count threshold is reached.  Note that bus
 585          * mastering activity may prevent promotions.
 586          * Do not promote above max_cstate.
 587          */
 588         if (cx->promotion.state &&
 589             ((cx->promotion.state - pr->power.states) <= max_cstate)) {
 590                 if (sleep_ticks > cx->promotion.threshold.ticks &&
 591                   cx->promotion.state->latency <= system_latency_constraint()) {
 592                         cx->promotion.count++;
 593                         cx->demotion.count = 0;
 594                         if (cx->promotion.count >=
 595                             cx->promotion.threshold.count) {
 596                                 if (pr->flags.bm_check) {
 597                                         if (!
 598                                             (pr->power.bm_activity & cx->
 599                                              promotion.threshold.bm)) {
 600                                                 next_state =
 601                                                     cx->promotion.state;
 602                                                 goto end;
 603                                         }
 604                                 } else {
 605                                         next_state = cx->promotion.state;
 606                                         goto end;
 607                                 }
 608                         }
 609                 }
 610         }
 611
 612         /*
 613          * Demotion?
 614          * ---------
 615          * Track the number of shorts (time asleep is less than time threshold)
 616          * and demote when the usage threshold is reached.
 617          */
 618         if (cx->demotion.state) {
 619                 if (sleep_ticks < cx->demotion.threshold.ticks) {
 620                         cx->demotion.count++;
 621                         cx->promotion.count = 0;
 622                         if (cx->demotion.count >= cx->demotion.threshold.count) {
 623                                 next_state = cx->demotion.state;
 624                                 goto end;
 625                         }
 626                 }
 627         }
 628
 629       end:
 630         /*
 631          * Demote if current state exceeds max_cstate
 632          * or if the latency of the current state is unacceptable
 633          */
 634         if ((pr->power.state - pr->power.states) > max_cstate ||
 635                 pr->power.state->latency > system_latency_constraint()) {
 636                 if (cx->demotion.state)
 637                         next_state = cx->demotion.state;
 638         }
 639
 640         /*
 641          * New Cx State?
 642          * -------------
 643          * If we're going to start using a new Cx state we must clean up
 644          * from the previous and prepare to use the new.
 645          */
 646         if (next_state != pr->power.state)
 647                 acpi_processor_power_activate(pr, next_state);
 648 }
 649
 650 static int acpi_processor_set_power_policy(struct acpi_processor *pr)
 651 {
 652         unsigned int i;
 653         unsigned int state_is_set = 0;
 654         struct acpi_processor_cx *lower = NULL;
 655         struct acpi_processor_cx *higher = NULL;
 656         struct acpi_processor_cx *cx;
 657
 658
 659         if (!pr)
 660                 return -EINVAL;
 661
 662         /*
 663          * This function sets the default Cx state policy (OS idle handler).
 664          * Our scheme is to promote quickly to C2 but more conservatively
 665          * to C3.  We're favoring C2  for its characteristics of low latency
 666          * (quick response), good power savings, and ability to allow bus
 667          * mastering activity.  Note that the Cx state policy is completely
 668          * customizable and can be altered dynamically.
 669          */
 670
 671         /* startup state */
 672         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
 673                 cx = &pr->power.states[i];
 674                 if (!cx->valid)
 675                         continue;
 676
 677                 if (!state_is_set)
 678                         pr->power.state = cx;
 679                 state_is_set++;
 680                 break;
 681         }
 682
 683         if (!state_is_set)
 684                 return -ENODEV;
 685
 686         /* demotion */
 687         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
 688                 cx = &pr->power.states[i];
 689                 if (!cx->valid)
 690                         continue;
 691
 692                 if (lower) {
 693                         cx->demotion.state = lower;
 694                         cx->demotion.threshold.ticks = cx->latency_ticks;
 695                         cx->demotion.threshold.count = 1;
 696                         if (cx->type == ACPI_STATE_C3)
 697                                 cx->demotion.threshold.bm = bm_history;
 698                 }
 699
 700                 lower = cx;
 701         }
 702
 703         /* promotion */
 704         for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) {
 705                 cx = &pr->power.states[i];
 706                 if (!cx->valid)
 707                         continue;
 708
 709                 if (higher) {
 710                         cx->promotion.state = higher;
 711                         cx->promotion.threshold.ticks = cx->latency_ticks;
 712                         if (cx->type >= ACPI_STATE_C2)
 713                                 cx->promotion.threshold.count = 4;
 714                         else
 715                                 cx->promotion.threshold.count = 10;
 716                         if (higher->type == ACPI_STATE_C3)
 717                                 cx->promotion.threshold.bm = bm_history;
 718                 }
 719
 720                 higher = cx;
 721         }
 722
 723         return 0;
 724 }
 725
 726 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
 727 {
 728
 729         if (!pr)
 730                 return -EINVAL;
 731
 732         if (!pr->pblk)
 733                 return -ENODEV;
 734
 735         /* if info is obtained from pblk/fadt, type equals state */
 736         pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
 737         pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
 738
 739 #ifndef CONFIG_HOTPLUG_CPU
 740         /*
 741          * Check for P_LVL2_UP flag before entering C2 and above on
 742          * an SMP system.
 743          */
 744         if ((num_online_cpus() > 1) &&
 745             !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
 746                 return -ENODEV;
 747 #endif
 748
 749         /* determine C2 and C3 address from pblk */
 750         pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
 751         pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
 752
 753         /* determine latencies from FADT */
 754         pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
 755         pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
 756
 757         ACPI_DEBUG_PRINT((ACPI_DB_INFO,
 758                           "lvl2[0x%08x] lvl3[0x%08x]\n",
 759                           pr->power.states[ACPI_STATE_C2].address,
 760                           pr->power.states[ACPI_STATE_C3].address));
 761
 762         return 0;
 763 }
 764
 765 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
 766 {
 767         if (!pr->power.states[ACPI_STATE_C1].valid) {
 768                 /* set the first C-State to C1 */
 769                 /* all processors need to support C1 */
 770                 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
 771                 pr->power.states[ACPI_STATE_C1].valid = 1;
 772         }
 773         /* the C0 state only exists as a filler in our array */
 774         pr->power.states[ACPI_STATE_C0].valid = 1;
 775         return 0;
 776 }
 777
 778 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
 779 {
 780         acpi_status status = 0;
 781         acpi_integer count;
 782         int current_count;
 783         int i;
 784         struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
 785         union acpi_object *cst;
 786
 787
 788         if (nocst)
 789                 return -ENODEV;
 790
 791         current_count = 0;
 792
 793         status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
 794         if (ACPI_FAILURE(status)) {
 795                 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
 796                 return -ENODEV;
 797         }
 798
 799         cst = buffer.pointer;
 800
 801         /* There must be at least 2 elements */
 802         if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
 803                 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
 804                 status = -EFAULT;
 805                 goto end;
 806         }
 807
 808         count = cst->package.elements[0].integer.value;
 809
 810         /* Validate number of power states. */
 811         if (count < 1 || count != cst->package.count - 1) {
 812                 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
 813                 status = -EFAULT;
 814                 goto end;
 815         }
 816
 817         /* Tell driver that at least _CST is supported. */
 818         pr->flags.has_cst = 1;
 819
 820         for (i = 1; i <= count; i++) {
 821                 union acpi_object *element;
 822                 union acpi_object *obj;
 823                 struct acpi_power_register *reg;
 824                 struct acpi_processor_cx cx;
 825
 826                 memset(&cx, 0, sizeof(cx));
 827
 828                 element = &(cst->package.elements[i]);
 829                 if (element->type != ACPI_TYPE_PACKAGE)
 830                         continue;
 831
 832                 if (element->package.count != 4)
 833                         continue;
 834
 835                 obj = &(element->package.elements[0]);
 836
 837                 if (obj->type != ACPI_TYPE_BUFFER)
 838                         continue;
 839
 840                 reg = (struct acpi_power_register *)obj->buffer.pointer;
 841
 842                 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
 843                     (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
 844                         continue;
 845
 846                 /* There should be an easy way to extract an integer... */
 847                 obj = &(element->package.elements[1]);
 848                 if (obj->type != ACPI_TYPE_INTEGER)
 849                         continue;
 850
 851                 cx.type = obj->integer.value;
 852                 /*
 853                  * Some buggy BIOSes won't list C1 in _CST -
 854                  * Let acpi_processor_get_power_info_default() handle them later
 855                  */
 856                 if (i == 1 && cx.type != ACPI_STATE_C1)
 857                         current_count++;
 858
 859                 cx.address = reg->address;
 860                 cx.index = current_count + 1;
 861
 862                 cx.space_id = ACPI_CSTATE_SYSTEMIO;
 863                 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
 864                         if (acpi_processor_ffh_cstate_probe
 865                                         (pr->id, &cx, reg) == 0) {
 866                                 cx.space_id = ACPI_CSTATE_FFH;
 867                         } else if (cx.type != ACPI_STATE_C1) {
 868                                 /*
 869                                  * C1 is a special case where FIXED_HARDWARE
 870                                  * can be handled in non-MWAIT way as well.
 871                                  * In that case, save this _CST entry info.
 872                                  * That is, we retain space_id of SYSTEM_IO for
 873                                  * halt based C1.
 874                                  * Otherwise, ignore this info and continue.
 875                                  */
 876                                 continue;
 877                         }
 878                 }
 879
 880                 obj = &(element->package.elements[2]);
 881                 if (obj->type != ACPI_TYPE_INTEGER)
 882                         continue;
 883
 884                 cx.latency = obj->integer.value;
 885
 886                 obj = &(element->package.elements[3]);
 887                 if (obj->type != ACPI_TYPE_INTEGER)
 888                         continue;
 889
 890                 cx.power = obj->integer.value;
 891
 892                 current_count++;
 893                 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
 894
 895                 /*
 896                  * We support total ACPI_PROCESSOR_MAX_POWER - 1
 897                  * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
 898                  */
 899                 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
 900                         printk(KERN_WARNING
 901                                "Limiting number of power states to max (%d)\n",
 902                                ACPI_PROCESSOR_MAX_POWER);
 903                         printk(KERN_WARNING
 904                                "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
 905                         break;
 906                 }
 907         }
 908
 909         ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
 910                           current_count));
 911
 912         /* Validate number of power states discovered */
 913         if (current_count < 2)
 914                 status = -EFAULT;
 915
 916       end:
 917         kfree(buffer.pointer);
 918
 919         return status;
 920 }
 921
 922 static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
 923 {
 924
 925         if (!cx->address)
 926                 return;
 927
 928         /*
 929          * C2 latency must be less than or equal to 100
 930          * microseconds.
 931          */
 932         else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
 933                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
 934                                   "latency too large [%d]\n", cx->latency));
 935                 return;
 936         }
 937
 938         /*
 939          * Otherwise we've met all of our C2 requirements.
 940          * Normalize the C2 latency to expidite policy
 941          */
 942         cx->valid = 1;
 943         cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
 944
 945         return;
 946 }
 947
 948 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
 949                                            struct acpi_processor_cx *cx)
 950 {
 951         static int bm_check_flag;
 952
 953
 954         if (!cx->address)
 955                 return;
 956
 957         /*
 958          * C3 latency must be less than or equal to 1000
 959          * microseconds.
 960          */
 961         else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
 962                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
 963                                   "latency too large [%d]\n", cx->latency));
 964                 return;
 965         }
 966
 967         /*
 968          * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
 969          * DMA transfers are used by any ISA device to avoid livelock.
 970          * Note that we could disable Type-F DMA (as recommended by
 971          * the erratum), but this is known to disrupt certain ISA
 972          * devices thus we take the conservative approach.
 973          */
 974         else if (errata.piix4.fdma) {
 975                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
 976                                   "C3 not supported on PIIX4 with Type-F DMA\n"));
 977                 return;
 978         }
 979
 980         /* All the logic here assumes flags.bm_check is same across all CPUs */
 981         if (!bm_check_flag) {
 982                 /* Determine whether bm_check is needed based on CPU  */
 983                 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
 984                 bm_check_flag = pr->flags.bm_check;
 985         } else {
 986                 pr->flags.bm_check = bm_check_flag;
 987         }
 988
 989         if (pr->flags.bm_check) {
 990                 if (!pr->flags.bm_control) {
 991                         if (pr->flags.has_cst != 1) {
 992                                 /* bus mastering control is necessary */
 993                                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
 994                                         "C3 support requires BM control\n"));
 995                                 return;
 996                         } else {
 997                                 /* Here we enter C3 without bus mastering */
 998                                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
 999                                         "C3 support without BM control\n"));
1000                         }
1001                 }
1002         } else {
1003                 /*
1004                  * WBINVD should be set in fadt, for C3 state to be
1005                  * supported on when bm_check is not required.
1006                  */
1007                 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
1008                         ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1009                                           "Cache invalidation should work properly"
1010                                           " for C3 to be enabled on SMP systems\n"));
1011                         return;
1012                 }
1013                 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
1014         }
1015
1016         /*
1017          * Otherwise we've met all of our C3 requirements.
1018          * Normalize the C3 latency to expidite policy.  Enable
1019          * checking of bus mastering status (bm_check) so we can
1020          * use this in our C3 policy
1021          */
1022         cx->valid = 1;
1023         cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
1024
1025         return;
1026 }
1027
1028 static int acpi_processor_power_verify(struct acpi_processor *pr)
1029 {
1030         unsigned int i;
1031         unsigned int working = 0;
1032
1033         pr->power.timer_broadcast_on_state = INT_MAX;
1034
1035         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
1036                 struct acpi_processor_cx *cx = &pr->power.states[i];
1037
1038                 switch (cx->type) {
1039                 case ACPI_STATE_C1:
1040                         cx->valid = 1;
1041                         break;
1042
1043                 case ACPI_STATE_C2:
1044                         acpi_processor_power_verify_c2(cx);
1045                         if (cx->valid)
1046                                 acpi_timer_check_state(i, pr, cx);
1047                         break;
1048
1049                 case ACPI_STATE_C3:
1050                         acpi_processor_power_verify_c3(pr, cx);
1051                         if (cx->valid)
1052                                 acpi_timer_check_state(i, pr, cx);
1053                         break;
1054                 }
1055
1056                 if (cx->valid)
1057                         working++;
1058         }
1059
1060         acpi_propagate_timer_broadcast(pr);
1061
1062         return (working);
1063 }
1064
1065 static int acpi_processor_get_power_info(struct acpi_processor *pr)
1066 {
1067         unsigned int i;
1068         int result;
1069
1070
1071         /* NOTE: the idle thread may not be running while calling
1072          * this function */
1073
1074         /* Zero initialize all the C-states info. */
1075         memset(pr->power.states, 0, sizeof(pr->power.states));
1076
1077         result = acpi_processor_get_power_info_cst(pr);
1078         if (result == -ENODEV)
1079                 result = acpi_processor_get_power_info_fadt(pr);
1080
1081         if (result)
1082                 return result;
1083
1084         acpi_processor_get_power_info_default(pr);
1085
1086         pr->power.count = acpi_processor_power_verify(pr);
1087
1088         /*
1089          * Set Default Policy
1090          * ------------------
1091          * Now that we know which states are supported, set the default
1092          * policy.  Note that this policy can be changed dynamically
1093          * (e.g. encourage deeper sleeps to conserve battery life when
1094          * not on AC).
1095          */
1096         result = acpi_processor_set_power_policy(pr);
1097         if (result)
1098                 return result;
1099
1100         /*
1101          * if one state of type C2 or C3 is available, mark this
1102          * CPU as being "idle manageable"
1103          */
1104         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
1105                 if (pr->power.states[i].valid) {
1106                         pr->power.count = i;
1107                         if (pr->power.states[i].type >= ACPI_STATE_C2)
1108                                 pr->flags.power = 1;
1109                 }
1110         }
1111
1112         return 0;
1113 }
1114
1115 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1116 {
1117         int result = 0;
1118
1119
1120         if (!pr)
1121                 return -EINVAL;
1122
1123         if (nocst) {
1124                 return -ENODEV;
1125         }
1126
1127         if (!pr->flags.power_setup_done)
1128                 return -ENODEV;
1129
1130         /* Fall back to the default idle loop */
1131         pm_idle = pm_idle_save;
1132         synchronize_sched();    /* Relies on interrupts forcing exit from idle. */
1133
1134         pr->flags.power = 0;
1135         result = acpi_processor_get_power_info(pr);
1136         if ((pr->flags.power == 1) && (pr->flags.power_setup_done))
1137                 pm_idle = acpi_processor_idle;
1138
1139         return result;
1140 }
1141
1142 /* proc interface */
1143
1144 static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
1145 {
1146         struct acpi_processor *pr = seq->private;
1147         unsigned int i;
1148
1149
1150         if (!pr)
1151                 goto end;
1152
1153         seq_printf(seq, "active state:            C%zd\n"
1154                    "max_cstate:              C%d\n"
1155                    "bus master activity:     %08x\n"
1156                    "maximum allowed latency: %d usec\n",
1157                    pr->power.state ? pr->power.state - pr->power.states : 0,
1158                    max_cstate, (unsigned)pr->power.bm_activity,
1159                    system_latency_constraint());
1160
1161         seq_puts(seq, "states:\n");
1162
1163         for (i = 1; i <= pr->power.count; i++) {
1164                 seq_printf(seq, "   %cC%d:                  ",
1165                            (&pr->power.states[i] ==
1166                             pr->power.state ? '*' : ' '), i);
1167
1168                 if (!pr->power.states[i].valid) {
1169                         seq_puts(seq, "<not supported>\n");
1170                         continue;
1171                 }
1172
1173                 switch (pr->power.states[i].type) {
1174                 case ACPI_STATE_C1:
1175                         seq_printf(seq, "type[C1] ");
1176                         break;
1177                 case ACPI_STATE_C2:
1178                         seq_printf(seq, "type[C2] ");
1179                         break;
1180                 case ACPI_STATE_C3:
1181                         seq_printf(seq, "type[C3] ");
1182                         break;
1183                 default:
1184                         seq_printf(seq, "type[--] ");
1185                         break;
1186                 }
1187
1188                 if (pr->power.states[i].promotion.state)
1189                         seq_printf(seq, "promotion[C%zd] ",
1190                                    (pr->power.states[i].promotion.state -
1191                                     pr->power.states));
1192                 else
1193                         seq_puts(seq, "promotion[--] ");
1194
1195                 if (pr->power.states[i].demotion.state)
1196                         seq_printf(seq, "demotion[C%zd] ",
1197                                    (pr->power.states[i].demotion.state -
1198                                     pr->power.states));
1199                 else
1200                         seq_puts(seq, "demotion[--] ");
1201
1202                 seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n",
1203                            pr->power.states[i].latency,
1204                            pr->power.states[i].usage,
1205                            (unsigned long long)pr->power.states[i].time);
1206         }
1207
1208       end:
1209         return 0;
1210 }
1211
1212 static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
1213 {
1214         return single_open(file, acpi_processor_power_seq_show,
1215                            PDE(inode)->data);
1216 }
1217
1218 static const struct file_operations acpi_processor_power_fops = {
1219         .open = acpi_processor_power_open_fs,
1220         .read = seq_read,
1221         .llseek = seq_lseek,
1222         .release = single_release,
1223 };
1224
1225 #ifdef CONFIG_SMP
1226 static void smp_callback(void *v)
1227 {
1228         /* we already woke the CPU up, nothing more to do */
1229 }
1230
1231 /*
1232  * This function gets called when a part of the kernel has a new latency
1233  * requirement.  This means we need to get all processors out of their C-state,
1234  * and then recalculate a new suitable C-state. Just do a cross-cpu IPI; that
1235  * wakes them all right up.
1236  */
1237 static int acpi_processor_latency_notify(struct notifier_block *b,
1238                 unsigned long l, void *v)
1239 {
1240         smp_call_function(smp_callback, NULL, 0, 1);
1241         return NOTIFY_OK;
1242 }
1243
1244 static struct notifier_block acpi_processor_latency_notifier = {
1245         .notifier_call = acpi_processor_latency_notify,
1246 };
1247 #endif
1248
1249 int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1250                               struct acpi_device *device)
1251 {
1252         acpi_status status = 0;
1253         static int first_run;
1254         struct proc_dir_entry *entry = NULL;
1255         unsigned int i;
1256
1257
1258         if (!first_run) {
1259                 dmi_check_system(processor_power_dmi_table);
1260                 if (max_cstate < ACPI_C_STATES_MAX)
1261                         printk(KERN_NOTICE
1262                                "ACPI: processor limited to max C-state %d\n",
1263                                max_cstate);
1264                 first_run++;
1265 #ifdef CONFIG_SMP
1266                 register_latency_notifier(&acpi_processor_latency_notifier);
1267 #endif
1268         }
1269
1270         if (!pr)
1271                 return -EINVAL;
1272
1273         if (acpi_gbl_FADT.cst_control && !nocst) {
1274                 status =
1275                     acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1276                 if (ACPI_FAILURE(status)) {
1277                         ACPI_EXCEPTION((AE_INFO, status,
1278                                         "Notifying BIOS of _CST ability failed"));
1279                 }
1280         }
1281
1282         acpi_processor_get_power_info(pr);
1283
1284         /*
1285          * Install the idle handler if processor power management is supported.
1286          * Note that we use previously set idle handler will be used on
1287          * platforms that only support C1.
1288          */
1289         if ((pr->flags.power) && (!boot_option_idle_override)) {
1290                 printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id);
1291                 for (i = 1; i <= pr->power.count; i++)
1292                         if (pr->power.states[i].valid)
1293                                 printk(" C%d[C%d]", i,
1294                                        pr->power.states[i].type);
1295                 printk(")\n");
1296
1297                 if (pr->id == 0) {
1298                         pm_idle_save = pm_idle;
1299                         pm_idle = acpi_processor_idle;
1300                 }
1301         }
1302
1303         /* 'power' [R] */
1304         entry = create_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1305                                   S_IRUGO, acpi_device_dir(device));
1306         if (!entry)
1307                 return -EIO;
1308         else {
1309                 entry->proc_fops = &acpi_processor_power_fops;
1310                 entry->data = acpi_driver_data(device);
1311                 entry->owner = THIS_MODULE;
1312         }
1313
1314         pr->flags.power_setup_done = 1;
1315
1316         return 0;
1317 }
1318
1319 int acpi_processor_power_exit(struct acpi_processor *pr,
1320                               struct acpi_device *device)
1321 {
1322
1323         pr->flags.power_setup_done = 0;
1324
1325         if (acpi_device_dir(device))
1326                 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1327                                   acpi_device_dir(device));
1328
1329         /* Unregister the idle handler when processor #0 is removed. */
1330         if (pr->id == 0) {
1331                 pm_idle = pm_idle_save;
1332
1333                 /*
1334                  * We are about to unload the current idle thread pm callback
1335                  * (pm_idle), Wait for all processors to update cached/local
1336                  * copies of pm_idle before proceeding.
1337                  */
1338                 cpu_idle_wait();
1339 #ifdef CONFIG_SMP
1340                 unregister_latency_notifier(&acpi_processor_latency_notifier);
1341 #endif
1342         }
1343
1344         return 0;
1345 }