2 * MPC85xx setup and early boot code plus other random bits.
4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
6 * Copyright 2005 Freescale Semiconductor Inc.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
14 #include <linux/stddef.h>
15 #include <linux/kernel.h>
16 #include <linux/pci.h>
17 #include <linux/kdev_t.h>
18 #include <linux/delay.h>
19 #include <linux/seq_file.h>
20 #include <linux/of_platform.h>
22 #include <asm/system.h>
24 #include <asm/machdep.h>
25 #include <asm/pci-bridge.h>
27 #include <mm/mmu_decl.h>
30 #include <sysdev/fsl_soc.h>
31 #include <sysdev/fsl_pci.h>
35 #include <sysdev/cpm2_pic.h>
39 static int mpc85xx_exclude_device(struct pci_controller *hose,
40 u_char bus, u_char devfn)
42 if (bus == 0 && PCI_SLOT(devfn) == 0)
43 return PCIBIOS_DEVICE_NOT_FOUND;
45 return PCIBIOS_SUCCESSFUL;
47 #endif /* CONFIG_PCI */
51 static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
55 while ((cascade_irq = cpm2_get_irq()) >= 0)
56 generic_handle_irq(cascade_irq);
61 #endif /* CONFIG_CPM2 */
63 static void __init mpc85xx_ads_pic_init(void)
67 struct device_node *np = NULL;
72 np = of_find_node_by_type(np, "open-pic");
74 printk(KERN_ERR "Could not find open-pic node\n");
78 if (of_address_to_resource(np, 0, &r)) {
79 printk(KERN_ERR "Could not map mpic register space\n");
84 mpic = mpic_alloc(np, r.start,
85 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
94 np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
96 printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
99 irq = irq_of_parse_and_map(np, 0);
103 set_irq_chained_handler(irq, cpm2_cascade);
108 * Setup the architecture
112 int port, pin, flags;
115 static const struct cpm_pin mpc8560_ads_pins[] = {
117 {3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
118 {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
119 {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
122 {3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
123 {3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
124 {3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
127 {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
128 {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
129 {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
130 {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
131 {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
132 {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
133 {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
134 {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
135 {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
136 {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
137 {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
138 {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
139 {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
140 {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
141 {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK14 */
142 {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK13 */
145 {1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
146 {1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
147 {1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
148 {1, 7, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
149 {1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
150 {1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
151 {1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
152 {1, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
153 {1, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
154 {1, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
155 {1, 14, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
156 {1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
157 {1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
158 {1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
159 {2, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK16 */
160 {2, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK15 */
163 static void __init init_ioports(void)
167 for (i = 0; i < ARRAY_SIZE(mpc8560_ads_pins); i++) {
168 const struct cpm_pin *pin = &mpc8560_ads_pins[i];
169 cpm2_set_pin(pin->port, pin->pin, pin->flags);
172 cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
173 cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
174 cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
175 cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
176 cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
177 cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
178 cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK15, CPM_CLK_RX);
179 cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK16, CPM_CLK_TX);
183 static void __init mpc85xx_ads_setup_arch(void)
186 struct device_node *np;
190 ppc_md.progress("mpc85xx_ads_setup_arch()", 0);
198 for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
199 fsl_add_bridge(np, 1);
201 ppc_md.pci_exclude_device = mpc85xx_exclude_device;
205 static void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
207 uint pvid, svid, phid1;
208 uint memsize = total_memory;
210 pvid = mfspr(SPRN_PVR);
211 svid = mfspr(SPRN_SVR);
213 seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
214 seq_printf(m, "Machine\t\t: mpc85xx\n");
215 seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
216 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
218 /* Display cpu Pll setting */
219 phid1 = mfspr(SPRN_HID1);
220 seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
222 /* Display the amount of memory */
223 seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
226 static struct of_device_id __initdata of_bus_ids[] = {
230 { .name = "localbus", },
234 static int __init declare_of_platform_devices(void)
236 of_platform_bus_probe(NULL, of_bus_ids, NULL);
240 machine_device_initcall(mpc85xx_ads, declare_of_platform_devices);
243 * Called very early, device-tree isn't unflattened
245 static int __init mpc85xx_ads_probe(void)
247 unsigned long root = of_get_flat_dt_root();
249 return of_flat_dt_is_compatible(root, "MPC85xxADS");
252 define_machine(mpc85xx_ads) {
253 .name = "MPC85xx ADS",
254 .probe = mpc85xx_ads_probe,
255 .setup_arch = mpc85xx_ads_setup_arch,
256 .init_IRQ = mpc85xx_ads_pic_init,
257 .show_cpuinfo = mpc85xx_ads_show_cpuinfo,
258 .get_irq = mpic_get_irq,
259 .restart = fsl_rstcr_restart,
260 .calibrate_decr = generic_calibrate_decr,
261 .progress = udbg_progress,