Merge branch 'master' into upstream-fixes
[linux-2.6] / drivers / infiniband / hw / ipath / ipath_intr.c
1 /*
2  * Copyright (c) 2006 QLogic, Inc. All rights reserved.
3  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
4  *
5  * This software is available to you under a choice of one of two
6  * licenses.  You may choose to be licensed under the terms of the GNU
7  * General Public License (GPL) Version 2, available from the file
8  * COPYING in the main directory of this source tree, or the
9  * OpenIB.org BSD license below:
10  *
11  *     Redistribution and use in source and binary forms, with or
12  *     without modification, are permitted provided that the following
13  *     conditions are met:
14  *
15  *      - Redistributions of source code must retain the above
16  *        copyright notice, this list of conditions and the following
17  *        disclaimer.
18  *
19  *      - Redistributions in binary form must reproduce the above
20  *        copyright notice, this list of conditions and the following
21  *        disclaimer in the documentation and/or other materials
22  *        provided with the distribution.
23  *
24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31  * SOFTWARE.
32  */
33
34 #include <linux/pci.h>
35
36 #include "ipath_kernel.h"
37 #include "ipath_verbs.h"
38 #include "ipath_common.h"
39
40 /*
41  * Called when we might have an error that is specific to a particular
42  * PIO buffer, and may need to cancel that buffer, so it can be re-used.
43  */
44 void ipath_disarm_senderrbufs(struct ipath_devdata *dd)
45 {
46         u32 piobcnt;
47         unsigned long sbuf[4];
48         /*
49          * it's possible that sendbuffererror could have bits set; might
50          * have already done this as a result of hardware error handling
51          */
52         piobcnt = dd->ipath_piobcnt2k + dd->ipath_piobcnt4k;
53         /* read these before writing errorclear */
54         sbuf[0] = ipath_read_kreg64(
55                 dd, dd->ipath_kregs->kr_sendbuffererror);
56         sbuf[1] = ipath_read_kreg64(
57                 dd, dd->ipath_kregs->kr_sendbuffererror + 1);
58         if (piobcnt > 128) {
59                 sbuf[2] = ipath_read_kreg64(
60                         dd, dd->ipath_kregs->kr_sendbuffererror + 2);
61                 sbuf[3] = ipath_read_kreg64(
62                         dd, dd->ipath_kregs->kr_sendbuffererror + 3);
63         }
64
65         if (sbuf[0] || sbuf[1] || (piobcnt > 128 && (sbuf[2] || sbuf[3]))) {
66                 int i;
67                 if (ipath_debug & (__IPATH_PKTDBG|__IPATH_DBG)) {
68                         __IPATH_DBG_WHICH(__IPATH_PKTDBG|__IPATH_DBG,
69                                           "SendbufErrs %lx %lx", sbuf[0],
70                                           sbuf[1]);
71                         if (ipath_debug & __IPATH_PKTDBG && piobcnt > 128)
72                                 printk(" %lx %lx ", sbuf[2], sbuf[3]);
73                         printk("\n");
74                 }
75
76                 for (i = 0; i < piobcnt; i++)
77                         if (test_bit(i, sbuf))
78                                 ipath_disarm_piobufs(dd, i, 1);
79                 dd->ipath_lastcancel = jiffies+3; /* no armlaunch for a bit */
80         }
81 }
82
83
84 /* These are all rcv-related errors which we want to count for stats */
85 #define E_SUM_PKTERRS \
86         (INFINIPATH_E_RHDRLEN | INFINIPATH_E_RBADTID | \
87          INFINIPATH_E_RBADVERSION | INFINIPATH_E_RHDR | \
88          INFINIPATH_E_RLONGPKTLEN | INFINIPATH_E_RSHORTPKTLEN | \
89          INFINIPATH_E_RMAXPKTLEN | INFINIPATH_E_RMINPKTLEN | \
90          INFINIPATH_E_RFORMATERR | INFINIPATH_E_RUNSUPVL | \
91          INFINIPATH_E_RUNEXPCHAR | INFINIPATH_E_REBP)
92
93 /* These are all send-related errors which we want to count for stats */
94 #define E_SUM_ERRS \
95         (INFINIPATH_E_SPIOARMLAUNCH | INFINIPATH_E_SUNEXPERRPKTNUM | \
96          INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \
97          INFINIPATH_E_SMAXPKTLEN | INFINIPATH_E_SUNSUPVL | \
98          INFINIPATH_E_SMINPKTLEN | INFINIPATH_E_SPKTLEN | \
99          INFINIPATH_E_INVALIDADDR)
100
101 /*
102  * these are errors that can occur when the link changes state while
103  * a packet is being sent or received.  This doesn't cover things
104  * like EBP or VCRC that can be the result of a sending having the
105  * link change state, so we receive a "known bad" packet.
106  */
107 #define E_SUM_LINK_PKTERRS \
108         (INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \
109          INFINIPATH_E_SMINPKTLEN | INFINIPATH_E_SPKTLEN | \
110          INFINIPATH_E_RSHORTPKTLEN | INFINIPATH_E_RMINPKTLEN | \
111          INFINIPATH_E_RUNEXPCHAR)
112
113 static u64 handle_e_sum_errs(struct ipath_devdata *dd, ipath_err_t errs)
114 {
115         u64 ignore_this_time = 0;
116
117         ipath_disarm_senderrbufs(dd);
118         if ((errs & E_SUM_LINK_PKTERRS) &&
119             !(dd->ipath_flags & IPATH_LINKACTIVE)) {
120                 /*
121                  * This can happen when SMA is trying to bring the link
122                  * up, but the IB link changes state at the "wrong" time.
123                  * The IB logic then complains that the packet isn't
124                  * valid.  We don't want to confuse people, so we just
125                  * don't print them, except at debug
126                  */
127                 ipath_dbg("Ignoring packet errors %llx, because link not "
128                           "ACTIVE\n", (unsigned long long) errs);
129                 ignore_this_time = errs & E_SUM_LINK_PKTERRS;
130         }
131
132         return ignore_this_time;
133 }
134
135 /* generic hw error messages... */
136 #define INFINIPATH_HWE_TXEMEMPARITYERR_MSG(a) \
137         { \
138                 .mask = ( INFINIPATH_HWE_TXEMEMPARITYERR_##a <<    \
139                           INFINIPATH_HWE_TXEMEMPARITYERR_SHIFT ),   \
140                 .msg = "TXE " #a " Memory Parity"            \
141         }
142 #define INFINIPATH_HWE_RXEMEMPARITYERR_MSG(a) \
143         { \
144                 .mask = ( INFINIPATH_HWE_RXEMEMPARITYERR_##a <<    \
145                           INFINIPATH_HWE_RXEMEMPARITYERR_SHIFT ),   \
146                 .msg = "RXE " #a " Memory Parity"            \
147         }
148
149 static const struct ipath_hwerror_msgs ipath_generic_hwerror_msgs[] = {
150         INFINIPATH_HWE_MSG(IBCBUSFRSPCPARITYERR, "IPATH2IB Parity"),
151         INFINIPATH_HWE_MSG(IBCBUSTOSPCPARITYERR, "IB2IPATH Parity"),
152
153         INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOBUF),
154         INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOPBC),
155         INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOLAUNCHFIFO),
156
157         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(RCVBUF),
158         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(LOOKUPQ),
159         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(EAGERTID),
160         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(EXPTID),
161         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(FLAGBUF),
162         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(DATAINFO),
163         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(HDRINFO),
164 };
165
166 /**
167  * ipath_format_hwmsg - format a single hwerror message
168  * @msg message buffer
169  * @msgl length of message buffer
170  * @hwmsg message to add to message buffer
171  */
172 static void ipath_format_hwmsg(char *msg, size_t msgl, const char *hwmsg)
173 {
174         strlcat(msg, "[", msgl);
175         strlcat(msg, hwmsg, msgl);
176         strlcat(msg, "]", msgl);
177 }
178
179 /**
180  * ipath_format_hwerrors - format hardware error messages for display
181  * @hwerrs hardware errors bit vector
182  * @hwerrmsgs hardware error descriptions
183  * @nhwerrmsgs number of hwerrmsgs
184  * @msg message buffer
185  * @msgl message buffer length
186  */
187 void ipath_format_hwerrors(u64 hwerrs,
188                            const struct ipath_hwerror_msgs *hwerrmsgs,
189                            size_t nhwerrmsgs,
190                            char *msg, size_t msgl)
191 {
192         int i;
193         const int glen =
194             sizeof(ipath_generic_hwerror_msgs) /
195             sizeof(ipath_generic_hwerror_msgs[0]);
196
197         for (i=0; i<glen; i++) {
198                 if (hwerrs & ipath_generic_hwerror_msgs[i].mask) {
199                         ipath_format_hwmsg(msg, msgl,
200                                            ipath_generic_hwerror_msgs[i].msg);
201                 }
202         }
203
204         for (i=0; i<nhwerrmsgs; i++) {
205                 if (hwerrs & hwerrmsgs[i].mask) {
206                         ipath_format_hwmsg(msg, msgl, hwerrmsgs[i].msg);
207                 }
208         }
209 }
210
211 /* return the strings for the most common link states */
212 static char *ib_linkstate(u32 linkstate)
213 {
214         char *ret;
215
216         switch (linkstate) {
217         case IPATH_IBSTATE_INIT:
218                 ret = "Init";
219                 break;
220         case IPATH_IBSTATE_ARM:
221                 ret = "Arm";
222                 break;
223         case IPATH_IBSTATE_ACTIVE:
224                 ret = "Active";
225                 break;
226         default:
227                 ret = "Down";
228         }
229
230         return ret;
231 }
232
233 static void handle_e_ibstatuschanged(struct ipath_devdata *dd,
234                                      ipath_err_t errs, int noprint)
235 {
236         u64 val;
237         u32 ltstate, lstate;
238
239         /*
240          * even if diags are enabled, we want to notice LINKINIT, etc.
241          * We just don't want to change the LED state, or
242          * dd->ipath_kregs->kr_ibcctrl
243          */
244         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
245         lstate = val & IPATH_IBSTATE_MASK;
246
247         /*
248          * this is confusing enough when it happens that I want to always put it
249          * on the console and in the logs.  If it was a requested state change,
250          * we'll have already cleared the flags, so we won't print this warning
251          */
252         if ((lstate != IPATH_IBSTATE_ARM && lstate != IPATH_IBSTATE_ACTIVE)
253                 && (dd->ipath_flags & (IPATH_LINKARMED | IPATH_LINKACTIVE))) {
254                 dev_info(&dd->pcidev->dev, "Link state changed from %s to %s\n",
255                                  (dd->ipath_flags & IPATH_LINKARMED) ? "ARM" : "ACTIVE",
256                                  ib_linkstate(lstate));
257                 /*
258                  * Flush all queued sends when link went to DOWN or INIT,
259                  * to be sure that they don't block SMA and other MAD packets
260                  */
261                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
262                                  INFINIPATH_S_ABORT);
263                 ipath_disarm_piobufs(dd, dd->ipath_lastport_piobuf,
264                                                         (unsigned)(dd->ipath_piobcnt2k +
265                                         dd->ipath_piobcnt4k) -
266                                         dd->ipath_lastport_piobuf);
267         }
268         else if (lstate == IPATH_IBSTATE_INIT || lstate == IPATH_IBSTATE_ARM ||
269             lstate == IPATH_IBSTATE_ACTIVE) {
270                 /*
271                  * only print at SMA if there is a change, debug if not
272                  * (sometimes we want to know that, usually not).
273                  */
274                 if (lstate == ((unsigned) dd->ipath_lastibcstat
275                                & IPATH_IBSTATE_MASK)) {
276                         ipath_dbg("Status change intr but no change (%s)\n",
277                                   ib_linkstate(lstate));
278                 }
279                 else
280                         ipath_cdbg(VERBOSE, "Unit %u link state %s, last "
281                                    "was %s\n", dd->ipath_unit,
282                                    ib_linkstate(lstate),
283                                    ib_linkstate((unsigned)
284                                                 dd->ipath_lastibcstat
285                                                 & IPATH_IBSTATE_MASK));
286         }
287         else {
288                 lstate = dd->ipath_lastibcstat & IPATH_IBSTATE_MASK;
289                 if (lstate == IPATH_IBSTATE_INIT ||
290                     lstate == IPATH_IBSTATE_ARM ||
291                     lstate == IPATH_IBSTATE_ACTIVE)
292                         ipath_cdbg(VERBOSE, "Unit %u link state down"
293                                    " (state 0x%x), from %s\n",
294                                    dd->ipath_unit,
295                                    (u32)val & IPATH_IBSTATE_MASK,
296                                    ib_linkstate(lstate));
297                 else
298                         ipath_cdbg(VERBOSE, "Unit %u link state changed "
299                                    "to 0x%x from down (%x)\n",
300                                    dd->ipath_unit, (u32) val, lstate);
301         }
302         ltstate = (val >> INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) &
303                 INFINIPATH_IBCS_LINKTRAININGSTATE_MASK;
304         lstate = (val >> INFINIPATH_IBCS_LINKSTATE_SHIFT) &
305                 INFINIPATH_IBCS_LINKSTATE_MASK;
306
307         if (ltstate == INFINIPATH_IBCS_LT_STATE_POLLACTIVE ||
308             ltstate == INFINIPATH_IBCS_LT_STATE_POLLQUIET) {
309                 u32 last_ltstate;
310
311                 /*
312                  * Ignore cycling back and forth from Polling.Active
313                  * to Polling.Quiet while waiting for the other end of
314                  * the link to come up. We will cycle back and forth
315                  * between them if no cable is plugged in,
316                  * the other device is powered off or disabled, etc.
317                  */
318                 last_ltstate = (dd->ipath_lastibcstat >>
319                                 INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT)
320                         & INFINIPATH_IBCS_LINKTRAININGSTATE_MASK;
321                 if (last_ltstate == INFINIPATH_IBCS_LT_STATE_POLLACTIVE
322                     || last_ltstate ==
323                     INFINIPATH_IBCS_LT_STATE_POLLQUIET) {
324                         if (dd->ipath_ibpollcnt > 40) {
325                                 dd->ipath_flags |= IPATH_NOCABLE;
326                                 *dd->ipath_statusp |=
327                                         IPATH_STATUS_IB_NOCABLE;
328                         } else
329                                 dd->ipath_ibpollcnt++;
330                         goto skip_ibchange;
331                 }
332         }
333         dd->ipath_ibpollcnt = 0;        /* some state other than 2 or 3 */
334         ipath_stats.sps_iblink++;
335         if (ltstate != INFINIPATH_IBCS_LT_STATE_LINKUP) {
336                 dd->ipath_flags |= IPATH_LINKDOWN;
337                 dd->ipath_flags &= ~(IPATH_LINKUNK | IPATH_LINKINIT
338                                      | IPATH_LINKACTIVE |
339                                      IPATH_LINKARMED);
340                 *dd->ipath_statusp &= ~IPATH_STATUS_IB_READY;
341                 dd->ipath_lli_counter = 0;
342                 if (!noprint) {
343                         if (((dd->ipath_lastibcstat >>
344                               INFINIPATH_IBCS_LINKSTATE_SHIFT) &
345                              INFINIPATH_IBCS_LINKSTATE_MASK)
346                             == INFINIPATH_IBCS_L_STATE_ACTIVE)
347                                 /* if from up to down be more vocal */
348                                 ipath_cdbg(VERBOSE,
349                                            "Unit %u link now down (%s)\n",
350                                            dd->ipath_unit,
351                                            ipath_ibcstatus_str[ltstate]);
352                         else
353                                 ipath_cdbg(VERBOSE, "Unit %u link is "
354                                            "down (%s)\n", dd->ipath_unit,
355                                            ipath_ibcstatus_str[ltstate]);
356                 }
357
358                 dd->ipath_f_setextled(dd, lstate, ltstate);
359         } else if ((val & IPATH_IBSTATE_MASK) == IPATH_IBSTATE_ACTIVE) {
360                 dd->ipath_flags |= IPATH_LINKACTIVE;
361                 dd->ipath_flags &=
362                         ~(IPATH_LINKUNK | IPATH_LINKINIT | IPATH_LINKDOWN |
363                           IPATH_LINKARMED | IPATH_NOCABLE);
364                 *dd->ipath_statusp &= ~IPATH_STATUS_IB_NOCABLE;
365                 *dd->ipath_statusp |=
366                         IPATH_STATUS_IB_READY | IPATH_STATUS_IB_CONF;
367                 dd->ipath_f_setextled(dd, lstate, ltstate);
368         } else if ((val & IPATH_IBSTATE_MASK) == IPATH_IBSTATE_INIT) {
369                 /*
370                  * set INIT and DOWN.  Down is checked by most of the other
371                  * code, but INIT is useful to know in a few places.
372                  */
373                 dd->ipath_flags |= IPATH_LINKINIT | IPATH_LINKDOWN;
374                 dd->ipath_flags &=
375                         ~(IPATH_LINKUNK | IPATH_LINKACTIVE | IPATH_LINKARMED
376                           | IPATH_NOCABLE);
377                 *dd->ipath_statusp &= ~(IPATH_STATUS_IB_NOCABLE
378                                         | IPATH_STATUS_IB_READY);
379                 dd->ipath_f_setextled(dd, lstate, ltstate);
380         } else if ((val & IPATH_IBSTATE_MASK) == IPATH_IBSTATE_ARM) {
381                 dd->ipath_flags |= IPATH_LINKARMED;
382                 dd->ipath_flags &=
383                         ~(IPATH_LINKUNK | IPATH_LINKDOWN | IPATH_LINKINIT |
384                           IPATH_LINKACTIVE | IPATH_NOCABLE);
385                 *dd->ipath_statusp &= ~(IPATH_STATUS_IB_NOCABLE
386                                         | IPATH_STATUS_IB_READY);
387                 dd->ipath_f_setextled(dd, lstate, ltstate);
388         } else {
389                 if (!noprint)
390                         ipath_dbg("IBstatuschange unit %u: %s (%x)\n",
391                                   dd->ipath_unit,
392                                   ipath_ibcstatus_str[ltstate], ltstate);
393         }
394 skip_ibchange:
395         dd->ipath_lastibcstat = val;
396 }
397
398 static void handle_supp_msgs(struct ipath_devdata *dd,
399                              unsigned supp_msgs, char msg[512])
400 {
401         /*
402          * Print the message unless it's ibc status change only, which
403          * happens so often we never want to count it.
404          */
405         if (dd->ipath_lasterror & ~INFINIPATH_E_IBSTATUSCHANGED) {
406                 ipath_decode_err(msg, sizeof msg, dd->ipath_lasterror &
407                                  ~INFINIPATH_E_IBSTATUSCHANGED);
408                 if (dd->ipath_lasterror &
409                     ~(INFINIPATH_E_RRCVEGRFULL | INFINIPATH_E_RRCVHDRFULL))
410                         ipath_dev_err(dd, "Suppressed %u messages for "
411                                       "fast-repeating errors (%s) (%llx)\n",
412                                       supp_msgs, msg,
413                                       (unsigned long long)
414                                       dd->ipath_lasterror);
415                 else {
416                         /*
417                          * rcvegrfull and rcvhdrqfull are "normal", for some
418                          * types of processes (mostly benchmarks) that send
419                          * huge numbers of messages, while not processing
420                          * them. So only complain about these at debug
421                          * level.
422                          */
423                         ipath_dbg("Suppressed %u messages for %s\n",
424                                   supp_msgs, msg);
425                 }
426         }
427 }
428
429 static unsigned handle_frequent_errors(struct ipath_devdata *dd,
430                                        ipath_err_t errs, char msg[512],
431                                        int *noprint)
432 {
433         unsigned long nc;
434         static unsigned long nextmsg_time;
435         static unsigned nmsgs, supp_msgs;
436
437         /*
438          * Throttle back "fast" messages to no more than 10 per 5 seconds.
439          * This isn't perfect, but it's a reasonable heuristic. If we get
440          * more than 10, give a 6x longer delay.
441          */
442         nc = jiffies;
443         if (nmsgs > 10) {
444                 if (time_before(nc, nextmsg_time)) {
445                         *noprint = 1;
446                         if (!supp_msgs++)
447                                 nextmsg_time = nc + HZ * 3;
448                 }
449                 else if (supp_msgs) {
450                         handle_supp_msgs(dd, supp_msgs, msg);
451                         supp_msgs = 0;
452                         nmsgs = 0;
453                 }
454         }
455         else if (!nmsgs++ || time_after(nc, nextmsg_time))
456                 nextmsg_time = nc + HZ / 2;
457
458         return supp_msgs;
459 }
460
461 static int handle_errors(struct ipath_devdata *dd, ipath_err_t errs)
462 {
463         char msg[512];
464         u64 ignore_this_time = 0;
465         int i;
466         int chkerrpkts = 0, noprint = 0;
467         unsigned supp_msgs;
468
469         supp_msgs = handle_frequent_errors(dd, errs, msg, &noprint);
470
471         /*
472          * don't report errors that are masked (includes those always
473          * ignored)
474          */
475         errs &= ~dd->ipath_maskederrs;
476
477         /* do these first, they are most important */
478         if (errs & INFINIPATH_E_HARDWARE) {
479                 /* reuse same msg buf */
480                 dd->ipath_f_handle_hwerrors(dd, msg, sizeof msg);
481         }
482
483         if (!noprint && (errs & ~dd->ipath_e_bitsextant))
484                 ipath_dev_err(dd, "error interrupt with unknown errors "
485                               "%llx set\n", (unsigned long long)
486                               (errs & ~dd->ipath_e_bitsextant));
487
488         if (errs & E_SUM_ERRS)
489                 ignore_this_time = handle_e_sum_errs(dd, errs);
490         else if ((errs & E_SUM_LINK_PKTERRS) &&
491             !(dd->ipath_flags & IPATH_LINKACTIVE)) {
492                 /*
493                  * This can happen when SMA is trying to bring the link
494                  * up, but the IB link changes state at the "wrong" time.
495                  * The IB logic then complains that the packet isn't
496                  * valid.  We don't want to confuse people, so we just
497                  * don't print them, except at debug
498                  */
499                 ipath_dbg("Ignoring packet errors %llx, because link not "
500                           "ACTIVE\n", (unsigned long long) errs);
501                 ignore_this_time = errs & E_SUM_LINK_PKTERRS;
502         }
503
504         if (supp_msgs == 250000) {
505                 /*
506                  * It's not entirely reasonable assuming that the errors set
507                  * in the last clear period are all responsible for the
508                  * problem, but the alternative is to assume it's the only
509                  * ones on this particular interrupt, which also isn't great
510                  */
511                 dd->ipath_maskederrs |= dd->ipath_lasterror | errs;
512                 ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
513                                  ~dd->ipath_maskederrs);
514                 ipath_decode_err(msg, sizeof msg,
515                                  (dd->ipath_maskederrs & ~dd->
516                                   ipath_ignorederrs));
517
518                 if ((dd->ipath_maskederrs & ~dd->ipath_ignorederrs) &
519                     ~(INFINIPATH_E_RRCVEGRFULL | INFINIPATH_E_RRCVHDRFULL))
520                         ipath_dev_err(dd, "Disabling error(s) %llx because "
521                                       "occurring too frequently (%s)\n",
522                                       (unsigned long long)
523                                       (dd->ipath_maskederrs &
524                                        ~dd->ipath_ignorederrs), msg);
525                 else {
526                         /*
527                          * rcvegrfull and rcvhdrqfull are "normal",
528                          * for some types of processes (mostly benchmarks)
529                          * that send huge numbers of messages, while not
530                          * processing them.  So only complain about
531                          * these at debug level.
532                          */
533                         ipath_dbg("Disabling frequent queue full errors "
534                                   "(%s)\n", msg);
535                 }
536
537                 /*
538                  * Re-enable the masked errors after around 3 minutes.  in
539                  * ipath_get_faststats().  If we have a series of fast
540                  * repeating but different errors, the interval will keep
541                  * stretching out, but that's OK, as that's pretty
542                  * catastrophic.
543                  */
544                 dd->ipath_unmasktime = jiffies + HZ * 180;
545         }
546
547         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, errs);
548         if (ignore_this_time)
549                 errs &= ~ignore_this_time;
550         if (errs & ~dd->ipath_lasterror) {
551                 errs &= ~dd->ipath_lasterror;
552                 /* never suppress duplicate hwerrors or ibstatuschange */
553                 dd->ipath_lasterror |= errs &
554                         ~(INFINIPATH_E_HARDWARE |
555                           INFINIPATH_E_IBSTATUSCHANGED);
556         }
557
558         /* likely due to cancel, so suppress */
559         if ((errs & (INFINIPATH_E_SPKTLEN | INFINIPATH_E_SPIOARMLAUNCH)) &&
560                 dd->ipath_lastcancel > jiffies) {
561                 ipath_dbg("Suppressed armlaunch/spktlen after error send cancel\n");
562                 errs &= ~(INFINIPATH_E_SPIOARMLAUNCH | INFINIPATH_E_SPKTLEN);
563         }
564
565         if (!errs)
566                 return 0;
567
568         if (!noprint)
569                 /*
570                  * the ones we mask off are handled specially below or above
571                  */
572                 ipath_decode_err(msg, sizeof msg,
573                                  errs & ~(INFINIPATH_E_IBSTATUSCHANGED |
574                                           INFINIPATH_E_RRCVEGRFULL |
575                                           INFINIPATH_E_RRCVHDRFULL |
576                                           INFINIPATH_E_HARDWARE));
577         else
578                 /* so we don't need if (!noprint) at strlcat's below */
579                 *msg = 0;
580
581         if (errs & E_SUM_PKTERRS) {
582                 ipath_stats.sps_pkterrs++;
583                 chkerrpkts = 1;
584         }
585         if (errs & E_SUM_ERRS)
586                 ipath_stats.sps_errs++;
587
588         if (errs & (INFINIPATH_E_RICRC | INFINIPATH_E_RVCRC)) {
589                 ipath_stats.sps_crcerrs++;
590                 chkerrpkts = 1;
591         }
592
593         /*
594          * We don't want to print these two as they happen, or we can make
595          * the situation even worse, because it takes so long to print
596          * messages to serial consoles.  Kernel ports get printed from
597          * fast_stats, no more than every 5 seconds, user ports get printed
598          * on close
599          */
600         if (errs & INFINIPATH_E_RRCVHDRFULL) {
601                 u32 hd, tl;
602                 ipath_stats.sps_hdrqfull++;
603                 for (i = 0; i < dd->ipath_cfgports; i++) {
604                         struct ipath_portdata *pd = dd->ipath_pd[i];
605                         if (i == 0) {
606                                 hd = dd->ipath_port0head;
607                                 tl = (u32) le64_to_cpu(
608                                         *dd->ipath_hdrqtailptr);
609                         } else if (pd && pd->port_cnt &&
610                                    pd->port_rcvhdrtail_kvaddr) {
611                                 /*
612                                  * don't report same point multiple times,
613                                  * except kernel
614                                  */
615                                 tl = *(u64 *) pd->port_rcvhdrtail_kvaddr;
616                                 if (tl == dd->ipath_lastrcvhdrqtails[i])
617                                         continue;
618                                 hd = ipath_read_ureg32(dd, ur_rcvhdrhead,
619                                                        i);
620                         } else
621                                 continue;
622                         if (hd == (tl + 1) ||
623                             (!hd && tl == dd->ipath_hdrqlast)) {
624                                 if (i == 0)
625                                         chkerrpkts = 1;
626                                 dd->ipath_lastrcvhdrqtails[i] = tl;
627                                 pd->port_hdrqfull++;
628                         }
629                 }
630         }
631         if (errs & INFINIPATH_E_RRCVEGRFULL) {
632                 /*
633                  * since this is of less importance and not likely to
634                  * happen without also getting hdrfull, only count
635                  * occurrences; don't check each port (or even the kernel
636                  * vs user)
637                  */
638                 ipath_stats.sps_etidfull++;
639                 if (dd->ipath_port0head !=
640                     (u32) le64_to_cpu(*dd->ipath_hdrqtailptr))
641                         chkerrpkts = 1;
642         }
643
644         /*
645          * do this before IBSTATUSCHANGED, in case both bits set in a single
646          * interrupt; we want the STATUSCHANGE to "win", so we do our
647          * internal copy of state machine correctly
648          */
649         if (errs & INFINIPATH_E_RIBLOSTLINK) {
650                 /*
651                  * force through block below
652                  */
653                 errs |= INFINIPATH_E_IBSTATUSCHANGED;
654                 ipath_stats.sps_iblink++;
655                 dd->ipath_flags |= IPATH_LINKDOWN;
656                 dd->ipath_flags &= ~(IPATH_LINKUNK | IPATH_LINKINIT
657                                      | IPATH_LINKARMED | IPATH_LINKACTIVE);
658                 *dd->ipath_statusp &= ~IPATH_STATUS_IB_READY;
659                 if (!noprint) {
660                         u64 st = ipath_read_kreg64(
661                                 dd, dd->ipath_kregs->kr_ibcstatus);
662
663                         ipath_dbg("Lost link, link now down (%s)\n",
664                                   ipath_ibcstatus_str[st & 0xf]);
665                 }
666         }
667         if (errs & INFINIPATH_E_IBSTATUSCHANGED)
668                 handle_e_ibstatuschanged(dd, errs, noprint);
669
670         if (errs & INFINIPATH_E_RESET) {
671                 if (!noprint)
672                         ipath_dev_err(dd, "Got reset, requires re-init "
673                                       "(unload and reload driver)\n");
674                 dd->ipath_flags &= ~IPATH_INITTED;      /* needs re-init */
675                 /* mark as having had error */
676                 *dd->ipath_statusp |= IPATH_STATUS_HWERROR;
677                 *dd->ipath_statusp &= ~IPATH_STATUS_IB_CONF;
678         }
679
680         if (!noprint && *msg)
681                 ipath_dev_err(dd, "%s error\n", msg);
682         if (dd->ipath_state_wanted & dd->ipath_flags) {
683                 ipath_cdbg(VERBOSE, "driver wanted state %x, iflags now %x, "
684                            "waking\n", dd->ipath_state_wanted,
685                            dd->ipath_flags);
686                 wake_up_interruptible(&ipath_state_wait);
687         }
688
689         return chkerrpkts;
690 }
691
692 /* this is separate to allow for better optimization of ipath_intr() */
693
694 static void ipath_bad_intr(struct ipath_devdata *dd, u32 * unexpectp)
695 {
696         /*
697          * sometimes happen during driver init and unload, don't want
698          * to process any interrupts at that point
699          */
700
701         /* this is just a bandaid, not a fix, if something goes badly
702          * wrong */
703         if (++*unexpectp > 100) {
704                 if (++*unexpectp > 105) {
705                         /*
706                          * ok, we must be taking somebody else's interrupts,
707                          * due to a messed up mptable and/or PIRQ table, so
708                          * unregister the interrupt.  We've seen this during
709                          * linuxbios development work, and it may happen in
710                          * the future again.
711                          */
712                         if (dd->pcidev && dd->ipath_irq) {
713                                 ipath_dev_err(dd, "Now %u unexpected "
714                                               "interrupts, unregistering "
715                                               "interrupt handler\n",
716                                               *unexpectp);
717                                 ipath_dbg("free_irq of irq %d\n",
718                                           dd->ipath_irq);
719                                 dd->ipath_f_free_irq(dd);
720                         }
721                 }
722                 if (ipath_read_kreg32(dd, dd->ipath_kregs->kr_intmask)) {
723                         ipath_dev_err(dd, "%u unexpected interrupts, "
724                                       "disabling interrupts completely\n",
725                                       *unexpectp);
726                         /*
727                          * disable all interrupts, something is very wrong
728                          */
729                         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask,
730                                          0ULL);
731                 }
732         } else if (*unexpectp > 1)
733                 ipath_dbg("Interrupt when not ready, should not happen, "
734                           "ignoring\n");
735 }
736
737 static void ipath_bad_regread(struct ipath_devdata *dd)
738 {
739         static int allbits;
740
741         /* separate routine, for better optimization of ipath_intr() */
742
743         /*
744          * We print the message and disable interrupts, in hope of
745          * having a better chance of debugging the problem.
746          */
747         ipath_dev_err(dd,
748                       "Read of interrupt status failed (all bits set)\n");
749         if (allbits++) {
750                 /* disable all interrupts, something is very wrong */
751                 ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
752                 if (allbits == 2) {
753                         ipath_dev_err(dd, "Still bad interrupt status, "
754                                       "unregistering interrupt\n");
755                         dd->ipath_f_free_irq(dd);
756                 } else if (allbits > 2) {
757                         if ((allbits % 10000) == 0)
758                                 printk(".");
759                 } else
760                         ipath_dev_err(dd, "Disabling interrupts, "
761                                       "multiple errors\n");
762         }
763 }
764
765 static void handle_port_pioavail(struct ipath_devdata *dd)
766 {
767         u32 i;
768         /*
769          * start from port 1, since for now port 0  is never using
770          * wait_event for PIO
771          */
772         for (i = 1; dd->ipath_portpiowait && i < dd->ipath_cfgports; i++) {
773                 struct ipath_portdata *pd = dd->ipath_pd[i];
774
775                 if (pd && pd->port_cnt &&
776                     dd->ipath_portpiowait & (1U << i)) {
777                         clear_bit(i, &dd->ipath_portpiowait);
778                         if (test_bit(IPATH_PORT_WAITING_PIO,
779                                      &pd->port_flag)) {
780                                 clear_bit(IPATH_PORT_WAITING_PIO,
781                                           &pd->port_flag);
782                                 wake_up_interruptible(&pd->port_wait);
783                         }
784                 }
785         }
786 }
787
788 static void handle_layer_pioavail(struct ipath_devdata *dd)
789 {
790         int ret;
791
792         ret = ipath_ib_piobufavail(dd->verbs_dev);
793         if (ret > 0)
794                 goto set;
795
796         return;
797 set:
798         set_bit(IPATH_S_PIOINTBUFAVAIL, &dd->ipath_sendctrl);
799         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
800                          dd->ipath_sendctrl);
801 }
802
803 /*
804  * Handle receive interrupts for user ports; this means a user
805  * process was waiting for a packet to arrive, and didn't want
806  * to poll
807  */
808 static void handle_urcv(struct ipath_devdata *dd, u32 istat)
809 {
810         u64 portr;
811         int i;
812         int rcvdint = 0;
813
814         portr = ((istat >> INFINIPATH_I_RCVAVAIL_SHIFT) &
815                  dd->ipath_i_rcvavail_mask)
816                 | ((istat >> INFINIPATH_I_RCVURG_SHIFT) &
817                    dd->ipath_i_rcvurg_mask);
818         for (i = 1; i < dd->ipath_cfgports; i++) {
819                 struct ipath_portdata *pd = dd->ipath_pd[i];
820                 if (portr & (1 << i) && pd && pd->port_cnt &&
821                         test_bit(IPATH_PORT_WAITING_RCV, &pd->port_flag)) {
822                         int rcbit;
823                         clear_bit(IPATH_PORT_WAITING_RCV,
824                                   &pd->port_flag);
825                         rcbit = i + INFINIPATH_R_INTRAVAIL_SHIFT;
826                         clear_bit(1UL << rcbit, &dd->ipath_rcvctrl);
827                         wake_up_interruptible(&pd->port_wait);
828                         rcvdint = 1;
829                 }
830         }
831         if (rcvdint) {
832                 /* only want to take one interrupt, so turn off the rcv
833                  * interrupt for all the ports that we did the wakeup on
834                  * (but never for kernel port)
835                  */
836                 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
837                                  dd->ipath_rcvctrl);
838         }
839 }
840
841 irqreturn_t ipath_intr(int irq, void *data)
842 {
843         struct ipath_devdata *dd = data;
844         u32 istat, chk0rcv = 0;
845         ipath_err_t estat = 0;
846         irqreturn_t ret;
847         u32 oldhead, curtail;
848         static unsigned unexpected = 0;
849         static const u32 port0rbits = (1U<<INFINIPATH_I_RCVAVAIL_SHIFT) |
850                  (1U<<INFINIPATH_I_RCVURG_SHIFT);
851
852         ipath_stats.sps_ints++;
853
854         if (!(dd->ipath_flags & IPATH_PRESENT)) {
855                 /*
856                  * This return value is not great, but we do not want the
857                  * interrupt core code to remove our interrupt handler
858                  * because we don't appear to be handling an interrupt
859                  * during a chip reset.
860                  */
861                 return IRQ_HANDLED;
862         }
863
864         /*
865          * this needs to be flags&initted, not statusp, so we keep
866          * taking interrupts even after link goes down, etc.
867          * Also, we *must* clear the interrupt at some point, or we won't
868          * take it again, which can be real bad for errors, etc...
869          */
870
871         if (!(dd->ipath_flags & IPATH_INITTED)) {
872                 ipath_bad_intr(dd, &unexpected);
873                 ret = IRQ_NONE;
874                 goto bail;
875         }
876
877         /*
878          * We try to avoid reading the interrupt status register, since
879          * that's a PIO read, and stalls the processor for up to about
880          * ~0.25 usec. The idea is that if we processed a port0 packet,
881          * we blindly clear the  port 0 receive interrupt bits, and nothing
882          * else, then return.  If other interrupts are pending, the chip
883          * will re-interrupt us as soon as we write the intclear register.
884          * We then won't process any more kernel packets (if not the 2nd
885          * time, then the 3rd or 4th) and we'll then handle the other
886          * interrupts.   We clear the interrupts first so that we don't
887          * lose intr for later packets that arrive while we are processing.
888          */
889         oldhead = dd->ipath_port0head;
890         curtail = (u32)le64_to_cpu(*dd->ipath_hdrqtailptr);
891         if (oldhead != curtail) {
892                 if (dd->ipath_flags & IPATH_GPIO_INTR) {
893                         ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_clear,
894                                          (u64) (1 << IPATH_GPIO_PORT0_BIT));
895                         istat = port0rbits | INFINIPATH_I_GPIO;
896                 }
897                 else
898                         istat = port0rbits;
899                 ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, istat);
900                 ipath_kreceive(dd);
901                 if (oldhead != dd->ipath_port0head) {
902                         ipath_stats.sps_fastrcvint++;
903                         goto done;
904                 }
905         }
906
907         istat = ipath_read_kreg32(dd, dd->ipath_kregs->kr_intstatus);
908
909         if (unlikely(!istat)) {
910                 ipath_stats.sps_nullintr++;
911                 ret = IRQ_NONE; /* not our interrupt, or already handled */
912                 goto bail;
913         }
914         if (unlikely(istat == -1)) {
915                 ipath_bad_regread(dd);
916                 /* don't know if it was our interrupt or not */
917                 ret = IRQ_NONE;
918                 goto bail;
919         }
920
921         if (unexpected)
922                 unexpected = 0;
923
924         if (unlikely(istat & ~dd->ipath_i_bitsextant))
925                 ipath_dev_err(dd,
926                               "interrupt with unknown interrupts %x set\n",
927                               istat & (u32) ~ dd->ipath_i_bitsextant);
928         else
929                 ipath_cdbg(VERBOSE, "intr stat=0x%x\n", istat);
930
931         if (unlikely(istat & INFINIPATH_I_ERROR)) {
932                 ipath_stats.sps_errints++;
933                 estat = ipath_read_kreg64(dd,
934                                           dd->ipath_kregs->kr_errorstatus);
935                 if (!estat)
936                         dev_info(&dd->pcidev->dev, "error interrupt (%x), "
937                                  "but no error bits set!\n", istat);
938                 else if (estat == -1LL)
939                         /*
940                          * should we try clearing all, or hope next read
941                          * works?
942                          */
943                         ipath_dev_err(dd, "Read of error status failed "
944                                       "(all bits set); ignoring\n");
945                 else
946                         if (handle_errors(dd, estat))
947                                 /* force calling ipath_kreceive() */
948                                 chk0rcv = 1;
949         }
950
951         if (istat & INFINIPATH_I_GPIO) {
952                 /*
953                  * GPIO interrupts fall in two broad classes:
954                  * GPIO_2 indicates (on some HT4xx boards) that a packet
955                  *        has arrived for Port 0. Checking for this
956                  *        is controlled by flag IPATH_GPIO_INTR.
957                  * GPIO_3..5 on IBA6120 Rev2 chips indicate errors
958                  *        that we need to count. Checking for this
959                  *        is controlled by flag IPATH_GPIO_ERRINTRS.
960                  */
961                 u32 gpiostatus;
962                 u32 to_clear = 0;
963
964                 gpiostatus = ipath_read_kreg32(
965                         dd, dd->ipath_kregs->kr_gpio_status);
966                 /* First the error-counter case.
967                  */
968                 if ((gpiostatus & IPATH_GPIO_ERRINTR_MASK) &&
969                     (dd->ipath_flags & IPATH_GPIO_ERRINTRS)) {
970                         /* want to clear the bits we see asserted. */
971                         to_clear |= (gpiostatus & IPATH_GPIO_ERRINTR_MASK);
972
973                         /*
974                          * Count appropriately, clear bits out of our copy,
975                          * as they have been "handled".
976                          */
977                         if (gpiostatus & (1 << IPATH_GPIO_RXUVL_BIT)) {
978                                 ipath_dbg("FlowCtl on UnsupVL\n");
979                                 dd->ipath_rxfc_unsupvl_errs++;
980                         }
981                         if (gpiostatus & (1 << IPATH_GPIO_OVRUN_BIT)) {
982                                 ipath_dbg("Overrun Threshold exceeded\n");
983                                 dd->ipath_overrun_thresh_errs++;
984                         }
985                         if (gpiostatus & (1 << IPATH_GPIO_LLI_BIT)) {
986                                 ipath_dbg("Local Link Integrity error\n");
987                                 dd->ipath_lli_errs++;
988                         }
989                         gpiostatus &= ~IPATH_GPIO_ERRINTR_MASK;
990                 }
991                 /* Now the Port0 Receive case */
992                 if ((gpiostatus & (1 << IPATH_GPIO_PORT0_BIT)) &&
993                     (dd->ipath_flags & IPATH_GPIO_INTR)) {
994                         /*
995                          * GPIO status bit 2 is set, and we expected it.
996                          * clear it and indicate in p0bits.
997                          * This probably only happens if a Port0 pkt
998                          * arrives at _just_ the wrong time, and we
999                          * handle that by seting chk0rcv;
1000                          */
1001                         to_clear |= (1 << IPATH_GPIO_PORT0_BIT);
1002                         gpiostatus &= ~(1 << IPATH_GPIO_PORT0_BIT);
1003                         chk0rcv = 1;
1004                 }
1005                 if (unlikely(gpiostatus)) {
1006                         /*
1007                          * Some unexpected bits remain. If they could have
1008                          * caused the interrupt, complain and clear.
1009                          * MEA: this is almost certainly non-ideal.
1010                          * we should look into auto-disable of unexpected
1011                          * GPIO interrupts, possibly on a "three strikes"
1012                          * basis.
1013                          */
1014                         u32 mask;
1015                         mask = ipath_read_kreg32(
1016                                 dd, dd->ipath_kregs->kr_gpio_mask);
1017                         if (mask & gpiostatus) {
1018                                 ipath_dbg("Unexpected GPIO IRQ bits %x\n",
1019                                   gpiostatus & mask);
1020                                 to_clear |= (gpiostatus & mask);
1021                         }
1022                 }
1023                 if (to_clear) {
1024                         ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_clear,
1025                                         (u64) to_clear);
1026                 }
1027         }
1028         chk0rcv |= istat & port0rbits;
1029
1030         /*
1031          * Clear the interrupt bits we found set, unless they are receive
1032          * related, in which case we already cleared them above, and don't
1033          * want to clear them again, because we might lose an interrupt.
1034          * Clear it early, so we "know" know the chip will have seen this by
1035          * the time we process the queue, and will re-interrupt if necessary.
1036          * The processor itself won't take the interrupt again until we return.
1037          */
1038         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, istat);
1039
1040         /*
1041          * handle port0 receive  before checking for pio buffers available,
1042          * since receives can overflow; piobuf waiters can afford a few
1043          * extra cycles, since they were waiting anyway, and user's waiting
1044          * for receive are at the bottom.
1045          */
1046         if (chk0rcv) {
1047                 ipath_kreceive(dd);
1048                 istat &= ~port0rbits;
1049         }
1050
1051         if (istat & ((dd->ipath_i_rcvavail_mask <<
1052                       INFINIPATH_I_RCVAVAIL_SHIFT)
1053                      | (dd->ipath_i_rcvurg_mask <<
1054                         INFINIPATH_I_RCVURG_SHIFT)))
1055                 handle_urcv(dd, istat);
1056
1057         if (istat & INFINIPATH_I_SPIOBUFAVAIL) {
1058                 clear_bit(IPATH_S_PIOINTBUFAVAIL, &dd->ipath_sendctrl);
1059                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1060                                  dd->ipath_sendctrl);
1061
1062                 if (dd->ipath_portpiowait)
1063                         handle_port_pioavail(dd);
1064
1065                 handle_layer_pioavail(dd);
1066         }
1067
1068 done:
1069         ret = IRQ_HANDLED;
1070
1071 bail:
1072         return ret;
1073 }