git.oblomov.eu Git - linux-2.6/blob - arch/sparc64/kernel/unaligned.c

   1 /*
   2  * unaligned.c: Unaligned load/store trap handling with special
   3  *              cases for the kernel to do them more quickly.
   4  *
   5  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
   6  * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
   7  */
   8
   9
  10 #include <linux/jiffies.h>
  11 #include <linux/kernel.h>
  12 #include <linux/sched.h>
  13 #include <linux/mm.h>
  14 #include <linux/module.h>
  15 #include <asm/asi.h>
  16 #include <asm/ptrace.h>
  17 #include <asm/pstate.h>
  18 #include <asm/processor.h>
  19 #include <asm/system.h>
  20 #include <asm/uaccess.h>
  21 #include <linux/smp.h>
  22 #include <linux/bitops.h>
  23 #include <linux/kallsyms.h>
  24 #include <asm/fpumacro.h>
  25
  26 /* #define DEBUG_MNA */
  27
  28 enum direction {
  29         load,    /* ld, ldd, ldh, ldsh */
  30         store,   /* st, std, sth, stsh */
  31         both,    /* Swap, ldstub, cas, ... */
  32         fpld,
  33         fpst,
  34         invalid,
  35 };
  36
  37 #ifdef DEBUG_MNA
  38 static char *dirstrings[] = {
  39   "load", "store", "both", "fpload", "fpstore", "invalid"
  40 };
  41 #endif
  42
  43 static inline enum direction decode_direction(unsigned int insn)
  44 {
  45         unsigned long tmp = (insn >> 21) & 1;
  46
  47         if (!tmp)
  48                 return load;
  49         else {
  50                 switch ((insn>>19)&0xf) {
  51                 case 15: /* swap* */
  52                         return both;
  53                 default:
  54                         return store;
  55                 }
  56         }
  57 }
  58
  59 /* 16 = double-word, 8 = extra-word, 4 = word, 2 = half-word */
  60 static inline int decode_access_size(unsigned int insn)
  61 {
  62         unsigned int tmp;
  63
  64         tmp = ((insn >> 19) & 0xf);
  65         if (tmp == 11 || tmp == 14) /* ldx/stx */
  66                 return 8;
  67         tmp &= 3;
  68         if (!tmp)
  69                 return 4;
  70         else if (tmp == 3)
  71                 return 16;      /* ldd/std - Although it is actually 8 */
  72         else if (tmp == 2)
  73                 return 2;
  74         else {
  75                 printk("Impossible unaligned trap. insn=%08x\n", insn);
  76                 die_if_kernel("Byte sized unaligned access?!?!", current_thread_info()->kregs);
  77
  78                 /* GCC should never warn that control reaches the end
  79                  * of this function without returning a value because
  80                  * die_if_kernel() is marked with attribute 'noreturn'.
  81                  * Alas, some versions do...
  82                  */
  83
  84                 return 0;
  85         }
  86 }
  87
  88 static inline int decode_asi(unsigned int insn, struct pt_regs *regs)
  89 {
  90         if (insn & 0x800000) {
  91                 if (insn & 0x2000)
  92                         return (unsigned char)(regs->tstate >> 24);     /* %asi */
  93                 else
  94                         return (unsigned char)(insn >> 5);              /* imm_asi */
  95         } else
  96                 return ASI_P;
  97 }
  98
  99 /* 0x400000 = signed, 0 = unsigned */
 100 static inline int decode_signedness(unsigned int insn)
 101 {
 102         return (insn & 0x400000);
 103 }
 104
 105 static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2,
 106                                        unsigned int rd, int from_kernel)
 107 {
 108         if (rs2 >= 16 || rs1 >= 16 || rd >= 16) {
 109                 if (from_kernel != 0)
 110                         __asm__ __volatile__("flushw");
 111                 else
 112                         flushw_user();
 113         }
 114 }
 115
 116 static inline long sign_extend_imm13(long imm)
 117 {
 118         return imm << 51 >> 51;
 119 }
 120
 121 static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
 122 {
 123         unsigned long value;
 124
 125         if (reg < 16)
 126                 return (!reg ? 0 : regs->u_regs[reg]);
 127         if (regs->tstate & TSTATE_PRIV) {
 128                 struct reg_window *win;
 129                 win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
 130                 value = win->locals[reg - 16];
 131         } else if (test_thread_flag(TIF_32BIT)) {
 132                 struct reg_window32 __user *win32;
 133                 win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
 134                 get_user(value, &win32->locals[reg - 16]);
 135         } else {
 136                 struct reg_window __user *win;
 137                 win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
 138                 get_user(value, &win->locals[reg - 16]);
 139         }
 140         return value;
 141 }
 142
 143 static unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs)
 144 {
 145         if (reg < 16)
 146                 return &regs->u_regs[reg];
 147         if (regs->tstate & TSTATE_PRIV) {
 148                 struct reg_window *win;
 149                 win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
 150                 return &win->locals[reg - 16];
 151         } else if (test_thread_flag(TIF_32BIT)) {
 152                 struct reg_window32 *win32;
 153                 win32 = (struct reg_window32 *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
 154                 return (unsigned long *)&win32->locals[reg - 16];
 155         } else {
 156                 struct reg_window *win;
 157                 win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
 158                 return &win->locals[reg - 16];
 159         }
 160 }
 161
 162 unsigned long compute_effective_address(struct pt_regs *regs,
 163                                         unsigned int insn, unsigned int rd)
 164 {
 165         unsigned int rs1 = (insn >> 14) & 0x1f;
 166         unsigned int rs2 = insn & 0x1f;
 167         int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
 168
 169         if (insn & 0x2000) {
 170                 maybe_flush_windows(rs1, 0, rd, from_kernel);
 171                 return (fetch_reg(rs1, regs) + sign_extend_imm13(insn));
 172         } else {
 173                 maybe_flush_windows(rs1, rs2, rd, from_kernel);
 174                 return (fetch_reg(rs1, regs) + fetch_reg(rs2, regs));
 175         }
 176 }
 177
 178 /* This is just to make gcc think die_if_kernel does return... */
 179 static void __used unaligned_panic(char *str, struct pt_regs *regs)
 180 {
 181         die_if_kernel(str, regs);
 182 }
 183
 184 extern int do_int_load(unsigned long *dest_reg, int size,
 185                        unsigned long *saddr, int is_signed, int asi);
 186
 187 extern int __do_int_store(unsigned long *dst_addr, int size,
 188                           unsigned long src_val, int asi);
 189
 190 static inline int do_int_store(int reg_num, int size, unsigned long *dst_addr,
 191                                struct pt_regs *regs, int asi, int orig_asi)
 192 {
 193         unsigned long zero = 0;
 194         unsigned long *src_val_p = &zero;
 195         unsigned long src_val;
 196
 197         if (size == 16) {
 198                 size = 8;
 199                 zero = (((long)(reg_num ?
 200                         (unsigned)fetch_reg(reg_num, regs) : 0)) << 32) |
 201                         (unsigned)fetch_reg(reg_num + 1, regs);
 202         } else if (reg_num) {
 203                 src_val_p = fetch_reg_addr(reg_num, regs);
 204         }
 205         src_val = *src_val_p;
 206         if (unlikely(asi != orig_asi)) {
 207                 switch (size) {
 208                 case 2:
 209                         src_val = swab16(src_val);
 210                         break;
 211                 case 4:
 212                         src_val = swab32(src_val);
 213                         break;
 214                 case 8:
 215                         src_val = swab64(src_val);
 216                         break;
 217                 case 16:
 218                 default:
 219                         BUG();
 220                         break;
 221                 };
 222         }
 223         return __do_int_store(dst_addr, size, src_val, asi);
 224 }
 225
 226 static inline void advance(struct pt_regs *regs)
 227 {
 228         regs->tpc   = regs->tnpc;
 229         regs->tnpc += 4;
 230         if (test_thread_flag(TIF_32BIT)) {
 231                 regs->tpc &= 0xffffffff;
 232                 regs->tnpc &= 0xffffffff;
 233         }
 234 }
 235
 236 static inline int floating_point_load_or_store_p(unsigned int insn)
 237 {
 238         return (insn >> 24) & 1;
 239 }
 240
 241 static inline int ok_for_kernel(unsigned int insn)
 242 {
 243         return !floating_point_load_or_store_p(insn);
 244 }
 245
 246 static void kernel_mna_trap_fault(int fixup_tstate_asi)
 247 {
 248         struct pt_regs *regs = current_thread_info()->kern_una_regs;
 249         unsigned int insn = current_thread_info()->kern_una_insn;
 250         const struct exception_table_entry *entry;
 251
 252         entry = search_exception_tables(regs->tpc);
 253         if (!entry) {
 254                 unsigned long address;
 255
 256                 address = compute_effective_address(regs, insn,
 257                                                     ((insn >> 25) & 0x1f));
 258                 if (address < PAGE_SIZE) {
 259                         printk(KERN_ALERT "Unable to handle kernel NULL "
 260                                "pointer dereference in mna handler");
 261                 } else
 262                         printk(KERN_ALERT "Unable to handle kernel paging "
 263                                "request in mna handler");
 264                 printk(KERN_ALERT " at virtual address %016lx\n",address);
 265                 printk(KERN_ALERT "current->{active_,}mm->context = %016lx\n",
 266                         (current->mm ? CTX_HWBITS(current->mm->context) :
 267                         CTX_HWBITS(current->active_mm->context)));
 268                 printk(KERN_ALERT "current->{active_,}mm->pgd = %016lx\n",
 269                         (current->mm ? (unsigned long) current->mm->pgd :
 270                         (unsigned long) current->active_mm->pgd));
 271                 die_if_kernel("Oops", regs);
 272                 /* Not reached */
 273         }
 274         regs->tpc = entry->fixup;
 275         regs->tnpc = regs->tpc + 4;
 276
 277         if (fixup_tstate_asi) {
 278                 regs->tstate &= ~TSTATE_ASI;
 279                 regs->tstate |= (ASI_AIUS << 24UL);
 280         }
 281 }
 282
 283 static void log_unaligned(struct pt_regs *regs)
 284 {
 285         static unsigned long count, last_time;
 286
 287         if (time_after(jiffies, last_time + 5 * HZ))
 288                 count = 0;
 289         if (count < 5) {
 290                 last_time = jiffies;
 291                 count++;
 292                 printk("Kernel unaligned access at TPC[%lx] ", regs->tpc);
 293                 print_symbol("%s\n", regs->tpc);
 294         }
 295 }
 296
 297 asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn)
 298 {
 299         enum direction dir = decode_direction(insn);
 300         int size = decode_access_size(insn);
 301         int orig_asi, asi;
 302
 303         current_thread_info()->kern_una_regs = regs;
 304         current_thread_info()->kern_una_insn = insn;
 305
 306         orig_asi = asi = decode_asi(insn, regs);
 307
 308         /* If this is a {get,put}_user() on an unaligned userspace pointer,
 309          * just signal a fault and do not log the event.
 310          */
 311         if (asi == ASI_AIUS) {
 312                 kernel_mna_trap_fault(0);
 313                 return;
 314         }
 315
 316         log_unaligned(regs);
 317
 318         if (!ok_for_kernel(insn) || dir == both) {
 319                 printk("Unsupported unaligned load/store trap for kernel "
 320                        "at <%016lx>.\n", regs->tpc);
 321                 unaligned_panic("Kernel does fpu/atomic "
 322                                 "unaligned load/store.", regs);
 323
 324                 kernel_mna_trap_fault(0);
 325         } else {
 326                 unsigned long addr, *reg_addr;
 327                 int err;
 328
 329                 addr = compute_effective_address(regs, insn,
 330                                                  ((insn >> 25) & 0x1f));
 331 #ifdef DEBUG_MNA
 332                 printk("KMNA: pc=%016lx [dir=%s addr=%016lx size=%d] "
 333                        "retpc[%016lx]\n",
 334                        regs->tpc, dirstrings[dir], addr, size,
 335                        regs->u_regs[UREG_RETPC]);
 336 #endif
 337                 switch (asi) {
 338                 case ASI_NL:
 339                 case ASI_AIUPL:
 340                 case ASI_AIUSL:
 341                 case ASI_PL:
 342                 case ASI_SL:
 343                 case ASI_PNFL:
 344                 case ASI_SNFL:
 345                         asi &= ~0x08;
 346                         break;
 347                 };
 348                 switch (dir) {
 349                 case load:
 350                         reg_addr = fetch_reg_addr(((insn>>25)&0x1f), regs);
 351                         err = do_int_load(reg_addr, size,
 352                                           (unsigned long *) addr,
 353                                           decode_signedness(insn), asi);
 354                         if (likely(!err) && unlikely(asi != orig_asi)) {
 355                                 unsigned long val_in = *reg_addr;
 356                                 switch (size) {
 357                                 case 2:
 358                                         val_in = swab16(val_in);
 359                                         break;
 360                                 case 4:
 361                                         val_in = swab32(val_in);
 362                                         break;
 363                                 case 8:
 364                                         val_in = swab64(val_in);
 365                                         break;
 366                                 case 16:
 367                                 default:
 368                                         BUG();
 369                                         break;
 370                                 };
 371                                 *reg_addr = val_in;
 372                         }
 373                         break;
 374
 375                 case store:
 376                         err = do_int_store(((insn>>25)&0x1f), size,
 377                                            (unsigned long *) addr, regs,
 378                                            asi, orig_asi);
 379                         break;
 380
 381                 default:
 382                         panic("Impossible kernel unaligned trap.");
 383                         /* Not reached... */
 384                 }
 385                 if (unlikely(err))
 386                         kernel_mna_trap_fault(1);
 387                 else
 388                         advance(regs);
 389         }
 390 }
 391
 392 static char popc_helper[] = {
 393 0, 1, 1, 2, 1, 2, 2, 3,
 394 1, 2, 2, 3, 2, 3, 3, 4,
 395 };
 396
 397 int handle_popc(u32 insn, struct pt_regs *regs)
 398 {
 399         u64 value;
 400         int ret, i, rd = ((insn >> 25) & 0x1f);
 401         int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
 402
 403         if (insn & 0x2000) {
 404                 maybe_flush_windows(0, 0, rd, from_kernel);
 405                 value = sign_extend_imm13(insn);
 406         } else {
 407                 maybe_flush_windows(0, insn & 0x1f, rd, from_kernel);
 408                 value = fetch_reg(insn & 0x1f, regs);
 409         }
 410         for (ret = 0, i = 0; i < 16; i++) {
 411                 ret += popc_helper[value & 0xf];
 412                 value >>= 4;
 413         }
 414         if (rd < 16) {
 415                 if (rd)
 416                         regs->u_regs[rd] = ret;
 417         } else {
 418                 if (test_thread_flag(TIF_32BIT)) {
 419                         struct reg_window32 __user *win32;
 420                         win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
 421                         put_user(ret, &win32->locals[rd - 16]);
 422                 } else {
 423                         struct reg_window __user *win;
 424                         win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
 425                         put_user(ret, &win->locals[rd - 16]);
 426                 }
 427         }
 428         advance(regs);
 429         return 1;
 430 }
 431
 432 extern void do_fpother(struct pt_regs *regs);
 433 extern void do_privact(struct pt_regs *regs);
 434 extern void spitfire_data_access_exception(struct pt_regs *regs,
 435                                            unsigned long sfsr,
 436                                            unsigned long sfar);
 437 extern void sun4v_data_access_exception(struct pt_regs *regs,
 438                                         unsigned long addr,
 439                                         unsigned long type_ctx);
 440
 441 int handle_ldf_stq(u32 insn, struct pt_regs *regs)
 442 {
 443         unsigned long addr = compute_effective_address(regs, insn, 0);
 444         int freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
 445         struct fpustate *f = FPUSTATE;
 446         int asi = decode_asi(insn, regs);
 447         int flag = (freg < 32) ? FPRS_DL : FPRS_DU;
 448
 449         save_and_clear_fpu();
 450         current_thread_info()->xfsr[0] &= ~0x1c000;
 451         if (freg & 3) {
 452                 current_thread_info()->xfsr[0] |= (6 << 14) /* invalid_fp_register */;
 453                 do_fpother(regs);
 454                 return 0;
 455         }
 456         if (insn & 0x200000) {
 457                 /* STQ */
 458                 u64 first = 0, second = 0;
 459
 460                 if (current_thread_info()->fpsaved[0] & flag) {
 461                         first = *(u64 *)&f->regs[freg];
 462                         second = *(u64 *)&f->regs[freg+2];
 463                 }
 464                 if (asi < 0x80) {
 465                         do_privact(regs);
 466                         return 1;
 467                 }
 468                 switch (asi) {
 469                 case ASI_P:
 470                 case ASI_S: break;
 471                 case ASI_PL:
 472                 case ASI_SL:
 473                         {
 474                                 /* Need to convert endians */
 475                                 u64 tmp = __swab64p(&first);
 476
 477                                 first = __swab64p(&second);
 478                                 second = tmp;
 479                                 break;
 480                         }
 481                 default:
 482                         if (tlb_type == hypervisor)
 483                                 sun4v_data_access_exception(regs, addr, 0);
 484                         else
 485                                 spitfire_data_access_exception(regs, 0, addr);
 486                         return 1;
 487                 }
 488                 if (put_user (first >> 32, (u32 __user *)addr) ||
 489                     __put_user ((u32)first, (u32 __user *)(addr + 4)) ||
 490                     __put_user (second >> 32, (u32 __user *)(addr + 8)) ||
 491                     __put_user ((u32)second, (u32 __user *)(addr + 12))) {
 492                         if (tlb_type == hypervisor)
 493                                 sun4v_data_access_exception(regs, addr, 0);
 494                         else
 495                                 spitfire_data_access_exception(regs, 0, addr);
 496                         return 1;
 497                 }
 498         } else {
 499                 /* LDF, LDDF, LDQF */
 500                 u32 data[4] __attribute__ ((aligned(8)));
 501                 int size, i;
 502                 int err;
 503
 504                 if (asi < 0x80) {
 505                         do_privact(regs);
 506                         return 1;
 507                 } else if (asi > ASI_SNFL) {
 508                         if (tlb_type == hypervisor)
 509                                 sun4v_data_access_exception(regs, addr, 0);
 510                         else
 511                                 spitfire_data_access_exception(regs, 0, addr);
 512                         return 1;
 513                 }
 514                 switch (insn & 0x180000) {
 515                 case 0x000000: size = 1; break;
 516                 case 0x100000: size = 4; break;
 517                 default: size = 2; break;
 518                 }
 519                 for (i = 0; i < size; i++)
 520                         data[i] = 0;
 521
 522                 err = get_user (data[0], (u32 __user *) addr);
 523                 if (!err) {
 524                         for (i = 1; i < size; i++)
 525                                 err |= __get_user (data[i], (u32 __user *)(addr + 4*i));
 526                 }
 527                 if (err && !(asi & 0x2 /* NF */)) {
 528                         if (tlb_type == hypervisor)
 529                                 sun4v_data_access_exception(regs, addr, 0);
 530                         else
 531                                 spitfire_data_access_exception(regs, 0, addr);
 532                         return 1;
 533                 }
 534                 if (asi & 0x8) /* Little */ {
 535                         u64 tmp;
 536
 537                         switch (size) {
 538                         case 1: data[0] = le32_to_cpup(data + 0); break;
 539                         default:*(u64 *)(data + 0) = le64_to_cpup((u64 *)(data + 0));
 540                                 break;
 541                         case 4: tmp = le64_to_cpup((u64 *)(data + 0));
 542                                 *(u64 *)(data + 0) = le64_to_cpup((u64 *)(data + 2));
 543                                 *(u64 *)(data + 2) = tmp;
 544                                 break;
 545                         }
 546                 }
 547                 if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) {
 548                         current_thread_info()->fpsaved[0] = FPRS_FEF;
 549                         current_thread_info()->gsr[0] = 0;
 550                 }
 551                 if (!(current_thread_info()->fpsaved[0] & flag)) {
 552                         if (freg < 32)
 553                                 memset(f->regs, 0, 32*sizeof(u32));
 554                         else
 555                                 memset(f->regs+32, 0, 32*sizeof(u32));
 556                 }
 557                 memcpy(f->regs + freg, data, size * 4);
 558                 current_thread_info()->fpsaved[0] |= flag;
 559         }
 560         advance(regs);
 561         return 1;
 562 }
 563
 564 void handle_ld_nf(u32 insn, struct pt_regs *regs)
 565 {
 566         int rd = ((insn >> 25) & 0x1f);
 567         int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
 568         unsigned long *reg;
 569
 570         maybe_flush_windows(0, 0, rd, from_kernel);
 571         reg = fetch_reg_addr(rd, regs);
 572         if (from_kernel || rd < 16) {
 573                 reg[0] = 0;
 574                 if ((insn & 0x780000) == 0x180000)
 575                         reg[1] = 0;
 576         } else if (test_thread_flag(TIF_32BIT)) {
 577                 put_user(0, (int __user *) reg);
 578                 if ((insn & 0x780000) == 0x180000)
 579                         put_user(0, ((int __user *) reg) + 1);
 580         } else {
 581                 put_user(0, (unsigned long __user *) reg);
 582                 if ((insn & 0x780000) == 0x180000)
 583                         put_user(0, (unsigned long __user *) reg + 1);
 584         }
 585         advance(regs);
 586 }
 587
 588 void handle_lddfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
 589 {
 590         unsigned long pc = regs->tpc;
 591         unsigned long tstate = regs->tstate;
 592         u32 insn;
 593         u32 first, second;
 594         u64 value;
 595         u8 freg;
 596         int flag;
 597         struct fpustate *f = FPUSTATE;
 598
 599         if (tstate & TSTATE_PRIV)
 600                 die_if_kernel("lddfmna from kernel", regs);
 601         if (test_thread_flag(TIF_32BIT))
 602                 pc = (u32)pc;
 603         if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
 604                 int asi = decode_asi(insn, regs);
 605                 if ((asi > ASI_SNFL) ||
 606                     (asi < ASI_P))
 607                         goto daex;
 608                 if (get_user(first, (u32 __user *)sfar) ||
 609                      get_user(second, (u32 __user *)(sfar + 4))) {
 610                         if (asi & 0x2) /* NF */ {
 611                                 first = 0; second = 0;
 612                         } else
 613                                 goto daex;
 614                 }
 615                 save_and_clear_fpu();
 616                 freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
 617                 value = (((u64)first) << 32) | second;
 618                 if (asi & 0x8) /* Little */
 619                         value = __swab64p(&value);
 620                 flag = (freg < 32) ? FPRS_DL : FPRS_DU;
 621                 if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) {
 622                         current_thread_info()->fpsaved[0] = FPRS_FEF;
 623                         current_thread_info()->gsr[0] = 0;
 624                 }
 625                 if (!(current_thread_info()->fpsaved[0] & flag)) {
 626                         if (freg < 32)
 627                                 memset(f->regs, 0, 32*sizeof(u32));
 628                         else
 629                                 memset(f->regs+32, 0, 32*sizeof(u32));
 630                 }
 631                 *(u64 *)(f->regs + freg) = value;
 632                 current_thread_info()->fpsaved[0] |= flag;
 633         } else {
 634 daex:
 635                 if (tlb_type == hypervisor)
 636                         sun4v_data_access_exception(regs, sfar, sfsr);
 637                 else
 638                         spitfire_data_access_exception(regs, sfsr, sfar);
 639                 return;
 640         }
 641         advance(regs);
 642         return;
 643 }
 644
 645 void handle_stdfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
 646 {
 647         unsigned long pc = regs->tpc;
 648         unsigned long tstate = regs->tstate;
 649         u32 insn;
 650         u64 value;
 651         u8 freg;
 652         int flag;
 653         struct fpustate *f = FPUSTATE;
 654
 655         if (tstate & TSTATE_PRIV)
 656                 die_if_kernel("stdfmna from kernel", regs);
 657         if (test_thread_flag(TIF_32BIT))
 658                 pc = (u32)pc;
 659         if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
 660                 int asi = decode_asi(insn, regs);
 661                 freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
 662                 value = 0;
 663                 flag = (freg < 32) ? FPRS_DL : FPRS_DU;
 664                 if ((asi > ASI_SNFL) ||
 665                     (asi < ASI_P))
 666                         goto daex;
 667                 save_and_clear_fpu();
 668                 if (current_thread_info()->fpsaved[0] & flag)
 669                         value = *(u64 *)&f->regs[freg];
 670                 switch (asi) {
 671                 case ASI_P:
 672                 case ASI_S: break;
 673                 case ASI_PL:
 674                 case ASI_SL:
 675                         value = __swab64p(&value); break;
 676                 default: goto daex;
 677                 }
 678                 if (put_user (value >> 32, (u32 __user *) sfar) ||
 679                     __put_user ((u32)value, (u32 __user *)(sfar + 4)))
 680                         goto daex;
 681         } else {
 682 daex:
 683                 if (tlb_type == hypervisor)
 684                         sun4v_data_access_exception(regs, sfar, sfsr);
 685                 else
 686                         spitfire_data_access_exception(regs, sfsr, sfar);
 687                 return;
 688         }
 689         advance(regs);
 690         return;
 691 }