1 /******************************************************************************
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
43 #include <net/ieee80211_radiotap.h>
44 #include <net/lib80211.h>
45 #include <net/mac80211.h>
47 #include <asm/div64.h>
49 #include "iwl-3945-core.h"
51 #include "iwl-helpers.h"
53 #ifdef CONFIG_IWL3945_DEBUG
54 u32 iwl3945_debug_level;
57 static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
58 struct iwl3945_tx_queue *txq);
60 /******************************************************************************
64 ******************************************************************************/
66 /* module parameters */
67 static int iwl3945_param_disable_hw_scan; /* def: 0 = use 3945's h/w scan */
68 static int iwl3945_param_debug; /* def: 0 = minimal debug log messages */
69 static int iwl3945_param_disable; /* def: 0 = enable radio */
70 static int iwl3945_param_antenna; /* def: 0 = both antennas (use diversity) */
71 int iwl3945_param_hwcrypto; /* def: 0 = use software encryption */
72 static int iwl3945_param_qos_enable = 1; /* def: 1 = use quality of service */
73 int iwl3945_param_queues_num = IWL39_MAX_NUM_QUEUES; /* def: 8 Tx queues */
76 * module name, copyright, version, etc.
77 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
80 #define DRV_DESCRIPTION \
81 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
83 #ifdef CONFIG_IWL3945_DEBUG
89 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
95 #define IWLWIFI_VERSION "1.2.26k" VD VS
96 #define DRV_COPYRIGHT "Copyright(c) 2003-2008 Intel Corporation"
97 #define DRV_VERSION IWLWIFI_VERSION
100 MODULE_DESCRIPTION(DRV_DESCRIPTION);
101 MODULE_VERSION(DRV_VERSION);
102 MODULE_AUTHOR(DRV_COPYRIGHT);
103 MODULE_LICENSE("GPL");
105 static const struct ieee80211_supported_band *iwl3945_get_band(
106 struct iwl3945_priv *priv, enum ieee80211_band band)
108 return priv->hw->wiphy->bands[band];
111 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
114 * Theory of operation
116 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
117 * of buffer descriptors, each of which points to one or more data buffers for
118 * the device to read from or fill. Driver and device exchange status of each
119 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
120 * entries in each circular buffer, to protect against confusing empty and full
123 * The device reads or writes the data in the queues via the device's several
124 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
126 * For Tx queue, there are low mark and high mark limits. If, after queuing
127 * the packet for Tx, free space become < low mark, Tx queue stopped. When
128 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
131 * The 3945 operates with six queues: One receive queue, one transmit queue
132 * (#4) for sending commands to the device firmware, and four transmit queues
133 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
134 ***************************************************/
136 int iwl3945_queue_space(const struct iwl3945_queue *q)
138 int s = q->read_ptr - q->write_ptr;
140 if (q->read_ptr > q->write_ptr)
145 /* keep some reserve to not confuse empty and full situations */
152 int iwl3945_x2_queue_used(const struct iwl3945_queue *q, int i)
154 return q->write_ptr > q->read_ptr ?
155 (i >= q->read_ptr && i < q->write_ptr) :
156 !(i < q->read_ptr && i >= q->write_ptr);
160 static inline u8 get_cmd_index(struct iwl3945_queue *q, u32 index, int is_huge)
162 /* This is for scan command, the big buffer at end of command array */
164 return q->n_window; /* must be power of 2 */
166 /* Otherwise, use normal size buffers */
167 return index & (q->n_window - 1);
171 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
173 static int iwl3945_queue_init(struct iwl3945_priv *priv, struct iwl3945_queue *q,
174 int count, int slots_num, u32 id)
177 q->n_window = slots_num;
180 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
181 * and iwl_queue_dec_wrap are broken. */
182 BUG_ON(!is_power_of_2(count));
184 /* slots_num must be power-of-two size, otherwise
185 * get_cmd_index is broken. */
186 BUG_ON(!is_power_of_2(slots_num));
188 q->low_mark = q->n_window / 4;
192 q->high_mark = q->n_window / 8;
193 if (q->high_mark < 2)
196 q->write_ptr = q->read_ptr = 0;
202 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
204 static int iwl3945_tx_queue_alloc(struct iwl3945_priv *priv,
205 struct iwl3945_tx_queue *txq, u32 id)
207 struct pci_dev *dev = priv->pci_dev;
209 /* Driver private data, only for Tx (not command) queues,
210 * not shared with device. */
211 if (id != IWL_CMD_QUEUE_NUM) {
212 txq->txb = kmalloc(sizeof(txq->txb[0]) *
213 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
215 IWL_ERROR("kmalloc for auxiliary BD "
216 "structures failed\n");
222 /* Circular buffer of transmit frame descriptors (TFDs),
223 * shared with device */
224 txq->bd = pci_alloc_consistent(dev,
225 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
229 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
230 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
245 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
247 int iwl3945_tx_queue_init(struct iwl3945_priv *priv,
248 struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
250 struct pci_dev *dev = priv->pci_dev;
255 * Alloc buffer array for commands (Tx or other types of commands).
256 * For the command queue (#4), allocate command space + one big
257 * command for scan, since scan command is very huge; the system will
258 * not have two scans at the same time, so only one is needed.
259 * For data Tx queues (all other queues), no super-size command
262 len = sizeof(struct iwl3945_cmd) * slots_num;
263 if (txq_id == IWL_CMD_QUEUE_NUM)
264 len += IWL_MAX_SCAN_SIZE;
265 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
269 /* Alloc driver data array and TFD circular buffer */
270 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
272 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
276 txq->need_update = 0;
278 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
279 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
280 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
282 /* Initialize queue high/low-water, head/tail indexes */
283 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
285 /* Tell device where to find queue, enable DMA channel. */
286 iwl3945_hw_tx_queue_init(priv, txq);
292 * iwl3945_tx_queue_free - Deallocate DMA queue.
293 * @txq: Transmit queue to deallocate.
295 * Empty queue by removing and destroying all BD's.
297 * 0-fill, but do not free "txq" descriptor structure.
299 void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
301 struct iwl3945_queue *q = &txq->q;
302 struct pci_dev *dev = priv->pci_dev;
308 /* first, empty all BD's */
309 for (; q->write_ptr != q->read_ptr;
310 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
311 iwl3945_hw_txq_free_tfd(priv, txq);
313 len = sizeof(struct iwl3945_cmd) * q->n_window;
314 if (q->id == IWL_CMD_QUEUE_NUM)
315 len += IWL_MAX_SCAN_SIZE;
317 /* De-alloc array of command/tx buffers */
318 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
320 /* De-alloc circular buffer of TFDs */
322 pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
323 txq->q.n_bd, txq->bd, txq->q.dma_addr);
325 /* De-alloc array of per-TFD driver data */
329 /* 0-fill queue descriptor structure */
330 memset(txq, 0, sizeof(*txq));
333 const u8 iwl3945_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
335 /*************** STATION TABLE MANAGEMENT ****
336 * mac80211 should be examined to determine if sta_info is duplicating
337 * the functionality provided here
340 /**************************************************************/
341 #if 0 /* temporary disable till we add real remove station */
343 * iwl3945_remove_station - Remove driver's knowledge of station.
345 * NOTE: This does not remove station from device's station table.
347 static u8 iwl3945_remove_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap)
349 int index = IWL_INVALID_STATION;
353 spin_lock_irqsave(&priv->sta_lock, flags);
357 else if (is_broadcast_ether_addr(addr))
358 index = priv->hw_setting.bcast_sta_id;
360 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
361 if (priv->stations[i].used &&
362 !compare_ether_addr(priv->stations[i].sta.sta.addr,
368 if (unlikely(index == IWL_INVALID_STATION))
371 if (priv->stations[index].used) {
372 priv->stations[index].used = 0;
373 priv->num_stations--;
376 BUG_ON(priv->num_stations < 0);
379 spin_unlock_irqrestore(&priv->sta_lock, flags);
385 * iwl3945_clear_stations_table - Clear the driver's station table
387 * NOTE: This does not clear or otherwise alter the device's station table.
389 static void iwl3945_clear_stations_table(struct iwl3945_priv *priv)
393 spin_lock_irqsave(&priv->sta_lock, flags);
395 priv->num_stations = 0;
396 memset(priv->stations, 0, sizeof(priv->stations));
398 spin_unlock_irqrestore(&priv->sta_lock, flags);
402 * iwl3945_add_station - Add station to station tables in driver and device
404 u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap, u8 flags)
407 int index = IWL_INVALID_STATION;
408 struct iwl3945_station_entry *station;
409 unsigned long flags_spin;
412 spin_lock_irqsave(&priv->sta_lock, flags_spin);
415 else if (is_broadcast_ether_addr(addr))
416 index = priv->hw_setting.bcast_sta_id;
418 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
419 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
425 if (!priv->stations[i].used &&
426 index == IWL_INVALID_STATION)
430 /* These two conditions has the same outcome but keep them separate
431 since they have different meaning */
432 if (unlikely(index == IWL_INVALID_STATION)) {
433 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
437 if (priv->stations[index].used &&
438 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
439 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
443 IWL_DEBUG_ASSOC("Add STA ID %d: %pM\n", index, addr);
444 station = &priv->stations[index];
446 priv->num_stations++;
448 /* Set up the REPLY_ADD_STA command to send to device */
449 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
450 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
451 station->sta.mode = 0;
452 station->sta.sta.sta_id = index;
453 station->sta.station_flags = 0;
455 if (priv->band == IEEE80211_BAND_5GHZ)
456 rate = IWL_RATE_6M_PLCP;
458 rate = IWL_RATE_1M_PLCP;
460 /* Turn on both antennas for the station... */
461 station->sta.rate_n_flags =
462 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
463 station->current_rate.rate_n_flags =
464 le16_to_cpu(station->sta.rate_n_flags);
466 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
468 /* Add station to device's station table */
469 iwl3945_send_add_station(priv, &station->sta, flags);
474 /*************** DRIVER STATUS FUNCTIONS *****/
476 static inline int iwl3945_is_ready(struct iwl3945_priv *priv)
478 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
479 * set but EXIT_PENDING is not */
480 return test_bit(STATUS_READY, &priv->status) &&
481 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
482 !test_bit(STATUS_EXIT_PENDING, &priv->status);
485 static inline int iwl3945_is_alive(struct iwl3945_priv *priv)
487 return test_bit(STATUS_ALIVE, &priv->status);
490 static inline int iwl3945_is_init(struct iwl3945_priv *priv)
492 return test_bit(STATUS_INIT, &priv->status);
495 static inline int iwl3945_is_rfkill_sw(struct iwl3945_priv *priv)
497 return test_bit(STATUS_RF_KILL_SW, &priv->status);
500 static inline int iwl3945_is_rfkill_hw(struct iwl3945_priv *priv)
502 return test_bit(STATUS_RF_KILL_HW, &priv->status);
505 static inline int iwl3945_is_rfkill(struct iwl3945_priv *priv)
507 return iwl3945_is_rfkill_hw(priv) ||
508 iwl3945_is_rfkill_sw(priv);
511 static inline int iwl3945_is_ready_rf(struct iwl3945_priv *priv)
514 if (iwl3945_is_rfkill(priv))
517 return iwl3945_is_ready(priv);
520 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
522 #define IWL_CMD(x) case x : return #x
524 static const char *get_cmd_string(u8 cmd)
527 IWL_CMD(REPLY_ALIVE);
528 IWL_CMD(REPLY_ERROR);
530 IWL_CMD(REPLY_RXON_ASSOC);
531 IWL_CMD(REPLY_QOS_PARAM);
532 IWL_CMD(REPLY_RXON_TIMING);
533 IWL_CMD(REPLY_ADD_STA);
534 IWL_CMD(REPLY_REMOVE_STA);
535 IWL_CMD(REPLY_REMOVE_ALL_STA);
536 IWL_CMD(REPLY_3945_RX);
538 IWL_CMD(REPLY_RATE_SCALE);
539 IWL_CMD(REPLY_LEDS_CMD);
540 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
541 IWL_CMD(RADAR_NOTIFICATION);
542 IWL_CMD(REPLY_QUIET_CMD);
543 IWL_CMD(REPLY_CHANNEL_SWITCH);
544 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
545 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
546 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
547 IWL_CMD(POWER_TABLE_CMD);
548 IWL_CMD(PM_SLEEP_NOTIFICATION);
549 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
550 IWL_CMD(REPLY_SCAN_CMD);
551 IWL_CMD(REPLY_SCAN_ABORT_CMD);
552 IWL_CMD(SCAN_START_NOTIFICATION);
553 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
554 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
555 IWL_CMD(BEACON_NOTIFICATION);
556 IWL_CMD(REPLY_TX_BEACON);
557 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
558 IWL_CMD(QUIET_NOTIFICATION);
559 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
560 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
561 IWL_CMD(REPLY_BT_CONFIG);
562 IWL_CMD(REPLY_STATISTICS_CMD);
563 IWL_CMD(STATISTICS_NOTIFICATION);
564 IWL_CMD(REPLY_CARD_STATE_CMD);
565 IWL_CMD(CARD_STATE_NOTIFICATION);
566 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
573 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
576 * iwl3945_enqueue_hcmd - enqueue a uCode command
577 * @priv: device private data point
578 * @cmd: a point to the ucode command structure
580 * The function returns < 0 values to indicate the operation is
581 * failed. On success, it turns the index (> 0) of command in the
584 static int iwl3945_enqueue_hcmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
586 struct iwl3945_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
587 struct iwl3945_queue *q = &txq->q;
588 struct iwl3945_tfd_frame *tfd;
590 struct iwl3945_cmd *out_cmd;
592 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
593 dma_addr_t phys_addr;
599 /* If any of the command structures end up being larger than
600 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
601 * we will need to increase the size of the TFD entries */
602 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
603 !(cmd->meta.flags & CMD_SIZE_HUGE));
606 if (iwl3945_is_rfkill(priv)) {
607 IWL_DEBUG_INFO("Not sending command - RF KILL");
611 if (iwl3945_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
612 IWL_ERROR("No space for Tx\n");
616 spin_lock_irqsave(&priv->hcmd_lock, flags);
618 tfd = &txq->bd[q->write_ptr];
619 memset(tfd, 0, sizeof(*tfd));
621 control_flags = (u32 *) tfd;
623 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
624 out_cmd = &txq->cmd[idx];
626 out_cmd->hdr.cmd = cmd->id;
627 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
628 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
630 /* At this point, the out_cmd now has all of the incoming cmd
633 out_cmd->hdr.flags = 0;
634 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
635 INDEX_TO_SEQ(q->write_ptr));
636 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
637 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
639 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
640 offsetof(struct iwl3945_cmd, hdr);
641 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
643 pad = U32_PAD(cmd->len);
644 count = TFD_CTL_COUNT_GET(*control_flags);
645 *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
647 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
648 "%d bytes at %d[%d]:%d\n",
649 get_cmd_string(out_cmd->hdr.cmd),
650 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
651 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
653 txq->need_update = 1;
655 /* Increment and update queue's write index */
656 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
657 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
659 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
660 return ret ? ret : idx;
663 static int iwl3945_send_cmd_async(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
667 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
669 /* An asynchronous command can not expect an SKB to be set. */
670 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
672 /* An asynchronous command MUST have a callback. */
673 BUG_ON(!cmd->meta.u.callback);
675 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
678 ret = iwl3945_enqueue_hcmd(priv, cmd);
680 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
681 get_cmd_string(cmd->id), ret);
687 static int iwl3945_send_cmd_sync(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
692 BUG_ON(cmd->meta.flags & CMD_ASYNC);
694 /* A synchronous command can not have a callback set. */
695 BUG_ON(cmd->meta.u.callback != NULL);
697 if (test_and_set_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status)) {
698 IWL_ERROR("Error sending %s: Already sending a host command\n",
699 get_cmd_string(cmd->id));
704 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
706 if (cmd->meta.flags & CMD_WANT_SKB)
707 cmd->meta.source = &cmd->meta;
709 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
712 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
713 get_cmd_string(cmd->id), ret);
717 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
718 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
719 HOST_COMPLETE_TIMEOUT);
721 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
722 IWL_ERROR("Error sending %s: time out after %dms.\n",
723 get_cmd_string(cmd->id),
724 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
726 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
732 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
733 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
734 get_cmd_string(cmd->id));
738 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
739 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
740 get_cmd_string(cmd->id));
744 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
745 IWL_ERROR("Error: Response NULL in '%s'\n",
746 get_cmd_string(cmd->id));
755 if (cmd->meta.flags & CMD_WANT_SKB) {
756 struct iwl3945_cmd *qcmd;
758 /* Cancel the CMD_WANT_SKB flag for the cmd in the
759 * TX cmd queue. Otherwise in case the cmd comes
760 * in later, it will possibly set an invalid
761 * address (cmd->meta.source). */
762 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
763 qcmd->meta.flags &= ~CMD_WANT_SKB;
766 if (cmd->meta.u.skb) {
767 dev_kfree_skb_any(cmd->meta.u.skb);
768 cmd->meta.u.skb = NULL;
771 clear_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status);
775 int iwl3945_send_cmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
777 if (cmd->meta.flags & CMD_ASYNC)
778 return iwl3945_send_cmd_async(priv, cmd);
780 return iwl3945_send_cmd_sync(priv, cmd);
783 int iwl3945_send_cmd_pdu(struct iwl3945_priv *priv, u8 id, u16 len, const void *data)
785 struct iwl3945_host_cmd cmd = {
791 return iwl3945_send_cmd_sync(priv, &cmd);
794 static int __must_check iwl3945_send_cmd_u32(struct iwl3945_priv *priv, u8 id, u32 val)
796 struct iwl3945_host_cmd cmd = {
802 return iwl3945_send_cmd_sync(priv, &cmd);
805 int iwl3945_send_statistics_request(struct iwl3945_priv *priv)
807 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
811 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
812 * @band: 2.4 or 5 GHz band
813 * @channel: Any channel valid for the requested band
815 * In addition to setting the staging RXON, priv->band is also set.
817 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
818 * in the staging RXON flag structure based on the band
820 static int iwl3945_set_rxon_channel(struct iwl3945_priv *priv,
821 enum ieee80211_band band,
824 if (!iwl3945_get_channel_info(priv, band, channel)) {
825 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
830 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
831 (priv->band == band))
834 priv->staging_rxon.channel = cpu_to_le16(channel);
835 if (band == IEEE80211_BAND_5GHZ)
836 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
838 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
842 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
848 * iwl3945_check_rxon_cmd - validate RXON structure is valid
850 * NOTE: This is really only useful during development and can eventually
851 * be #ifdef'd out once the driver is stable and folks aren't actively
854 static int iwl3945_check_rxon_cmd(struct iwl3945_rxon_cmd *rxon)
859 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
860 error |= le32_to_cpu(rxon->flags &
861 (RXON_FLG_TGJ_NARROW_BAND_MSK |
862 RXON_FLG_RADAR_DETECT_MSK));
864 IWL_WARNING("check 24G fields %d | %d\n",
867 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
868 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
870 IWL_WARNING("check 52 fields %d | %d\n",
872 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
874 IWL_WARNING("check 52 CCK %d | %d\n",
877 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
879 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
881 /* make sure basic rates 6Mbps and 1Mbps are supported */
882 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
883 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
885 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
887 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
889 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
891 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
892 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
894 IWL_WARNING("check CCK and short slot %d | %d\n",
897 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
898 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
900 IWL_WARNING("check CCK & auto detect %d | %d\n",
903 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
904 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
906 IWL_WARNING("check TGG and auto detect %d | %d\n",
909 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
910 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
911 RXON_FLG_ANT_A_MSK)) == 0);
913 IWL_WARNING("check antenna %d %d\n", counter++, error);
916 IWL_WARNING("Tuning to channel %d\n",
917 le16_to_cpu(rxon->channel));
920 IWL_ERROR("Not a valid iwl3945_rxon_assoc_cmd field values\n");
927 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
928 * @priv: staging_rxon is compared to active_rxon
930 * If the RXON structure is changing enough to require a new tune,
931 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
932 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
934 static int iwl3945_full_rxon_required(struct iwl3945_priv *priv)
937 /* These items are only settable from the full RXON command */
938 if (!(iwl3945_is_associated(priv)) ||
939 compare_ether_addr(priv->staging_rxon.bssid_addr,
940 priv->active_rxon.bssid_addr) ||
941 compare_ether_addr(priv->staging_rxon.node_addr,
942 priv->active_rxon.node_addr) ||
943 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
944 priv->active_rxon.wlap_bssid_addr) ||
945 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
946 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
947 (priv->staging_rxon.air_propagation !=
948 priv->active_rxon.air_propagation) ||
949 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
952 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
953 * be updated with the RXON_ASSOC command -- however only some
954 * flag transitions are allowed using RXON_ASSOC */
956 /* Check if we are not switching bands */
957 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
958 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
961 /* Check if we are switching association toggle */
962 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
963 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
969 static int iwl3945_send_rxon_assoc(struct iwl3945_priv *priv)
972 struct iwl3945_rx_packet *res = NULL;
973 struct iwl3945_rxon_assoc_cmd rxon_assoc;
974 struct iwl3945_host_cmd cmd = {
975 .id = REPLY_RXON_ASSOC,
976 .len = sizeof(rxon_assoc),
977 .meta.flags = CMD_WANT_SKB,
980 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging_rxon;
981 const struct iwl3945_rxon_cmd *rxon2 = &priv->active_rxon;
983 if ((rxon1->flags == rxon2->flags) &&
984 (rxon1->filter_flags == rxon2->filter_flags) &&
985 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
986 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
987 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
991 rxon_assoc.flags = priv->staging_rxon.flags;
992 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
993 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
994 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
995 rxon_assoc.reserved = 0;
997 rc = iwl3945_send_cmd_sync(priv, &cmd);
1001 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1002 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1003 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1007 priv->alloc_rxb_skb--;
1008 dev_kfree_skb_any(cmd.meta.u.skb);
1014 * iwl3945_commit_rxon - commit staging_rxon to hardware
1016 * The RXON command in staging_rxon is committed to the hardware and
1017 * the active_rxon structure is updated with the new data. This
1018 * function correctly transitions out of the RXON_ASSOC_MSK state if
1019 * a HW tune is required based on the RXON structure changes.
1021 static int iwl3945_commit_rxon(struct iwl3945_priv *priv)
1023 /* cast away the const for active_rxon in this function */
1024 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
1027 if (!iwl3945_is_alive(priv))
1030 /* always get timestamp with Rx frame */
1031 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1033 /* select antenna */
1034 priv->staging_rxon.flags &=
1035 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1036 priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
1038 rc = iwl3945_check_rxon_cmd(&priv->staging_rxon);
1040 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1044 /* If we don't need to send a full RXON, we can use
1045 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
1046 * and other flags for the current radio configuration. */
1047 if (!iwl3945_full_rxon_required(priv)) {
1048 rc = iwl3945_send_rxon_assoc(priv);
1050 IWL_ERROR("Error setting RXON_ASSOC "
1051 "configuration (%d).\n", rc);
1055 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1060 /* If we are currently associated and the new config requires
1061 * an RXON_ASSOC and the new config wants the associated mask enabled,
1062 * we must clear the associated from the active configuration
1063 * before we apply the new config */
1064 if (iwl3945_is_associated(priv) &&
1065 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1066 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1067 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1069 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1070 sizeof(struct iwl3945_rxon_cmd),
1071 &priv->active_rxon);
1073 /* If the mask clearing failed then we set
1074 * active_rxon back to what it was previously */
1076 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1077 IWL_ERROR("Error clearing ASSOC_MSK on current "
1078 "configuration (%d).\n", rc);
1083 IWL_DEBUG_INFO("Sending RXON\n"
1084 "* with%s RXON_FILTER_ASSOC_MSK\n"
1087 ((priv->staging_rxon.filter_flags &
1088 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1089 le16_to_cpu(priv->staging_rxon.channel),
1090 priv->staging_rxon.bssid_addr);
1092 /* Apply the new configuration */
1093 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1094 sizeof(struct iwl3945_rxon_cmd), &priv->staging_rxon);
1096 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1100 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1102 iwl3945_clear_stations_table(priv);
1104 /* If we issue a new RXON command which required a tune then we must
1105 * send a new TXPOWER command or we won't be able to Tx any frames */
1106 rc = iwl3945_hw_reg_send_txpower(priv);
1108 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1112 /* Add the broadcast address so we can send broadcast frames */
1113 if (iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0) ==
1114 IWL_INVALID_STATION) {
1115 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1119 /* If we have set the ASSOC_MSK and we are in BSS mode then
1120 * add the IWL_AP_ID to the station rate table */
1121 if (iwl3945_is_associated(priv) &&
1122 (priv->iw_mode == NL80211_IFTYPE_STATION))
1123 if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr, 1, 0)
1124 == IWL_INVALID_STATION) {
1125 IWL_ERROR("Error adding AP address for transmit.\n");
1129 /* Init the hardware's rate fallback order based on the band */
1130 rc = iwl3945_init_hw_rate_table(priv);
1132 IWL_ERROR("Error setting HW rate table: %02X\n", rc);
1139 static int iwl3945_send_bt_config(struct iwl3945_priv *priv)
1141 struct iwl3945_bt_cmd bt_cmd = {
1149 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1150 sizeof(struct iwl3945_bt_cmd), &bt_cmd);
1153 static int iwl3945_send_scan_abort(struct iwl3945_priv *priv)
1156 struct iwl3945_rx_packet *res;
1157 struct iwl3945_host_cmd cmd = {
1158 .id = REPLY_SCAN_ABORT_CMD,
1159 .meta.flags = CMD_WANT_SKB,
1162 /* If there isn't a scan actively going on in the hardware
1163 * then we are in between scan bands and not actually
1164 * actively scanning, so don't send the abort command */
1165 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1166 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1170 rc = iwl3945_send_cmd_sync(priv, &cmd);
1172 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1176 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1177 if (res->u.status != CAN_ABORT_STATUS) {
1178 /* The scan abort will return 1 for success or
1179 * 2 for "failure". A failure condition can be
1180 * due to simply not being in an active scan which
1181 * can occur if we send the scan abort before we
1182 * the microcode has notified us that a scan is
1184 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1185 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1186 clear_bit(STATUS_SCAN_HW, &priv->status);
1189 dev_kfree_skb_any(cmd.meta.u.skb);
1194 static int iwl3945_card_state_sync_callback(struct iwl3945_priv *priv,
1195 struct iwl3945_cmd *cmd,
1196 struct sk_buff *skb)
1204 * Use: Sets the device's internal card state to enable, disable, or halt
1206 * When in the 'enable' state the card operates as normal.
1207 * When in the 'disable' state, the card enters into a low power mode.
1208 * When in the 'halt' state, the card is shut down and must be fully
1209 * restarted to come back on.
1211 static int iwl3945_send_card_state(struct iwl3945_priv *priv, u32 flags, u8 meta_flag)
1213 struct iwl3945_host_cmd cmd = {
1214 .id = REPLY_CARD_STATE_CMD,
1217 .meta.flags = meta_flag,
1220 if (meta_flag & CMD_ASYNC)
1221 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
1223 return iwl3945_send_cmd(priv, &cmd);
1226 static int iwl3945_add_sta_sync_callback(struct iwl3945_priv *priv,
1227 struct iwl3945_cmd *cmd, struct sk_buff *skb)
1229 struct iwl3945_rx_packet *res = NULL;
1232 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1236 res = (struct iwl3945_rx_packet *)skb->data;
1237 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1238 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1243 switch (res->u.add_sta.status) {
1244 case ADD_STA_SUCCESS_MSK:
1250 /* We didn't cache the SKB; let the caller free it */
1254 int iwl3945_send_add_station(struct iwl3945_priv *priv,
1255 struct iwl3945_addsta_cmd *sta, u8 flags)
1257 struct iwl3945_rx_packet *res = NULL;
1259 struct iwl3945_host_cmd cmd = {
1260 .id = REPLY_ADD_STA,
1261 .len = sizeof(struct iwl3945_addsta_cmd),
1262 .meta.flags = flags,
1266 if (flags & CMD_ASYNC)
1267 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
1269 cmd.meta.flags |= CMD_WANT_SKB;
1271 rc = iwl3945_send_cmd(priv, &cmd);
1273 if (rc || (flags & CMD_ASYNC))
1276 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1277 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1278 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1284 switch (res->u.add_sta.status) {
1285 case ADD_STA_SUCCESS_MSK:
1286 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1290 IWL_WARNING("REPLY_ADD_STA failed\n");
1295 priv->alloc_rxb_skb--;
1296 dev_kfree_skb_any(cmd.meta.u.skb);
1301 static int iwl3945_update_sta_key_info(struct iwl3945_priv *priv,
1302 struct ieee80211_key_conf *keyconf,
1305 unsigned long flags;
1306 __le16 key_flags = 0;
1308 switch (keyconf->alg) {
1310 key_flags |= STA_KEY_FLG_CCMP;
1311 key_flags |= cpu_to_le16(
1312 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1313 key_flags &= ~STA_KEY_FLG_INVALID;
1320 spin_lock_irqsave(&priv->sta_lock, flags);
1321 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1322 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1323 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1326 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1328 priv->stations[sta_id].sta.key.key_flags = key_flags;
1329 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1330 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1332 spin_unlock_irqrestore(&priv->sta_lock, flags);
1334 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1335 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1339 static int iwl3945_clear_sta_key_info(struct iwl3945_priv *priv, u8 sta_id)
1341 unsigned long flags;
1343 spin_lock_irqsave(&priv->sta_lock, flags);
1344 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1345 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl3945_keyinfo));
1346 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1347 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1348 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1349 spin_unlock_irqrestore(&priv->sta_lock, flags);
1351 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1352 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1356 static void iwl3945_clear_free_frames(struct iwl3945_priv *priv)
1358 struct list_head *element;
1360 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1361 priv->frames_count);
1363 while (!list_empty(&priv->free_frames)) {
1364 element = priv->free_frames.next;
1366 kfree(list_entry(element, struct iwl3945_frame, list));
1367 priv->frames_count--;
1370 if (priv->frames_count) {
1371 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1372 priv->frames_count);
1373 priv->frames_count = 0;
1377 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl3945_priv *priv)
1379 struct iwl3945_frame *frame;
1380 struct list_head *element;
1381 if (list_empty(&priv->free_frames)) {
1382 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1384 IWL_ERROR("Could not allocate frame!\n");
1388 priv->frames_count++;
1392 element = priv->free_frames.next;
1394 return list_entry(element, struct iwl3945_frame, list);
1397 static void iwl3945_free_frame(struct iwl3945_priv *priv, struct iwl3945_frame *frame)
1399 memset(frame, 0, sizeof(*frame));
1400 list_add(&frame->list, &priv->free_frames);
1403 unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv,
1404 struct ieee80211_hdr *hdr,
1405 const u8 *dest, int left)
1408 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
1409 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
1410 (priv->iw_mode != NL80211_IFTYPE_AP)))
1413 if (priv->ibss_beacon->len > left)
1416 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1418 return priv->ibss_beacon->len;
1421 static u8 iwl3945_rate_get_lowest_plcp(struct iwl3945_priv *priv)
1427 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
1428 rate_mask = priv->active_rate_basic & 0xF;
1430 rate_mask = priv->active_rate_basic & 0xFF0;
1432 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1433 i = iwl3945_rates[i].next_ieee) {
1434 if (rate_mask & (1 << i))
1435 return iwl3945_rates[i].plcp;
1438 /* No valid rate was found. Assign the lowest one */
1439 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
1440 return IWL_RATE_1M_PLCP;
1442 return IWL_RATE_6M_PLCP;
1445 static int iwl3945_send_beacon_cmd(struct iwl3945_priv *priv)
1447 struct iwl3945_frame *frame;
1448 unsigned int frame_size;
1452 frame = iwl3945_get_free_frame(priv);
1455 IWL_ERROR("Could not obtain free frame buffer for beacon "
1460 rate = iwl3945_rate_get_lowest_plcp(priv);
1462 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
1464 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1467 iwl3945_free_frame(priv, frame);
1472 /******************************************************************************
1474 * EEPROM related functions
1476 ******************************************************************************/
1478 static void get_eeprom_mac(struct iwl3945_priv *priv, u8 *mac)
1480 memcpy(mac, priv->eeprom.mac_address, 6);
1484 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
1485 * embedded controller) as EEPROM reader; each read is a series of pulses
1486 * to/from the EEPROM chip, not a single event, so even reads could conflict
1487 * if they weren't arbitrated by some ownership mechanism. Here, the driver
1488 * simply claims ownership, which should be safe when this function is called
1489 * (i.e. before loading uCode!).
1491 static inline int iwl3945_eeprom_acquire_semaphore(struct iwl3945_priv *priv)
1493 _iwl3945_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
1498 * iwl3945_eeprom_init - read EEPROM contents
1500 * Load the EEPROM contents from adapter into priv->eeprom
1502 * NOTE: This routine uses the non-debug IO access functions.
1504 int iwl3945_eeprom_init(struct iwl3945_priv *priv)
1506 u16 *e = (u16 *)&priv->eeprom;
1507 u32 gp = iwl3945_read32(priv, CSR_EEPROM_GP);
1509 int sz = sizeof(priv->eeprom);
1514 /* The EEPROM structure has several padding buffers within it
1515 * and when adding new EEPROM maps is subject to programmer errors
1516 * which may be very difficult to identify without explicitly
1517 * checking the resulting size of the eeprom map. */
1518 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1520 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1521 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x\n", gp);
1525 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
1526 rc = iwl3945_eeprom_acquire_semaphore(priv);
1528 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
1532 /* eeprom is an array of 16bit values */
1533 for (addr = 0; addr < sz; addr += sizeof(u16)) {
1534 _iwl3945_write32(priv, CSR_EEPROM_REG, addr << 1);
1535 _iwl3945_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
1537 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
1538 i += IWL_EEPROM_ACCESS_DELAY) {
1539 r = _iwl3945_read_direct32(priv, CSR_EEPROM_REG);
1540 if (r & CSR_EEPROM_REG_READ_VALID_MSK)
1542 udelay(IWL_EEPROM_ACCESS_DELAY);
1545 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
1546 IWL_ERROR("Time out reading EEPROM[%d]\n", addr);
1549 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
1555 static void iwl3945_unset_hw_setting(struct iwl3945_priv *priv)
1557 if (priv->hw_setting.shared_virt)
1558 pci_free_consistent(priv->pci_dev,
1559 sizeof(struct iwl3945_shared),
1560 priv->hw_setting.shared_virt,
1561 priv->hw_setting.shared_phys);
1565 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
1567 * return : set the bit for each supported rate insert in ie
1569 static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1570 u16 basic_rate, int *left)
1572 u16 ret_rates = 0, bit;
1577 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1578 if (bit & supported_rate) {
1580 rates[*cnt] = iwl3945_rates[i].ieee |
1581 ((bit & basic_rate) ? 0x80 : 0x00);
1585 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1594 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
1596 static u16 iwl3945_fill_probe_req(struct iwl3945_priv *priv,
1597 struct ieee80211_mgmt *frame,
1602 u16 active_rates, ret_rates, cck_rates;
1604 /* Make sure there is enough space for the probe request,
1605 * two mandatory IEs and the data */
1611 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1612 memcpy(frame->da, iwl3945_broadcast_addr, ETH_ALEN);
1613 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1614 memcpy(frame->bssid, iwl3945_broadcast_addr, ETH_ALEN);
1615 frame->seq_ctrl = 0;
1617 /* fill in our indirect SSID IE */
1624 pos = &(frame->u.probe_req.variable[0]);
1625 *pos++ = WLAN_EID_SSID;
1628 /* fill in supported rate */
1634 /* ... fill it in... */
1635 *pos++ = WLAN_EID_SUPP_RATES;
1638 priv->active_rate = priv->rates_mask;
1639 active_rates = priv->active_rate;
1640 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1642 cck_rates = IWL_CCK_RATES_MASK & active_rates;
1643 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
1644 priv->active_rate_basic, &left);
1645 active_rates &= ~ret_rates;
1647 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
1648 priv->active_rate_basic, &left);
1649 active_rates &= ~ret_rates;
1653 if (active_rates == 0)
1656 /* fill in supported extended rate */
1661 /* ... fill it in... */
1662 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1664 iwl3945_supported_rate_to_ie(pos, active_rates,
1665 priv->active_rate_basic, &left);
1676 static int iwl3945_send_qos_params_command(struct iwl3945_priv *priv,
1677 struct iwl3945_qosparam_cmd *qos)
1680 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1681 sizeof(struct iwl3945_qosparam_cmd), qos);
1684 static void iwl3945_reset_qos(struct iwl3945_priv *priv)
1690 unsigned long flags;
1693 spin_lock_irqsave(&priv->lock, flags);
1694 priv->qos_data.qos_active = 0;
1696 if (priv->iw_mode == NL80211_IFTYPE_ADHOC) {
1697 if (priv->qos_data.qos_enable)
1698 priv->qos_data.qos_active = 1;
1699 if (!(priv->active_rate & 0xfff0)) {
1703 } else if (priv->iw_mode == NL80211_IFTYPE_AP) {
1704 if (priv->qos_data.qos_enable)
1705 priv->qos_data.qos_active = 1;
1706 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
1711 if (priv->qos_data.qos_active)
1714 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1715 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1716 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1717 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1718 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1720 if (priv->qos_data.qos_active) {
1722 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1723 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1724 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1725 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1726 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1729 priv->qos_data.def_qos_parm.ac[i].cw_min =
1730 cpu_to_le16((cw_min + 1) / 2 - 1);
1731 priv->qos_data.def_qos_parm.ac[i].cw_max =
1732 cpu_to_le16(cw_max);
1733 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1735 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1738 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1740 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1743 priv->qos_data.def_qos_parm.ac[i].cw_min =
1744 cpu_to_le16((cw_min + 1) / 4 - 1);
1745 priv->qos_data.def_qos_parm.ac[i].cw_max =
1746 cpu_to_le16((cw_max + 1) / 2 - 1);
1747 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1748 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1750 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1753 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1756 for (i = 1; i < 4; i++) {
1757 priv->qos_data.def_qos_parm.ac[i].cw_min =
1758 cpu_to_le16(cw_min);
1759 priv->qos_data.def_qos_parm.ac[i].cw_max =
1760 cpu_to_le16(cw_max);
1761 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
1762 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1763 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1766 IWL_DEBUG_QOS("set QoS to default \n");
1768 spin_unlock_irqrestore(&priv->lock, flags);
1771 static void iwl3945_activate_qos(struct iwl3945_priv *priv, u8 force)
1773 unsigned long flags;
1775 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1778 if (!priv->qos_data.qos_enable)
1781 spin_lock_irqsave(&priv->lock, flags);
1782 priv->qos_data.def_qos_parm.qos_flags = 0;
1784 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1785 !priv->qos_data.qos_cap.q_AP.txop_request)
1786 priv->qos_data.def_qos_parm.qos_flags |=
1787 QOS_PARAM_FLG_TXOP_TYPE_MSK;
1789 if (priv->qos_data.qos_active)
1790 priv->qos_data.def_qos_parm.qos_flags |=
1791 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1793 spin_unlock_irqrestore(&priv->lock, flags);
1795 if (force || iwl3945_is_associated(priv)) {
1796 IWL_DEBUG_QOS("send QoS cmd with QoS active %d \n",
1797 priv->qos_data.qos_active);
1799 iwl3945_send_qos_params_command(priv,
1800 &(priv->qos_data.def_qos_parm));
1805 * Power management (not Tx power!) functions
1807 #define MSEC_TO_USEC 1024
1809 #define NOSLP __constant_cpu_to_le32(0)
1810 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
1811 #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1812 #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1813 __constant_cpu_to_le32(X1), \
1814 __constant_cpu_to_le32(X2), \
1815 __constant_cpu_to_le32(X3), \
1816 __constant_cpu_to_le32(X4)}
1819 /* default power management (not Tx power) table values */
1821 static struct iwl3945_power_vec_entry range_0[IWL_POWER_AC] = {
1822 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1823 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1824 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1825 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1826 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1827 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1831 static struct iwl3945_power_vec_entry range_1[IWL_POWER_AC] = {
1832 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1833 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1834 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1835 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1836 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1837 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1838 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1839 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1840 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1841 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1844 int iwl3945_power_init_handle(struct iwl3945_priv *priv)
1847 struct iwl3945_power_mgr *pow_data;
1848 int size = sizeof(struct iwl3945_power_vec_entry) * IWL_POWER_AC;
1851 IWL_DEBUG_POWER("Initialize power \n");
1853 pow_data = &(priv->power_data);
1855 memset(pow_data, 0, sizeof(*pow_data));
1857 pow_data->active_index = IWL_POWER_RANGE_0;
1858 pow_data->dtim_val = 0xffff;
1860 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1861 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1863 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1867 struct iwl3945_powertable_cmd *cmd;
1869 IWL_DEBUG_POWER("adjust power command flags\n");
1871 for (i = 0; i < IWL_POWER_AC; i++) {
1872 cmd = &pow_data->pwr_range_0[i].cmd;
1875 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1877 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1883 static int iwl3945_update_power_cmd(struct iwl3945_priv *priv,
1884 struct iwl3945_powertable_cmd *cmd, u32 mode)
1889 struct iwl3945_power_vec_entry *range;
1891 struct iwl3945_power_mgr *pow_data;
1893 if (mode > IWL_POWER_INDEX_5) {
1894 IWL_DEBUG_POWER("Error invalid power mode \n");
1897 pow_data = &(priv->power_data);
1899 if (pow_data->active_index == IWL_POWER_RANGE_0)
1900 range = &pow_data->pwr_range_0[0];
1902 range = &pow_data->pwr_range_1[1];
1904 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
1906 #ifdef IWL_MAC80211_DISABLE
1907 if (priv->assoc_network != NULL) {
1908 unsigned long flags;
1910 period = priv->assoc_network->tim.tim_period;
1912 #endif /*IWL_MAC80211_DISABLE */
1913 skip = range[mode].no_dtim;
1922 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1924 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1925 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1926 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1929 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1930 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1931 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1934 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1935 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1936 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1937 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1938 le32_to_cpu(cmd->sleep_interval[0]),
1939 le32_to_cpu(cmd->sleep_interval[1]),
1940 le32_to_cpu(cmd->sleep_interval[2]),
1941 le32_to_cpu(cmd->sleep_interval[3]),
1942 le32_to_cpu(cmd->sleep_interval[4]));
1947 static int iwl3945_send_power_mode(struct iwl3945_priv *priv, u32 mode)
1949 u32 uninitialized_var(final_mode);
1951 struct iwl3945_powertable_cmd cmd;
1953 /* If on battery, set to 3,
1954 * if plugged into AC power, set to CAM ("continuously aware mode"),
1955 * else user level */
1957 case IWL_POWER_BATTERY:
1958 final_mode = IWL_POWER_INDEX_3;
1961 final_mode = IWL_POWER_MODE_CAM;
1968 iwl3945_update_power_cmd(priv, &cmd, final_mode);
1970 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
1972 if (final_mode == IWL_POWER_MODE_CAM)
1973 clear_bit(STATUS_POWER_PMI, &priv->status);
1975 set_bit(STATUS_POWER_PMI, &priv->status);
1981 * iwl3945_scan_cancel - Cancel any currently executing HW scan
1983 * NOTE: priv->mutex is not required before calling this function
1985 static int iwl3945_scan_cancel(struct iwl3945_priv *priv)
1987 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1988 clear_bit(STATUS_SCANNING, &priv->status);
1992 if (test_bit(STATUS_SCANNING, &priv->status)) {
1993 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1994 IWL_DEBUG_SCAN("Queuing scan abort.\n");
1995 set_bit(STATUS_SCAN_ABORTING, &priv->status);
1996 queue_work(priv->workqueue, &priv->abort_scan);
1999 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2001 return test_bit(STATUS_SCANNING, &priv->status);
2008 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
2009 * @ms: amount of time to wait (in milliseconds) for scan to abort
2011 * NOTE: priv->mutex must be held before calling this function
2013 static int iwl3945_scan_cancel_timeout(struct iwl3945_priv *priv, unsigned long ms)
2015 unsigned long now = jiffies;
2018 ret = iwl3945_scan_cancel(priv);
2020 mutex_unlock(&priv->mutex);
2021 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2022 test_bit(STATUS_SCANNING, &priv->status))
2024 mutex_lock(&priv->mutex);
2026 return test_bit(STATUS_SCANNING, &priv->status);
2032 #define MAX_UCODE_BEACON_INTERVAL 1024
2033 #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2035 static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
2038 u16 beacon_factor = 0;
2041 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2042 / MAX_UCODE_BEACON_INTERVAL;
2043 new_val = beacon_val / beacon_factor;
2045 return cpu_to_le16(new_val);
2048 static void iwl3945_setup_rxon_timing(struct iwl3945_priv *priv)
2050 u64 interval_tm_unit;
2052 unsigned long flags;
2053 struct ieee80211_conf *conf = NULL;
2056 conf = ieee80211_get_hw_conf(priv->hw);
2058 spin_lock_irqsave(&priv->lock, flags);
2059 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2060 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2062 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2064 tsf = priv->timestamp1;
2065 tsf = ((tsf << 32) | priv->timestamp0);
2067 beacon_int = priv->beacon_int;
2068 spin_unlock_irqrestore(&priv->lock, flags);
2070 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
2071 if (beacon_int == 0) {
2072 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2073 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2075 priv->rxon_timing.beacon_interval =
2076 cpu_to_le16(beacon_int);
2077 priv->rxon_timing.beacon_interval =
2078 iwl3945_adjust_beacon_interval(
2079 le16_to_cpu(priv->rxon_timing.beacon_interval));
2082 priv->rxon_timing.atim_window = 0;
2084 priv->rxon_timing.beacon_interval =
2085 iwl3945_adjust_beacon_interval(conf->beacon_int);
2086 /* TODO: we need to get atim_window from upper stack
2087 * for now we set to 0 */
2088 priv->rxon_timing.atim_window = 0;
2092 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2093 result = do_div(tsf, interval_tm_unit);
2094 priv->rxon_timing.beacon_init_val =
2095 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2098 ("beacon interval %d beacon timer %d beacon tim %d\n",
2099 le16_to_cpu(priv->rxon_timing.beacon_interval),
2100 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2101 le16_to_cpu(priv->rxon_timing.atim_window));
2104 static int iwl3945_scan_initiate(struct iwl3945_priv *priv)
2106 if (priv->iw_mode == NL80211_IFTYPE_AP) {
2107 IWL_ERROR("APs don't scan.\n");
2111 if (!iwl3945_is_ready_rf(priv)) {
2112 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2116 if (test_bit(STATUS_SCANNING, &priv->status)) {
2117 IWL_DEBUG_SCAN("Scan already in progress.\n");
2121 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2122 IWL_DEBUG_SCAN("Scan request while abort pending. "
2127 IWL_DEBUG_INFO("Starting scan...\n");
2128 if (priv->cfg->sku & IWL_SKU_G)
2129 priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ);
2130 if (priv->cfg->sku & IWL_SKU_A)
2131 priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ);
2132 set_bit(STATUS_SCANNING, &priv->status);
2133 priv->scan_start = jiffies;
2134 priv->scan_pass_start = priv->scan_start;
2136 queue_work(priv->workqueue, &priv->request_scan);
2141 static int iwl3945_set_rxon_hwcrypto(struct iwl3945_priv *priv, int hw_decrypt)
2143 struct iwl3945_rxon_cmd *rxon = &priv->staging_rxon;
2146 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2148 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2153 static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv,
2154 enum ieee80211_band band)
2156 if (band == IEEE80211_BAND_5GHZ) {
2157 priv->staging_rxon.flags &=
2158 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2159 | RXON_FLG_CCK_MSK);
2160 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2162 /* Copied from iwl3945_bg_post_associate() */
2163 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2164 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2166 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2168 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2169 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2171 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2172 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2173 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2178 * initialize rxon structure with default values from eeprom
2180 static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv,
2183 const struct iwl3945_channel_info *ch_info;
2185 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2188 case NL80211_IFTYPE_AP:
2189 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2192 case NL80211_IFTYPE_STATION:
2193 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2194 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2197 case NL80211_IFTYPE_ADHOC:
2198 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2199 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2200 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2201 RXON_FILTER_ACCEPT_GRP_MSK;
2204 case NL80211_IFTYPE_MONITOR:
2205 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2206 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2207 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2210 IWL_ERROR("Unsupported interface type %d\n", mode);
2215 /* TODO: Figure out when short_preamble would be set and cache from
2217 if (!hw_to_local(priv->hw)->short_preamble)
2218 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2220 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2223 ch_info = iwl3945_get_channel_info(priv, priv->band,
2224 le16_to_cpu(priv->active_rxon.channel));
2227 ch_info = &priv->channel_info[0];
2230 * in some case A channels are all non IBSS
2231 * in this case force B/G channel
2233 if ((mode == NL80211_IFTYPE_ADHOC) && !(is_channel_ibss(ch_info)))
2234 ch_info = &priv->channel_info[0];
2236 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2237 if (is_channel_a_band(ch_info))
2238 priv->band = IEEE80211_BAND_5GHZ;
2240 priv->band = IEEE80211_BAND_2GHZ;
2242 iwl3945_set_flags_for_phymode(priv, priv->band);
2244 priv->staging_rxon.ofdm_basic_rates =
2245 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2246 priv->staging_rxon.cck_basic_rates =
2247 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2250 static int iwl3945_set_mode(struct iwl3945_priv *priv, int mode)
2252 if (mode == NL80211_IFTYPE_ADHOC) {
2253 const struct iwl3945_channel_info *ch_info;
2255 ch_info = iwl3945_get_channel_info(priv,
2257 le16_to_cpu(priv->staging_rxon.channel));
2259 if (!ch_info || !is_channel_ibss(ch_info)) {
2260 IWL_ERROR("channel %d not IBSS channel\n",
2261 le16_to_cpu(priv->staging_rxon.channel));
2266 iwl3945_connection_init_rx_config(priv, mode);
2267 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2269 iwl3945_clear_stations_table(priv);
2271 /* don't commit rxon if rf-kill is on*/
2272 if (!iwl3945_is_ready_rf(priv))
2275 cancel_delayed_work(&priv->scan_check);
2276 if (iwl3945_scan_cancel_timeout(priv, 100)) {
2277 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2278 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2282 iwl3945_commit_rxon(priv);
2287 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl3945_priv *priv,
2288 struct ieee80211_tx_info *info,
2289 struct iwl3945_cmd *cmd,
2290 struct sk_buff *skb_frag,
2293 struct iwl3945_hw_key *keyinfo =
2294 &priv->stations[info->control.hw_key->hw_key_idx].keyinfo;
2296 switch (keyinfo->alg) {
2298 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2299 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2300 IWL_DEBUG_TX("tx_cmd with AES hwcrypto\n");
2305 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2308 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2311 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2316 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2317 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2319 if (keyinfo->keylen == 13)
2320 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2322 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2324 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2325 "with key %d\n", info->control.hw_key->hw_key_idx);
2329 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2335 * handle build REPLY_TX command notification.
2337 static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv,
2338 struct iwl3945_cmd *cmd,
2339 struct ieee80211_tx_info *info,
2340 struct ieee80211_hdr *hdr,
2341 int is_unicast, u8 std_id)
2343 __le16 fc = hdr->frame_control;
2344 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2345 u8 rc_flags = info->control.rates[0].flags;
2347 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2348 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
2349 tx_flags |= TX_CMD_FLG_ACK_MSK;
2350 if (ieee80211_is_mgmt(fc))
2351 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2352 if (ieee80211_is_probe_resp(fc) &&
2353 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2354 tx_flags |= TX_CMD_FLG_TSF_MSK;
2356 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2357 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2360 cmd->cmd.tx.sta_id = std_id;
2361 if (ieee80211_has_morefrags(fc))
2362 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2364 if (ieee80211_is_data_qos(fc)) {
2365 u8 *qc = ieee80211_get_qos_ctl(hdr);
2366 cmd->cmd.tx.tid_tspec = qc[0] & 0xf;
2367 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2369 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2372 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
2373 tx_flags |= TX_CMD_FLG_RTS_MSK;
2374 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2375 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
2376 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2377 tx_flags |= TX_CMD_FLG_CTS_MSK;
2380 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2381 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2383 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2384 if (ieee80211_is_mgmt(fc)) {
2385 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
2386 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2388 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2390 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2391 #ifdef CONFIG_IWL3945_LEDS
2392 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
2396 cmd->cmd.tx.driver_txop = 0;
2397 cmd->cmd.tx.tx_flags = tx_flags;
2398 cmd->cmd.tx.next_frame_len = 0;
2402 * iwl3945_get_sta_id - Find station's index within station table
2404 static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *hdr)
2407 u16 fc = le16_to_cpu(hdr->frame_control);
2409 /* If this frame is broadcast or management, use broadcast station id */
2410 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2411 is_multicast_ether_addr(hdr->addr1))
2412 return priv->hw_setting.bcast_sta_id;
2414 switch (priv->iw_mode) {
2416 /* If we are a client station in a BSS network, use the special
2417 * AP station entry (that's the only station we communicate with) */
2418 case NL80211_IFTYPE_STATION:
2421 /* If we are an AP, then find the station, or use BCAST */
2422 case NL80211_IFTYPE_AP:
2423 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2424 if (sta_id != IWL_INVALID_STATION)
2426 return priv->hw_setting.bcast_sta_id;
2428 /* If this frame is going out to an IBSS network, find the station,
2429 * or create a new station table entry */
2430 case NL80211_IFTYPE_ADHOC: {
2431 /* Create new station table entry */
2432 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2433 if (sta_id != IWL_INVALID_STATION)
2436 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
2438 if (sta_id != IWL_INVALID_STATION)
2441 IWL_DEBUG_DROP("Station %pM not in station map. "
2442 "Defaulting to broadcast...\n",
2444 iwl3945_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2445 return priv->hw_setting.bcast_sta_id;
2447 /* If we are in monitor mode, use BCAST. This is required for
2448 * packet injection. */
2449 case NL80211_IFTYPE_MONITOR:
2450 return priv->hw_setting.bcast_sta_id;
2453 IWL_WARNING("Unknown mode of operation: %d\n", priv->iw_mode);
2454 return priv->hw_setting.bcast_sta_id;
2459 * start REPLY_TX command process
2461 static int iwl3945_tx_skb(struct iwl3945_priv *priv, struct sk_buff *skb)
2463 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2464 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
2465 struct iwl3945_tfd_frame *tfd;
2467 int txq_id = skb_get_queue_mapping(skb);
2468 struct iwl3945_tx_queue *txq = NULL;
2469 struct iwl3945_queue *q = NULL;
2470 dma_addr_t phys_addr;
2471 dma_addr_t txcmd_phys;
2472 struct iwl3945_cmd *out_cmd = NULL;
2473 u16 len, idx, len_org, hdr_len;
2480 u8 wait_write_ptr = 0;
2482 unsigned long flags;
2485 spin_lock_irqsave(&priv->lock, flags);
2486 if (iwl3945_is_rfkill(priv)) {
2487 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2491 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
2492 IWL_ERROR("ERROR: No TX rate available.\n");
2496 unicast = !is_multicast_ether_addr(hdr->addr1);
2499 fc = hdr->frame_control;
2501 #ifdef CONFIG_IWL3945_DEBUG
2502 if (ieee80211_is_auth(fc))
2503 IWL_DEBUG_TX("Sending AUTH frame\n");
2504 else if (ieee80211_is_assoc_req(fc))
2505 IWL_DEBUG_TX("Sending ASSOC frame\n");
2506 else if (ieee80211_is_reassoc_req(fc))
2507 IWL_DEBUG_TX("Sending REASSOC frame\n");
2510 /* drop all data frame if we are not associated */
2511 if (ieee80211_is_data(fc) &&
2512 (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
2513 (!iwl3945_is_associated(priv) ||
2514 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
2515 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
2519 spin_unlock_irqrestore(&priv->lock, flags);
2521 hdr_len = ieee80211_hdrlen(fc);
2523 /* Find (or create) index into station table for destination station */
2524 sta_id = iwl3945_get_sta_id(priv, hdr);
2525 if (sta_id == IWL_INVALID_STATION) {
2526 IWL_DEBUG_DROP("Dropping - INVALID STATION: %pM\n",
2531 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2533 if (ieee80211_is_data_qos(fc)) {
2534 qc = ieee80211_get_qos_ctl(hdr);
2535 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
2536 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2538 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2540 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2544 /* Descriptor for chosen Tx queue */
2545 txq = &priv->txq[txq_id];
2548 spin_lock_irqsave(&priv->lock, flags);
2550 /* Set up first empty TFD within this queue's circular TFD buffer */
2551 tfd = &txq->bd[q->write_ptr];
2552 memset(tfd, 0, sizeof(*tfd));
2553 control_flags = (u32 *) tfd;
2554 idx = get_cmd_index(q, q->write_ptr, 0);
2556 /* Set up driver data for this TFD */
2557 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
2558 txq->txb[q->write_ptr].skb[0] = skb;
2560 /* Init first empty entry in queue's array of Tx/cmd buffers */
2561 out_cmd = &txq->cmd[idx];
2562 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2563 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
2566 * Set up the Tx-command (not MAC!) header.
2567 * Store the chosen Tx queue and TFD index within the sequence field;
2568 * after Tx, uCode's Tx response will return this value so driver can
2569 * locate the frame within the tx queue and do post-tx processing.
2571 out_cmd->hdr.cmd = REPLY_TX;
2572 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
2573 INDEX_TO_SEQ(q->write_ptr)));
2575 /* Copy MAC header from skb into command buffer */
2576 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2579 * Use the first empty entry in this queue's command buffer array
2580 * to contain the Tx command and MAC header concatenated together
2581 * (payload data will be in another buffer).
2582 * Size of this varies, due to varying MAC header length.
2583 * If end is not dword aligned, we'll have 2 extra bytes at the end
2584 * of the MAC header (device reads on dword boundaries).
2585 * We'll tell device about this padding later.
2587 len = priv->hw_setting.tx_cmd_len +
2588 sizeof(struct iwl3945_cmd_header) + hdr_len;
2591 len = (len + 3) & ~3;
2598 /* Physical address of this Tx command's header (not MAC header!),
2599 * within command buffer array. */
2600 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl3945_cmd) * idx +
2601 offsetof(struct iwl3945_cmd, hdr);
2603 /* Add buffer containing Tx command and MAC(!) header to TFD's
2605 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
2607 if (info->control.hw_key)
2608 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
2610 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2611 * if any (802.11 null frames have no payload). */
2612 len = skb->len - hdr_len;
2614 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2615 len, PCI_DMA_TODEVICE);
2616 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
2620 /* If there is no payload, then we use only one Tx buffer */
2621 *control_flags = TFD_CTL_COUNT_SET(1);
2623 /* Else use 2 buffers.
2624 * Tell 3945 about any padding after MAC header */
2625 *control_flags = TFD_CTL_COUNT_SET(2) |
2626 TFD_CTL_PAD_SET(U32_PAD(len));
2628 /* Total # bytes to be transmitted */
2629 len = (u16)skb->len;
2630 out_cmd->cmd.tx.len = cpu_to_le16(len);
2632 /* TODO need this for burst mode later on */
2633 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, unicast, sta_id);
2635 /* set is_hcca to 0; it probably will never be implemented */
2636 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
2638 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2639 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2641 if (!ieee80211_has_morefrags(hdr->frame_control)) {
2642 txq->need_update = 1;
2644 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2647 txq->need_update = 0;
2650 iwl3945_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
2651 sizeof(out_cmd->cmd.tx));
2653 iwl3945_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
2654 ieee80211_hdrlen(fc));
2656 /* Tell device the write index *just past* this latest filled TFD */
2657 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
2658 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
2659 spin_unlock_irqrestore(&priv->lock, flags);
2664 if ((iwl3945_queue_space(q) < q->high_mark)
2665 && priv->mac80211_registered) {
2666 if (wait_write_ptr) {
2667 spin_lock_irqsave(&priv->lock, flags);
2668 txq->need_update = 1;
2669 iwl3945_tx_queue_update_write_ptr(priv, txq);
2670 spin_unlock_irqrestore(&priv->lock, flags);
2673 ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
2679 spin_unlock_irqrestore(&priv->lock, flags);
2684 static void iwl3945_set_rate(struct iwl3945_priv *priv)
2686 const struct ieee80211_supported_band *sband = NULL;
2687 struct ieee80211_rate *rate;
2690 sband = iwl3945_get_band(priv, priv->band);
2692 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2696 priv->active_rate = 0;
2697 priv->active_rate_basic = 0;
2699 IWL_DEBUG_RATE("Setting rates for %s GHz\n",
2700 sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
2702 for (i = 0; i < sband->n_bitrates; i++) {
2703 rate = &sband->bitrates[i];
2704 if ((rate->hw_value < IWL_RATE_COUNT) &&
2705 !(rate->flags & IEEE80211_CHAN_DISABLED)) {
2706 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
2707 rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
2708 priv->active_rate |= (1 << rate->hw_value);
2712 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2713 priv->active_rate, priv->active_rate_basic);
2716 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2717 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2720 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2721 priv->staging_rxon.cck_basic_rates =
2722 ((priv->active_rate_basic &
2723 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2725 priv->staging_rxon.cck_basic_rates =
2726 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2728 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2729 priv->staging_rxon.ofdm_basic_rates =
2730 ((priv->active_rate_basic &
2731 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2732 IWL_FIRST_OFDM_RATE) & 0xFF;
2734 priv->staging_rxon.ofdm_basic_rates =
2735 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2738 static void iwl3945_radio_kill_sw(struct iwl3945_priv *priv, int disable_radio)
2740 unsigned long flags;
2742 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2745 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2746 disable_radio ? "OFF" : "ON");
2748 if (disable_radio) {
2749 iwl3945_scan_cancel(priv);
2750 /* FIXME: This is a workaround for AP */
2751 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2752 spin_lock_irqsave(&priv->lock, flags);
2753 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
2754 CSR_UCODE_SW_BIT_RFKILL);
2755 spin_unlock_irqrestore(&priv->lock, flags);
2756 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
2757 set_bit(STATUS_RF_KILL_SW, &priv->status);
2762 spin_lock_irqsave(&priv->lock, flags);
2763 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2765 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2766 spin_unlock_irqrestore(&priv->lock, flags);
2771 spin_lock_irqsave(&priv->lock, flags);
2772 iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
2773 if (!iwl3945_grab_nic_access(priv))
2774 iwl3945_release_nic_access(priv);
2775 spin_unlock_irqrestore(&priv->lock, flags);
2777 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2778 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2779 "disabled by HW switch\n");
2784 queue_work(priv->workqueue, &priv->restart);
2788 void iwl3945_set_decrypted_flag(struct iwl3945_priv *priv, struct sk_buff *skb,
2789 u32 decrypt_res, struct ieee80211_rx_status *stats)
2792 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2794 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2797 if (!(fc & IEEE80211_FCTL_PROTECTED))
2800 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2801 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2802 case RX_RES_STATUS_SEC_TYPE_TKIP:
2803 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2804 RX_RES_STATUS_BAD_ICV_MIC)
2805 stats->flag |= RX_FLAG_MMIC_ERROR;
2806 case RX_RES_STATUS_SEC_TYPE_WEP:
2807 case RX_RES_STATUS_SEC_TYPE_CCMP:
2808 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2809 RX_RES_STATUS_DECRYPT_OK) {
2810 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2811 stats->flag |= RX_FLAG_DECRYPTED;
2820 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
2822 #include "iwl-spectrum.h"
2824 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
2825 #define BEACON_TIME_MASK_HIGH 0xFF000000
2826 #define TIME_UNIT 1024
2829 * extended beacon time format
2830 * time in usec will be changed into a 32-bit value in 8:24 format
2831 * the high 1 byte is the beacon counts
2832 * the lower 3 bytes is the time in usec within one beacon interval
2835 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
2839 u32 interval = beacon_interval * 1024;
2841 if (!interval || !usec)
2844 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
2845 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
2847 return (quot << 24) + rem;
2850 /* base is usually what we get from ucode with each received frame,
2851 * the same as HW timer counter counting down
2854 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
2856 u32 base_low = base & BEACON_TIME_MASK_LOW;
2857 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
2858 u32 interval = beacon_interval * TIME_UNIT;
2859 u32 res = (base & BEACON_TIME_MASK_HIGH) +
2860 (addon & BEACON_TIME_MASK_HIGH);
2862 if (base_low > addon_low)
2863 res += base_low - addon_low;
2864 else if (base_low < addon_low) {
2865 res += interval + base_low - addon_low;
2870 return cpu_to_le32(res);
2873 static int iwl3945_get_measurement(struct iwl3945_priv *priv,
2874 struct ieee80211_measurement_params *params,
2877 struct iwl3945_spectrum_cmd spectrum;
2878 struct iwl3945_rx_packet *res;
2879 struct iwl3945_host_cmd cmd = {
2880 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
2881 .data = (void *)&spectrum,
2882 .meta.flags = CMD_WANT_SKB,
2884 u32 add_time = le64_to_cpu(params->start_time);
2886 int spectrum_resp_status;
2887 int duration = le16_to_cpu(params->duration);
2889 if (iwl3945_is_associated(priv))
2891 iwl3945_usecs_to_beacons(
2892 le64_to_cpu(params->start_time) - priv->last_tsf,
2893 le16_to_cpu(priv->rxon_timing.beacon_interval));
2895 memset(&spectrum, 0, sizeof(spectrum));
2897 spectrum.channel_count = cpu_to_le16(1);
2899 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
2900 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
2901 cmd.len = sizeof(spectrum);
2902 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
2904 if (iwl3945_is_associated(priv))
2905 spectrum.start_time =
2906 iwl3945_add_beacon_time(priv->last_beacon_time,
2908 le16_to_cpu(priv->rxon_timing.beacon_interval));
2910 spectrum.start_time = 0;
2912 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
2913 spectrum.channels[0].channel = params->channel;
2914 spectrum.channels[0].type = type;
2915 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
2916 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
2917 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
2919 rc = iwl3945_send_cmd_sync(priv, &cmd);
2923 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
2924 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
2925 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
2929 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
2930 switch (spectrum_resp_status) {
2931 case 0: /* Command will be handled */
2932 if (res->u.spectrum.id != 0xff) {
2933 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
2934 res->u.spectrum.id);
2935 priv->measurement_status &= ~MEASUREMENT_READY;
2937 priv->measurement_status |= MEASUREMENT_ACTIVE;
2941 case 1: /* Command will not be handled */
2946 dev_kfree_skb_any(cmd.meta.u.skb);
2952 static void iwl3945_rx_reply_alive(struct iwl3945_priv *priv,
2953 struct iwl3945_rx_mem_buffer *rxb)
2955 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
2956 struct iwl3945_alive_resp *palive;
2957 struct delayed_work *pwork;
2959 palive = &pkt->u.alive_frame;
2961 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
2963 palive->is_valid, palive->ver_type,
2964 palive->ver_subtype);
2966 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
2967 IWL_DEBUG_INFO("Initialization Alive received.\n");
2968 memcpy(&priv->card_alive_init,
2969 &pkt->u.alive_frame,
2970 sizeof(struct iwl3945_init_alive_resp));
2971 pwork = &priv->init_alive_start;
2973 IWL_DEBUG_INFO("Runtime Alive received.\n");
2974 memcpy(&priv->card_alive, &pkt->u.alive_frame,
2975 sizeof(struct iwl3945_alive_resp));
2976 pwork = &priv->alive_start;
2977 iwl3945_disable_events(priv);
2980 /* We delay the ALIVE response by 5ms to
2981 * give the HW RF Kill time to activate... */
2982 if (palive->is_valid == UCODE_VALID_OK)
2983 queue_delayed_work(priv->workqueue, pwork,
2984 msecs_to_jiffies(5));
2986 IWL_WARNING("uCode did not respond OK.\n");
2989 static void iwl3945_rx_reply_add_sta(struct iwl3945_priv *priv,
2990 struct iwl3945_rx_mem_buffer *rxb)
2992 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
2994 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
2998 static void iwl3945_rx_reply_error(struct iwl3945_priv *priv,
2999 struct iwl3945_rx_mem_buffer *rxb)
3001 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3003 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3004 "seq 0x%04X ser 0x%08X\n",
3005 le32_to_cpu(pkt->u.err_resp.error_type),
3006 get_cmd_string(pkt->u.err_resp.cmd_id),
3007 pkt->u.err_resp.cmd_id,
3008 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3009 le32_to_cpu(pkt->u.err_resp.error_info));
3012 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3014 static void iwl3945_rx_csa(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
3016 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3017 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active_rxon;
3018 struct iwl3945_csa_notification *csa = &(pkt->u.csa_notif);
3019 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3020 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3021 rxon->channel = csa->channel;
3022 priv->staging_rxon.channel = csa->channel;
3025 static void iwl3945_rx_spectrum_measure_notif(struct iwl3945_priv *priv,
3026 struct iwl3945_rx_mem_buffer *rxb)
3028 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3029 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3030 struct iwl3945_spectrum_notification *report = &(pkt->u.spectrum_notif);
3032 if (!report->state) {
3033 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3034 "Spectrum Measure Notification: Start\n");
3038 memcpy(&priv->measure_report, report, sizeof(*report));
3039 priv->measurement_status |= MEASUREMENT_READY;
3043 static void iwl3945_rx_pm_sleep_notif(struct iwl3945_priv *priv,
3044 struct iwl3945_rx_mem_buffer *rxb)
3046 #ifdef CONFIG_IWL3945_DEBUG
3047 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3048 struct iwl3945_sleep_notification *sleep = &(pkt->u.sleep_notif);
3049 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3050 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3054 static void iwl3945_rx_pm_debug_statistics_notif(struct iwl3945_priv *priv,
3055 struct iwl3945_rx_mem_buffer *rxb)
3057 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3058 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3059 "notification for %s:\n",
3060 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
3061 iwl3945_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
3064 static void iwl3945_bg_beacon_update(struct work_struct *work)
3066 struct iwl3945_priv *priv =
3067 container_of(work, struct iwl3945_priv, beacon_update);
3068 struct sk_buff *beacon;
3070 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
3071 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
3074 IWL_ERROR("update beacon failed\n");
3078 mutex_lock(&priv->mutex);
3079 /* new beacon skb is allocated every time; dispose previous.*/
3080 if (priv->ibss_beacon)
3081 dev_kfree_skb(priv->ibss_beacon);
3083 priv->ibss_beacon = beacon;
3084 mutex_unlock(&priv->mutex);
3086 iwl3945_send_beacon_cmd(priv);
3089 static void iwl3945_rx_beacon_notif(struct iwl3945_priv *priv,
3090 struct iwl3945_rx_mem_buffer *rxb)
3092 #ifdef CONFIG_IWL3945_DEBUG
3093 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3094 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
3095 u8 rate = beacon->beacon_notify_hdr.rate;
3097 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3098 "tsf %d %d rate %d\n",
3099 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3100 beacon->beacon_notify_hdr.failure_frame,
3101 le32_to_cpu(beacon->ibss_mgr_status),
3102 le32_to_cpu(beacon->high_tsf),
3103 le32_to_cpu(beacon->low_tsf), rate);
3106 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
3107 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3108 queue_work(priv->workqueue, &priv->beacon_update);
3111 /* Service response to REPLY_SCAN_CMD (0x80) */
3112 static void iwl3945_rx_reply_scan(struct iwl3945_priv *priv,
3113 struct iwl3945_rx_mem_buffer *rxb)
3115 #ifdef CONFIG_IWL3945_DEBUG
3116 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3117 struct iwl3945_scanreq_notification *notif =
3118 (struct iwl3945_scanreq_notification *)pkt->u.raw;
3120 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3124 /* Service SCAN_START_NOTIFICATION (0x82) */
3125 static void iwl3945_rx_scan_start_notif(struct iwl3945_priv *priv,
3126 struct iwl3945_rx_mem_buffer *rxb)
3128 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3129 struct iwl3945_scanstart_notification *notif =
3130 (struct iwl3945_scanstart_notification *)pkt->u.raw;
3131 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3132 IWL_DEBUG_SCAN("Scan start: "
3134 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3136 notif->band ? "bg" : "a",
3138 notif->tsf_low, notif->status, notif->beacon_timer);
3141 /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
3142 static void iwl3945_rx_scan_results_notif(struct iwl3945_priv *priv,
3143 struct iwl3945_rx_mem_buffer *rxb)
3145 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3146 struct iwl3945_scanresults_notification *notif =
3147 (struct iwl3945_scanresults_notification *)pkt->u.raw;
3149 IWL_DEBUG_SCAN("Scan ch.res: "
3151 "(TSF: 0x%08X:%08X) - %d "
3152 "elapsed=%lu usec (%dms since last)\n",
3154 notif->band ? "bg" : "a",
3155 le32_to_cpu(notif->tsf_high),
3156 le32_to_cpu(notif->tsf_low),
3157 le32_to_cpu(notif->statistics[0]),
3158 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3159 jiffies_to_msecs(elapsed_jiffies
3160 (priv->last_scan_jiffies, jiffies)));
3162 priv->last_scan_jiffies = jiffies;
3163 priv->next_scan_jiffies = 0;
3166 /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
3167 static void iwl3945_rx_scan_complete_notif(struct iwl3945_priv *priv,
3168 struct iwl3945_rx_mem_buffer *rxb)
3170 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3171 struct iwl3945_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
3173 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3174 scan_notif->scanned_channels,
3175 scan_notif->tsf_low,
3176 scan_notif->tsf_high, scan_notif->status);
3178 /* The HW is no longer scanning */
3179 clear_bit(STATUS_SCAN_HW, &priv->status);
3181 /* The scan completion notification came in, so kill that timer... */
3182 cancel_delayed_work(&priv->scan_check);
3184 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3185 (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ?
3187 jiffies_to_msecs(elapsed_jiffies
3188 (priv->scan_pass_start, jiffies)));
3190 /* Remove this scanned band from the list of pending
3191 * bands to scan, band G precedes A in order of scanning
3192 * as seen in iwl3945_bg_request_scan */
3193 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ))
3194 priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ);
3195 else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ))
3196 priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ);
3198 /* If a request to abort was given, or the scan did not succeed
3199 * then we reset the scan state machine and terminate,
3200 * re-queuing another scan if one has been requested */
3201 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3202 IWL_DEBUG_INFO("Aborted scan completed.\n");
3203 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3205 /* If there are more bands on this scan pass reschedule */
3206 if (priv->scan_bands > 0)
3210 priv->last_scan_jiffies = jiffies;
3211 priv->next_scan_jiffies = 0;
3212 IWL_DEBUG_INFO("Setting scan to off\n");
3214 clear_bit(STATUS_SCANNING, &priv->status);
3216 IWL_DEBUG_INFO("Scan took %dms\n",
3217 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3219 queue_work(priv->workqueue, &priv->scan_completed);
3224 priv->scan_pass_start = jiffies;
3225 queue_work(priv->workqueue, &priv->request_scan);
3228 /* Handle notification from uCode that card's power state is changing
3229 * due to software, hardware, or critical temperature RFKILL */
3230 static void iwl3945_rx_card_state_notif(struct iwl3945_priv *priv,
3231 struct iwl3945_rx_mem_buffer *rxb)
3233 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3234 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3235 unsigned long status = priv->status;
3237 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3238 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3239 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3241 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
3242 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3244 if (flags & HW_CARD_DISABLED)
3245 set_bit(STATUS_RF_KILL_HW, &priv->status);
3247 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3250 if (flags & SW_CARD_DISABLED)
3251 set_bit(STATUS_RF_KILL_SW, &priv->status);
3253 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3255 iwl3945_scan_cancel(priv);
3257 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3258 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3259 (test_bit(STATUS_RF_KILL_SW, &status) !=
3260 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3261 queue_work(priv->workqueue, &priv->rf_kill);
3263 wake_up_interruptible(&priv->wait_command_queue);
3267 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
3269 * Setup the RX handlers for each of the reply types sent from the uCode
3272 * This function chains into the hardware specific files for them to setup
3273 * any hardware specific handlers as well.
3275 static void iwl3945_setup_rx_handlers(struct iwl3945_priv *priv)
3277 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3278 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3279 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3280 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
3281 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
3282 iwl3945_rx_spectrum_measure_notif;
3283 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
3284 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
3285 iwl3945_rx_pm_debug_statistics_notif;
3286 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
3289 * The same handler is used for both the REPLY to a discrete
3290 * statistics request from the host as well as for the periodic
3291 * statistics notifications (after received beacons) from the uCode.
3293 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3294 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
3296 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3297 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
3298 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
3299 iwl3945_rx_scan_results_notif;
3300 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
3301 iwl3945_rx_scan_complete_notif;
3302 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
3304 /* Set up hardware specific Rx handlers */
3305 iwl3945_hw_rx_handler_setup(priv);
3309 * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
3310 * When FW advances 'R' index, all entries between old and new 'R' index
3311 * need to be reclaimed.
3313 static void iwl3945_cmd_queue_reclaim(struct iwl3945_priv *priv,
3314 int txq_id, int index)
3316 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3317 struct iwl3945_queue *q = &txq->q;
3320 if ((index >= q->n_bd) || (iwl3945_x2_queue_used(q, index) == 0)) {
3321 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3322 "is out of range [0-%d] %d %d.\n", txq_id,
3323 index, q->n_bd, q->write_ptr, q->read_ptr);
3327 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
3328 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3330 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
3331 q->write_ptr, q->read_ptr);
3332 queue_work(priv->workqueue, &priv->restart);
3341 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3342 * @rxb: Rx buffer to reclaim
3344 * If an Rx buffer has an async callback associated with it the callback
3345 * will be executed. The attached skb (if present) will only be freed
3346 * if the callback returns 1
3348 static void iwl3945_tx_cmd_complete(struct iwl3945_priv *priv,
3349 struct iwl3945_rx_mem_buffer *rxb)
3351 struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
3352 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3353 int txq_id = SEQ_TO_QUEUE(sequence);
3354 int index = SEQ_TO_INDEX(sequence);
3355 int huge = sequence & SEQ_HUGE_FRAME;
3357 struct iwl3945_cmd *cmd;
3359 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3361 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3362 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3364 /* Input error checking is done when commands are added to queue. */
3365 if (cmd->meta.flags & CMD_WANT_SKB) {
3366 cmd->meta.source->u.skb = rxb->skb;
3368 } else if (cmd->meta.u.callback &&
3369 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3372 iwl3945_cmd_queue_reclaim(priv, txq_id, index);
3374 if (!(cmd->meta.flags & CMD_ASYNC)) {
3375 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3376 wake_up_interruptible(&priv->wait_command_queue);
3380 /************************** RX-FUNCTIONS ****************************/
3382 * Rx theory of operation
3384 * The host allocates 32 DMA target addresses and passes the host address
3385 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3389 * The host/firmware share two index registers for managing the Rx buffers.
3391 * The READ index maps to the first position that the firmware may be writing
3392 * to -- the driver can read up to (but not including) this position and get
3394 * The READ index is managed by the firmware once the card is enabled.
3396 * The WRITE index maps to the last position the driver has read from -- the
3397 * position preceding WRITE is the last slot the firmware can place a packet.
3399 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3402 * During initialization, the host sets up the READ queue position to the first
3403 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3405 * When the firmware places a packet in a buffer, it will advance the READ index
3406 * and fire the RX interrupt. The driver can then query the READ index and
3407 * process as many packets as possible, moving the WRITE index forward as it
3408 * resets the Rx queue buffers with new memory.
3410 * The management in the driver is as follows:
3411 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3412 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
3413 * to replenish the iwl->rxq->rx_free.
3414 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
3415 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3416 * 'processed' and 'read' driver indexes as well)
3417 * + A received packet is processed and handed to the kernel network stack,
3418 * detached from the iwl->rxq. The driver 'processed' index is updated.
3419 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3420 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3421 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3422 * were enough free buffers and RX_STALLED is set it is cleared.
3427 * iwl3945_rx_queue_alloc() Allocates rx_free
3428 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
3429 * iwl3945_rx_queue_restock
3430 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
3431 * queue, updates firmware pointers, and updates
3432 * the WRITE index. If insufficient rx_free buffers
3433 * are available, schedules iwl3945_rx_replenish
3435 * -- enable interrupts --
3436 * ISR - iwl3945_rx() Detach iwl3945_rx_mem_buffers from pool up to the
3437 * READ INDEX, detaching the SKB from the pool.
3438 * Moves the packet buffer from queue to rx_used.
3439 * Calls iwl3945_rx_queue_restock to refill any empty
3446 * iwl3945_rx_queue_space - Return number of free slots available in queue.
3448 static int iwl3945_rx_queue_space(const struct iwl3945_rx_queue *q)
3450 int s = q->read - q->write;
3453 /* keep some buffer to not confuse full and empty queue */
3461 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
3463 int iwl3945_rx_queue_update_write_ptr(struct iwl3945_priv *priv, struct iwl3945_rx_queue *q)
3467 unsigned long flags;
3469 spin_lock_irqsave(&q->lock, flags);
3471 if (q->need_update == 0)
3474 /* If power-saving is in use, make sure device is awake */
3475 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3476 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3478 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3479 iwl3945_set_bit(priv, CSR_GP_CNTRL,
3480 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3484 rc = iwl3945_grab_nic_access(priv);
3488 /* Device expects a multiple of 8 */
3489 iwl3945_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
3491 iwl3945_release_nic_access(priv);
3493 /* Else device is assumed to be awake */
3495 /* Device expects a multiple of 8 */
3496 iwl3945_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
3502 spin_unlock_irqrestore(&q->lock, flags);
3507 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
3509 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl3945_priv *priv,
3510 dma_addr_t dma_addr)
3512 return cpu_to_le32((u32)dma_addr);
3516 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
3518 * If there are slots in the RX queue that need to be restocked,
3519 * and we have free pre-allocated buffers, fill the ranks as much
3520 * as we can, pulling from rx_free.
3522 * This moves the 'write' index forward to catch up with 'processed', and
3523 * also updates the memory address in the firmware to reference the new
3526 static int iwl3945_rx_queue_restock(struct iwl3945_priv *priv)
3528 struct iwl3945_rx_queue *rxq = &priv->rxq;
3529 struct list_head *element;
3530 struct iwl3945_rx_mem_buffer *rxb;
3531 unsigned long flags;
3534 spin_lock_irqsave(&rxq->lock, flags);
3535 write = rxq->write & ~0x7;
3536 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
3537 /* Get next free Rx buffer, remove from free list */
3538 element = rxq->rx_free.next;
3539 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
3542 /* Point to Rx buffer via next RBD in circular buffer */
3543 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->dma_addr);
3544 rxq->queue[rxq->write] = rxb;
3545 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3548 spin_unlock_irqrestore(&rxq->lock, flags);
3549 /* If the pre-allocated buffer pool is dropping low, schedule to
3551 if (rxq->free_count <= RX_LOW_WATERMARK)
3552 queue_work(priv->workqueue, &priv->rx_replenish);
3555 /* If we've added more space for the firmware to place data, tell it.
3556 * Increment device's write pointer in multiples of 8. */
3557 if ((write != (rxq->write & ~0x7))
3558 || (abs(rxq->write - rxq->read) > 7)) {
3559 spin_lock_irqsave(&rxq->lock, flags);
3560 rxq->need_update = 1;
3561 spin_unlock_irqrestore(&rxq->lock, flags);
3562 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
3571 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
3573 * When moving to rx_free an SKB is allocated for the slot.
3575 * Also restock the Rx queue via iwl3945_rx_queue_restock.
3576 * This is called as a scheduled work item (except for during initialization)
3578 static void iwl3945_rx_allocate(struct iwl3945_priv *priv)
3580 struct iwl3945_rx_queue *rxq = &priv->rxq;
3581 struct list_head *element;
3582 struct iwl3945_rx_mem_buffer *rxb;
3583 unsigned long flags;
3584 spin_lock_irqsave(&rxq->lock, flags);
3585 while (!list_empty(&rxq->rx_used)) {
3586 element = rxq->rx_used.next;
3587 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
3589 /* Alloc a new receive buffer */
3591 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
3593 if (net_ratelimit())
3594 printk(KERN_CRIT DRV_NAME
3595 ": Can not allocate SKB buffers\n");
3596 /* We don't reschedule replenish work here -- we will
3597 * call the restock method and if it still needs
3598 * more buffers it will schedule replenish */
3602 /* If radiotap head is required, reserve some headroom here.
3603 * The physical head count is a variable rx_stats->phy_count.
3604 * We reserve 4 bytes here. Plus these extra bytes, the
3605 * headroom of the physical head should be enough for the
3606 * radiotap head that iwl3945 supported. See iwl3945_rt.
3608 skb_reserve(rxb->skb, 4);
3610 priv->alloc_rxb_skb++;
3613 /* Get physical address of RB/SKB */
3615 pci_map_single(priv->pci_dev, rxb->skb->data,
3616 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3617 list_add_tail(&rxb->list, &rxq->rx_free);
3620 spin_unlock_irqrestore(&rxq->lock, flags);
3624 * this should be called while priv->lock is locked
3626 static void __iwl3945_rx_replenish(void *data)
3628 struct iwl3945_priv *priv = data;
3630 iwl3945_rx_allocate(priv);
3631 iwl3945_rx_queue_restock(priv);
3635 void iwl3945_rx_replenish(void *data)
3637 struct iwl3945_priv *priv = data;
3638 unsigned long flags;
3640 iwl3945_rx_allocate(priv);
3642 spin_lock_irqsave(&priv->lock, flags);
3643 iwl3945_rx_queue_restock(priv);
3644 spin_unlock_irqrestore(&priv->lock, flags);
3647 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
3648 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
3649 * This free routine walks the list of POOL entries and if SKB is set to
3650 * non NULL it is unmapped and freed
3652 static void iwl3945_rx_queue_free(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
3655 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3656 if (rxq->pool[i].skb != NULL) {
3657 pci_unmap_single(priv->pci_dev,
3658 rxq->pool[i].dma_addr,
3659 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3660 dev_kfree_skb(rxq->pool[i].skb);
3664 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
3669 int iwl3945_rx_queue_alloc(struct iwl3945_priv *priv)
3671 struct iwl3945_rx_queue *rxq = &priv->rxq;
3672 struct pci_dev *dev = priv->pci_dev;
3675 spin_lock_init(&rxq->lock);
3676 INIT_LIST_HEAD(&rxq->rx_free);
3677 INIT_LIST_HEAD(&rxq->rx_used);
3679 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
3680 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
3684 /* Fill the rx_used queue with _all_ of the Rx buffers */
3685 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3686 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3688 /* Set us so that we have processed and used all buffers, but have
3689 * not restocked the Rx queue with fresh buffers */
3690 rxq->read = rxq->write = 0;
3691 rxq->free_count = 0;
3692 rxq->need_update = 0;
3696 void iwl3945_rx_queue_reset(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
3698 unsigned long flags;
3700 spin_lock_irqsave(&rxq->lock, flags);
3701 INIT_LIST_HEAD(&rxq->rx_free);
3702 INIT_LIST_HEAD(&rxq->rx_used);
3703 /* Fill the rx_used queue with _all_ of the Rx buffers */
3704 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
3705 /* In the reset function, these buffers may have been allocated
3706 * to an SKB, so we need to unmap and free potential storage */
3707 if (rxq->pool[i].skb != NULL) {
3708 pci_unmap_single(priv->pci_dev,
3709 rxq->pool[i].dma_addr,
3710 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3711 priv->alloc_rxb_skb--;
3712 dev_kfree_skb(rxq->pool[i].skb);
3713 rxq->pool[i].skb = NULL;
3715 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3718 /* Set us so that we have processed and used all buffers, but have
3719 * not restocked the Rx queue with fresh buffers */
3720 rxq->read = rxq->write = 0;
3721 rxq->free_count = 0;
3722 spin_unlock_irqrestore(&rxq->lock, flags);
3725 /* Convert linear signal-to-noise ratio into dB */
3726 static u8 ratio2dB[100] = {
3727 /* 0 1 2 3 4 5 6 7 8 9 */
3728 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
3729 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
3730 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
3731 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
3732 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
3733 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
3734 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
3735 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
3736 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
3737 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
3740 /* Calculates a relative dB value from a ratio of linear
3741 * (i.e. not dB) signal levels.
3742 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
3743 int iwl3945_calc_db_from_ratio(int sig_ratio)
3745 /* 1000:1 or higher just report as 60 dB */
3746 if (sig_ratio >= 1000)
3749 /* 100:1 or higher, divide by 10 and use table,
3750 * add 20 dB to make up for divide by 10 */
3751 if (sig_ratio >= 100)
3752 return 20 + (int)ratio2dB[sig_ratio/10];
3754 /* We shouldn't see this */
3758 /* Use table for ratios 1:1 - 99:1 */
3759 return (int)ratio2dB[sig_ratio];
3762 #define PERFECT_RSSI (-20) /* dBm */
3763 #define WORST_RSSI (-95) /* dBm */
3764 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
3766 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
3767 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
3768 * about formulas used below. */
3769 int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
3772 int degradation = PERFECT_RSSI - rssi_dbm;
3774 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
3775 * as indicator; formula is (signal dbm - noise dbm).
3776 * SNR at or above 40 is a great signal (100%).
3777 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
3778 * Weakest usable signal is usually 10 - 15 dB SNR. */
3780 if (rssi_dbm - noise_dbm >= 40)
3782 else if (rssi_dbm < noise_dbm)
3784 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
3786 /* Else use just the signal level.
3787 * This formula is a least squares fit of data points collected and
3788 * compared with a reference system that had a percentage (%) display
3789 * for signal quality. */
3791 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
3792 (15 * RSSI_RANGE + 62 * degradation)) /
3793 (RSSI_RANGE * RSSI_RANGE);
3797 else if (sig_qual < 1)
3804 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
3806 * Uses the priv->rx_handlers callback function array to invoke
3807 * the appropriate handlers, including command responses,
3808 * frame-received notifications, and other notifications.
3810 static void iwl3945_rx_handle(struct iwl3945_priv *priv)
3812 struct iwl3945_rx_mem_buffer *rxb;
3813 struct iwl3945_rx_packet *pkt;
3814 struct iwl3945_rx_queue *rxq = &priv->rxq;
3817 unsigned long flags;
3821 /* uCode's read index (stored in shared DRAM) indicates the last Rx
3822 * buffer that the driver may process (last buffer filled by ucode). */
3823 r = iwl3945_hw_get_rx_read(priv);
3826 if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
3828 /* Rx interrupt, but nothing sent from uCode */
3830 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
3833 rxb = rxq->queue[i];
3835 /* If an RXB doesn't have a Rx queue slot associated with it,
3836 * then a bug has been introduced in the queue refilling
3837 * routines -- catch it here */
3838 BUG_ON(rxb == NULL);
3840 rxq->queue[i] = NULL;
3842 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
3844 PCI_DMA_FROMDEVICE);
3845 pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
3847 /* Reclaim a command buffer only if this packet is a response
3848 * to a (driver-originated) command.
3849 * If the packet (e.g. Rx frame) originated from uCode,
3850 * there is no command buffer to reclaim.
3851 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
3852 * but apparently a few don't get set; catch them here. */
3853 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
3854 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
3855 (pkt->hdr.cmd != REPLY_TX);
3857 /* Based on type of command response or notification,
3858 * handle those that need handling via function in
3859 * rx_handlers table. See iwl3945_setup_rx_handlers() */
3860 if (priv->rx_handlers[pkt->hdr.cmd]) {
3861 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
3862 "r = %d, i = %d, %s, 0x%02x\n", r, i,
3863 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
3864 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
3866 /* No handling needed */
3867 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
3868 "r %d i %d No handler needed for %s, 0x%02x\n",
3869 r, i, get_cmd_string(pkt->hdr.cmd),
3874 /* Invoke any callbacks, transfer the skb to caller, and
3875 * fire off the (possibly) blocking iwl3945_send_cmd()
3876 * as we reclaim the driver command queue */
3877 if (rxb && rxb->skb)
3878 iwl3945_tx_cmd_complete(priv, rxb);
3880 IWL_WARNING("Claim null rxb?\n");
3883 /* For now we just don't re-use anything. We can tweak this
3884 * later to try and re-use notification packets and SKBs that
3885 * fail to Rx correctly */
3886 if (rxb->skb != NULL) {
3887 priv->alloc_rxb_skb--;
3888 dev_kfree_skb_any(rxb->skb);
3892 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
3893 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3894 spin_lock_irqsave(&rxq->lock, flags);
3895 list_add_tail(&rxb->list, &priv->rxq.rx_used);
3896 spin_unlock_irqrestore(&rxq->lock, flags);
3897 i = (i + 1) & RX_QUEUE_MASK;
3898 /* If there are a lot of unused frames,
3899 * restock the Rx queue so ucode won't assert. */
3904 __iwl3945_rx_replenish(priv);
3910 /* Backtrack one entry */
3912 iwl3945_rx_queue_restock(priv);
3916 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
3918 static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
3919 struct iwl3945_tx_queue *txq)
3923 int txq_id = txq->q.id;
3925 if (txq->need_update == 0)
3928 /* if we're trying to save power */
3929 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3930 /* wake up nic if it's powered down ...
3931 * uCode will wake up, and interrupt us again, so next
3932 * time we'll skip this part. */
3933 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3935 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3936 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
3937 iwl3945_set_bit(priv, CSR_GP_CNTRL,
3938 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3942 /* restore this queue's parameters in nic hardware. */
3943 rc = iwl3945_grab_nic_access(priv);
3946 iwl3945_write_direct32(priv, HBUS_TARG_WRPTR,
3947 txq->q.write_ptr | (txq_id << 8));
3948 iwl3945_release_nic_access(priv);
3950 /* else not in power-save mode, uCode will never sleep when we're
3951 * trying to tx (during RFKILL, we're not trying to tx). */
3953 iwl3945_write32(priv, HBUS_TARG_WRPTR,
3954 txq->q.write_ptr | (txq_id << 8));
3956 txq->need_update = 0;
3961 #ifdef CONFIG_IWL3945_DEBUG
3962 static void iwl3945_print_rx_config_cmd(struct iwl3945_rxon_cmd *rxon)
3964 IWL_DEBUG_RADIO("RX CONFIG:\n");
3965 iwl3945_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
3966 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
3967 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
3968 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
3969 le32_to_cpu(rxon->filter_flags));
3970 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
3971 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
3972 rxon->ofdm_basic_rates);
3973 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
3974 IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
3975 IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
3976 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
3980 static void iwl3945_enable_interrupts(struct iwl3945_priv *priv)
3982 IWL_DEBUG_ISR("Enabling interrupts\n");
3983 set_bit(STATUS_INT_ENABLED, &priv->status);
3984 iwl3945_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
3988 /* call this function to flush any scheduled tasklet */
3989 static inline void iwl_synchronize_irq(struct iwl3945_priv *priv)
3991 /* wait to make sure we flush pending tasklet*/
3992 synchronize_irq(priv->pci_dev->irq);
3993 tasklet_kill(&priv->irq_tasklet);
3997 static inline void iwl3945_disable_interrupts(struct iwl3945_priv *priv)
3999 clear_bit(STATUS_INT_ENABLED, &priv->status);
4001 /* disable interrupts from uCode/NIC to host */
4002 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
4004 /* acknowledge/clear/reset any interrupts still pending
4005 * from uCode or flow handler (Rx/Tx DMA) */
4006 iwl3945_write32(priv, CSR_INT, 0xffffffff);
4007 iwl3945_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
4008 IWL_DEBUG_ISR("Disabled interrupts\n");
4011 static const char *desc_lookup(int i)
4019 return "BAD_CHECKSUM";
4021 return "NMI_INTERRUPT";
4025 return "FATAL_ERROR";
4031 #define ERROR_START_OFFSET (1 * sizeof(u32))
4032 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
4034 static void iwl3945_dump_nic_error_log(struct iwl3945_priv *priv)
4037 u32 desc, time, count, base, data1;
4038 u32 blink1, blink2, ilink1, ilink2;
4041 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4043 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4044 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4048 rc = iwl3945_grab_nic_access(priv);
4050 IWL_WARNING("Can not read from adapter at this time.\n");
4054 count = iwl3945_read_targ_mem(priv, base);
4056 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4057 IWL_ERROR("Start IWL Error Log Dump:\n");
4058 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
4061 IWL_ERROR("Desc Time asrtPC blink2 "
4062 "ilink1 nmiPC Line\n");
4063 for (i = ERROR_START_OFFSET;
4064 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
4065 i += ERROR_ELEM_SIZE) {
4066 desc = iwl3945_read_targ_mem(priv, base + i);
4068 iwl3945_read_targ_mem(priv, base + i + 1 * sizeof(u32));
4070 iwl3945_read_targ_mem(priv, base + i + 2 * sizeof(u32));
4072 iwl3945_read_targ_mem(priv, base + i + 3 * sizeof(u32));
4074 iwl3945_read_targ_mem(priv, base + i + 4 * sizeof(u32));
4076 iwl3945_read_targ_mem(priv, base + i + 5 * sizeof(u32));
4078 iwl3945_read_targ_mem(priv, base + i + 6 * sizeof(u32));
4081 ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
4082 desc_lookup(desc), desc, time, blink1, blink2,
4083 ilink1, ilink2, data1);
4086 iwl3945_release_nic_access(priv);
4090 #define EVENT_START_OFFSET (6 * sizeof(u32))
4093 * iwl3945_print_event_log - Dump error event log to syslog
4095 * NOTE: Must be called with iwl3945_grab_nic_access() already obtained!
4097 static void iwl3945_print_event_log(struct iwl3945_priv *priv, u32 start_idx,
4098 u32 num_events, u32 mode)
4101 u32 base; /* SRAM byte address of event log header */
4102 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4103 u32 ptr; /* SRAM byte address of log data */
4104 u32 ev, time, data; /* event log data */
4106 if (num_events == 0)
4109 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4112 event_size = 2 * sizeof(u32);
4114 event_size = 3 * sizeof(u32);
4116 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4118 /* "time" is actually "data" for mode 0 (no timestamp).
4119 * place event id # at far right for easier visual parsing. */
4120 for (i = 0; i < num_events; i++) {
4121 ev = iwl3945_read_targ_mem(priv, ptr);
4123 time = iwl3945_read_targ_mem(priv, ptr);
4126 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4128 data = iwl3945_read_targ_mem(priv, ptr);
4130 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4135 static void iwl3945_dump_nic_event_log(struct iwl3945_priv *priv)
4138 u32 base; /* SRAM byte address of event log header */
4139 u32 capacity; /* event log capacity in # entries */
4140 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4141 u32 num_wraps; /* # times uCode wrapped to top of log */
4142 u32 next_entry; /* index of next entry to be written by uCode */
4143 u32 size; /* # entries that we'll print */
4145 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4146 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4147 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4151 rc = iwl3945_grab_nic_access(priv);
4153 IWL_WARNING("Can not read from adapter at this time.\n");
4157 /* event log header */
4158 capacity = iwl3945_read_targ_mem(priv, base);
4159 mode = iwl3945_read_targ_mem(priv, base + (1 * sizeof(u32)));
4160 num_wraps = iwl3945_read_targ_mem(priv, base + (2 * sizeof(u32)));
4161 next_entry = iwl3945_read_targ_mem(priv, base + (3 * sizeof(u32)));
4163 size = num_wraps ? capacity : next_entry;
4165 /* bail out if nothing in log */
4167 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
4168 iwl3945_release_nic_access(priv);
4172 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
4175 /* if uCode has wrapped back to top of log, start at the oldest entry,
4176 * i.e the next one that uCode would fill. */
4178 iwl3945_print_event_log(priv, next_entry,
4179 capacity - next_entry, mode);
4181 /* (then/else) start at top of log */
4182 iwl3945_print_event_log(priv, 0, next_entry, mode);
4184 iwl3945_release_nic_access(priv);
4188 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
4190 static void iwl3945_irq_handle_error(struct iwl3945_priv *priv)
4192 /* Set the FW error flag -- cleared on iwl3945_down */
4193 set_bit(STATUS_FW_ERROR, &priv->status);
4195 /* Cancel currently queued command. */
4196 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4198 #ifdef CONFIG_IWL3945_DEBUG
4199 if (iwl3945_debug_level & IWL_DL_FW_ERRORS) {
4200 iwl3945_dump_nic_error_log(priv);
4201 iwl3945_dump_nic_event_log(priv);
4202 iwl3945_print_rx_config_cmd(&priv->staging_rxon);
4206 wake_up_interruptible(&priv->wait_command_queue);
4208 /* Keep the restart process from trying to send host
4209 * commands by clearing the INIT status bit */
4210 clear_bit(STATUS_READY, &priv->status);
4212 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4213 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4214 "Restarting adapter due to uCode error.\n");
4216 if (iwl3945_is_associated(priv)) {
4217 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4218 sizeof(priv->recovery_rxon));
4219 priv->error_recovering = 1;
4221 queue_work(priv->workqueue, &priv->restart);
4225 static void iwl3945_error_recovery(struct iwl3945_priv *priv)
4227 unsigned long flags;
4229 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4230 sizeof(priv->staging_rxon));
4231 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
4232 iwl3945_commit_rxon(priv);
4234 iwl3945_add_station(priv, priv->bssid, 1, 0);
4236 spin_lock_irqsave(&priv->lock, flags);
4237 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4238 priv->error_recovering = 0;
4239 spin_unlock_irqrestore(&priv->lock, flags);
4242 static void iwl3945_irq_tasklet(struct iwl3945_priv *priv)
4244 u32 inta, handled = 0;
4246 unsigned long flags;
4247 #ifdef CONFIG_IWL3945_DEBUG
4251 spin_lock_irqsave(&priv->lock, flags);
4253 /* Ack/clear/reset pending uCode interrupts.
4254 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4255 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
4256 inta = iwl3945_read32(priv, CSR_INT);
4257 iwl3945_write32(priv, CSR_INT, inta);
4259 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4260 * Any new interrupts that happen after this, either while we're
4261 * in this tasklet, or later, will show up in next ISR/tasklet. */
4262 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4263 iwl3945_write32(priv, CSR_FH_INT_STATUS, inta_fh);
4265 #ifdef CONFIG_IWL3945_DEBUG
4266 if (iwl3945_debug_level & IWL_DL_ISR) {
4267 /* just for debug */
4268 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4269 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4270 inta, inta_mask, inta_fh);
4274 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4275 * atomic, make sure that inta covers all the interrupts that
4276 * we've discovered, even if FH interrupt came in just after
4277 * reading CSR_INT. */
4278 if (inta_fh & CSR39_FH_INT_RX_MASK)
4279 inta |= CSR_INT_BIT_FH_RX;
4280 if (inta_fh & CSR39_FH_INT_TX_MASK)
4281 inta |= CSR_INT_BIT_FH_TX;
4283 /* Now service all interrupt bits discovered above. */
4284 if (inta & CSR_INT_BIT_HW_ERR) {
4285 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4287 /* Tell the device to stop sending interrupts */
4288 iwl3945_disable_interrupts(priv);
4290 iwl3945_irq_handle_error(priv);
4292 handled |= CSR_INT_BIT_HW_ERR;
4294 spin_unlock_irqrestore(&priv->lock, flags);
4299 #ifdef CONFIG_IWL3945_DEBUG
4300 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4301 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4302 if (inta & CSR_INT_BIT_SCD)
4303 IWL_DEBUG_ISR("Scheduler finished to transmit "
4304 "the frame/frames.\n");
4306 /* Alive notification via Rx interrupt will do the real work */
4307 if (inta & CSR_INT_BIT_ALIVE)
4308 IWL_DEBUG_ISR("Alive interrupt\n");
4311 /* Safely ignore these bits for debug checks below */
4312 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
4314 /* HW RF KILL switch toggled (4965 only) */
4315 if (inta & CSR_INT_BIT_RF_KILL) {
4317 if (!(iwl3945_read32(priv, CSR_GP_CNTRL) &
4318 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4321 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4322 "RF_KILL bit toggled to %s.\n",
4323 hw_rf_kill ? "disable radio":"enable radio");
4325 /* Queue restart only if RF_KILL switch was set to "kill"
4326 * when we loaded driver, and is now set to "enable".
4327 * After we're Alive, RF_KILL gets handled by
4328 * iwl3945_rx_card_state_notif() */
4329 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4330 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4331 queue_work(priv->workqueue, &priv->restart);
4334 handled |= CSR_INT_BIT_RF_KILL;
4337 /* Chip got too hot and stopped itself (4965 only) */
4338 if (inta & CSR_INT_BIT_CT_KILL) {
4339 IWL_ERROR("Microcode CT kill error detected.\n");
4340 handled |= CSR_INT_BIT_CT_KILL;
4343 /* Error detected by uCode */
4344 if (inta & CSR_INT_BIT_SW_ERR) {
4345 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4347 iwl3945_irq_handle_error(priv);
4348 handled |= CSR_INT_BIT_SW_ERR;
4351 /* uCode wakes up after power-down sleep */
4352 if (inta & CSR_INT_BIT_WAKEUP) {
4353 IWL_DEBUG_ISR("Wakeup interrupt\n");
4354 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4355 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4356 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4357 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4358 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4359 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4360 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[5]);
4362 handled |= CSR_INT_BIT_WAKEUP;
4365 /* All uCode command responses, including Tx command responses,
4366 * Rx "responses" (frame-received notification), and other
4367 * notifications from uCode come through here*/
4368 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
4369 iwl3945_rx_handle(priv);
4370 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4373 if (inta & CSR_INT_BIT_FH_TX) {
4374 IWL_DEBUG_ISR("Tx interrupt\n");
4376 iwl3945_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4377 if (!iwl3945_grab_nic_access(priv)) {
4378 iwl3945_write_direct32(priv,
4380 (ALM_FH_SRVC_CHNL), 0x0);
4381 iwl3945_release_nic_access(priv);
4383 handled |= CSR_INT_BIT_FH_TX;
4386 if (inta & ~handled)
4387 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4389 if (inta & ~CSR_INI_SET_MASK) {
4390 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4391 inta & ~CSR_INI_SET_MASK);
4392 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4395 /* Re-enable all interrupts */
4396 /* only Re-enable if disabled by irq */
4397 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4398 iwl3945_enable_interrupts(priv);
4400 #ifdef CONFIG_IWL3945_DEBUG
4401 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4402 inta = iwl3945_read32(priv, CSR_INT);
4403 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4404 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4405 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4406 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4409 spin_unlock_irqrestore(&priv->lock, flags);
4412 static irqreturn_t iwl3945_isr(int irq, void *data)
4414 struct iwl3945_priv *priv = data;
4415 u32 inta, inta_mask;
4420 spin_lock(&priv->lock);
4422 /* Disable (but don't clear!) interrupts here to avoid
4423 * back-to-back ISRs and sporadic interrupts from our NIC.
4424 * If we have something to service, the tasklet will re-enable ints.
4425 * If we *don't* have something, we'll re-enable before leaving here. */
4426 inta_mask = iwl3945_read32(priv, CSR_INT_MASK); /* just for debug */
4427 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
4429 /* Discover which interrupts are active/pending */
4430 inta = iwl3945_read32(priv, CSR_INT);
4431 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4433 /* Ignore interrupt if there's nothing in NIC to service.
4434 * This may be due to IRQ shared with another device,
4435 * or due to sporadic interrupts thrown from our NIC. */
4436 if (!inta && !inta_fh) {
4437 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4441 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4442 /* Hardware disappeared */
4443 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
4447 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4448 inta, inta_mask, inta_fh);
4450 inta &= ~CSR_INT_BIT_SCD;
4452 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
4453 if (likely(inta || inta_fh))
4454 tasklet_schedule(&priv->irq_tasklet);
4456 spin_unlock(&priv->lock);
4461 /* re-enable interrupts here since we don't have anything to service. */
4462 /* only Re-enable if disabled by irq */
4463 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4464 iwl3945_enable_interrupts(priv);
4465 spin_unlock(&priv->lock);
4469 /************************** EEPROM BANDS ****************************
4471 * The iwl3945_eeprom_band definitions below provide the mapping from the
4472 * EEPROM contents to the specific channel number supported for each
4475 * For example, iwl3945_priv->eeprom.band_3_channels[4] from the band_3
4476 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4477 * The specific geography and calibration information for that channel
4478 * is contained in the eeprom map itself.
4480 * During init, we copy the eeprom information and channel map
4481 * information into priv->channel_info_24/52 and priv->channel_map_24/52
4483 * channel_map_24/52 provides the index in the channel_info array for a
4484 * given channel. We have to have two separate maps as there is channel
4485 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4488 * A value of 0xff stored in the channel_map indicates that the channel
4489 * is not supported by the hardware at all.
4491 * A value of 0xfe in the channel_map indicates that the channel is not
4492 * valid for Tx with the current hardware. This means that
4493 * while the system can tune and receive on a given channel, it may not
4494 * be able to associate or transmit any frames on that
4495 * channel. There is no corresponding channel information for that
4498 *********************************************************************/
4501 static const u8 iwl3945_eeprom_band_1[14] = {
4502 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4506 static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
4507 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4510 static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
4511 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4514 static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
4515 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4518 static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
4519 145, 149, 153, 157, 161, 165
4522 static void iwl3945_init_band_reference(const struct iwl3945_priv *priv, int band,
4523 int *eeprom_ch_count,
4524 const struct iwl3945_eeprom_channel
4526 const u8 **eeprom_ch_index)
4529 case 1: /* 2.4GHz band */
4530 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
4531 *eeprom_ch_info = priv->eeprom.band_1_channels;
4532 *eeprom_ch_index = iwl3945_eeprom_band_1;
4534 case 2: /* 4.9GHz band */
4535 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
4536 *eeprom_ch_info = priv->eeprom.band_2_channels;
4537 *eeprom_ch_index = iwl3945_eeprom_band_2;
4539 case 3: /* 5.2GHz band */
4540 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
4541 *eeprom_ch_info = priv->eeprom.band_3_channels;
4542 *eeprom_ch_index = iwl3945_eeprom_band_3;
4544 case 4: /* 5.5GHz band */
4545 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
4546 *eeprom_ch_info = priv->eeprom.band_4_channels;
4547 *eeprom_ch_index = iwl3945_eeprom_band_4;
4549 case 5: /* 5.7GHz band */
4550 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
4551 *eeprom_ch_info = priv->eeprom.band_5_channels;
4552 *eeprom_ch_index = iwl3945_eeprom_band_5;
4561 * iwl3945_get_channel_info - Find driver's private channel info
4563 * Based on band and channel number.
4565 const struct iwl3945_channel_info *iwl3945_get_channel_info(const struct iwl3945_priv *priv,
4566 enum ieee80211_band band, u16 channel)
4571 case IEEE80211_BAND_5GHZ:
4572 for (i = 14; i < priv->channel_count; i++) {
4573 if (priv->channel_info[i].channel == channel)
4574 return &priv->channel_info[i];
4578 case IEEE80211_BAND_2GHZ:
4579 if (channel >= 1 && channel <= 14)
4580 return &priv->channel_info[channel - 1];
4582 case IEEE80211_NUM_BANDS:
4589 #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
4593 * iwl3945_init_channel_map - Set up driver's info for all possible channels
4595 static int iwl3945_init_channel_map(struct iwl3945_priv *priv)
4597 int eeprom_ch_count = 0;
4598 const u8 *eeprom_ch_index = NULL;
4599 const struct iwl3945_eeprom_channel *eeprom_ch_info = NULL;
4601 struct iwl3945_channel_info *ch_info;
4603 if (priv->channel_count) {
4604 IWL_DEBUG_INFO("Channel map already initialized.\n");
4608 if (priv->eeprom.version < 0x2f) {
4609 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
4610 priv->eeprom.version);
4614 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
4616 priv->channel_count =
4617 ARRAY_SIZE(iwl3945_eeprom_band_1) +
4618 ARRAY_SIZE(iwl3945_eeprom_band_2) +
4619 ARRAY_SIZE(iwl3945_eeprom_band_3) +
4620 ARRAY_SIZE(iwl3945_eeprom_band_4) +
4621 ARRAY_SIZE(iwl3945_eeprom_band_5);
4623 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
4625 priv->channel_info = kzalloc(sizeof(struct iwl3945_channel_info) *
4626 priv->channel_count, GFP_KERNEL);
4627 if (!priv->channel_info) {
4628 IWL_ERROR("Could not allocate channel_info\n");
4629 priv->channel_count = 0;
4633 ch_info = priv->channel_info;
4635 /* Loop through the 5 EEPROM bands adding them in order to the
4636 * channel map we maintain (that contains additional information than
4637 * what just in the EEPROM) */
4638 for (band = 1; band <= 5; band++) {
4640 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
4641 &eeprom_ch_info, &eeprom_ch_index);
4643 /* Loop through each band adding each of the channels */
4644 for (ch = 0; ch < eeprom_ch_count; ch++) {
4645 ch_info->channel = eeprom_ch_index[ch];
4646 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
4647 IEEE80211_BAND_5GHZ;
4649 /* permanently store EEPROM's channel regulatory flags
4650 * and max power in channel info database. */
4651 ch_info->eeprom = eeprom_ch_info[ch];
4653 /* Copy the run-time flags so they are there even on
4654 * invalid channels */
4655 ch_info->flags = eeprom_ch_info[ch].flags;
4657 if (!(is_channel_valid(ch_info))) {
4658 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
4662 is_channel_a_band(ch_info) ?
4668 /* Initialize regulatory-based run-time data */
4669 ch_info->max_power_avg = ch_info->curr_txpow =
4670 eeprom_ch_info[ch].max_power_avg;
4671 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
4672 ch_info->min_power = 0;
4674 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
4675 " %ddBm): Ad-Hoc %ssupported\n",
4677 is_channel_a_band(ch_info) ?
4679 CHECK_AND_PRINT(VALID),
4680 CHECK_AND_PRINT(IBSS),
4681 CHECK_AND_PRINT(ACTIVE),
4682 CHECK_AND_PRINT(RADAR),
4683 CHECK_AND_PRINT(WIDE),
4684 CHECK_AND_PRINT(DFS),
4685 eeprom_ch_info[ch].flags,
4686 eeprom_ch_info[ch].max_power_avg,
4687 ((eeprom_ch_info[ch].
4688 flags & EEPROM_CHANNEL_IBSS)
4689 && !(eeprom_ch_info[ch].
4690 flags & EEPROM_CHANNEL_RADAR))
4693 /* Set the user_txpower_limit to the highest power
4694 * supported by any channel */
4695 if (eeprom_ch_info[ch].max_power_avg >
4696 priv->user_txpower_limit)
4697 priv->user_txpower_limit =
4698 eeprom_ch_info[ch].max_power_avg;
4704 /* Set up txpower settings in driver for all channels */
4705 if (iwl3945_txpower_set_from_eeprom(priv))
4712 * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
4714 static void iwl3945_free_channel_map(struct iwl3945_priv *priv)
4716 kfree(priv->channel_info);
4717 priv->channel_count = 0;
4720 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4721 * sending probe req. This should be set long enough to hear probe responses
4722 * from more than one AP. */
4723 #define IWL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
4724 #define IWL_ACTIVE_DWELL_TIME_52 (20)
4726 #define IWL_ACTIVE_DWELL_FACTOR_24GHZ (3)
4727 #define IWL_ACTIVE_DWELL_FACTOR_52GHZ (2)
4729 /* For faster active scanning, scan will move to the next channel if fewer than
4730 * PLCP_QUIET_THRESH packets are heard on this channel within
4731 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4732 * time if it's a quiet channel (nothing responded to our probe, and there's
4733 * no other traffic).
4734 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4735 #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
4736 #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(10) /* msec */
4738 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4739 * Must be set longer than active dwell time.
4740 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4741 #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
4742 #define IWL_PASSIVE_DWELL_TIME_52 (10)
4743 #define IWL_PASSIVE_DWELL_BASE (100)
4744 #define IWL_CHANNEL_TUNE_TIME 5
4746 #define IWL_SCAN_PROBE_MASK(n) (BIT(n) | (BIT(n) - BIT(1)))
4748 static inline u16 iwl3945_get_active_dwell_time(struct iwl3945_priv *priv,
4749 enum ieee80211_band band,
4752 if (band == IEEE80211_BAND_5GHZ)
4753 return IWL_ACTIVE_DWELL_TIME_52 +
4754 IWL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
4756 return IWL_ACTIVE_DWELL_TIME_24 +
4757 IWL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
4760 static u16 iwl3945_get_passive_dwell_time(struct iwl3945_priv *priv,
4761 enum ieee80211_band band)
4763 u16 passive = (band == IEEE80211_BAND_2GHZ) ?
4764 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4765 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4767 if (iwl3945_is_associated(priv)) {
4768 /* If we're associated, we clamp the maximum passive
4769 * dwell time to be 98% of the beacon interval (minus
4770 * 2 * channel tune time) */
4771 passive = priv->beacon_int;
4772 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4773 passive = IWL_PASSIVE_DWELL_BASE;
4774 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4780 static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv,
4781 enum ieee80211_band band,
4782 u8 is_active, u8 n_probes,
4783 struct iwl3945_scan_channel *scan_ch)
4785 const struct ieee80211_channel *channels = NULL;
4786 const struct ieee80211_supported_band *sband;
4787 const struct iwl3945_channel_info *ch_info;
4788 u16 passive_dwell = 0;
4789 u16 active_dwell = 0;
4792 sband = iwl3945_get_band(priv, band);
4796 channels = sband->channels;
4798 active_dwell = iwl3945_get_active_dwell_time(priv, band, n_probes);
4799 passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
4801 if (passive_dwell <= active_dwell)
4802 passive_dwell = active_dwell + 1;
4804 for (i = 0, added = 0; i < sband->n_channels; i++) {
4805 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
4808 scan_ch->channel = channels[i].hw_value;
4810 ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
4811 if (!is_channel_valid(ch_info)) {
4812 IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n",
4817 if (!is_active || is_channel_passive(ch_info) ||
4818 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
4819 scan_ch->type = 0; /* passive */
4821 scan_ch->type = 1; /* active */
4823 if ((scan_ch->type & 1) && n_probes)
4824 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
4826 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4827 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4829 /* Set txpower levels to defaults */
4830 scan_ch->tpc.dsp_atten = 110;
4831 /* scan_pwr_info->tpc.dsp_atten; */
4833 /*scan_pwr_info->tpc.tx_gain; */
4834 if (band == IEEE80211_BAND_5GHZ)
4835 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
4837 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
4838 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
4840 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
4844 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
4846 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
4847 (scan_ch->type & 1) ?
4848 active_dwell : passive_dwell);
4854 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
4858 static void iwl3945_init_hw_rates(struct iwl3945_priv *priv,
4859 struct ieee80211_rate *rates)
4863 for (i = 0; i < IWL_RATE_COUNT; i++) {
4864 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
4865 rates[i].hw_value = i; /* Rate scaling will work on indexes */
4866 rates[i].hw_value_short = i;
4868 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
4870 * If CCK != 1M then set short preamble rate flag.
4872 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
4873 0 : IEEE80211_RATE_SHORT_PREAMBLE;
4879 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
4881 static int iwl3945_init_geos(struct iwl3945_priv *priv)
4883 struct iwl3945_channel_info *ch;
4884 struct ieee80211_supported_band *sband;
4885 struct ieee80211_channel *channels;
4886 struct ieee80211_channel *geo_ch;
4887 struct ieee80211_rate *rates;
4890 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
4891 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
4892 IWL_DEBUG_INFO("Geography modes already initialized.\n");
4893 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4897 channels = kzalloc(sizeof(struct ieee80211_channel) *
4898 priv->channel_count, GFP_KERNEL);
4902 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
4909 /* 5.2GHz channels start after the 2.4GHz channels */
4910 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4911 sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
4913 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
4914 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
4916 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4917 sband->channels = channels;
4919 sband->bitrates = rates;
4920 sband->n_bitrates = IWL_RATE_COUNT;
4922 priv->ieee_channels = channels;
4923 priv->ieee_rates = rates;
4925 iwl3945_init_hw_rates(priv, rates);
4927 for (i = 0; i < priv->channel_count; i++) {
4928 ch = &priv->channel_info[i];
4930 /* FIXME: might be removed if scan is OK*/
4931 if (!is_channel_valid(ch))
4934 if (is_channel_a_band(ch))
4935 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4937 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4939 geo_ch = &sband->channels[sband->n_channels++];
4941 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
4942 geo_ch->max_power = ch->max_power_avg;
4943 geo_ch->max_antenna_gain = 0xff;
4944 geo_ch->hw_value = ch->channel;
4946 if (is_channel_valid(ch)) {
4947 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
4948 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
4950 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
4951 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
4953 if (ch->flags & EEPROM_CHANNEL_RADAR)
4954 geo_ch->flags |= IEEE80211_CHAN_RADAR;
4956 if (ch->max_power_avg > priv->max_channel_txpower_limit)
4957 priv->max_channel_txpower_limit =
4960 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
4963 /* Save flags for reg domain usage */
4964 geo_ch->orig_flags = geo_ch->flags;
4966 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
4967 ch->channel, geo_ch->center_freq,
4968 is_channel_a_band(ch) ? "5.2" : "2.4",
4969 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
4970 "restricted" : "valid",
4974 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
4975 priv->cfg->sku & IWL_SKU_A) {
4976 printk(KERN_INFO DRV_NAME
4977 ": Incorrectly detected BG card as ABG. Please send "
4978 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
4979 priv->pci_dev->device, priv->pci_dev->subsystem_device);
4980 priv->cfg->sku &= ~IWL_SKU_A;
4983 printk(KERN_INFO DRV_NAME
4984 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
4985 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
4986 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
4988 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
4989 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
4990 &priv->bands[IEEE80211_BAND_2GHZ];
4991 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
4992 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
4993 &priv->bands[IEEE80211_BAND_5GHZ];
4995 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5001 * iwl3945_free_geos - undo allocations in iwl3945_init_geos
5003 static void iwl3945_free_geos(struct iwl3945_priv *priv)
5005 kfree(priv->ieee_channels);
5006 kfree(priv->ieee_rates);
5007 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
5010 /******************************************************************************
5012 * uCode download functions
5014 ******************************************************************************/
5016 static void iwl3945_dealloc_ucode_pci(struct iwl3945_priv *priv)
5018 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
5019 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
5020 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5021 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5022 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5023 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
5027 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
5028 * looking at all data.
5030 static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 *image, u32 len)
5037 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5039 rc = iwl3945_grab_nic_access(priv);
5043 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
5046 for (; len > 0; len -= sizeof(u32), image++) {
5047 /* read data comes through single port, auto-incr addr */
5048 /* NOTE: Use the debugless read so we don't flood kernel log
5049 * if IWL_DL_IO is set */
5050 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5051 if (val != le32_to_cpu(*image)) {
5052 IWL_ERROR("uCode INST section is invalid at "
5053 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5054 save_len - len, val, le32_to_cpu(*image));
5062 iwl3945_release_nic_access(priv);
5065 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
5072 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
5073 * using sample data 100 bytes apart. If these sample points are good,
5074 * it's a pretty good bet that everything between them is good, too.
5076 static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, u32 len)
5083 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5085 rc = iwl3945_grab_nic_access(priv);
5089 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5090 /* read data comes through single port, auto-incr addr */
5091 /* NOTE: Use the debugless read so we don't flood kernel log
5092 * if IWL_DL_IO is set */
5093 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
5094 i + RTC_INST_LOWER_BOUND);
5095 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5096 if (val != le32_to_cpu(*image)) {
5097 #if 0 /* Enable this if you want to see details */
5098 IWL_ERROR("uCode INST section is invalid at "
5099 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5109 iwl3945_release_nic_access(priv);
5116 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
5117 * and verify its contents
5119 static int iwl3945_verify_ucode(struct iwl3945_priv *priv)
5126 image = (__le32 *)priv->ucode_boot.v_addr;
5127 len = priv->ucode_boot.len;
5128 rc = iwl3945_verify_inst_sparse(priv, image, len);
5130 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5134 /* Try initialize */
5135 image = (__le32 *)priv->ucode_init.v_addr;
5136 len = priv->ucode_init.len;
5137 rc = iwl3945_verify_inst_sparse(priv, image, len);
5139 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5143 /* Try runtime/protocol */
5144 image = (__le32 *)priv->ucode_code.v_addr;
5145 len = priv->ucode_code.len;
5146 rc = iwl3945_verify_inst_sparse(priv, image, len);
5148 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5152 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5154 /* Since nothing seems to match, show first several data entries in
5155 * instruction SRAM, so maybe visual inspection will give a clue.
5156 * Selection of bootstrap image (vs. other images) is arbitrary. */
5157 image = (__le32 *)priv->ucode_boot.v_addr;
5158 len = priv->ucode_boot.len;
5159 rc = iwl3945_verify_inst_full(priv, image, len);
5165 /* check contents of special bootstrap uCode SRAM */
5166 static int iwl3945_verify_bsm(struct iwl3945_priv *priv)
5168 __le32 *image = priv->ucode_boot.v_addr;
5169 u32 len = priv->ucode_boot.len;
5173 IWL_DEBUG_INFO("Begin verify bsm\n");
5175 /* verify BSM SRAM contents */
5176 val = iwl3945_read_prph(priv, BSM_WR_DWCOUNT_REG);
5177 for (reg = BSM_SRAM_LOWER_BOUND;
5178 reg < BSM_SRAM_LOWER_BOUND + len;
5179 reg += sizeof(u32), image++) {
5180 val = iwl3945_read_prph(priv, reg);
5181 if (val != le32_to_cpu(*image)) {
5182 IWL_ERROR("BSM uCode verification failed at "
5183 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5184 BSM_SRAM_LOWER_BOUND,
5185 reg - BSM_SRAM_LOWER_BOUND, len,
5186 val, le32_to_cpu(*image));
5191 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5197 * iwl3945_load_bsm - Load bootstrap instructions
5201 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5202 * in special SRAM that does not power down during RFKILL. When powering back
5203 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5204 * the bootstrap program into the on-board processor, and starts it.
5206 * The bootstrap program loads (via DMA) instructions and data for a new
5207 * program from host DRAM locations indicated by the host driver in the
5208 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5211 * When initializing the NIC, the host driver points the BSM to the
5212 * "initialize" uCode image. This uCode sets up some internal data, then
5213 * notifies host via "initialize alive" that it is complete.
5215 * The host then replaces the BSM_DRAM_* pointer values to point to the
5216 * normal runtime uCode instructions and a backup uCode data cache buffer
5217 * (filled initially with starting data values for the on-board processor),
5218 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5219 * which begins normal operation.
5221 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5222 * the backup data cache in DRAM before SRAM is powered down.
5224 * When powering back up, the BSM loads the bootstrap program. This reloads
5225 * the runtime uCode instructions and the backup data cache into SRAM,
5226 * and re-launches the runtime uCode from where it left off.
5228 static int iwl3945_load_bsm(struct iwl3945_priv *priv)
5230 __le32 *image = priv->ucode_boot.v_addr;
5231 u32 len = priv->ucode_boot.len;
5241 IWL_DEBUG_INFO("Begin load bsm\n");
5243 /* make sure bootstrap program is no larger than BSM's SRAM size */
5244 if (len > IWL_MAX_BSM_SIZE)
5247 /* Tell bootstrap uCode where to find the "Initialize" uCode
5248 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
5249 * NOTE: iwl3945_initialize_alive_start() will replace these values,
5250 * after the "initialize" uCode has run, to point to
5251 * runtime/protocol instructions and backup data cache. */
5252 pinst = priv->ucode_init.p_addr;
5253 pdata = priv->ucode_init_data.p_addr;
5254 inst_len = priv->ucode_init.len;
5255 data_len = priv->ucode_init_data.len;
5257 rc = iwl3945_grab_nic_access(priv);
5261 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5262 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5263 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5264 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
5266 /* Fill BSM memory with bootstrap instructions */
5267 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5268 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5269 reg_offset += sizeof(u32), image++)
5270 _iwl3945_write_prph(priv, reg_offset,
5271 le32_to_cpu(*image));
5273 rc = iwl3945_verify_bsm(priv);
5275 iwl3945_release_nic_access(priv);
5279 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
5280 iwl3945_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5281 iwl3945_write_prph(priv, BSM_WR_MEM_DST_REG,
5282 RTC_INST_LOWER_BOUND);
5283 iwl3945_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
5285 /* Load bootstrap code into instruction SRAM now,
5286 * to prepare to load "initialize" uCode */
5287 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
5288 BSM_WR_CTRL_REG_BIT_START);
5290 /* Wait for load of bootstrap uCode to finish */
5291 for (i = 0; i < 100; i++) {
5292 done = iwl3945_read_prph(priv, BSM_WR_CTRL_REG);
5293 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5298 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5300 IWL_ERROR("BSM write did not complete!\n");
5304 /* Enable future boot loads whenever power management unit triggers it
5305 * (e.g. when powering back up after power-save shutdown) */
5306 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
5307 BSM_WR_CTRL_REG_BIT_START_EN);
5309 iwl3945_release_nic_access(priv);
5314 static void iwl3945_nic_start(struct iwl3945_priv *priv)
5316 /* Remove all resets to allow NIC to operate */
5317 iwl3945_write32(priv, CSR_RESET, 0);
5321 * iwl3945_read_ucode - Read uCode images from disk file.
5323 * Copy into buffers for card to fetch via bus-mastering
5325 static int iwl3945_read_ucode(struct iwl3945_priv *priv)
5327 struct iwl3945_ucode *ucode;
5329 const struct firmware *ucode_raw;
5330 /* firmware file name contains uCode/driver compatibility version */
5331 const char *name = priv->cfg->fw_name;
5334 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
5336 /* Ask kernel firmware_class module to get the boot firmware off disk.
5337 * request_firmware() is synchronous, file is in memory on return. */
5338 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
5340 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5345 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5346 name, ucode_raw->size);
5348 /* Make sure that we got at least our header! */
5349 if (ucode_raw->size < sizeof(*ucode)) {
5350 IWL_ERROR("File size way too small!\n");
5355 /* Data from ucode file: header followed by uCode images */
5356 ucode = (void *)ucode_raw->data;
5358 ver = le32_to_cpu(ucode->ver);
5359 inst_size = le32_to_cpu(ucode->inst_size);
5360 data_size = le32_to_cpu(ucode->data_size);
5361 init_size = le32_to_cpu(ucode->init_size);
5362 init_data_size = le32_to_cpu(ucode->init_data_size);
5363 boot_size = le32_to_cpu(ucode->boot_size);
5365 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
5366 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5367 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5368 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5369 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5370 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
5372 /* Verify size of file vs. image size info in file's header */
5373 if (ucode_raw->size < sizeof(*ucode) +
5374 inst_size + data_size + init_size +
5375 init_data_size + boot_size) {
5377 IWL_DEBUG_INFO("uCode file size %d too small\n",
5378 (int)ucode_raw->size);
5383 /* Verify that uCode images will fit in card's SRAM */
5384 if (inst_size > IWL_MAX_INST_SIZE) {
5385 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5391 if (data_size > IWL_MAX_DATA_SIZE) {
5392 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5397 if (init_size > IWL_MAX_INST_SIZE) {
5398 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5403 if (init_data_size > IWL_MAX_DATA_SIZE) {
5404 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5409 if (boot_size > IWL_MAX_BSM_SIZE) {
5410 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
5416 /* Allocate ucode buffers for card's bus-master loading ... */
5418 /* Runtime instructions and 2 copies of data:
5419 * 1) unmodified from disk
5420 * 2) backup cache for save/restore during power-downs */
5421 priv->ucode_code.len = inst_size;
5422 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
5424 priv->ucode_data.len = data_size;
5425 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
5427 priv->ucode_data_backup.len = data_size;
5428 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5430 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
5431 !priv->ucode_data_backup.v_addr)
5434 /* Initialization instructions and data */
5435 if (init_size && init_data_size) {
5436 priv->ucode_init.len = init_size;
5437 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
5439 priv->ucode_init_data.len = init_data_size;
5440 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5442 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5446 /* Bootstrap (instructions only, no data) */
5448 priv->ucode_boot.len = boot_size;
5449 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
5451 if (!priv->ucode_boot.v_addr)
5455 /* Copy images into buffers for card's bus-master reads ... */
5457 /* Runtime instructions (first block of data in file) */
5458 src = &ucode->data[0];
5459 len = priv->ucode_code.len;
5460 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
5461 memcpy(priv->ucode_code.v_addr, src, len);
5462 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5463 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5465 /* Runtime data (2nd block)
5466 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
5467 src = &ucode->data[inst_size];
5468 len = priv->ucode_data.len;
5469 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
5470 memcpy(priv->ucode_data.v_addr, src, len);
5471 memcpy(priv->ucode_data_backup.v_addr, src, len);
5473 /* Initialization instructions (3rd block) */
5475 src = &ucode->data[inst_size + data_size];
5476 len = priv->ucode_init.len;
5477 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5479 memcpy(priv->ucode_init.v_addr, src, len);
5482 /* Initialization data (4th block) */
5483 if (init_data_size) {
5484 src = &ucode->data[inst_size + data_size + init_size];
5485 len = priv->ucode_init_data.len;
5486 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
5488 memcpy(priv->ucode_init_data.v_addr, src, len);
5491 /* Bootstrap instructions (5th block) */
5492 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5493 len = priv->ucode_boot.len;
5494 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
5496 memcpy(priv->ucode_boot.v_addr, src, len);
5498 /* We have our copies now, allow OS release its copies */
5499 release_firmware(ucode_raw);
5503 IWL_ERROR("failed to allocate pci memory\n");
5505 iwl3945_dealloc_ucode_pci(priv);
5508 release_firmware(ucode_raw);
5516 * iwl3945_set_ucode_ptrs - Set uCode address location
5518 * Tell initialization uCode where to find runtime uCode.
5520 * BSM registers initially contain pointers to initialization uCode.
5521 * We need to replace them to load runtime uCode inst and data,
5522 * and to save runtime data when powering down.
5524 static int iwl3945_set_ucode_ptrs(struct iwl3945_priv *priv)
5529 unsigned long flags;
5531 /* bits 31:0 for 3945 */
5532 pinst = priv->ucode_code.p_addr;
5533 pdata = priv->ucode_data_backup.p_addr;
5535 spin_lock_irqsave(&priv->lock, flags);
5536 rc = iwl3945_grab_nic_access(priv);
5538 spin_unlock_irqrestore(&priv->lock, flags);
5542 /* Tell bootstrap uCode where to find image to load */
5543 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5544 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5545 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
5546 priv->ucode_data.len);
5548 /* Inst byte count must be last to set up, bit 31 signals uCode
5549 * that all new ptr/size info is in place */
5550 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
5551 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5553 iwl3945_release_nic_access(priv);
5555 spin_unlock_irqrestore(&priv->lock, flags);
5557 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
5563 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
5565 * Called after REPLY_ALIVE notification received from "initialize" uCode.
5567 * Tell "initialize" uCode to go ahead and load the runtime uCode.
5569 static void iwl3945_init_alive_start(struct iwl3945_priv *priv)
5571 /* Check alive response for "valid" sign from uCode */
5572 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
5573 /* We had an error bringing up the hardware, so take it
5574 * all the way back down so we can try again */
5575 IWL_DEBUG_INFO("Initialize Alive failed.\n");
5579 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
5580 * This is a paranoid check, because we would not have gotten the
5581 * "initialize" alive if code weren't properly loaded. */
5582 if (iwl3945_verify_ucode(priv)) {
5583 /* Runtime instruction load was bad;
5584 * take it all the way back down so we can try again */
5585 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
5589 /* Send pointers to protocol/runtime uCode image ... init code will
5590 * load and launch runtime uCode, which will send us another "Alive"
5592 IWL_DEBUG_INFO("Initialization Alive received.\n");
5593 if (iwl3945_set_ucode_ptrs(priv)) {
5594 /* Runtime instruction load won't happen;
5595 * take it all the way back down so we can try again */
5596 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
5602 queue_work(priv->workqueue, &priv->restart);
5607 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
5608 struct sk_buff *skb);
5611 * iwl3945_alive_start - called after REPLY_ALIVE notification received
5612 * from protocol/runtime uCode (initialization uCode's
5613 * Alive gets handled by iwl3945_init_alive_start()).
5615 static void iwl3945_alive_start(struct iwl3945_priv *priv)
5618 int thermal_spin = 0;
5621 IWL_DEBUG_INFO("Runtime Alive received.\n");
5623 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
5624 /* We had an error bringing up the hardware, so take it
5625 * all the way back down so we can try again */
5626 IWL_DEBUG_INFO("Alive failed.\n");
5630 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5631 * This is a paranoid check, because we would not have gotten the
5632 * "runtime" alive if code weren't properly loaded. */
5633 if (iwl3945_verify_ucode(priv)) {
5634 /* Runtime instruction load was bad;
5635 * take it all the way back down so we can try again */
5636 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
5640 iwl3945_clear_stations_table(priv);
5642 rc = iwl3945_grab_nic_access(priv);
5644 IWL_WARNING("Can not read RFKILL status from adapter\n");
5648 rfkill = iwl3945_read_prph(priv, APMG_RFKILL_REG);
5649 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
5650 iwl3945_release_nic_access(priv);
5653 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5654 /* if RFKILL is not on, then wait for thermal
5655 * sensor in adapter to kick in */
5656 while (iwl3945_hw_get_temperature(priv) == 0) {
5662 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
5665 set_bit(STATUS_RF_KILL_HW, &priv->status);
5667 /* After the ALIVE response, we can send commands to 3945 uCode */
5668 set_bit(STATUS_ALIVE, &priv->status);
5670 /* Clear out the uCode error bit if it is set */
5671 clear_bit(STATUS_FW_ERROR, &priv->status);
5673 if (iwl3945_is_rfkill(priv))
5676 ieee80211_wake_queues(priv->hw);
5678 priv->active_rate = priv->rates_mask;
5679 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
5681 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
5683 if (iwl3945_is_associated(priv)) {
5684 struct iwl3945_rxon_cmd *active_rxon =
5685 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
5687 memcpy(&priv->staging_rxon, &priv->active_rxon,
5688 sizeof(priv->staging_rxon));
5689 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5691 /* Initialize our rx_config data */
5692 iwl3945_connection_init_rx_config(priv, priv->iw_mode);
5693 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
5696 /* Configure Bluetooth device coexistence support */
5697 iwl3945_send_bt_config(priv);
5699 /* Configure the adapter for unassociated operation */
5700 iwl3945_commit_rxon(priv);
5702 iwl3945_reg_txpower_periodic(priv);
5704 iwl3945_led_register(priv);
5706 IWL_DEBUG_INFO("ALIVE processing complete.\n");
5707 set_bit(STATUS_READY, &priv->status);
5708 wake_up_interruptible(&priv->wait_command_queue);
5710 if (priv->error_recovering)
5711 iwl3945_error_recovery(priv);
5713 /* reassociate for ADHOC mode */
5714 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
5715 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
5718 iwl3945_mac_beacon_update(priv->hw, beacon);
5724 queue_work(priv->workqueue, &priv->restart);
5727 static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv);
5729 static void __iwl3945_down(struct iwl3945_priv *priv)
5731 unsigned long flags;
5732 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
5733 struct ieee80211_conf *conf = NULL;
5735 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
5737 conf = ieee80211_get_hw_conf(priv->hw);
5740 set_bit(STATUS_EXIT_PENDING, &priv->status);
5742 iwl3945_led_unregister(priv);
5743 iwl3945_clear_stations_table(priv);
5745 /* Unblock any waiting calls */
5746 wake_up_interruptible_all(&priv->wait_command_queue);
5748 /* Wipe out the EXIT_PENDING status bit if we are not actually
5749 * exiting the module */
5751 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5753 /* stop and reset the on-board processor */
5754 iwl3945_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
5756 /* tell the device to stop sending interrupts */
5757 spin_lock_irqsave(&priv->lock, flags);
5758 iwl3945_disable_interrupts(priv);
5759 spin_unlock_irqrestore(&priv->lock, flags);
5760 iwl_synchronize_irq(priv);
5762 if (priv->mac80211_registered)
5763 ieee80211_stop_queues(priv->hw);
5765 /* If we have not previously called iwl3945_init() then
5766 * clear all bits but the RF Kill and SUSPEND bits and return */
5767 if (!iwl3945_is_init(priv)) {
5768 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5770 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5772 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5773 STATUS_GEO_CONFIGURED |
5774 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5776 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5777 STATUS_EXIT_PENDING;
5781 /* ...otherwise clear out all the status bits but the RF Kill and
5782 * SUSPEND bits and continue taking the NIC down. */
5783 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5785 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5787 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5788 STATUS_GEO_CONFIGURED |
5789 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5791 test_bit(STATUS_FW_ERROR, &priv->status) <<
5793 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5794 STATUS_EXIT_PENDING;
5796 spin_lock_irqsave(&priv->lock, flags);
5797 iwl3945_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
5798 spin_unlock_irqrestore(&priv->lock, flags);
5800 iwl3945_hw_txq_ctx_stop(priv);
5801 iwl3945_hw_rxq_stop(priv);
5803 spin_lock_irqsave(&priv->lock, flags);
5804 if (!iwl3945_grab_nic_access(priv)) {
5805 iwl3945_write_prph(priv, APMG_CLK_DIS_REG,
5806 APMG_CLK_VAL_DMA_CLK_RQT);
5807 iwl3945_release_nic_access(priv);
5809 spin_unlock_irqrestore(&priv->lock, flags);
5813 iwl3945_hw_nic_stop_master(priv);
5814 iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
5815 iwl3945_hw_nic_reset(priv);
5818 memset(&priv->card_alive, 0, sizeof(struct iwl3945_alive_resp));
5820 if (priv->ibss_beacon)
5821 dev_kfree_skb(priv->ibss_beacon);
5822 priv->ibss_beacon = NULL;
5824 /* clear out any free frames */
5825 iwl3945_clear_free_frames(priv);
5828 static void iwl3945_down(struct iwl3945_priv *priv)
5830 mutex_lock(&priv->mutex);
5831 __iwl3945_down(priv);
5832 mutex_unlock(&priv->mutex);
5834 iwl3945_cancel_deferred_work(priv);
5837 #define MAX_HW_RESTARTS 5
5839 static int __iwl3945_up(struct iwl3945_priv *priv)
5843 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5844 IWL_WARNING("Exit pending; will not bring the NIC up\n");
5848 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
5849 IWL_WARNING("Radio disabled by SW RF kill (module "
5854 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
5855 IWL_ERROR("ucode not available for device bring up\n");
5859 /* If platform's RF_KILL switch is NOT set to KILL */
5860 if (iwl3945_read32(priv, CSR_GP_CNTRL) &
5861 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5862 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5864 set_bit(STATUS_RF_KILL_HW, &priv->status);
5865 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
5866 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
5871 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
5873 rc = iwl3945_hw_nic_init(priv);
5875 IWL_ERROR("Unable to int nic\n");
5879 /* make sure rfkill handshake bits are cleared */
5880 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5881 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR,
5882 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5884 /* clear (again), then enable host interrupts */
5885 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
5886 iwl3945_enable_interrupts(priv);
5888 /* really make sure rfkill handshake bits are cleared */
5889 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5890 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5892 /* Copy original ucode data image from disk into backup cache.
5893 * This will be used to initialize the on-board processor's
5894 * data SRAM for a clean start when the runtime program first loads. */
5895 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5896 priv->ucode_data.len);
5898 /* We return success when we resume from suspend and rf_kill is on. */
5899 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
5902 for (i = 0; i < MAX_HW_RESTARTS; i++) {
5904 iwl3945_clear_stations_table(priv);
5906 /* load bootstrap state machine,
5907 * load bootstrap program into processor's memory,
5908 * prepare to load the "initialize" uCode */
5909 rc = iwl3945_load_bsm(priv);
5912 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
5916 /* start card; "initialize" will load runtime ucode */
5917 iwl3945_nic_start(priv);
5919 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
5924 set_bit(STATUS_EXIT_PENDING, &priv->status);
5925 __iwl3945_down(priv);
5926 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5928 /* tried to restart and config the device for as long as our
5929 * patience could withstand */
5930 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
5935 /*****************************************************************************
5937 * Workqueue callbacks
5939 *****************************************************************************/
5941 static void iwl3945_bg_init_alive_start(struct work_struct *data)
5943 struct iwl3945_priv *priv =
5944 container_of(data, struct iwl3945_priv, init_alive_start.work);
5946 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5949 mutex_lock(&priv->mutex);
5950 iwl3945_init_alive_start(priv);
5951 mutex_unlock(&priv->mutex);
5954 static void iwl3945_bg_alive_start(struct work_struct *data)
5956 struct iwl3945_priv *priv =
5957 container_of(data, struct iwl3945_priv, alive_start.work);
5959 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5962 mutex_lock(&priv->mutex);
5963 iwl3945_alive_start(priv);
5964 mutex_unlock(&priv->mutex);
5967 static void iwl3945_bg_rf_kill(struct work_struct *work)
5969 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, rf_kill);
5971 wake_up_interruptible(&priv->wait_command_queue);
5973 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5976 mutex_lock(&priv->mutex);
5978 if (!iwl3945_is_rfkill(priv)) {
5979 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
5980 "HW and/or SW RF Kill no longer active, restarting "
5982 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
5983 queue_work(priv->workqueue, &priv->restart);
5986 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
5987 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
5988 "disabled by SW switch\n");
5990 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
5991 "Kill switch must be turned off for "
5992 "wireless networking to work.\n");
5995 mutex_unlock(&priv->mutex);
5996 iwl3945_rfkill_set_hw_state(priv);
5999 static void iwl3945_bg_set_monitor(struct work_struct *work)
6001 struct iwl3945_priv *priv = container_of(work,
6002 struct iwl3945_priv, set_monitor);
6004 IWL_DEBUG(IWL_DL_STATE, "setting monitor mode\n");
6006 mutex_lock(&priv->mutex);
6008 if (!iwl3945_is_ready(priv))
6009 IWL_DEBUG(IWL_DL_STATE, "leave - not ready\n");
6011 if (iwl3945_set_mode(priv, NL80211_IFTYPE_MONITOR) != 0)
6012 IWL_ERROR("iwl3945_set_mode() failed\n");
6014 mutex_unlock(&priv->mutex);
6017 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6019 static void iwl3945_bg_scan_check(struct work_struct *data)
6021 struct iwl3945_priv *priv =
6022 container_of(data, struct iwl3945_priv, scan_check.work);
6024 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6027 mutex_lock(&priv->mutex);
6028 if (test_bit(STATUS_SCANNING, &priv->status) ||
6029 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6030 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6031 "Scan completion watchdog resetting adapter (%dms)\n",
6032 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
6034 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6035 iwl3945_send_scan_abort(priv);
6037 mutex_unlock(&priv->mutex);
6040 static void iwl3945_bg_request_scan(struct work_struct *data)
6042 struct iwl3945_priv *priv =
6043 container_of(data, struct iwl3945_priv, request_scan);
6044 struct iwl3945_host_cmd cmd = {
6045 .id = REPLY_SCAN_CMD,
6046 .len = sizeof(struct iwl3945_scan_cmd),
6047 .meta.flags = CMD_SIZE_HUGE,
6050 struct iwl3945_scan_cmd *scan;
6051 struct ieee80211_conf *conf = NULL;
6053 enum ieee80211_band band;
6054 DECLARE_SSID_BUF(ssid);
6056 conf = ieee80211_get_hw_conf(priv->hw);
6058 mutex_lock(&priv->mutex);
6060 if (!iwl3945_is_ready(priv)) {
6061 IWL_WARNING("request scan called when driver not ready.\n");
6065 /* Make sure the scan wasn't canceled before this queued work
6066 * was given the chance to run... */
6067 if (!test_bit(STATUS_SCANNING, &priv->status))
6070 /* This should never be called or scheduled if there is currently
6071 * a scan active in the hardware. */
6072 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6073 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6074 "Ignoring second request.\n");
6079 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6080 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6084 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6085 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6089 if (iwl3945_is_rfkill(priv)) {
6090 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6094 if (!test_bit(STATUS_READY, &priv->status)) {
6095 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6099 if (!priv->scan_bands) {
6100 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6105 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
6106 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6113 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
6115 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6116 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6118 if (iwl3945_is_associated(priv)) {
6121 u32 suspend_time = 100;
6122 u32 scan_suspend_time = 100;
6123 unsigned long flags;
6125 IWL_DEBUG_INFO("Scanning while associated...\n");
6127 spin_lock_irqsave(&priv->lock, flags);
6128 interval = priv->beacon_int;
6129 spin_unlock_irqrestore(&priv->lock, flags);
6131 scan->suspend_time = 0;
6132 scan->max_out_time = cpu_to_le32(200 * 1024);
6134 interval = suspend_time;
6136 * suspend time format:
6137 * 0-19: beacon interval in usec (time before exec.)
6139 * 24-31: number of beacons (suspend between channels)
6142 extra = (suspend_time / interval) << 24;
6143 scan_suspend_time = 0xFF0FFFFF &
6144 (extra | ((suspend_time % interval) * 1024));
6146 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6147 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6148 scan_suspend_time, interval);
6151 /* We should add the ability for user to lock to PASSIVE ONLY */
6152 if (priv->one_direct_scan) {
6154 ("Kicking off one direct scan for '%s'\n",
6155 print_ssid(ssid, priv->direct_ssid,
6156 priv->direct_ssid_len));
6157 scan->direct_scan[0].id = WLAN_EID_SSID;
6158 scan->direct_scan[0].len = priv->direct_ssid_len;
6159 memcpy(scan->direct_scan[0].ssid,
6160 priv->direct_ssid, priv->direct_ssid_len);
6163 IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
6165 /* We don't build a direct scan probe request; the uCode will do
6166 * that based on the direct_mask added to each channel entry */
6167 scan->tx_cmd.len = cpu_to_le16(
6168 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
6169 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
6170 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6171 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6172 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6174 /* flags + rate selection */
6176 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
6177 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6178 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
6179 scan->good_CRC_th = 0;
6180 band = IEEE80211_BAND_2GHZ;
6181 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
6182 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
6183 scan->good_CRC_th = IWL_GOOD_CRC_TH;
6184 band = IEEE80211_BAND_5GHZ;
6186 IWL_WARNING("Invalid scan band count\n");
6190 /* select Rx antennas */
6191 scan->flags |= iwl3945_get_antenna_flags(priv);
6193 if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
6194 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6196 scan->channel_count =
6197 iwl3945_get_channels_for_scan(priv, band, 1, /* active */
6199 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6201 if (scan->channel_count == 0) {
6202 IWL_DEBUG_SCAN("channel count %d\n", scan->channel_count);
6206 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
6207 scan->channel_count * sizeof(struct iwl3945_scan_channel);
6209 scan->len = cpu_to_le16(cmd.len);
6211 set_bit(STATUS_SCAN_HW, &priv->status);
6212 rc = iwl3945_send_cmd_sync(priv, &cmd);
6216 queue_delayed_work(priv->workqueue, &priv->scan_check,
6217 IWL_SCAN_CHECK_WATCHDOG);
6219 mutex_unlock(&priv->mutex);
6223 /* can not perform scan make sure we clear scanning
6224 * bits from status so next scan request can be performed.
6225 * if we dont clear scanning status bit here all next scan
6228 clear_bit(STATUS_SCAN_HW, &priv->status);
6229 clear_bit(STATUS_SCANNING, &priv->status);
6231 /* inform mac80211 scan aborted */
6232 queue_work(priv->workqueue, &priv->scan_completed);
6233 mutex_unlock(&priv->mutex);
6236 static void iwl3945_bg_up(struct work_struct *data)
6238 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, up);
6240 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6243 mutex_lock(&priv->mutex);
6245 mutex_unlock(&priv->mutex);
6246 iwl3945_rfkill_set_hw_state(priv);
6249 static void iwl3945_bg_restart(struct work_struct *data)
6251 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, restart);
6253 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6257 queue_work(priv->workqueue, &priv->up);
6260 static void iwl3945_bg_rx_replenish(struct work_struct *data)
6262 struct iwl3945_priv *priv =
6263 container_of(data, struct iwl3945_priv, rx_replenish);
6265 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6268 mutex_lock(&priv->mutex);
6269 iwl3945_rx_replenish(priv);
6270 mutex_unlock(&priv->mutex);
6273 #define IWL_DELAY_NEXT_SCAN (HZ*2)
6275 static void iwl3945_post_associate(struct iwl3945_priv *priv)
6278 struct ieee80211_conf *conf = NULL;
6280 if (priv->iw_mode == NL80211_IFTYPE_AP) {
6281 IWL_ERROR("%s Should not be called in AP mode\n", __func__);
6286 IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
6287 priv->assoc_id, priv->active_rxon.bssid_addr);
6289 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6292 if (!priv->vif || !priv->is_open)
6295 iwl3945_scan_cancel_timeout(priv, 200);
6297 conf = ieee80211_get_hw_conf(priv->hw);
6299 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6300 iwl3945_commit_rxon(priv);
6302 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6303 iwl3945_setup_rxon_timing(priv);
6304 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6305 sizeof(priv->rxon_timing), &priv->rxon_timing);
6307 IWL_WARNING("REPLY_RXON_TIMING failed - "
6308 "Attempting to continue.\n");
6310 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6312 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6314 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6315 priv->assoc_id, priv->beacon_int);
6317 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6318 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6320 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6322 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6323 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6324 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6326 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6328 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
6329 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6333 iwl3945_commit_rxon(priv);
6335 switch (priv->iw_mode) {
6336 case NL80211_IFTYPE_STATION:
6337 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
6340 case NL80211_IFTYPE_ADHOC:
6342 /* clear out the station table */
6343 iwl3945_clear_stations_table(priv);
6345 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
6346 iwl3945_add_station(priv, priv->bssid, 0, 0);
6347 iwl3945_sync_sta(priv, IWL_STA_ID,
6348 (priv->band == IEEE80211_BAND_5GHZ) ?
6349 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6351 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6352 iwl3945_send_beacon_cmd(priv);
6357 IWL_ERROR("%s Should not be called in %d mode\n",
6358 __func__, priv->iw_mode);
6362 iwl3945_activate_qos(priv, 0);
6364 /* we have just associated, don't start scan too early */
6365 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
6368 static void iwl3945_bg_abort_scan(struct work_struct *work)
6370 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, abort_scan);
6372 if (!iwl3945_is_ready(priv))
6375 mutex_lock(&priv->mutex);
6377 set_bit(STATUS_SCAN_ABORTING, &priv->status);
6378 iwl3945_send_scan_abort(priv);
6380 mutex_unlock(&priv->mutex);
6383 static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
6385 static void iwl3945_bg_scan_completed(struct work_struct *work)
6387 struct iwl3945_priv *priv =
6388 container_of(work, struct iwl3945_priv, scan_completed);
6390 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6392 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6395 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6396 iwl3945_mac_config(priv->hw, 0);
6398 ieee80211_scan_completed(priv->hw);
6400 /* Since setting the TXPOWER may have been deferred while
6401 * performing the scan, fire one off */
6402 mutex_lock(&priv->mutex);
6403 iwl3945_hw_reg_send_txpower(priv);
6404 mutex_unlock(&priv->mutex);
6407 /*****************************************************************************
6409 * mac80211 entry point functions
6411 *****************************************************************************/
6413 #define UCODE_READY_TIMEOUT (2 * HZ)
6415 static int iwl3945_mac_start(struct ieee80211_hw *hw)
6417 struct iwl3945_priv *priv = hw->priv;
6420 IWL_DEBUG_MAC80211("enter\n");
6422 if (pci_enable_device(priv->pci_dev)) {
6423 IWL_ERROR("Fail to pci_enable_device\n");
6426 pci_restore_state(priv->pci_dev);
6427 pci_enable_msi(priv->pci_dev);
6429 ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
6432 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
6433 goto out_disable_msi;
6436 /* we should be verifying the device is ready to be opened */
6437 mutex_lock(&priv->mutex);
6439 memset(&priv->staging_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
6440 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6441 * ucode filename and max sizes are card-specific. */
6443 if (!priv->ucode_code.len) {
6444 ret = iwl3945_read_ucode(priv);
6446 IWL_ERROR("Could not read microcode: %d\n", ret);
6447 mutex_unlock(&priv->mutex);
6448 goto out_release_irq;
6452 ret = __iwl3945_up(priv);
6454 mutex_unlock(&priv->mutex);
6456 iwl3945_rfkill_set_hw_state(priv);
6459 goto out_release_irq;
6461 IWL_DEBUG_INFO("Start UP work.\n");
6463 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6466 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6467 * mac80211 will not be run successfully. */
6468 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6469 test_bit(STATUS_READY, &priv->status),
6470 UCODE_READY_TIMEOUT);
6472 if (!test_bit(STATUS_READY, &priv->status)) {
6473 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
6474 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6476 goto out_release_irq;
6481 IWL_DEBUG_MAC80211("leave\n");
6485 free_irq(priv->pci_dev->irq, priv);
6487 pci_disable_msi(priv->pci_dev);
6488 pci_disable_device(priv->pci_dev);
6490 IWL_DEBUG_MAC80211("leave - failed\n");
6494 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
6496 struct iwl3945_priv *priv = hw->priv;
6498 IWL_DEBUG_MAC80211("enter\n");
6500 if (!priv->is_open) {
6501 IWL_DEBUG_MAC80211("leave - skip\n");
6507 if (iwl3945_is_ready_rf(priv)) {
6508 /* stop mac, cancel any scan request and clear
6509 * RXON_FILTER_ASSOC_MSK BIT
6511 mutex_lock(&priv->mutex);
6512 iwl3945_scan_cancel_timeout(priv, 100);
6513 mutex_unlock(&priv->mutex);
6518 flush_workqueue(priv->workqueue);
6519 free_irq(priv->pci_dev->irq, priv);
6520 pci_disable_msi(priv->pci_dev);
6521 pci_save_state(priv->pci_dev);
6522 pci_disable_device(priv->pci_dev);
6524 IWL_DEBUG_MAC80211("leave\n");
6527 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
6529 struct iwl3945_priv *priv = hw->priv;
6531 IWL_DEBUG_MAC80211("enter\n");
6533 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
6534 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
6536 if (iwl3945_tx_skb(priv, skb))
6537 dev_kfree_skb_any(skb);
6539 IWL_DEBUG_MAC80211("leave\n");
6543 static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
6544 struct ieee80211_if_init_conf *conf)
6546 struct iwl3945_priv *priv = hw->priv;
6547 unsigned long flags;
6549 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
6552 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
6556 spin_lock_irqsave(&priv->lock, flags);
6557 priv->vif = conf->vif;
6558 priv->iw_mode = conf->type;
6560 spin_unlock_irqrestore(&priv->lock, flags);
6562 mutex_lock(&priv->mutex);
6564 if (conf->mac_addr) {
6565 IWL_DEBUG_MAC80211("Set: %pM\n", conf->mac_addr);
6566 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6569 if (iwl3945_is_ready(priv))
6570 iwl3945_set_mode(priv, conf->type);
6572 mutex_unlock(&priv->mutex);
6574 IWL_DEBUG_MAC80211("leave\n");
6579 * iwl3945_mac_config - mac80211 config callback
6581 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6582 * be set inappropriately and the driver currently sets the hardware up to
6583 * use it whenever needed.
6585 static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
6587 struct iwl3945_priv *priv = hw->priv;
6588 const struct iwl3945_channel_info *ch_info;
6589 struct ieee80211_conf *conf = &hw->conf;
6590 unsigned long flags;
6593 mutex_lock(&priv->mutex);
6594 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
6596 if (!iwl3945_is_ready(priv)) {
6597 IWL_DEBUG_MAC80211("leave - not ready\n");
6602 if (unlikely(!iwl3945_param_disable_hw_scan &&
6603 test_bit(STATUS_SCANNING, &priv->status))) {
6604 IWL_DEBUG_MAC80211("leave - scanning\n");
6605 set_bit(STATUS_CONF_PENDING, &priv->status);
6606 mutex_unlock(&priv->mutex);
6610 spin_lock_irqsave(&priv->lock, flags);
6612 ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
6613 conf->channel->hw_value);
6614 if (!is_channel_valid(ch_info)) {
6615 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this band.\n",
6616 conf->channel->hw_value, conf->channel->band);
6617 IWL_DEBUG_MAC80211("leave - invalid channel\n");
6618 spin_unlock_irqrestore(&priv->lock, flags);
6623 iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
6625 iwl3945_set_flags_for_phymode(priv, conf->channel->band);
6627 /* The list of supported rates and rate mask can be different
6628 * for each phymode; since the phymode may have changed, reset
6629 * the rate mask to what mac80211 lists */
6630 iwl3945_set_rate(priv);
6632 spin_unlock_irqrestore(&priv->lock, flags);
6634 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
6635 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
6636 iwl3945_hw_channel_switch(priv, conf->channel);
6641 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
6643 if (!conf->radio_enabled) {
6644 IWL_DEBUG_MAC80211("leave - radio disabled\n");
6648 if (iwl3945_is_rfkill(priv)) {
6649 IWL_DEBUG_MAC80211("leave - RF kill\n");
6654 iwl3945_set_rate(priv);
6656 if (memcmp(&priv->active_rxon,
6657 &priv->staging_rxon, sizeof(priv->staging_rxon)))
6658 iwl3945_commit_rxon(priv);
6660 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
6662 IWL_DEBUG_MAC80211("leave\n");
6665 clear_bit(STATUS_CONF_PENDING, &priv->status);
6666 mutex_unlock(&priv->mutex);
6670 static void iwl3945_config_ap(struct iwl3945_priv *priv)
6674 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6677 /* The following should be done only at AP bring up */
6678 if (!(iwl3945_is_associated(priv))) {
6680 /* RXON - unassoc (to set timing command) */
6681 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6682 iwl3945_commit_rxon(priv);
6685 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6686 iwl3945_setup_rxon_timing(priv);
6687 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6688 sizeof(priv->rxon_timing), &priv->rxon_timing);
6690 IWL_WARNING("REPLY_RXON_TIMING failed - "
6691 "Attempting to continue.\n");
6693 /* FIXME: what should be the assoc_id for AP? */
6694 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6695 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6696 priv->staging_rxon.flags |=
6697 RXON_FLG_SHORT_PREAMBLE_MSK;
6699 priv->staging_rxon.flags &=
6700 ~RXON_FLG_SHORT_PREAMBLE_MSK;
6702 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6703 if (priv->assoc_capability &
6704 WLAN_CAPABILITY_SHORT_SLOT_TIME)
6705 priv->staging_rxon.flags |=
6706 RXON_FLG_SHORT_SLOT_MSK;
6708 priv->staging_rxon.flags &=
6709 ~RXON_FLG_SHORT_SLOT_MSK;
6711 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
6712 priv->staging_rxon.flags &=
6713 ~RXON_FLG_SHORT_SLOT_MSK;
6715 /* restore RXON assoc */
6716 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6717 iwl3945_commit_rxon(priv);
6718 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
6720 iwl3945_send_beacon_cmd(priv);
6722 /* FIXME - we need to add code here to detect a totally new
6723 * configuration, reset the AP, unassoc, rxon timing, assoc,
6724 * clear sta table, add BCAST sta... */
6727 static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
6728 struct ieee80211_vif *vif,
6729 struct ieee80211_if_conf *conf)
6731 struct iwl3945_priv *priv = hw->priv;
6737 if (priv->vif != vif) {
6738 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
6742 /* handle this temporarily here */
6743 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
6744 conf->changed & IEEE80211_IFCC_BEACON) {
6745 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
6748 mutex_lock(&priv->mutex);
6749 rc = iwl3945_mac_beacon_update(hw, beacon);
6750 mutex_unlock(&priv->mutex);
6755 if (!iwl3945_is_alive(priv))
6758 mutex_lock(&priv->mutex);
6761 IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
6764 * very dubious code was here; the probe filtering flag is never set:
6766 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
6767 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
6770 if (priv->iw_mode == NL80211_IFTYPE_AP) {
6772 conf->bssid = priv->mac_addr;
6773 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
6774 IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
6777 if (priv->ibss_beacon)
6778 dev_kfree_skb(priv->ibss_beacon);
6780 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
6783 if (iwl3945_is_rfkill(priv))
6786 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
6787 !is_multicast_ether_addr(conf->bssid)) {
6788 /* If there is currently a HW scan going on in the background
6789 * then we need to cancel it else the RXON below will fail. */
6790 if (iwl3945_scan_cancel_timeout(priv, 100)) {
6791 IWL_WARNING("Aborted scan still in progress "
6793 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
6794 mutex_unlock(&priv->mutex);
6797 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
6799 /* TODO: Audit driver for usage of these members and see
6800 * if mac80211 deprecates them (priv->bssid looks like it
6801 * shouldn't be there, but I haven't scanned the IBSS code
6802 * to verify) - jpk */
6803 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
6805 if (priv->iw_mode == NL80211_IFTYPE_AP)
6806 iwl3945_config_ap(priv);
6808 rc = iwl3945_commit_rxon(priv);
6809 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
6810 iwl3945_add_station(priv,
6811 priv->active_rxon.bssid_addr, 1, 0);
6815 iwl3945_scan_cancel_timeout(priv, 100);
6816 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6817 iwl3945_commit_rxon(priv);
6821 IWL_DEBUG_MAC80211("leave\n");
6822 mutex_unlock(&priv->mutex);
6827 static void iwl3945_configure_filter(struct ieee80211_hw *hw,
6828 unsigned int changed_flags,
6829 unsigned int *total_flags,
6830 int mc_count, struct dev_addr_list *mc_list)
6832 struct iwl3945_priv *priv = hw->priv;
6834 if (changed_flags & (*total_flags) & FIF_OTHER_BSS) {
6835 IWL_DEBUG_MAC80211("Enter: type %d (0x%x, 0x%x)\n",
6836 NL80211_IFTYPE_MONITOR,
6837 changed_flags, *total_flags);
6838 /* queue work 'cuz mac80211 is holding a lock which
6839 * prevents us from issuing (synchronous) f/w cmds */
6840 queue_work(priv->workqueue, &priv->set_monitor);
6842 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI |
6843 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
6846 static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
6847 struct ieee80211_if_init_conf *conf)
6849 struct iwl3945_priv *priv = hw->priv;
6851 IWL_DEBUG_MAC80211("enter\n");
6853 mutex_lock(&priv->mutex);
6855 if (iwl3945_is_ready_rf(priv)) {
6856 iwl3945_scan_cancel_timeout(priv, 100);
6857 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6858 iwl3945_commit_rxon(priv);
6860 if (priv->vif == conf->vif) {
6862 memset(priv->bssid, 0, ETH_ALEN);
6864 mutex_unlock(&priv->mutex);
6866 IWL_DEBUG_MAC80211("leave\n");
6869 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
6871 static void iwl3945_bss_info_changed(struct ieee80211_hw *hw,
6872 struct ieee80211_vif *vif,
6873 struct ieee80211_bss_conf *bss_conf,
6876 struct iwl3945_priv *priv = hw->priv;
6878 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
6880 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
6881 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
6882 bss_conf->use_short_preamble);
6883 if (bss_conf->use_short_preamble)
6884 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6886 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6889 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
6890 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
6891 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
6892 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
6894 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
6897 if (changes & BSS_CHANGED_ASSOC) {
6898 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
6899 /* This should never happen as this function should
6900 * never be called from interrupt context. */
6901 if (WARN_ON_ONCE(in_interrupt()))
6903 if (bss_conf->assoc) {
6904 priv->assoc_id = bss_conf->aid;
6905 priv->beacon_int = bss_conf->beacon_int;
6906 priv->timestamp0 = bss_conf->timestamp & 0xFFFFFFFF;
6907 priv->timestamp1 = (bss_conf->timestamp >> 32) &
6909 priv->assoc_capability = bss_conf->assoc_capability;
6910 priv->next_scan_jiffies = jiffies +
6911 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
6912 mutex_lock(&priv->mutex);
6913 iwl3945_post_associate(priv);
6914 mutex_unlock(&priv->mutex);
6917 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
6919 } else if (changes && iwl3945_is_associated(priv) && priv->assoc_id) {
6920 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
6921 iwl3945_send_rxon_assoc(priv);
6926 static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
6929 unsigned long flags;
6930 struct iwl3945_priv *priv = hw->priv;
6931 DECLARE_SSID_BUF(ssid_buf);
6933 IWL_DEBUG_MAC80211("enter\n");
6935 mutex_lock(&priv->mutex);
6936 spin_lock_irqsave(&priv->lock, flags);
6938 if (!iwl3945_is_ready_rf(priv)) {
6940 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
6944 if (priv->iw_mode == NL80211_IFTYPE_AP) { /* APs don't scan */
6946 IWL_ERROR("ERROR: APs don't scan\n");
6950 /* we don't schedule scan within next_scan_jiffies period */
6951 if (priv->next_scan_jiffies &&
6952 time_after(priv->next_scan_jiffies, jiffies)) {
6956 /* if we just finished scan ask for delay for a broadcast scan */
6957 if ((len == 0) && priv->last_scan_jiffies &&
6958 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
6964 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
6965 print_ssid(ssid_buf, ssid, len), (int)len);
6967 priv->one_direct_scan = 1;
6968 priv->direct_ssid_len = (u8)
6969 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
6970 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
6972 priv->one_direct_scan = 0;
6974 rc = iwl3945_scan_initiate(priv);
6976 IWL_DEBUG_MAC80211("leave\n");
6979 spin_unlock_irqrestore(&priv->lock, flags);
6980 mutex_unlock(&priv->mutex);
6985 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
6986 const u8 *local_addr, const u8 *addr,
6987 struct ieee80211_key_conf *key)
6989 struct iwl3945_priv *priv = hw->priv;
6993 IWL_DEBUG_MAC80211("enter\n");
6995 if (!iwl3945_param_hwcrypto) {
6996 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7000 if (is_zero_ether_addr(addr))
7001 /* only support pairwise keys */
7004 sta_id = iwl3945_hw_find_station(priv, addr);
7005 if (sta_id == IWL_INVALID_STATION) {
7006 IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
7011 mutex_lock(&priv->mutex);
7013 iwl3945_scan_cancel_timeout(priv, 100);
7017 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
7019 iwl3945_set_rxon_hwcrypto(priv, 1);
7020 iwl3945_commit_rxon(priv);
7021 key->hw_key_idx = sta_id;
7022 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7023 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7027 rc = iwl3945_clear_sta_key_info(priv, sta_id);
7029 iwl3945_set_rxon_hwcrypto(priv, 0);
7030 iwl3945_commit_rxon(priv);
7031 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7038 IWL_DEBUG_MAC80211("leave\n");
7039 mutex_unlock(&priv->mutex);
7044 static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
7045 const struct ieee80211_tx_queue_params *params)
7047 struct iwl3945_priv *priv = hw->priv;
7048 unsigned long flags;
7051 IWL_DEBUG_MAC80211("enter\n");
7053 if (!iwl3945_is_ready_rf(priv)) {
7054 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7058 if (queue >= AC_NUM) {
7059 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7063 if (!priv->qos_data.qos_enable) {
7064 priv->qos_data.qos_active = 0;
7065 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7068 q = AC_NUM - 1 - queue;
7070 spin_lock_irqsave(&priv->lock, flags);
7072 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7073 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7074 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7075 priv->qos_data.def_qos_parm.ac[q].edca_txop =
7076 cpu_to_le16((params->txop * 32));
7078 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7079 priv->qos_data.qos_active = 1;
7081 spin_unlock_irqrestore(&priv->lock, flags);
7083 mutex_lock(&priv->mutex);
7084 if (priv->iw_mode == NL80211_IFTYPE_AP)
7085 iwl3945_activate_qos(priv, 1);
7086 else if (priv->assoc_id && iwl3945_is_associated(priv))
7087 iwl3945_activate_qos(priv, 0);
7089 mutex_unlock(&priv->mutex);
7091 IWL_DEBUG_MAC80211("leave\n");
7095 static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
7096 struct ieee80211_tx_queue_stats *stats)
7098 struct iwl3945_priv *priv = hw->priv;
7100 struct iwl3945_tx_queue *txq;
7101 struct iwl3945_queue *q;
7102 unsigned long flags;
7104 IWL_DEBUG_MAC80211("enter\n");
7106 if (!iwl3945_is_ready_rf(priv)) {
7107 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7111 spin_lock_irqsave(&priv->lock, flags);
7113 for (i = 0; i < AC_NUM; i++) {
7114 txq = &priv->txq[i];
7116 avail = iwl3945_queue_space(q);
7118 stats[i].len = q->n_window - avail;
7119 stats[i].limit = q->n_window - q->high_mark;
7120 stats[i].count = q->n_window;
7123 spin_unlock_irqrestore(&priv->lock, flags);
7125 IWL_DEBUG_MAC80211("leave\n");
7130 static int iwl3945_mac_get_stats(struct ieee80211_hw *hw,
7131 struct ieee80211_low_level_stats *stats)
7133 IWL_DEBUG_MAC80211("enter\n");
7134 IWL_DEBUG_MAC80211("leave\n");
7139 static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
7141 struct iwl3945_priv *priv = hw->priv;
7142 unsigned long flags;
7144 mutex_lock(&priv->mutex);
7145 IWL_DEBUG_MAC80211("enter\n");
7147 iwl3945_reset_qos(priv);
7149 spin_lock_irqsave(&priv->lock, flags);
7151 priv->assoc_capability = 0;
7152 priv->call_post_assoc_from_beacon = 0;
7154 /* new association get rid of ibss beacon skb */
7155 if (priv->ibss_beacon)
7156 dev_kfree_skb(priv->ibss_beacon);
7158 priv->ibss_beacon = NULL;
7160 priv->beacon_int = priv->hw->conf.beacon_int;
7161 priv->timestamp1 = 0;
7162 priv->timestamp0 = 0;
7163 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
7164 priv->beacon_int = 0;
7166 spin_unlock_irqrestore(&priv->lock, flags);
7168 if (!iwl3945_is_ready_rf(priv)) {
7169 IWL_DEBUG_MAC80211("leave - not ready\n");
7170 mutex_unlock(&priv->mutex);
7174 /* we are restarting association process
7175 * clear RXON_FILTER_ASSOC_MSK bit
7177 if (priv->iw_mode != NL80211_IFTYPE_AP) {
7178 iwl3945_scan_cancel_timeout(priv, 100);
7179 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7180 iwl3945_commit_rxon(priv);
7183 /* Per mac80211.h: This is only used in IBSS mode... */
7184 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
7186 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7187 mutex_unlock(&priv->mutex);
7191 iwl3945_set_rate(priv);
7193 mutex_unlock(&priv->mutex);
7195 IWL_DEBUG_MAC80211("leave\n");
7199 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
7201 struct iwl3945_priv *priv = hw->priv;
7202 unsigned long flags;
7204 IWL_DEBUG_MAC80211("enter\n");
7206 if (!iwl3945_is_ready_rf(priv)) {
7207 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7211 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
7212 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7216 spin_lock_irqsave(&priv->lock, flags);
7218 if (priv->ibss_beacon)
7219 dev_kfree_skb(priv->ibss_beacon);
7221 priv->ibss_beacon = skb;
7225 IWL_DEBUG_MAC80211("leave\n");
7226 spin_unlock_irqrestore(&priv->lock, flags);
7228 iwl3945_reset_qos(priv);
7230 iwl3945_post_associate(priv);
7236 /*****************************************************************************
7240 *****************************************************************************/
7242 #ifdef CONFIG_IWL3945_DEBUG
7245 * The following adds a new attribute to the sysfs representation
7246 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7247 * used for controlling the debug level.
7249 * See the level definitions in iwl for details.
7252 static ssize_t show_debug_level(struct device_driver *d, char *buf)
7254 return sprintf(buf, "0x%08X\n", iwl3945_debug_level);
7256 static ssize_t store_debug_level(struct device_driver *d,
7257 const char *buf, size_t count)
7259 char *p = (char *)buf;
7262 val = simple_strtoul(p, &p, 0);
7264 printk(KERN_INFO DRV_NAME
7265 ": %s is not in hex or decimal form.\n", buf);
7267 iwl3945_debug_level = val;
7269 return strnlen(buf, count);
7272 static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
7273 show_debug_level, store_debug_level);
7275 #endif /* CONFIG_IWL3945_DEBUG */
7277 static ssize_t show_temperature(struct device *d,
7278 struct device_attribute *attr, char *buf)
7280 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7282 if (!iwl3945_is_alive(priv))
7285 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
7288 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7290 static ssize_t show_tx_power(struct device *d,
7291 struct device_attribute *attr, char *buf)
7293 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7294 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7297 static ssize_t store_tx_power(struct device *d,
7298 struct device_attribute *attr,
7299 const char *buf, size_t count)
7301 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7302 char *p = (char *)buf;
7305 val = simple_strtoul(p, &p, 10);
7307 printk(KERN_INFO DRV_NAME
7308 ": %s is not in decimal form.\n", buf);
7310 iwl3945_hw_reg_set_txpower(priv, val);
7315 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7317 static ssize_t show_flags(struct device *d,
7318 struct device_attribute *attr, char *buf)
7320 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7322 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
7325 static ssize_t store_flags(struct device *d,
7326 struct device_attribute *attr,
7327 const char *buf, size_t count)
7329 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7330 u32 flags = simple_strtoul(buf, NULL, 0);
7332 mutex_lock(&priv->mutex);
7333 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
7334 /* Cancel any currently running scans... */
7335 if (iwl3945_scan_cancel_timeout(priv, 100))
7336 IWL_WARNING("Could not cancel scan.\n");
7338 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7340 priv->staging_rxon.flags = cpu_to_le32(flags);
7341 iwl3945_commit_rxon(priv);
7344 mutex_unlock(&priv->mutex);
7349 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7351 static ssize_t show_filter_flags(struct device *d,
7352 struct device_attribute *attr, char *buf)
7354 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7356 return sprintf(buf, "0x%04X\n",
7357 le32_to_cpu(priv->active_rxon.filter_flags));
7360 static ssize_t store_filter_flags(struct device *d,
7361 struct device_attribute *attr,
7362 const char *buf, size_t count)
7364 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7365 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7367 mutex_lock(&priv->mutex);
7368 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
7369 /* Cancel any currently running scans... */
7370 if (iwl3945_scan_cancel_timeout(priv, 100))
7371 IWL_WARNING("Could not cancel scan.\n");
7373 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7374 "0x%04X\n", filter_flags);
7375 priv->staging_rxon.filter_flags =
7376 cpu_to_le32(filter_flags);
7377 iwl3945_commit_rxon(priv);
7380 mutex_unlock(&priv->mutex);
7385 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7386 store_filter_flags);
7388 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7390 static ssize_t show_measurement(struct device *d,
7391 struct device_attribute *attr, char *buf)
7393 struct iwl3945_priv *priv = dev_get_drvdata(d);
7394 struct iwl3945_spectrum_notification measure_report;
7395 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7396 u8 *data = (u8 *)&measure_report;
7397 unsigned long flags;
7399 spin_lock_irqsave(&priv->lock, flags);
7400 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7401 spin_unlock_irqrestore(&priv->lock, flags);
7404 memcpy(&measure_report, &priv->measure_report, size);
7405 priv->measurement_status = 0;
7406 spin_unlock_irqrestore(&priv->lock, flags);
7408 while (size && (PAGE_SIZE - len)) {
7409 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7410 PAGE_SIZE - len, 1);
7412 if (PAGE_SIZE - len)
7416 size -= min(size, 16U);
7422 static ssize_t store_measurement(struct device *d,
7423 struct device_attribute *attr,
7424 const char *buf, size_t count)
7426 struct iwl3945_priv *priv = dev_get_drvdata(d);
7427 struct ieee80211_measurement_params params = {
7428 .channel = le16_to_cpu(priv->active_rxon.channel),
7429 .start_time = cpu_to_le64(priv->last_tsf),
7430 .duration = cpu_to_le16(1),
7432 u8 type = IWL_MEASURE_BASIC;
7438 strncpy(buffer, buf, min(sizeof(buffer), count));
7439 channel = simple_strtoul(p, NULL, 0);
7441 params.channel = channel;
7444 while (*p && *p != ' ')
7447 type = simple_strtoul(p + 1, NULL, 0);
7450 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7451 "channel %d (for '%s')\n", type, params.channel, buf);
7452 iwl3945_get_measurement(priv, ¶ms, type);
7457 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7458 show_measurement, store_measurement);
7459 #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
7461 static ssize_t store_retry_rate(struct device *d,
7462 struct device_attribute *attr,
7463 const char *buf, size_t count)
7465 struct iwl3945_priv *priv = dev_get_drvdata(d);
7467 priv->retry_rate = simple_strtoul(buf, NULL, 0);
7468 if (priv->retry_rate <= 0)
7469 priv->retry_rate = 1;
7474 static ssize_t show_retry_rate(struct device *d,
7475 struct device_attribute *attr, char *buf)
7477 struct iwl3945_priv *priv = dev_get_drvdata(d);
7478 return sprintf(buf, "%d", priv->retry_rate);
7481 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
7484 static ssize_t store_power_level(struct device *d,
7485 struct device_attribute *attr,
7486 const char *buf, size_t count)
7488 struct iwl3945_priv *priv = dev_get_drvdata(d);
7492 mode = simple_strtoul(buf, NULL, 0);
7493 mutex_lock(&priv->mutex);
7495 if (!iwl3945_is_ready(priv)) {
7500 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
7501 mode = IWL_POWER_AC;
7503 mode |= IWL_POWER_ENABLED;
7505 if (mode != priv->power_mode) {
7506 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
7508 IWL_DEBUG_MAC80211("failed setting power mode.\n");
7511 priv->power_mode = mode;
7517 mutex_unlock(&priv->mutex);
7521 #define MAX_WX_STRING 80
7523 /* Values are in microsecond */
7524 static const s32 timeout_duration[] = {
7531 static const s32 period_duration[] = {
7539 static ssize_t show_power_level(struct device *d,
7540 struct device_attribute *attr, char *buf)
7542 struct iwl3945_priv *priv = dev_get_drvdata(d);
7543 int level = IWL_POWER_LEVEL(priv->power_mode);
7546 p += sprintf(p, "%d ", level);
7548 case IWL_POWER_MODE_CAM:
7550 p += sprintf(p, "(AC)");
7552 case IWL_POWER_BATTERY:
7553 p += sprintf(p, "(BATTERY)");
7557 "(Timeout %dms, Period %dms)",
7558 timeout_duration[level - 1] / 1000,
7559 period_duration[level - 1] / 1000);
7562 if (!(priv->power_mode & IWL_POWER_ENABLED))
7563 p += sprintf(p, " OFF\n");
7565 p += sprintf(p, " \n");
7571 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
7574 static ssize_t show_channels(struct device *d,
7575 struct device_attribute *attr, char *buf)
7577 /* all this shit doesn't belong into sysfs anyway */
7581 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
7583 static ssize_t show_statistics(struct device *d,
7584 struct device_attribute *attr, char *buf)
7586 struct iwl3945_priv *priv = dev_get_drvdata(d);
7587 u32 size = sizeof(struct iwl3945_notif_statistics);
7588 u32 len = 0, ofs = 0;
7589 u8 *data = (u8 *)&priv->statistics;
7592 if (!iwl3945_is_alive(priv))
7595 mutex_lock(&priv->mutex);
7596 rc = iwl3945_send_statistics_request(priv);
7597 mutex_unlock(&priv->mutex);
7601 "Error sending statistics request: 0x%08X\n", rc);
7605 while (size && (PAGE_SIZE - len)) {
7606 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7607 PAGE_SIZE - len, 1);
7609 if (PAGE_SIZE - len)
7613 size -= min(size, 16U);
7619 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
7621 static ssize_t show_antenna(struct device *d,
7622 struct device_attribute *attr, char *buf)
7624 struct iwl3945_priv *priv = dev_get_drvdata(d);
7626 if (!iwl3945_is_alive(priv))
7629 return sprintf(buf, "%d\n", priv->antenna);
7632 static ssize_t store_antenna(struct device *d,
7633 struct device_attribute *attr,
7634 const char *buf, size_t count)
7637 struct iwl3945_priv *priv = dev_get_drvdata(d);
7642 if (sscanf(buf, "%1i", &ant) != 1) {
7643 IWL_DEBUG_INFO("not in hex or decimal form.\n");
7647 if ((ant >= 0) && (ant <= 2)) {
7648 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
7649 priv->antenna = (enum iwl3945_antenna)ant;
7651 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
7657 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
7659 static ssize_t show_status(struct device *d,
7660 struct device_attribute *attr, char *buf)
7662 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7663 if (!iwl3945_is_alive(priv))
7665 return sprintf(buf, "0x%08x\n", (int)priv->status);
7668 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
7670 static ssize_t dump_error_log(struct device *d,
7671 struct device_attribute *attr,
7672 const char *buf, size_t count)
7674 char *p = (char *)buf;
7677 iwl3945_dump_nic_error_log((struct iwl3945_priv *)d->driver_data);
7679 return strnlen(buf, count);
7682 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
7684 static ssize_t dump_event_log(struct device *d,
7685 struct device_attribute *attr,
7686 const char *buf, size_t count)
7688 char *p = (char *)buf;
7691 iwl3945_dump_nic_event_log((struct iwl3945_priv *)d->driver_data);
7693 return strnlen(buf, count);
7696 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
7698 /*****************************************************************************
7700 * driver setup and tear down
7702 *****************************************************************************/
7704 static void iwl3945_setup_deferred_work(struct iwl3945_priv *priv)
7706 priv->workqueue = create_workqueue(DRV_NAME);
7708 init_waitqueue_head(&priv->wait_command_queue);
7710 INIT_WORK(&priv->up, iwl3945_bg_up);
7711 INIT_WORK(&priv->restart, iwl3945_bg_restart);
7712 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
7713 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
7714 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
7715 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
7716 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
7717 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
7718 INIT_WORK(&priv->set_monitor, iwl3945_bg_set_monitor);
7719 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
7720 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
7721 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
7723 iwl3945_hw_setup_deferred_work(priv);
7725 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
7726 iwl3945_irq_tasklet, (unsigned long)priv);
7729 static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv)
7731 iwl3945_hw_cancel_deferred_work(priv);
7733 cancel_delayed_work_sync(&priv->init_alive_start);
7734 cancel_delayed_work(&priv->scan_check);
7735 cancel_delayed_work(&priv->alive_start);
7736 cancel_work_sync(&priv->beacon_update);
7739 static struct attribute *iwl3945_sysfs_entries[] = {
7740 &dev_attr_antenna.attr,
7741 &dev_attr_channels.attr,
7742 &dev_attr_dump_errors.attr,
7743 &dev_attr_dump_events.attr,
7744 &dev_attr_flags.attr,
7745 &dev_attr_filter_flags.attr,
7746 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7747 &dev_attr_measurement.attr,
7749 &dev_attr_power_level.attr,
7750 &dev_attr_retry_rate.attr,
7751 &dev_attr_statistics.attr,
7752 &dev_attr_status.attr,
7753 &dev_attr_temperature.attr,
7754 &dev_attr_tx_power.attr,
7759 static struct attribute_group iwl3945_attribute_group = {
7760 .name = NULL, /* put in device directory */
7761 .attrs = iwl3945_sysfs_entries,
7764 static struct ieee80211_ops iwl3945_hw_ops = {
7765 .tx = iwl3945_mac_tx,
7766 .start = iwl3945_mac_start,
7767 .stop = iwl3945_mac_stop,
7768 .add_interface = iwl3945_mac_add_interface,
7769 .remove_interface = iwl3945_mac_remove_interface,
7770 .config = iwl3945_mac_config,
7771 .config_interface = iwl3945_mac_config_interface,
7772 .configure_filter = iwl3945_configure_filter,
7773 .set_key = iwl3945_mac_set_key,
7774 .get_stats = iwl3945_mac_get_stats,
7775 .get_tx_stats = iwl3945_mac_get_tx_stats,
7776 .conf_tx = iwl3945_mac_conf_tx,
7777 .reset_tsf = iwl3945_mac_reset_tsf,
7778 .bss_info_changed = iwl3945_bss_info_changed,
7779 .hw_scan = iwl3945_mac_hw_scan
7782 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7785 struct iwl3945_priv *priv;
7786 struct ieee80211_hw *hw;
7787 struct iwl_3945_cfg *cfg = (struct iwl_3945_cfg *)(ent->driver_data);
7788 unsigned long flags;
7790 /* Disabling hardware scan means that mac80211 will perform scans
7791 * "the hard way", rather than using device's scan. */
7792 if (iwl3945_param_disable_hw_scan) {
7793 IWL_DEBUG_INFO("Disabling hw_scan\n");
7794 iwl3945_hw_ops.hw_scan = NULL;
7797 if ((iwl3945_param_queues_num > IWL39_MAX_NUM_QUEUES) ||
7798 (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
7799 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
7800 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
7805 /* mac80211 allocates memory for this device instance, including
7806 * space for this driver's private structure */
7807 hw = ieee80211_alloc_hw(sizeof(struct iwl3945_priv), &iwl3945_hw_ops);
7809 IWL_ERROR("Can not allocate network device\n");
7813 SET_IEEE80211_DEV(hw, &pdev->dev);
7815 hw->rate_control_algorithm = "iwl-3945-rs";
7816 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
7818 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
7822 priv->pci_dev = pdev;
7825 /* Select antenna (may be helpful if only one antenna is connected) */
7826 priv->antenna = (enum iwl3945_antenna)iwl3945_param_antenna;
7827 #ifdef CONFIG_IWL3945_DEBUG
7828 iwl3945_debug_level = iwl3945_param_debug;
7829 atomic_set(&priv->restrict_refcnt, 0);
7831 priv->retry_rate = 1;
7833 priv->ibss_beacon = NULL;
7835 /* Tell mac80211 our characteristics */
7836 hw->flags = IEEE80211_HW_SIGNAL_DBM |
7837 IEEE80211_HW_NOISE_DBM;
7839 hw->wiphy->interface_modes =
7840 BIT(NL80211_IFTYPE_AP) |
7841 BIT(NL80211_IFTYPE_STATION) |
7842 BIT(NL80211_IFTYPE_ADHOC);
7844 /* 4 EDCA QOS priorities */
7847 spin_lock_init(&priv->lock);
7848 spin_lock_init(&priv->power_data.lock);
7849 spin_lock_init(&priv->sta_lock);
7850 spin_lock_init(&priv->hcmd_lock);
7852 INIT_LIST_HEAD(&priv->free_frames);
7854 mutex_init(&priv->mutex);
7855 if (pci_enable_device(pdev)) {
7857 goto out_ieee80211_free_hw;
7860 pci_set_master(pdev);
7862 /* Clear the driver's (not device's) station table */
7863 iwl3945_clear_stations_table(priv);
7865 priv->data_retry_limit = -1;
7866 priv->ieee_channels = NULL;
7867 priv->ieee_rates = NULL;
7868 priv->band = IEEE80211_BAND_2GHZ;
7870 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
7872 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
7874 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
7875 goto out_pci_disable_device;
7878 pci_set_drvdata(pdev, priv);
7879 err = pci_request_regions(pdev, DRV_NAME);
7881 goto out_pci_disable_device;
7883 /* We disable the RETRY_TIMEOUT register (0x41) to keep
7884 * PCI Tx retries from interfering with C3 CPU state */
7885 pci_write_config_byte(pdev, 0x41, 0x00);
7887 priv->hw_base = pci_iomap(pdev, 0, 0);
7888 if (!priv->hw_base) {
7890 goto out_pci_release_regions;
7893 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
7894 (unsigned long long) pci_resource_len(pdev, 0));
7895 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
7897 /* Initialize module parameter values here */
7899 /* Disable radio (SW RF KILL) via parameter when loading driver */
7900 if (iwl3945_param_disable) {
7901 set_bit(STATUS_RF_KILL_SW, &priv->status);
7902 IWL_DEBUG_INFO("Radio disabled.\n");
7905 priv->iw_mode = NL80211_IFTYPE_STATION;
7907 printk(KERN_INFO DRV_NAME
7908 ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
7910 /* Device-specific setup */
7911 if (iwl3945_hw_set_hw_setting(priv)) {
7912 IWL_ERROR("failed to set hw settings\n");
7916 if (iwl3945_param_qos_enable)
7917 priv->qos_data.qos_enable = 1;
7919 iwl3945_reset_qos(priv);
7921 priv->qos_data.qos_active = 0;
7922 priv->qos_data.qos_cap.val = 0;
7924 iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
7925 iwl3945_setup_deferred_work(priv);
7926 iwl3945_setup_rx_handlers(priv);
7928 priv->rates_mask = IWL_RATES_MASK;
7929 /* If power management is turned on, default to AC mode */
7930 priv->power_mode = IWL_POWER_AC;
7931 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
7933 spin_lock_irqsave(&priv->lock, flags);
7934 iwl3945_disable_interrupts(priv);
7935 spin_unlock_irqrestore(&priv->lock, flags);
7937 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
7939 IWL_ERROR("failed to create sysfs device attributes\n");
7940 goto out_release_irq;
7944 iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
7945 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
7947 iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
7948 err = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
7949 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
7950 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
7952 IWL_DEBUG_INFO("Failed to init the card\n");
7953 goto out_remove_sysfs;
7955 /* Read the EEPROM */
7956 err = iwl3945_eeprom_init(priv);
7958 IWL_ERROR("Unable to init EEPROM\n");
7959 goto out_remove_sysfs;
7961 /* MAC Address location in EEPROM same for 3945/4965 */
7962 get_eeprom_mac(priv, priv->mac_addr);
7963 IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
7964 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
7966 err = iwl3945_init_channel_map(priv);
7968 IWL_ERROR("initializing regulatory failed: %d\n", err);
7969 goto out_remove_sysfs;
7972 err = iwl3945_init_geos(priv);
7974 IWL_ERROR("initializing geos failed: %d\n", err);
7975 goto out_free_channel_map;
7978 err = ieee80211_register_hw(priv->hw);
7980 IWL_ERROR("Failed to register network device (error %d)\n", err);
7984 priv->hw->conf.beacon_int = 100;
7985 priv->mac80211_registered = 1;
7986 pci_save_state(pdev);
7987 pci_disable_device(pdev);
7989 err = iwl3945_rfkill_init(priv);
7991 IWL_ERROR("Unable to initialize RFKILL system. "
7992 "Ignoring error: %d\n", err);
7997 iwl3945_free_geos(priv);
7998 out_free_channel_map:
7999 iwl3945_free_channel_map(priv);
8001 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8004 destroy_workqueue(priv->workqueue);
8005 priv->workqueue = NULL;
8006 iwl3945_unset_hw_setting(priv);
8009 pci_iounmap(pdev, priv->hw_base);
8010 out_pci_release_regions:
8011 pci_release_regions(pdev);
8012 out_pci_disable_device:
8013 pci_disable_device(pdev);
8014 pci_set_drvdata(pdev, NULL);
8015 out_ieee80211_free_hw:
8016 ieee80211_free_hw(priv->hw);
8021 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
8023 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8024 unsigned long flags;
8029 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8031 set_bit(STATUS_EXIT_PENDING, &priv->status);
8035 /* make sure we flush any pending irq or
8036 * tasklet for the driver
8038 spin_lock_irqsave(&priv->lock, flags);
8039 iwl3945_disable_interrupts(priv);
8040 spin_unlock_irqrestore(&priv->lock, flags);
8042 iwl_synchronize_irq(priv);
8044 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8046 iwl3945_rfkill_unregister(priv);
8047 iwl3945_dealloc_ucode_pci(priv);
8050 iwl3945_rx_queue_free(priv, &priv->rxq);
8051 iwl3945_hw_txq_ctx_free(priv);
8053 iwl3945_unset_hw_setting(priv);
8054 iwl3945_clear_stations_table(priv);
8056 if (priv->mac80211_registered)
8057 ieee80211_unregister_hw(priv->hw);
8059 /*netif_stop_queue(dev); */
8060 flush_workqueue(priv->workqueue);
8062 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
8063 * priv->workqueue... so we can't take down the workqueue
8065 destroy_workqueue(priv->workqueue);
8066 priv->workqueue = NULL;
8068 pci_iounmap(pdev, priv->hw_base);
8069 pci_release_regions(pdev);
8070 pci_disable_device(pdev);
8071 pci_set_drvdata(pdev, NULL);
8073 iwl3945_free_channel_map(priv);
8074 iwl3945_free_geos(priv);
8076 if (priv->ibss_beacon)
8077 dev_kfree_skb(priv->ibss_beacon);
8079 ieee80211_free_hw(priv->hw);
8084 static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
8086 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8088 if (priv->is_open) {
8089 set_bit(STATUS_IN_SUSPEND, &priv->status);
8090 iwl3945_mac_stop(priv->hw);
8094 pci_set_power_state(pdev, PCI_D3hot);
8099 static int iwl3945_pci_resume(struct pci_dev *pdev)
8101 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8103 pci_set_power_state(pdev, PCI_D0);
8106 iwl3945_mac_start(priv->hw);
8108 clear_bit(STATUS_IN_SUSPEND, &priv->status);
8112 #endif /* CONFIG_PM */
8114 /*************** RFKILL FUNCTIONS **********/
8115 #ifdef CONFIG_IWL3945_RFKILL
8116 /* software rf-kill from user */
8117 static int iwl3945_rfkill_soft_rf_kill(void *data, enum rfkill_state state)
8119 struct iwl3945_priv *priv = data;
8125 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
8128 IWL_DEBUG_RF_KILL("we received soft RFKILL set to state %d\n", state);
8129 mutex_lock(&priv->mutex);
8132 case RFKILL_STATE_UNBLOCKED:
8133 if (iwl3945_is_rfkill_hw(priv)) {
8137 iwl3945_radio_kill_sw(priv, 0);
8139 case RFKILL_STATE_SOFT_BLOCKED:
8140 iwl3945_radio_kill_sw(priv, 1);
8143 IWL_WARNING("we received unexpected RFKILL state %d\n", state);
8147 mutex_unlock(&priv->mutex);
8152 int iwl3945_rfkill_init(struct iwl3945_priv *priv)
8154 struct device *device = wiphy_dev(priv->hw->wiphy);
8157 BUG_ON(device == NULL);
8159 IWL_DEBUG_RF_KILL("Initializing RFKILL.\n");
8160 priv->rfkill = rfkill_allocate(device, RFKILL_TYPE_WLAN);
8161 if (!priv->rfkill) {
8162 IWL_ERROR("Unable to allocate rfkill device.\n");
8167 priv->rfkill->name = priv->cfg->name;
8168 priv->rfkill->data = priv;
8169 priv->rfkill->state = RFKILL_STATE_UNBLOCKED;
8170 priv->rfkill->toggle_radio = iwl3945_rfkill_soft_rf_kill;
8171 priv->rfkill->user_claim_unsupported = 1;
8173 priv->rfkill->dev.class->suspend = NULL;
8174 priv->rfkill->dev.class->resume = NULL;
8176 ret = rfkill_register(priv->rfkill);
8178 IWL_ERROR("Unable to register rfkill: %d\n", ret);
8182 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
8186 if (priv->rfkill != NULL)
8187 rfkill_free(priv->rfkill);
8188 priv->rfkill = NULL;
8191 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
8195 void iwl3945_rfkill_unregister(struct iwl3945_priv *priv)
8198 rfkill_unregister(priv->rfkill);
8200 priv->rfkill = NULL;
8203 /* set rf-kill to the right state. */
8204 void iwl3945_rfkill_set_hw_state(struct iwl3945_priv *priv)
8210 if (iwl3945_is_rfkill_hw(priv)) {
8211 rfkill_force_state(priv->rfkill, RFKILL_STATE_HARD_BLOCKED);
8215 if (!iwl3945_is_rfkill_sw(priv))
8216 rfkill_force_state(priv->rfkill, RFKILL_STATE_UNBLOCKED);
8218 rfkill_force_state(priv->rfkill, RFKILL_STATE_SOFT_BLOCKED);
8222 /*****************************************************************************
8224 * driver and module entry point
8226 *****************************************************************************/
8228 static struct pci_driver iwl3945_driver = {
8230 .id_table = iwl3945_hw_card_ids,
8231 .probe = iwl3945_pci_probe,
8232 .remove = __devexit_p(iwl3945_pci_remove),
8234 .suspend = iwl3945_pci_suspend,
8235 .resume = iwl3945_pci_resume,
8239 static int __init iwl3945_init(void)
8243 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8244 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
8246 ret = iwl3945_rate_control_register();
8248 IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
8252 ret = pci_register_driver(&iwl3945_driver);
8254 IWL_ERROR("Unable to initialize PCI module\n");
8255 goto error_register;
8257 #ifdef CONFIG_IWL3945_DEBUG
8258 ret = driver_create_file(&iwl3945_driver.driver, &driver_attr_debug_level);
8260 IWL_ERROR("Unable to create driver sysfs file\n");
8267 #ifdef CONFIG_IWL3945_DEBUG
8269 pci_unregister_driver(&iwl3945_driver);
8272 iwl3945_rate_control_unregister();
8276 static void __exit iwl3945_exit(void)
8278 #ifdef CONFIG_IWL3945_DEBUG
8279 driver_remove_file(&iwl3945_driver.driver, &driver_attr_debug_level);
8281 pci_unregister_driver(&iwl3945_driver);
8282 iwl3945_rate_control_unregister();
8285 MODULE_FIRMWARE("iwlwifi-3945" IWL3945_UCODE_API ".ucode");
8287 module_param_named(antenna, iwl3945_param_antenna, int, 0444);
8288 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
8289 module_param_named(disable, iwl3945_param_disable, int, 0444);
8290 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
8291 module_param_named(hwcrypto, iwl3945_param_hwcrypto, int, 0444);
8292 MODULE_PARM_DESC(hwcrypto,
8293 "using hardware crypto engine (default 0 [software])\n");
8294 module_param_named(debug, iwl3945_param_debug, int, 0444);
8295 MODULE_PARM_DESC(debug, "debug output mask");
8296 module_param_named(disable_hw_scan, iwl3945_param_disable_hw_scan, int, 0444);
8297 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8299 module_param_named(queues_num, iwl3945_param_queues_num, int, 0444);
8300 MODULE_PARM_DESC(queues_num, "number of hw queues.");
8303 module_param_named(qos_enable, iwl3945_param_qos_enable, int, 0444);
8304 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
8306 module_exit(iwl3945_exit);
8307 module_init(iwl3945_init);