Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/mason/btrfs...
[linux-2.6] / arch / powerpc / boot / dts / mpc834x_mds.dts
1 /*
2  * MPC8349E MDS Device Tree Source
3  *
4  * Copyright 2005, 2006 Freescale Semiconductor Inc.
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  */
11
12 /dts-v1/;
13
14 / {
15         model = "MPC8349EMDS";
16         compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
17         #address-cells = <1>;
18         #size-cells = <1>;
19
20         aliases {
21                 ethernet0 = &enet0;
22                 ethernet1 = &enet1;
23                 serial0 = &serial0;
24                 serial1 = &serial1;
25                 pci0 = &pci0;
26                 pci1 = &pci1;
27         };
28
29         cpus {
30                 #address-cells = <1>;
31                 #size-cells = <0>;
32
33                 PowerPC,8349@0 {
34                         device_type = "cpu";
35                         reg = <0x0>;
36                         d-cache-line-size = <32>;
37                         i-cache-line-size = <32>;
38                         d-cache-size = <32768>;
39                         i-cache-size = <32768>;
40                         timebase-frequency = <0>;       // from bootloader
41                         bus-frequency = <0>;            // from bootloader
42                         clock-frequency = <0>;          // from bootloader
43                 };
44         };
45
46         memory {
47                 device_type = "memory";
48                 reg = <0x00000000 0x10000000>;  // 256MB at 0
49         };
50
51         bcsr@e2400000 {
52                 compatible = "fsl,mpc8349mds-bcsr";
53                 reg = <0xe2400000 0x8000>;
54         };
55
56         soc8349@e0000000 {
57                 #address-cells = <1>;
58                 #size-cells = <1>;
59                 device_type = "soc";
60                 compatible = "simple-bus";
61                 ranges = <0x0 0xe0000000 0x00100000>;
62                 reg = <0xe0000000 0x00000200>;
63                 bus-frequency = <0>;
64
65                 wdt@200 {
66                         device_type = "watchdog";
67                         compatible = "mpc83xx_wdt";
68                         reg = <0x200 0x100>;
69                 };
70
71                 i2c@3000 {
72                         #address-cells = <1>;
73                         #size-cells = <0>;
74                         cell-index = <0>;
75                         compatible = "fsl-i2c";
76                         reg = <0x3000 0x100>;
77                         interrupts = <14 0x8>;
78                         interrupt-parent = <&ipic>;
79                         dfsrr;
80
81                         rtc@68 {
82                                 compatible = "dallas,ds1374";
83                                 reg = <0x68>;
84                         };
85                 };
86
87                 i2c@3100 {
88                         #address-cells = <1>;
89                         #size-cells = <0>;
90                         cell-index = <1>;
91                         compatible = "fsl-i2c";
92                         reg = <0x3100 0x100>;
93                         interrupts = <15 0x8>;
94                         interrupt-parent = <&ipic>;
95                         dfsrr;
96                 };
97
98                 spi@7000 {
99                         cell-index = <0>;
100                         compatible = "fsl,spi";
101                         reg = <0x7000 0x1000>;
102                         interrupts = <16 0x8>;
103                         interrupt-parent = <&ipic>;
104                         mode = "cpu";
105                 };
106
107                 dma@82a8 {
108                         #address-cells = <1>;
109                         #size-cells = <1>;
110                         compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
111                         reg = <0x82a8 4>;
112                         ranges = <0 0x8100 0x1a8>;
113                         interrupt-parent = <&ipic>;
114                         interrupts = <71 8>;
115                         cell-index = <0>;
116                         dma-channel@0 {
117                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
118                                 reg = <0 0x80>;
119                                 cell-index = <0>;
120                                 interrupt-parent = <&ipic>;
121                                 interrupts = <71 8>;
122                         };
123                         dma-channel@80 {
124                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
125                                 reg = <0x80 0x80>;
126                                 cell-index = <1>;
127                                 interrupt-parent = <&ipic>;
128                                 interrupts = <71 8>;
129                         };
130                         dma-channel@100 {
131                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
132                                 reg = <0x100 0x80>;
133                                 cell-index = <2>;
134                                 interrupt-parent = <&ipic>;
135                                 interrupts = <71 8>;
136                         };
137                         dma-channel@180 {
138                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
139                                 reg = <0x180 0x28>;
140                                 cell-index = <3>;
141                                 interrupt-parent = <&ipic>;
142                                 interrupts = <71 8>;
143                         };
144                 };
145
146                 /* phy type (ULPI or SERIAL) are only types supported for MPH */
147                 /* port = 0 or 1 */
148                 usb@22000 {
149                         compatible = "fsl-usb2-mph";
150                         reg = <0x22000 0x1000>;
151                         #address-cells = <1>;
152                         #size-cells = <0>;
153                         interrupt-parent = <&ipic>;
154                         interrupts = <39 0x8>;
155                         phy_type = "ulpi";
156                         port1;
157                 };
158                 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
159                 usb@23000 {
160                         compatible = "fsl-usb2-dr";
161                         reg = <0x23000 0x1000>;
162                         #address-cells = <1>;
163                         #size-cells = <0>;
164                         interrupt-parent = <&ipic>;
165                         interrupts = <38 0x8>;
166                         dr_mode = "otg";
167                         phy_type = "ulpi";
168                 };
169
170                 mdio@24520 {
171                         #address-cells = <1>;
172                         #size-cells = <0>;
173                         compatible = "fsl,gianfar-mdio";
174                         reg = <0x24520 0x20>;
175
176                         phy0: ethernet-phy@0 {
177                                 interrupt-parent = <&ipic>;
178                                 interrupts = <17 0x8>;
179                                 reg = <0x0>;
180                                 device_type = "ethernet-phy";
181                         };
182                         phy1: ethernet-phy@1 {
183                                 interrupt-parent = <&ipic>;
184                                 interrupts = <18 0x8>;
185                                 reg = <0x1>;
186                                 device_type = "ethernet-phy";
187                         };
188                         tbi0: tbi-phy@11 {
189                                 reg = <0x11>;
190                                 device_type = "tbi-phy";
191                         };
192                 };
193
194                 mdio@25520 {
195                         #address-cells = <1>;
196                         #size-cells = <0>;
197                         compatible = "fsl,gianfar-tbi";
198                         reg = <0x25520 0x20>;
199
200                         tbi1: tbi-phy@11 {
201                                 reg = <0x11>;
202                                 device_type = "tbi-phy";
203                         };
204                 };
205
206
207                 enet0: ethernet@24000 {
208                         cell-index = <0>;
209                         device_type = "network";
210                         model = "TSEC";
211                         compatible = "gianfar";
212                         reg = <0x24000 0x1000>;
213                         local-mac-address = [ 00 00 00 00 00 00 ];
214                         interrupts = <32 0x8 33 0x8 34 0x8>;
215                         interrupt-parent = <&ipic>;
216                         tbi-handle = <&tbi0>;
217                         phy-handle = <&phy0>;
218                         linux,network-index = <0>;
219                 };
220
221                 enet1: ethernet@25000 {
222                         cell-index = <1>;
223                         device_type = "network";
224                         model = "TSEC";
225                         compatible = "gianfar";
226                         reg = <0x25000 0x1000>;
227                         local-mac-address = [ 00 00 00 00 00 00 ];
228                         interrupts = <35 0x8 36 0x8 37 0x8>;
229                         interrupt-parent = <&ipic>;
230                         tbi-handle = <&tbi1>;
231                         phy-handle = <&phy1>;
232                         linux,network-index = <1>;
233                 };
234
235                 serial0: serial@4500 {
236                         cell-index = <0>;
237                         device_type = "serial";
238                         compatible = "ns16550";
239                         reg = <0x4500 0x100>;
240                         clock-frequency = <0>;
241                         interrupts = <9 0x8>;
242                         interrupt-parent = <&ipic>;
243                 };
244
245                 serial1: serial@4600 {
246                         cell-index = <1>;
247                         device_type = "serial";
248                         compatible = "ns16550";
249                         reg = <0x4600 0x100>;
250                         clock-frequency = <0>;
251                         interrupts = <10 0x8>;
252                         interrupt-parent = <&ipic>;
253                 };
254
255                 crypto@30000 {
256                         compatible = "fsl,sec2.0";
257                         reg = <0x30000 0x10000>;
258                         interrupts = <11 0x8>;
259                         interrupt-parent = <&ipic>;
260                         fsl,num-channels = <4>;
261                         fsl,channel-fifo-len = <24>;
262                         fsl,exec-units-mask = <0x7e>;
263                         fsl,descriptor-types-mask = <0x01010ebf>;
264                 };
265
266                 /* IPIC
267                  * interrupts cell = <intr #, sense>
268                  * sense values match linux IORESOURCE_IRQ_* defines:
269                  * sense == 8: Level, low assertion
270                  * sense == 2: Edge, high-to-low change
271                  */
272                 ipic: pic@700 {
273                         interrupt-controller;
274                         #address-cells = <0>;
275                         #interrupt-cells = <2>;
276                         reg = <0x700 0x100>;
277                         device_type = "ipic";
278                 };
279         };
280
281         pci0: pci@e0008500 {
282                 cell-index = <1>;
283                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
284                 interrupt-map = <
285
286                                 /* IDSEL 0x11 */
287                                  0x8800 0x0 0x0 0x1 &ipic 20 0x8
288                                  0x8800 0x0 0x0 0x2 &ipic 21 0x8
289                                  0x8800 0x0 0x0 0x3 &ipic 22 0x8
290                                  0x8800 0x0 0x0 0x4 &ipic 23 0x8
291
292                                 /* IDSEL 0x12 */
293                                  0x9000 0x0 0x0 0x1 &ipic 22 0x8
294                                  0x9000 0x0 0x0 0x2 &ipic 23 0x8
295                                  0x9000 0x0 0x0 0x3 &ipic 20 0x8
296                                  0x9000 0x0 0x0 0x4 &ipic 21 0x8
297
298                                 /* IDSEL 0x13 */
299                                  0x9800 0x0 0x0 0x1 &ipic 23 0x8
300                                  0x9800 0x0 0x0 0x2 &ipic 20 0x8
301                                  0x9800 0x0 0x0 0x3 &ipic 21 0x8
302                                  0x9800 0x0 0x0 0x4 &ipic 22 0x8
303
304                                 /* IDSEL 0x15 */
305                                  0xa800 0x0 0x0 0x1 &ipic 20 0x8
306                                  0xa800 0x0 0x0 0x2 &ipic 21 0x8
307                                  0xa800 0x0 0x0 0x3 &ipic 22 0x8
308                                  0xa800 0x0 0x0 0x4 &ipic 23 0x8
309
310                                 /* IDSEL 0x16 */
311                                  0xb000 0x0 0x0 0x1 &ipic 23 0x8
312                                  0xb000 0x0 0x0 0x2 &ipic 20 0x8
313                                  0xb000 0x0 0x0 0x3 &ipic 21 0x8
314                                  0xb000 0x0 0x0 0x4 &ipic 22 0x8
315
316                                 /* IDSEL 0x17 */
317                                  0xb800 0x0 0x0 0x1 &ipic 22 0x8
318                                  0xb800 0x0 0x0 0x2 &ipic 23 0x8
319                                  0xb800 0x0 0x0 0x3 &ipic 20 0x8
320                                  0xb800 0x0 0x0 0x4 &ipic 21 0x8
321
322                                 /* IDSEL 0x18 */
323                                  0xc000 0x0 0x0 0x1 &ipic 21 0x8
324                                  0xc000 0x0 0x0 0x2 &ipic 22 0x8
325                                  0xc000 0x0 0x0 0x3 &ipic 23 0x8
326                                  0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
327                 interrupt-parent = <&ipic>;
328                 interrupts = <66 0x8>;
329                 bus-range = <0 0>;
330                 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
331                           0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
332                           0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
333                 clock-frequency = <66666666>;
334                 #interrupt-cells = <1>;
335                 #size-cells = <2>;
336                 #address-cells = <3>;
337                 reg = <0xe0008500 0x100         /* internal registers */
338                        0xe0008300 0x8>;         /* config space access registers */
339                 compatible = "fsl,mpc8349-pci";
340                 device_type = "pci";
341         };
342
343         pci1: pci@e0008600 {
344                 cell-index = <2>;
345                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
346                 interrupt-map = <
347
348                                 /* IDSEL 0x11 */
349                                  0x8800 0x0 0x0 0x1 &ipic 20 0x8
350                                  0x8800 0x0 0x0 0x2 &ipic 21 0x8
351                                  0x8800 0x0 0x0 0x3 &ipic 22 0x8
352                                  0x8800 0x0 0x0 0x4 &ipic 23 0x8
353
354                                 /* IDSEL 0x12 */
355                                  0x9000 0x0 0x0 0x1 &ipic 22 0x8
356                                  0x9000 0x0 0x0 0x2 &ipic 23 0x8
357                                  0x9000 0x0 0x0 0x3 &ipic 20 0x8
358                                  0x9000 0x0 0x0 0x4 &ipic 21 0x8
359
360                                 /* IDSEL 0x13 */
361                                  0x9800 0x0 0x0 0x1 &ipic 23 0x8
362                                  0x9800 0x0 0x0 0x2 &ipic 20 0x8
363                                  0x9800 0x0 0x0 0x3 &ipic 21 0x8
364                                  0x9800 0x0 0x0 0x4 &ipic 22 0x8
365
366                                 /* IDSEL 0x15 */
367                                  0xa800 0x0 0x0 0x1 &ipic 20 0x8
368                                  0xa800 0x0 0x0 0x2 &ipic 21 0x8
369                                  0xa800 0x0 0x0 0x3 &ipic 22 0x8
370                                  0xa800 0x0 0x0 0x4 &ipic 23 0x8
371
372                                 /* IDSEL 0x16 */
373                                  0xb000 0x0 0x0 0x1 &ipic 23 0x8
374                                  0xb000 0x0 0x0 0x2 &ipic 20 0x8
375                                  0xb000 0x0 0x0 0x3 &ipic 21 0x8
376                                  0xb000 0x0 0x0 0x4 &ipic 22 0x8
377
378                                 /* IDSEL 0x17 */
379                                  0xb800 0x0 0x0 0x1 &ipic 22 0x8
380                                  0xb800 0x0 0x0 0x2 &ipic 23 0x8
381                                  0xb800 0x0 0x0 0x3 &ipic 20 0x8
382                                  0xb800 0x0 0x0 0x4 &ipic 21 0x8
383
384                                 /* IDSEL 0x18 */
385                                  0xc000 0x0 0x0 0x1 &ipic 21 0x8
386                                  0xc000 0x0 0x0 0x2 &ipic 22 0x8
387                                  0xc000 0x0 0x0 0x3 &ipic 23 0x8
388                                  0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
389                 interrupt-parent = <&ipic>;
390                 interrupts = <67 0x8>;
391                 bus-range = <0 0>;
392                 ranges = <0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
393                           0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
394                           0x01000000 0x0 0x00000000 0xe2100000 0x0 0x00100000>;
395                 clock-frequency = <66666666>;
396                 #interrupt-cells = <1>;
397                 #size-cells = <2>;
398                 #address-cells = <3>;
399                 reg = <0xe0008600 0x100         /* internal registers */
400                        0xe0008380 0x8>;         /* config space access registers */
401                 compatible = "fsl,mpc8349-pci";
402                 device_type = "pci";
403         };
404 };