2 * linux/arch/arm/mach-realview/platsmp.c
4 * Copyright (C) 2002 ARM Ltd.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #include <linux/init.h>
12 #include <linux/errno.h>
13 #include <linux/delay.h>
14 #include <linux/device.h>
15 #include <linux/smp.h>
17 #include <asm/cacheflush.h>
18 #include <asm/hardware/arm_scu.h>
19 #include <asm/hardware.h>
23 extern void realview_secondary_startup(void);
26 * control for which core is the next to come out of the secondary
29 volatile int __cpuinitdata pen_release = -1;
31 static unsigned int __init get_core_count(void)
35 ncores = __raw_readl(__io_address(REALVIEW_MPCORE_SCU_BASE) + SCU_CONFIG);
37 return (ncores & 0x03) + 1;
40 static DEFINE_SPINLOCK(boot_lock);
42 void __cpuinit platform_secondary_init(unsigned int cpu)
45 * the primary core may have used a "cross call" soft interrupt
46 * to get this processor out of WFI in the BootMonitor - make
47 * sure that we are no longer being sent this soft interrupt
49 smp_cross_call_done(cpumask_of_cpu(cpu));
52 * if any interrupts are already enabled for the primary
53 * core (e.g. timer irq), then they will not have been enabled
56 gic_cpu_init(__io_address(REALVIEW_GIC_CPU_BASE));
59 * let the primary processor know we're out of the
60 * pen, then head off into the C entry point
65 * Synchronise with the boot thread.
67 spin_lock(&boot_lock);
68 spin_unlock(&boot_lock);
71 int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
73 unsigned long timeout;
76 * set synchronisation state between this boot processor
77 * and the secondary one
79 spin_lock(&boot_lock);
82 * The secondary processor is waiting to be released from
83 * the holding pen - release it, then wait for it to flag
84 * that it has been released by resetting pen_release.
86 * Note that "pen_release" is the hardware CPU ID, whereas
87 * "cpu" is Linux's internal ID.
95 * This is a later addition to the booting protocol: the
96 * bootMonitor now puts secondary cores into WFI, so
97 * poke_milo() no longer gets the cores moving; we need
98 * to send a soft interrupt to wake the secondary core.
99 * Use smp_cross_call() for this, since there's little
100 * point duplicating the code here
102 smp_cross_call(cpumask_of_cpu(cpu));
104 timeout = jiffies + (1 * HZ);
105 while (time_before(jiffies, timeout)) {
106 if (pen_release == -1)
113 * now the secondary core is starting up let it run its
114 * calibrations, then wait for it to finish
116 spin_unlock(&boot_lock);
118 return pen_release != -1 ? -ENOSYS : 0;
121 static void __init poke_milo(void)
123 extern void secondary_startup(void);
125 /* nobody is to be released from the pen yet */
129 * write the address of secondary startup into the system-wide
130 * flags register, then clear the bottom two bits, which is what
131 * BootMonitor is waiting for
134 #define REALVIEW_SYS_FLAGSS_OFFSET 0x30
135 __raw_writel(virt_to_phys(realview_secondary_startup),
136 __io_address(REALVIEW_SYS_BASE) +
137 REALVIEW_SYS_FLAGSS_OFFSET);
138 #define REALVIEW_SYS_FLAGSC_OFFSET 0x34
140 __io_address(REALVIEW_SYS_BASE) +
141 REALVIEW_SYS_FLAGSC_OFFSET);
147 void __init smp_prepare_cpus(unsigned int max_cpus)
149 unsigned int ncores = get_core_count();
150 unsigned int cpu = smp_processor_id();
156 "Realview: strange CM count of 0? Default to 1\n");
161 if (ncores > NR_CPUS) {
163 "Realview: no. of cores (%d) greater than configured "
164 "maximum of %d - clipping\n",
169 smp_store_cpu_info(cpu);
172 * are we trying to boot more cores than exist?
174 if (max_cpus > ncores)
178 * Enable the local timer for primary CPU
180 local_timer_setup(cpu);
183 * Initialise the possible/present maps.
184 * cpu_possible_map describes the set of CPUs which may be present
185 * cpu_present_map describes the set of CPUs populated
187 for (i = 0; i < max_cpus; i++) {
188 cpu_set(i, cpu_possible_map);
189 cpu_set(i, cpu_present_map);
193 * Do we need any more CPUs? If so, then let them know where
194 * to start. Note that, on modern versions of MILO, the "poke"
195 * doesn't actually do anything until each individual core is
196 * sent a soft interrupt to get it out of WFI