2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
41 #include <asm/uaccess.h>
46 #define MAX_IO_MSRS 256
47 #define CR0_RESERVED_BITS \
48 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
49 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
50 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
51 #define CR4_RESERVED_BITS \
52 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
53 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
54 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
55 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
57 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
59 * - enable syscall per default because its emulated by KVM
60 * - enable LME and LMA per default on 64 bit KVM
63 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
65 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
68 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
69 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
71 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
72 struct kvm_cpuid_entry2 __user *entries);
73 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
74 u32 function, u32 index);
76 struct kvm_x86_ops *kvm_x86_ops;
77 EXPORT_SYMBOL_GPL(kvm_x86_ops);
79 struct kvm_stats_debugfs_item debugfs_entries[] = {
80 { "pf_fixed", VCPU_STAT(pf_fixed) },
81 { "pf_guest", VCPU_STAT(pf_guest) },
82 { "tlb_flush", VCPU_STAT(tlb_flush) },
83 { "invlpg", VCPU_STAT(invlpg) },
84 { "exits", VCPU_STAT(exits) },
85 { "io_exits", VCPU_STAT(io_exits) },
86 { "mmio_exits", VCPU_STAT(mmio_exits) },
87 { "signal_exits", VCPU_STAT(signal_exits) },
88 { "irq_window", VCPU_STAT(irq_window_exits) },
89 { "nmi_window", VCPU_STAT(nmi_window_exits) },
90 { "halt_exits", VCPU_STAT(halt_exits) },
91 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
92 { "hypercalls", VCPU_STAT(hypercalls) },
93 { "request_irq", VCPU_STAT(request_irq_exits) },
94 { "request_nmi", VCPU_STAT(request_nmi_exits) },
95 { "irq_exits", VCPU_STAT(irq_exits) },
96 { "host_state_reload", VCPU_STAT(host_state_reload) },
97 { "efer_reload", VCPU_STAT(efer_reload) },
98 { "fpu_reload", VCPU_STAT(fpu_reload) },
99 { "insn_emulation", VCPU_STAT(insn_emulation) },
100 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
101 { "irq_injections", VCPU_STAT(irq_injections) },
102 { "nmi_injections", VCPU_STAT(nmi_injections) },
103 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
104 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
105 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
106 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
107 { "mmu_flooded", VM_STAT(mmu_flooded) },
108 { "mmu_recycled", VM_STAT(mmu_recycled) },
109 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
110 { "mmu_unsync", VM_STAT(mmu_unsync) },
111 { "mmu_unsync_global", VM_STAT(mmu_unsync_global) },
112 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
113 { "largepages", VM_STAT(lpages) },
117 unsigned long segment_base(u16 selector)
119 struct descriptor_table gdt;
120 struct desc_struct *d;
121 unsigned long table_base;
127 asm("sgdt %0" : "=m"(gdt));
128 table_base = gdt.base;
130 if (selector & 4) { /* from ldt */
133 asm("sldt %0" : "=g"(ldt_selector));
134 table_base = segment_base(ldt_selector);
136 d = (struct desc_struct *)(table_base + (selector & ~7));
137 v = d->base0 | ((unsigned long)d->base1 << 16) |
138 ((unsigned long)d->base2 << 24);
140 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
141 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
145 EXPORT_SYMBOL_GPL(segment_base);
147 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
149 if (irqchip_in_kernel(vcpu->kvm))
150 return vcpu->arch.apic_base;
152 return vcpu->arch.apic_base;
154 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
156 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
158 /* TODO: reserve bits check */
159 if (irqchip_in_kernel(vcpu->kvm))
160 kvm_lapic_set_base(vcpu, data);
162 vcpu->arch.apic_base = data;
164 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
166 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
168 WARN_ON(vcpu->arch.exception.pending);
169 vcpu->arch.exception.pending = true;
170 vcpu->arch.exception.has_error_code = false;
171 vcpu->arch.exception.nr = nr;
173 EXPORT_SYMBOL_GPL(kvm_queue_exception);
175 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
178 ++vcpu->stat.pf_guest;
180 if (vcpu->arch.exception.pending) {
181 if (vcpu->arch.exception.nr == PF_VECTOR) {
182 printk(KERN_DEBUG "kvm: inject_page_fault:"
183 " double fault 0x%lx\n", addr);
184 vcpu->arch.exception.nr = DF_VECTOR;
185 vcpu->arch.exception.error_code = 0;
186 } else if (vcpu->arch.exception.nr == DF_VECTOR) {
187 /* triple fault -> shutdown */
188 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
192 vcpu->arch.cr2 = addr;
193 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
196 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
198 vcpu->arch.nmi_pending = 1;
200 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
202 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
204 WARN_ON(vcpu->arch.exception.pending);
205 vcpu->arch.exception.pending = true;
206 vcpu->arch.exception.has_error_code = true;
207 vcpu->arch.exception.nr = nr;
208 vcpu->arch.exception.error_code = error_code;
210 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
212 static void __queue_exception(struct kvm_vcpu *vcpu)
214 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
215 vcpu->arch.exception.has_error_code,
216 vcpu->arch.exception.error_code);
220 * Load the pae pdptrs. Return true is they are all valid.
222 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
224 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
225 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
228 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
230 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
231 offset * sizeof(u64), sizeof(pdpte));
236 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
237 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
244 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
249 EXPORT_SYMBOL_GPL(load_pdptrs);
251 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
253 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
257 if (is_long_mode(vcpu) || !is_pae(vcpu))
260 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
263 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
269 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
271 if (cr0 & CR0_RESERVED_BITS) {
272 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
273 cr0, vcpu->arch.cr0);
274 kvm_inject_gp(vcpu, 0);
278 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
279 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
280 kvm_inject_gp(vcpu, 0);
284 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
285 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
286 "and a clear PE flag\n");
287 kvm_inject_gp(vcpu, 0);
291 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
293 if ((vcpu->arch.shadow_efer & EFER_LME)) {
297 printk(KERN_DEBUG "set_cr0: #GP, start paging "
298 "in long mode while PAE is disabled\n");
299 kvm_inject_gp(vcpu, 0);
302 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
304 printk(KERN_DEBUG "set_cr0: #GP, start paging "
305 "in long mode while CS.L == 1\n");
306 kvm_inject_gp(vcpu, 0);
312 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
313 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
315 kvm_inject_gp(vcpu, 0);
321 kvm_x86_ops->set_cr0(vcpu, cr0);
322 vcpu->arch.cr0 = cr0;
324 kvm_mmu_sync_global(vcpu);
325 kvm_mmu_reset_context(vcpu);
328 EXPORT_SYMBOL_GPL(kvm_set_cr0);
330 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
332 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
333 KVMTRACE_1D(LMSW, vcpu,
334 (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
337 EXPORT_SYMBOL_GPL(kvm_lmsw);
339 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
341 unsigned long old_cr4 = vcpu->arch.cr4;
342 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
344 if (cr4 & CR4_RESERVED_BITS) {
345 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
346 kvm_inject_gp(vcpu, 0);
350 if (is_long_mode(vcpu)) {
351 if (!(cr4 & X86_CR4_PAE)) {
352 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
354 kvm_inject_gp(vcpu, 0);
357 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
358 && ((cr4 ^ old_cr4) & pdptr_bits)
359 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
360 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
361 kvm_inject_gp(vcpu, 0);
365 if (cr4 & X86_CR4_VMXE) {
366 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
367 kvm_inject_gp(vcpu, 0);
370 kvm_x86_ops->set_cr4(vcpu, cr4);
371 vcpu->arch.cr4 = cr4;
372 vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
373 kvm_mmu_sync_global(vcpu);
374 kvm_mmu_reset_context(vcpu);
376 EXPORT_SYMBOL_GPL(kvm_set_cr4);
378 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
380 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
381 kvm_mmu_sync_roots(vcpu);
382 kvm_mmu_flush_tlb(vcpu);
386 if (is_long_mode(vcpu)) {
387 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
388 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
389 kvm_inject_gp(vcpu, 0);
394 if (cr3 & CR3_PAE_RESERVED_BITS) {
396 "set_cr3: #GP, reserved bits\n");
397 kvm_inject_gp(vcpu, 0);
400 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
401 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
403 kvm_inject_gp(vcpu, 0);
408 * We don't check reserved bits in nonpae mode, because
409 * this isn't enforced, and VMware depends on this.
414 * Does the new cr3 value map to physical memory? (Note, we
415 * catch an invalid cr3 even in real-mode, because it would
416 * cause trouble later on when we turn on paging anyway.)
418 * A real CPU would silently accept an invalid cr3 and would
419 * attempt to use it - with largely undefined (and often hard
420 * to debug) behavior on the guest side.
422 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
423 kvm_inject_gp(vcpu, 0);
425 vcpu->arch.cr3 = cr3;
426 vcpu->arch.mmu.new_cr3(vcpu);
429 EXPORT_SYMBOL_GPL(kvm_set_cr3);
431 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
433 if (cr8 & CR8_RESERVED_BITS) {
434 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
435 kvm_inject_gp(vcpu, 0);
438 if (irqchip_in_kernel(vcpu->kvm))
439 kvm_lapic_set_tpr(vcpu, cr8);
441 vcpu->arch.cr8 = cr8;
443 EXPORT_SYMBOL_GPL(kvm_set_cr8);
445 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
447 if (irqchip_in_kernel(vcpu->kvm))
448 return kvm_lapic_get_cr8(vcpu);
450 return vcpu->arch.cr8;
452 EXPORT_SYMBOL_GPL(kvm_get_cr8);
454 static inline u32 bit(int bitno)
456 return 1 << (bitno & 31);
460 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
461 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
463 * This list is modified at module load time to reflect the
464 * capabilities of the host cpu.
466 static u32 msrs_to_save[] = {
467 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
470 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
472 MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
473 MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
476 static unsigned num_msrs_to_save;
478 static u32 emulated_msrs[] = {
479 MSR_IA32_MISC_ENABLE,
482 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
484 if (efer & efer_reserved_bits) {
485 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
487 kvm_inject_gp(vcpu, 0);
492 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
493 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
494 kvm_inject_gp(vcpu, 0);
498 if (efer & EFER_FFXSR) {
499 struct kvm_cpuid_entry2 *feat;
501 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
502 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
503 printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
504 kvm_inject_gp(vcpu, 0);
509 if (efer & EFER_SVME) {
510 struct kvm_cpuid_entry2 *feat;
512 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
513 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
514 printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
515 kvm_inject_gp(vcpu, 0);
520 kvm_x86_ops->set_efer(vcpu, efer);
523 efer |= vcpu->arch.shadow_efer & EFER_LMA;
525 vcpu->arch.shadow_efer = efer;
528 void kvm_enable_efer_bits(u64 mask)
530 efer_reserved_bits &= ~mask;
532 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
536 * Writes msr value into into the appropriate "register".
537 * Returns 0 on success, non-0 otherwise.
538 * Assumes vcpu_load() was already called.
540 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
542 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
546 * Adapt set_msr() to msr_io()'s calling convention
548 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
550 return kvm_set_msr(vcpu, index, *data);
553 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
556 struct pvclock_wall_clock wc;
557 struct timespec now, sys, boot;
564 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
567 * The guest calculates current wall clock time by adding
568 * system time (updated by kvm_write_guest_time below) to the
569 * wall clock specified here. guest system time equals host
570 * system time for us, thus we must fill in host boot time here.
572 now = current_kernel_time();
574 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
576 wc.sec = boot.tv_sec;
577 wc.nsec = boot.tv_nsec;
578 wc.version = version;
580 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
583 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
586 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
588 uint32_t quotient, remainder;
590 /* Don't try to replace with do_div(), this one calculates
591 * "(dividend << 32) / divisor" */
593 : "=a" (quotient), "=d" (remainder)
594 : "0" (0), "1" (dividend), "r" (divisor) );
598 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
600 uint64_t nsecs = 1000000000LL;
605 tps64 = tsc_khz * 1000LL;
606 while (tps64 > nsecs*2) {
611 tps32 = (uint32_t)tps64;
612 while (tps32 <= (uint32_t)nsecs) {
617 hv_clock->tsc_shift = shift;
618 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
620 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
621 __func__, tsc_khz, hv_clock->tsc_shift,
622 hv_clock->tsc_to_system_mul);
625 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
627 static void kvm_write_guest_time(struct kvm_vcpu *v)
631 struct kvm_vcpu_arch *vcpu = &v->arch;
634 if ((!vcpu->time_page))
638 if (unlikely(vcpu->hv_clock_tsc_khz != __get_cpu_var(cpu_tsc_khz))) {
639 kvm_set_time_scale(__get_cpu_var(cpu_tsc_khz), &vcpu->hv_clock);
640 vcpu->hv_clock_tsc_khz = __get_cpu_var(cpu_tsc_khz);
644 /* Keep irq disabled to prevent changes to the clock */
645 local_irq_save(flags);
646 kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
647 &vcpu->hv_clock.tsc_timestamp);
649 local_irq_restore(flags);
651 /* With all the info we got, fill in the values */
653 vcpu->hv_clock.system_time = ts.tv_nsec +
654 (NSEC_PER_SEC * (u64)ts.tv_sec);
656 * The interface expects us to write an even number signaling that the
657 * update is finished. Since the guest won't see the intermediate
658 * state, we just increase by 2 at the end.
660 vcpu->hv_clock.version += 2;
662 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
664 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
665 sizeof(vcpu->hv_clock));
667 kunmap_atomic(shared_kaddr, KM_USER0);
669 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
672 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
674 struct kvm_vcpu_arch *vcpu = &v->arch;
676 if (!vcpu->time_page)
678 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
682 static bool msr_mtrr_valid(unsigned msr)
685 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
686 case MSR_MTRRfix64K_00000:
687 case MSR_MTRRfix16K_80000:
688 case MSR_MTRRfix16K_A0000:
689 case MSR_MTRRfix4K_C0000:
690 case MSR_MTRRfix4K_C8000:
691 case MSR_MTRRfix4K_D0000:
692 case MSR_MTRRfix4K_D8000:
693 case MSR_MTRRfix4K_E0000:
694 case MSR_MTRRfix4K_E8000:
695 case MSR_MTRRfix4K_F0000:
696 case MSR_MTRRfix4K_F8000:
697 case MSR_MTRRdefType:
698 case MSR_IA32_CR_PAT:
706 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
708 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
710 if (!msr_mtrr_valid(msr))
713 if (msr == MSR_MTRRdefType) {
714 vcpu->arch.mtrr_state.def_type = data;
715 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
716 } else if (msr == MSR_MTRRfix64K_00000)
718 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
719 p[1 + msr - MSR_MTRRfix16K_80000] = data;
720 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
721 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
722 else if (msr == MSR_IA32_CR_PAT)
723 vcpu->arch.pat = data;
724 else { /* Variable MTRRs */
725 int idx, is_mtrr_mask;
728 idx = (msr - 0x200) / 2;
729 is_mtrr_mask = msr - 0x200 - 2 * idx;
732 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
735 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
739 kvm_mmu_reset_context(vcpu);
743 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
747 set_efer(vcpu, data);
749 case MSR_IA32_MC0_STATUS:
750 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
753 case MSR_IA32_MCG_STATUS:
754 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
757 case MSR_IA32_MCG_CTL:
758 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
761 case MSR_IA32_DEBUGCTLMSR:
763 /* We support the non-activated case already */
765 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
766 /* Values other than LBR and BTF are vendor-specific,
767 thus reserved and should throw a #GP */
770 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
773 case MSR_IA32_UCODE_REV:
774 case MSR_IA32_UCODE_WRITE:
775 case MSR_VM_HSAVE_PA:
777 case 0x200 ... 0x2ff:
778 return set_msr_mtrr(vcpu, msr, data);
779 case MSR_IA32_APICBASE:
780 kvm_set_apic_base(vcpu, data);
782 case MSR_IA32_MISC_ENABLE:
783 vcpu->arch.ia32_misc_enable_msr = data;
785 case MSR_KVM_WALL_CLOCK:
786 vcpu->kvm->arch.wall_clock = data;
787 kvm_write_wall_clock(vcpu->kvm, data);
789 case MSR_KVM_SYSTEM_TIME: {
790 if (vcpu->arch.time_page) {
791 kvm_release_page_dirty(vcpu->arch.time_page);
792 vcpu->arch.time_page = NULL;
795 vcpu->arch.time = data;
797 /* we verify if the enable bit is set... */
801 /* ...but clean it before doing the actual write */
802 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
804 vcpu->arch.time_page =
805 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
807 if (is_error_page(vcpu->arch.time_page)) {
808 kvm_release_page_clean(vcpu->arch.time_page);
809 vcpu->arch.time_page = NULL;
812 kvm_request_guest_time_update(vcpu);
816 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
821 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
825 * Reads an msr value (of 'msr_index') into 'pdata'.
826 * Returns 0 on success, non-0 otherwise.
827 * Assumes vcpu_load() was already called.
829 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
831 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
834 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
836 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
838 if (!msr_mtrr_valid(msr))
841 if (msr == MSR_MTRRdefType)
842 *pdata = vcpu->arch.mtrr_state.def_type +
843 (vcpu->arch.mtrr_state.enabled << 10);
844 else if (msr == MSR_MTRRfix64K_00000)
846 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
847 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
848 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
849 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
850 else if (msr == MSR_IA32_CR_PAT)
851 *pdata = vcpu->arch.pat;
852 else { /* Variable MTRRs */
853 int idx, is_mtrr_mask;
856 idx = (msr - 0x200) / 2;
857 is_mtrr_mask = msr - 0x200 - 2 * idx;
860 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
863 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
870 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
875 case 0xc0010010: /* SYSCFG */
876 case 0xc0010015: /* HWCR */
877 case MSR_IA32_PLATFORM_ID:
878 case MSR_IA32_P5_MC_ADDR:
879 case MSR_IA32_P5_MC_TYPE:
880 case MSR_IA32_MC0_CTL:
881 case MSR_IA32_MCG_STATUS:
882 case MSR_IA32_MCG_CAP:
883 case MSR_IA32_MCG_CTL:
884 case MSR_IA32_MC0_MISC:
885 case MSR_IA32_MC0_MISC+4:
886 case MSR_IA32_MC0_MISC+8:
887 case MSR_IA32_MC0_MISC+12:
888 case MSR_IA32_MC0_MISC+16:
889 case MSR_IA32_MC0_MISC+20:
890 case MSR_IA32_UCODE_REV:
891 case MSR_IA32_EBL_CR_POWERON:
892 case MSR_IA32_DEBUGCTLMSR:
893 case MSR_IA32_LASTBRANCHFROMIP:
894 case MSR_IA32_LASTBRANCHTOIP:
895 case MSR_IA32_LASTINTFROMIP:
896 case MSR_IA32_LASTINTTOIP:
897 case MSR_VM_HSAVE_PA:
901 data = 0x500 | KVM_NR_VAR_MTRR;
903 case 0x200 ... 0x2ff:
904 return get_msr_mtrr(vcpu, msr, pdata);
905 case 0xcd: /* fsb frequency */
908 case MSR_IA32_APICBASE:
909 data = kvm_get_apic_base(vcpu);
911 case MSR_IA32_MISC_ENABLE:
912 data = vcpu->arch.ia32_misc_enable_msr;
914 case MSR_IA32_PERF_STATUS:
915 /* TSC increment by tick */
918 data |= (((uint64_t)4ULL) << 40);
921 data = vcpu->arch.shadow_efer;
923 case MSR_KVM_WALL_CLOCK:
924 data = vcpu->kvm->arch.wall_clock;
926 case MSR_KVM_SYSTEM_TIME:
927 data = vcpu->arch.time;
930 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
936 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
939 * Read or write a bunch of msrs. All parameters are kernel addresses.
941 * @return number of msrs set successfully.
943 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
944 struct kvm_msr_entry *entries,
945 int (*do_msr)(struct kvm_vcpu *vcpu,
946 unsigned index, u64 *data))
952 down_read(&vcpu->kvm->slots_lock);
953 for (i = 0; i < msrs->nmsrs; ++i)
954 if (do_msr(vcpu, entries[i].index, &entries[i].data))
956 up_read(&vcpu->kvm->slots_lock);
964 * Read or write a bunch of msrs. Parameters are user addresses.
966 * @return number of msrs set successfully.
968 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
969 int (*do_msr)(struct kvm_vcpu *vcpu,
970 unsigned index, u64 *data),
973 struct kvm_msrs msrs;
974 struct kvm_msr_entry *entries;
979 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
983 if (msrs.nmsrs >= MAX_IO_MSRS)
987 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
988 entries = vmalloc(size);
993 if (copy_from_user(entries, user_msrs->entries, size))
996 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1001 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1012 int kvm_dev_ioctl_check_extension(long ext)
1017 case KVM_CAP_IRQCHIP:
1019 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1020 case KVM_CAP_SET_TSS_ADDR:
1021 case KVM_CAP_EXT_CPUID:
1022 case KVM_CAP_CLOCKSOURCE:
1024 case KVM_CAP_NOP_IO_DELAY:
1025 case KVM_CAP_MP_STATE:
1026 case KVM_CAP_SYNC_MMU:
1027 case KVM_CAP_REINJECT_CONTROL:
1028 case KVM_CAP_IRQ_INJECT_STATUS:
1029 case KVM_CAP_ASSIGN_DEV_IRQ:
1032 case KVM_CAP_COALESCED_MMIO:
1033 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1036 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1038 case KVM_CAP_NR_VCPUS:
1041 case KVM_CAP_NR_MEMSLOTS:
1042 r = KVM_MEMORY_SLOTS;
1044 case KVM_CAP_PV_MMU:
1058 long kvm_arch_dev_ioctl(struct file *filp,
1059 unsigned int ioctl, unsigned long arg)
1061 void __user *argp = (void __user *)arg;
1065 case KVM_GET_MSR_INDEX_LIST: {
1066 struct kvm_msr_list __user *user_msr_list = argp;
1067 struct kvm_msr_list msr_list;
1071 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1074 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1075 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1078 if (n < num_msrs_to_save)
1081 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1082 num_msrs_to_save * sizeof(u32)))
1084 if (copy_to_user(user_msr_list->indices
1085 + num_msrs_to_save * sizeof(u32),
1087 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1092 case KVM_GET_SUPPORTED_CPUID: {
1093 struct kvm_cpuid2 __user *cpuid_arg = argp;
1094 struct kvm_cpuid2 cpuid;
1097 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1099 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1100 cpuid_arg->entries);
1105 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1117 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1119 kvm_x86_ops->vcpu_load(vcpu, cpu);
1120 kvm_request_guest_time_update(vcpu);
1123 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1125 kvm_x86_ops->vcpu_put(vcpu);
1126 kvm_put_guest_fpu(vcpu);
1129 static int is_efer_nx(void)
1131 unsigned long long efer = 0;
1133 rdmsrl_safe(MSR_EFER, &efer);
1134 return efer & EFER_NX;
1137 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1140 struct kvm_cpuid_entry2 *e, *entry;
1143 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1144 e = &vcpu->arch.cpuid_entries[i];
1145 if (e->function == 0x80000001) {
1150 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1151 entry->edx &= ~(1 << 20);
1152 printk(KERN_INFO "kvm: guest NX capability removed\n");
1156 /* when an old userspace process fills a new kernel module */
1157 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1158 struct kvm_cpuid *cpuid,
1159 struct kvm_cpuid_entry __user *entries)
1162 struct kvm_cpuid_entry *cpuid_entries;
1165 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1168 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1172 if (copy_from_user(cpuid_entries, entries,
1173 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1175 for (i = 0; i < cpuid->nent; i++) {
1176 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1177 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1178 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1179 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1180 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1181 vcpu->arch.cpuid_entries[i].index = 0;
1182 vcpu->arch.cpuid_entries[i].flags = 0;
1183 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1184 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1185 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1187 vcpu->arch.cpuid_nent = cpuid->nent;
1188 cpuid_fix_nx_cap(vcpu);
1192 vfree(cpuid_entries);
1197 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1198 struct kvm_cpuid2 *cpuid,
1199 struct kvm_cpuid_entry2 __user *entries)
1204 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1207 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1208 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1210 vcpu->arch.cpuid_nent = cpuid->nent;
1217 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1218 struct kvm_cpuid2 *cpuid,
1219 struct kvm_cpuid_entry2 __user *entries)
1224 if (cpuid->nent < vcpu->arch.cpuid_nent)
1227 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1228 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1233 cpuid->nent = vcpu->arch.cpuid_nent;
1237 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1240 entry->function = function;
1241 entry->index = index;
1242 cpuid_count(entry->function, entry->index,
1243 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1247 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1248 u32 index, int *nent, int maxnent)
1250 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
1251 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1252 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1253 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1254 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1255 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
1256 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1257 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
1258 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
1259 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
1260 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
1261 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1262 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1263 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1264 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1265 bit(X86_FEATURE_PGE) |
1266 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1267 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
1268 bit(X86_FEATURE_SYSCALL) |
1269 (is_efer_nx() ? bit(X86_FEATURE_NX) : 0) |
1270 #ifdef CONFIG_X86_64
1271 bit(X86_FEATURE_LM) |
1273 bit(X86_FEATURE_FXSR_OPT) |
1274 bit(X86_FEATURE_MMXEXT) |
1275 bit(X86_FEATURE_3DNOWEXT) |
1276 bit(X86_FEATURE_3DNOW);
1277 const u32 kvm_supported_word3_x86_features =
1278 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
1279 const u32 kvm_supported_word6_x86_features =
1280 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY) |
1281 bit(X86_FEATURE_SVM);
1283 /* all calls to cpuid_count() should be made on the same cpu */
1285 do_cpuid_1_ent(entry, function, index);
1290 entry->eax = min(entry->eax, (u32)0xb);
1293 entry->edx &= kvm_supported_word0_x86_features;
1294 entry->ecx &= kvm_supported_word3_x86_features;
1296 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1297 * may return different values. This forces us to get_cpu() before
1298 * issuing the first command, and also to emulate this annoying behavior
1299 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1301 int t, times = entry->eax & 0xff;
1303 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1304 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1305 for (t = 1; t < times && *nent < maxnent; ++t) {
1306 do_cpuid_1_ent(&entry[t], function, 0);
1307 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1312 /* function 4 and 0xb have additional index. */
1316 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1317 /* read more entries until cache_type is zero */
1318 for (i = 1; *nent < maxnent; ++i) {
1319 cache_type = entry[i - 1].eax & 0x1f;
1322 do_cpuid_1_ent(&entry[i], function, i);
1324 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1332 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1333 /* read more entries until level_type is zero */
1334 for (i = 1; *nent < maxnent; ++i) {
1335 level_type = entry[i - 1].ecx & 0xff00;
1338 do_cpuid_1_ent(&entry[i], function, i);
1340 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1346 entry->eax = min(entry->eax, 0x8000001a);
1349 entry->edx &= kvm_supported_word1_x86_features;
1350 entry->ecx &= kvm_supported_word6_x86_features;
1356 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1357 struct kvm_cpuid_entry2 __user *entries)
1359 struct kvm_cpuid_entry2 *cpuid_entries;
1360 int limit, nent = 0, r = -E2BIG;
1363 if (cpuid->nent < 1)
1366 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1370 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1371 limit = cpuid_entries[0].eax;
1372 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1373 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1374 &nent, cpuid->nent);
1376 if (nent >= cpuid->nent)
1379 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1380 limit = cpuid_entries[nent - 1].eax;
1381 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1382 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1383 &nent, cpuid->nent);
1385 if (copy_to_user(entries, cpuid_entries,
1386 nent * sizeof(struct kvm_cpuid_entry2)))
1392 vfree(cpuid_entries);
1397 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1398 struct kvm_lapic_state *s)
1401 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1407 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1408 struct kvm_lapic_state *s)
1411 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1412 kvm_apic_post_state_restore(vcpu);
1418 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1419 struct kvm_interrupt *irq)
1421 if (irq->irq < 0 || irq->irq >= 256)
1423 if (irqchip_in_kernel(vcpu->kvm))
1427 set_bit(irq->irq, vcpu->arch.irq_pending);
1428 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
1435 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1438 kvm_inject_nmi(vcpu);
1444 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1445 struct kvm_tpr_access_ctl *tac)
1449 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1453 long kvm_arch_vcpu_ioctl(struct file *filp,
1454 unsigned int ioctl, unsigned long arg)
1456 struct kvm_vcpu *vcpu = filp->private_data;
1457 void __user *argp = (void __user *)arg;
1459 struct kvm_lapic_state *lapic = NULL;
1462 case KVM_GET_LAPIC: {
1463 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1468 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1472 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1477 case KVM_SET_LAPIC: {
1478 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1483 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1485 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1491 case KVM_INTERRUPT: {
1492 struct kvm_interrupt irq;
1495 if (copy_from_user(&irq, argp, sizeof irq))
1497 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1504 r = kvm_vcpu_ioctl_nmi(vcpu);
1510 case KVM_SET_CPUID: {
1511 struct kvm_cpuid __user *cpuid_arg = argp;
1512 struct kvm_cpuid cpuid;
1515 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1517 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1522 case KVM_SET_CPUID2: {
1523 struct kvm_cpuid2 __user *cpuid_arg = argp;
1524 struct kvm_cpuid2 cpuid;
1527 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1529 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1530 cpuid_arg->entries);
1535 case KVM_GET_CPUID2: {
1536 struct kvm_cpuid2 __user *cpuid_arg = argp;
1537 struct kvm_cpuid2 cpuid;
1540 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1542 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1543 cpuid_arg->entries);
1547 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1553 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1556 r = msr_io(vcpu, argp, do_set_msr, 0);
1558 case KVM_TPR_ACCESS_REPORTING: {
1559 struct kvm_tpr_access_ctl tac;
1562 if (copy_from_user(&tac, argp, sizeof tac))
1564 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1568 if (copy_to_user(argp, &tac, sizeof tac))
1573 case KVM_SET_VAPIC_ADDR: {
1574 struct kvm_vapic_addr va;
1577 if (!irqchip_in_kernel(vcpu->kvm))
1580 if (copy_from_user(&va, argp, sizeof va))
1583 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1595 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1599 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1601 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1605 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1606 u32 kvm_nr_mmu_pages)
1608 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1611 down_write(&kvm->slots_lock);
1613 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1614 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1616 up_write(&kvm->slots_lock);
1620 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1622 return kvm->arch.n_alloc_mmu_pages;
1625 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1628 struct kvm_mem_alias *alias;
1630 for (i = 0; i < kvm->arch.naliases; ++i) {
1631 alias = &kvm->arch.aliases[i];
1632 if (gfn >= alias->base_gfn
1633 && gfn < alias->base_gfn + alias->npages)
1634 return alias->target_gfn + gfn - alias->base_gfn;
1640 * Set a new alias region. Aliases map a portion of physical memory into
1641 * another portion. This is useful for memory windows, for example the PC
1644 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1645 struct kvm_memory_alias *alias)
1648 struct kvm_mem_alias *p;
1651 /* General sanity checks */
1652 if (alias->memory_size & (PAGE_SIZE - 1))
1654 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1656 if (alias->slot >= KVM_ALIAS_SLOTS)
1658 if (alias->guest_phys_addr + alias->memory_size
1659 < alias->guest_phys_addr)
1661 if (alias->target_phys_addr + alias->memory_size
1662 < alias->target_phys_addr)
1665 down_write(&kvm->slots_lock);
1666 spin_lock(&kvm->mmu_lock);
1668 p = &kvm->arch.aliases[alias->slot];
1669 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1670 p->npages = alias->memory_size >> PAGE_SHIFT;
1671 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1673 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1674 if (kvm->arch.aliases[n - 1].npages)
1676 kvm->arch.naliases = n;
1678 spin_unlock(&kvm->mmu_lock);
1679 kvm_mmu_zap_all(kvm);
1681 up_write(&kvm->slots_lock);
1689 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1694 switch (chip->chip_id) {
1695 case KVM_IRQCHIP_PIC_MASTER:
1696 memcpy(&chip->chip.pic,
1697 &pic_irqchip(kvm)->pics[0],
1698 sizeof(struct kvm_pic_state));
1700 case KVM_IRQCHIP_PIC_SLAVE:
1701 memcpy(&chip->chip.pic,
1702 &pic_irqchip(kvm)->pics[1],
1703 sizeof(struct kvm_pic_state));
1705 case KVM_IRQCHIP_IOAPIC:
1706 memcpy(&chip->chip.ioapic,
1707 ioapic_irqchip(kvm),
1708 sizeof(struct kvm_ioapic_state));
1717 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1722 switch (chip->chip_id) {
1723 case KVM_IRQCHIP_PIC_MASTER:
1724 memcpy(&pic_irqchip(kvm)->pics[0],
1726 sizeof(struct kvm_pic_state));
1728 case KVM_IRQCHIP_PIC_SLAVE:
1729 memcpy(&pic_irqchip(kvm)->pics[1],
1731 sizeof(struct kvm_pic_state));
1733 case KVM_IRQCHIP_IOAPIC:
1734 memcpy(ioapic_irqchip(kvm),
1736 sizeof(struct kvm_ioapic_state));
1742 kvm_pic_update_irq(pic_irqchip(kvm));
1746 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1750 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
1754 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1758 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
1759 kvm_pit_load_count(kvm, 0, ps->channels[0].count);
1763 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
1764 struct kvm_reinject_control *control)
1766 if (!kvm->arch.vpit)
1768 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
1773 * Get (and clear) the dirty memory log for a memory slot.
1775 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1776 struct kvm_dirty_log *log)
1780 struct kvm_memory_slot *memslot;
1783 down_write(&kvm->slots_lock);
1785 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1789 /* If nothing is dirty, don't bother messing with page tables. */
1791 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1792 kvm_flush_remote_tlbs(kvm);
1793 memslot = &kvm->memslots[log->slot];
1794 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1795 memset(memslot->dirty_bitmap, 0, n);
1799 up_write(&kvm->slots_lock);
1803 long kvm_arch_vm_ioctl(struct file *filp,
1804 unsigned int ioctl, unsigned long arg)
1806 struct kvm *kvm = filp->private_data;
1807 void __user *argp = (void __user *)arg;
1810 * This union makes it completely explicit to gcc-3.x
1811 * that these two variables' stack usage should be
1812 * combined, not added together.
1815 struct kvm_pit_state ps;
1816 struct kvm_memory_alias alias;
1820 case KVM_SET_TSS_ADDR:
1821 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1825 case KVM_SET_MEMORY_REGION: {
1826 struct kvm_memory_region kvm_mem;
1827 struct kvm_userspace_memory_region kvm_userspace_mem;
1830 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1832 kvm_userspace_mem.slot = kvm_mem.slot;
1833 kvm_userspace_mem.flags = kvm_mem.flags;
1834 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1835 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1836 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1841 case KVM_SET_NR_MMU_PAGES:
1842 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1846 case KVM_GET_NR_MMU_PAGES:
1847 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1849 case KVM_SET_MEMORY_ALIAS:
1851 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
1853 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
1857 case KVM_CREATE_IRQCHIP:
1859 kvm->arch.vpic = kvm_create_pic(kvm);
1860 if (kvm->arch.vpic) {
1861 r = kvm_ioapic_init(kvm);
1863 kfree(kvm->arch.vpic);
1864 kvm->arch.vpic = NULL;
1869 r = kvm_setup_default_irq_routing(kvm);
1871 kfree(kvm->arch.vpic);
1872 kfree(kvm->arch.vioapic);
1876 case KVM_CREATE_PIT:
1877 mutex_lock(&kvm->lock);
1880 goto create_pit_unlock;
1882 kvm->arch.vpit = kvm_create_pit(kvm);
1886 mutex_unlock(&kvm->lock);
1888 case KVM_IRQ_LINE_STATUS:
1889 case KVM_IRQ_LINE: {
1890 struct kvm_irq_level irq_event;
1893 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1895 if (irqchip_in_kernel(kvm)) {
1897 mutex_lock(&kvm->lock);
1898 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
1899 irq_event.irq, irq_event.level);
1900 mutex_unlock(&kvm->lock);
1901 if (ioctl == KVM_IRQ_LINE_STATUS) {
1902 irq_event.status = status;
1903 if (copy_to_user(argp, &irq_event,
1911 case KVM_GET_IRQCHIP: {
1912 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1913 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1919 if (copy_from_user(chip, argp, sizeof *chip))
1920 goto get_irqchip_out;
1922 if (!irqchip_in_kernel(kvm))
1923 goto get_irqchip_out;
1924 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
1926 goto get_irqchip_out;
1928 if (copy_to_user(argp, chip, sizeof *chip))
1929 goto get_irqchip_out;
1937 case KVM_SET_IRQCHIP: {
1938 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1939 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1945 if (copy_from_user(chip, argp, sizeof *chip))
1946 goto set_irqchip_out;
1948 if (!irqchip_in_kernel(kvm))
1949 goto set_irqchip_out;
1950 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
1952 goto set_irqchip_out;
1962 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
1965 if (!kvm->arch.vpit)
1967 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
1971 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
1978 if (copy_from_user(&u.ps, argp, sizeof u.ps))
1981 if (!kvm->arch.vpit)
1983 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
1989 case KVM_REINJECT_CONTROL: {
1990 struct kvm_reinject_control control;
1992 if (copy_from_user(&control, argp, sizeof(control)))
1994 r = kvm_vm_ioctl_reinject(kvm, &control);
2007 static void kvm_init_msr_list(void)
2012 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2013 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2016 msrs_to_save[j] = msrs_to_save[i];
2019 num_msrs_to_save = j;
2023 * Only apic need an MMIO device hook, so shortcut now..
2025 static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
2026 gpa_t addr, int len,
2029 struct kvm_io_device *dev;
2031 if (vcpu->arch.apic) {
2032 dev = &vcpu->arch.apic->dev;
2033 if (dev->in_range(dev, addr, len, is_write))
2040 static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
2041 gpa_t addr, int len,
2044 struct kvm_io_device *dev;
2046 dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
2048 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
2053 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2054 struct kvm_vcpu *vcpu)
2057 int r = X86EMUL_CONTINUE;
2060 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2061 unsigned offset = addr & (PAGE_SIZE-1);
2062 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2065 if (gpa == UNMAPPED_GVA) {
2066 r = X86EMUL_PROPAGATE_FAULT;
2069 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2071 r = X86EMUL_UNHANDLEABLE;
2083 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2084 struct kvm_vcpu *vcpu)
2087 int r = X86EMUL_CONTINUE;
2090 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2091 unsigned offset = addr & (PAGE_SIZE-1);
2092 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2095 if (gpa == UNMAPPED_GVA) {
2096 r = X86EMUL_PROPAGATE_FAULT;
2099 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2101 r = X86EMUL_UNHANDLEABLE;
2114 static int emulator_read_emulated(unsigned long addr,
2117 struct kvm_vcpu *vcpu)
2119 struct kvm_io_device *mmio_dev;
2122 if (vcpu->mmio_read_completed) {
2123 memcpy(val, vcpu->mmio_data, bytes);
2124 vcpu->mmio_read_completed = 0;
2125 return X86EMUL_CONTINUE;
2128 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2130 /* For APIC access vmexit */
2131 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2134 if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2135 == X86EMUL_CONTINUE)
2136 return X86EMUL_CONTINUE;
2137 if (gpa == UNMAPPED_GVA)
2138 return X86EMUL_PROPAGATE_FAULT;
2142 * Is this MMIO handled locally?
2144 mutex_lock(&vcpu->kvm->lock);
2145 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
2147 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
2148 mutex_unlock(&vcpu->kvm->lock);
2149 return X86EMUL_CONTINUE;
2151 mutex_unlock(&vcpu->kvm->lock);
2153 vcpu->mmio_needed = 1;
2154 vcpu->mmio_phys_addr = gpa;
2155 vcpu->mmio_size = bytes;
2156 vcpu->mmio_is_write = 0;
2158 return X86EMUL_UNHANDLEABLE;
2161 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2162 const void *val, int bytes)
2166 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2169 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2173 static int emulator_write_emulated_onepage(unsigned long addr,
2176 struct kvm_vcpu *vcpu)
2178 struct kvm_io_device *mmio_dev;
2181 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2183 if (gpa == UNMAPPED_GVA) {
2184 kvm_inject_page_fault(vcpu, addr, 2);
2185 return X86EMUL_PROPAGATE_FAULT;
2188 /* For APIC access vmexit */
2189 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2192 if (emulator_write_phys(vcpu, gpa, val, bytes))
2193 return X86EMUL_CONTINUE;
2197 * Is this MMIO handled locally?
2199 mutex_lock(&vcpu->kvm->lock);
2200 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
2202 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
2203 mutex_unlock(&vcpu->kvm->lock);
2204 return X86EMUL_CONTINUE;
2206 mutex_unlock(&vcpu->kvm->lock);
2208 vcpu->mmio_needed = 1;
2209 vcpu->mmio_phys_addr = gpa;
2210 vcpu->mmio_size = bytes;
2211 vcpu->mmio_is_write = 1;
2212 memcpy(vcpu->mmio_data, val, bytes);
2214 return X86EMUL_CONTINUE;
2217 int emulator_write_emulated(unsigned long addr,
2220 struct kvm_vcpu *vcpu)
2222 /* Crossing a page boundary? */
2223 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2226 now = -addr & ~PAGE_MASK;
2227 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2228 if (rc != X86EMUL_CONTINUE)
2234 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2236 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2238 static int emulator_cmpxchg_emulated(unsigned long addr,
2242 struct kvm_vcpu *vcpu)
2244 static int reported;
2248 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2250 #ifndef CONFIG_X86_64
2251 /* guests cmpxchg8b have to be emulated atomically */
2258 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2260 if (gpa == UNMAPPED_GVA ||
2261 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2264 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2269 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2271 kaddr = kmap_atomic(page, KM_USER0);
2272 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2273 kunmap_atomic(kaddr, KM_USER0);
2274 kvm_release_page_dirty(page);
2279 return emulator_write_emulated(addr, new, bytes, vcpu);
2282 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2284 return kvm_x86_ops->get_segment_base(vcpu, seg);
2287 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2289 kvm_mmu_invlpg(vcpu, address);
2290 return X86EMUL_CONTINUE;
2293 int emulate_clts(struct kvm_vcpu *vcpu)
2295 KVMTRACE_0D(CLTS, vcpu, handler);
2296 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2297 return X86EMUL_CONTINUE;
2300 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2302 struct kvm_vcpu *vcpu = ctxt->vcpu;
2306 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2307 return X86EMUL_CONTINUE;
2309 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2310 return X86EMUL_UNHANDLEABLE;
2314 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2316 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2319 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2321 /* FIXME: better handling */
2322 return X86EMUL_UNHANDLEABLE;
2324 return X86EMUL_CONTINUE;
2327 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2330 unsigned long rip = kvm_rip_read(vcpu);
2331 unsigned long rip_linear;
2333 if (!printk_ratelimit())
2336 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2338 kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2340 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2341 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2343 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2345 static struct x86_emulate_ops emulate_ops = {
2346 .read_std = kvm_read_guest_virt,
2347 .read_emulated = emulator_read_emulated,
2348 .write_emulated = emulator_write_emulated,
2349 .cmpxchg_emulated = emulator_cmpxchg_emulated,
2352 static void cache_all_regs(struct kvm_vcpu *vcpu)
2354 kvm_register_read(vcpu, VCPU_REGS_RAX);
2355 kvm_register_read(vcpu, VCPU_REGS_RSP);
2356 kvm_register_read(vcpu, VCPU_REGS_RIP);
2357 vcpu->arch.regs_dirty = ~0;
2360 int emulate_instruction(struct kvm_vcpu *vcpu,
2361 struct kvm_run *run,
2367 struct decode_cache *c;
2369 kvm_clear_exception_queue(vcpu);
2370 vcpu->arch.mmio_fault_cr2 = cr2;
2372 * TODO: fix x86_emulate.c to use guest_read/write_register
2373 * instead of direct ->regs accesses, can save hundred cycles
2374 * on Intel for instructions that don't read/change RSP, for
2377 cache_all_regs(vcpu);
2379 vcpu->mmio_is_write = 0;
2380 vcpu->arch.pio.string = 0;
2382 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2384 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2386 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2387 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2388 vcpu->arch.emulate_ctxt.mode =
2389 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2390 ? X86EMUL_MODE_REAL : cs_l
2391 ? X86EMUL_MODE_PROT64 : cs_db
2392 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2394 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2396 /* Reject the instructions other than VMCALL/VMMCALL when
2397 * try to emulate invalid opcode */
2398 c = &vcpu->arch.emulate_ctxt.decode;
2399 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2400 (!(c->twobyte && c->b == 0x01 &&
2401 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2402 c->modrm_mod == 3 && c->modrm_rm == 1)))
2403 return EMULATE_FAIL;
2405 ++vcpu->stat.insn_emulation;
2407 ++vcpu->stat.insn_emulation_fail;
2408 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2409 return EMULATE_DONE;
2410 return EMULATE_FAIL;
2414 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2416 if (vcpu->arch.pio.string)
2417 return EMULATE_DO_MMIO;
2419 if ((r || vcpu->mmio_is_write) && run) {
2420 run->exit_reason = KVM_EXIT_MMIO;
2421 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2422 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2423 run->mmio.len = vcpu->mmio_size;
2424 run->mmio.is_write = vcpu->mmio_is_write;
2428 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2429 return EMULATE_DONE;
2430 if (!vcpu->mmio_needed) {
2431 kvm_report_emulation_failure(vcpu, "mmio");
2432 return EMULATE_FAIL;
2434 return EMULATE_DO_MMIO;
2437 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2439 if (vcpu->mmio_is_write) {
2440 vcpu->mmio_needed = 0;
2441 return EMULATE_DO_MMIO;
2444 return EMULATE_DONE;
2446 EXPORT_SYMBOL_GPL(emulate_instruction);
2448 static int pio_copy_data(struct kvm_vcpu *vcpu)
2450 void *p = vcpu->arch.pio_data;
2451 gva_t q = vcpu->arch.pio.guest_gva;
2455 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2456 if (vcpu->arch.pio.in)
2457 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2459 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2463 int complete_pio(struct kvm_vcpu *vcpu)
2465 struct kvm_pio_request *io = &vcpu->arch.pio;
2472 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2473 memcpy(&val, vcpu->arch.pio_data, io->size);
2474 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2478 r = pio_copy_data(vcpu);
2485 delta *= io->cur_count;
2487 * The size of the register should really depend on
2488 * current address size.
2490 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2492 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2498 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2500 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2502 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2504 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2508 io->count -= io->cur_count;
2514 static void kernel_pio(struct kvm_io_device *pio_dev,
2515 struct kvm_vcpu *vcpu,
2518 /* TODO: String I/O for in kernel device */
2520 mutex_lock(&vcpu->kvm->lock);
2521 if (vcpu->arch.pio.in)
2522 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2523 vcpu->arch.pio.size,
2526 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2527 vcpu->arch.pio.size,
2529 mutex_unlock(&vcpu->kvm->lock);
2532 static void pio_string_write(struct kvm_io_device *pio_dev,
2533 struct kvm_vcpu *vcpu)
2535 struct kvm_pio_request *io = &vcpu->arch.pio;
2536 void *pd = vcpu->arch.pio_data;
2539 mutex_lock(&vcpu->kvm->lock);
2540 for (i = 0; i < io->cur_count; i++) {
2541 kvm_iodevice_write(pio_dev, io->port,
2546 mutex_unlock(&vcpu->kvm->lock);
2549 static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2550 gpa_t addr, int len,
2553 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
2556 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2557 int size, unsigned port)
2559 struct kvm_io_device *pio_dev;
2562 vcpu->run->exit_reason = KVM_EXIT_IO;
2563 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2564 vcpu->run->io.size = vcpu->arch.pio.size = size;
2565 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2566 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2567 vcpu->run->io.port = vcpu->arch.pio.port = port;
2568 vcpu->arch.pio.in = in;
2569 vcpu->arch.pio.string = 0;
2570 vcpu->arch.pio.down = 0;
2571 vcpu->arch.pio.rep = 0;
2573 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2574 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2577 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2580 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2581 memcpy(vcpu->arch.pio_data, &val, 4);
2583 pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
2585 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
2591 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2593 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2594 int size, unsigned long count, int down,
2595 gva_t address, int rep, unsigned port)
2597 unsigned now, in_page;
2599 struct kvm_io_device *pio_dev;
2601 vcpu->run->exit_reason = KVM_EXIT_IO;
2602 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2603 vcpu->run->io.size = vcpu->arch.pio.size = size;
2604 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2605 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2606 vcpu->run->io.port = vcpu->arch.pio.port = port;
2607 vcpu->arch.pio.in = in;
2608 vcpu->arch.pio.string = 1;
2609 vcpu->arch.pio.down = down;
2610 vcpu->arch.pio.rep = rep;
2612 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2613 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2616 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2620 kvm_x86_ops->skip_emulated_instruction(vcpu);
2625 in_page = PAGE_SIZE - offset_in_page(address);
2627 in_page = offset_in_page(address) + size;
2628 now = min(count, (unsigned long)in_page / size);
2633 * String I/O in reverse. Yuck. Kill the guest, fix later.
2635 pr_unimpl(vcpu, "guest string pio down\n");
2636 kvm_inject_gp(vcpu, 0);
2639 vcpu->run->io.count = now;
2640 vcpu->arch.pio.cur_count = now;
2642 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2643 kvm_x86_ops->skip_emulated_instruction(vcpu);
2645 vcpu->arch.pio.guest_gva = address;
2647 pio_dev = vcpu_find_pio_dev(vcpu, port,
2648 vcpu->arch.pio.cur_count,
2649 !vcpu->arch.pio.in);
2650 if (!vcpu->arch.pio.in) {
2651 /* string PIO write */
2652 ret = pio_copy_data(vcpu);
2653 if (ret == X86EMUL_PROPAGATE_FAULT) {
2654 kvm_inject_gp(vcpu, 0);
2657 if (ret == 0 && pio_dev) {
2658 pio_string_write(pio_dev, vcpu);
2660 if (vcpu->arch.pio.count == 0)
2664 pr_unimpl(vcpu, "no string pio read support yet, "
2665 "port %x size %d count %ld\n",
2670 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2672 static void bounce_off(void *info)
2677 static unsigned int ref_freq;
2678 static unsigned long tsc_khz_ref;
2680 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
2683 struct cpufreq_freqs *freq = data;
2685 struct kvm_vcpu *vcpu;
2686 int i, send_ipi = 0;
2689 ref_freq = freq->old;
2691 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
2693 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
2695 per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
2697 spin_lock(&kvm_lock);
2698 list_for_each_entry(kvm, &vm_list, vm_list) {
2699 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
2700 vcpu = kvm->vcpus[i];
2703 if (vcpu->cpu != freq->cpu)
2705 if (!kvm_request_guest_time_update(vcpu))
2707 if (vcpu->cpu != smp_processor_id())
2711 spin_unlock(&kvm_lock);
2713 if (freq->old < freq->new && send_ipi) {
2715 * We upscale the frequency. Must make the guest
2716 * doesn't see old kvmclock values while running with
2717 * the new frequency, otherwise we risk the guest sees
2718 * time go backwards.
2720 * In case we update the frequency for another cpu
2721 * (which might be in guest context) send an interrupt
2722 * to kick the cpu out of guest context. Next time
2723 * guest context is entered kvmclock will be updated,
2724 * so the guest will not see stale values.
2726 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
2731 static struct notifier_block kvmclock_cpufreq_notifier_block = {
2732 .notifier_call = kvmclock_cpufreq_notifier
2735 int kvm_arch_init(void *opaque)
2738 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2741 printk(KERN_ERR "kvm: already loaded the other module\n");
2746 if (!ops->cpu_has_kvm_support()) {
2747 printk(KERN_ERR "kvm: no hardware support\n");
2751 if (ops->disabled_by_bios()) {
2752 printk(KERN_ERR "kvm: disabled by bios\n");
2757 r = kvm_mmu_module_init();
2761 kvm_init_msr_list();
2764 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
2765 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
2766 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
2767 PT_DIRTY_MASK, PT64_NX_MASK, 0, 0);
2769 for_each_possible_cpu(cpu)
2770 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
2771 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
2772 tsc_khz_ref = tsc_khz;
2773 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
2774 CPUFREQ_TRANSITION_NOTIFIER);
2783 void kvm_arch_exit(void)
2785 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
2786 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
2787 CPUFREQ_TRANSITION_NOTIFIER);
2789 kvm_mmu_module_exit();
2792 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2794 ++vcpu->stat.halt_exits;
2795 KVMTRACE_0D(HLT, vcpu, handler);
2796 if (irqchip_in_kernel(vcpu->kvm)) {
2797 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
2800 vcpu->run->exit_reason = KVM_EXIT_HLT;
2804 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2806 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
2809 if (is_long_mode(vcpu))
2812 return a0 | ((gpa_t)a1 << 32);
2815 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2817 unsigned long nr, a0, a1, a2, a3, ret;
2820 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
2821 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
2822 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
2823 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
2824 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
2826 KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
2828 if (!is_long_mode(vcpu)) {
2837 case KVM_HC_VAPIC_POLL_IRQ:
2841 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
2847 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
2848 ++vcpu->stat.hypercalls;
2851 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2853 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2855 char instruction[3];
2857 unsigned long rip = kvm_rip_read(vcpu);
2861 * Blow out the MMU to ensure that no other VCPU has an active mapping
2862 * to ensure that the updated hypercall appears atomically across all
2865 kvm_mmu_zap_all(vcpu->kvm);
2867 kvm_x86_ops->patch_hypercall(vcpu, instruction);
2868 if (emulator_write_emulated(rip, instruction, 3, vcpu)
2869 != X86EMUL_CONTINUE)
2875 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2877 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2880 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2882 struct descriptor_table dt = { limit, base };
2884 kvm_x86_ops->set_gdt(vcpu, &dt);
2887 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2889 struct descriptor_table dt = { limit, base };
2891 kvm_x86_ops->set_idt(vcpu, &dt);
2894 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2895 unsigned long *rflags)
2897 kvm_lmsw(vcpu, msw);
2898 *rflags = kvm_x86_ops->get_rflags(vcpu);
2901 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2903 unsigned long value;
2905 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2908 value = vcpu->arch.cr0;
2911 value = vcpu->arch.cr2;
2914 value = vcpu->arch.cr3;
2917 value = vcpu->arch.cr4;
2920 value = kvm_get_cr8(vcpu);
2923 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2926 KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
2927 (u32)((u64)value >> 32), handler);
2932 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2933 unsigned long *rflags)
2935 KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
2936 (u32)((u64)val >> 32), handler);
2940 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
2941 *rflags = kvm_x86_ops->get_rflags(vcpu);
2944 vcpu->arch.cr2 = val;
2947 kvm_set_cr3(vcpu, val);
2950 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
2953 kvm_set_cr8(vcpu, val & 0xfUL);
2956 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2960 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2962 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2963 int j, nent = vcpu->arch.cpuid_nent;
2965 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2966 /* when no next entry is found, the current entry[i] is reselected */
2967 for (j = i + 1; ; j = (j + 1) % nent) {
2968 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
2969 if (ej->function == e->function) {
2970 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2974 return 0; /* silence gcc, even though control never reaches here */
2977 /* find an entry with matching function, matching index (if needed), and that
2978 * should be read next (if it's stateful) */
2979 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
2980 u32 function, u32 index)
2982 if (e->function != function)
2984 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
2986 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
2987 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
2992 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
2993 u32 function, u32 index)
2996 struct kvm_cpuid_entry2 *best = NULL;
2998 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2999 struct kvm_cpuid_entry2 *e;
3001 e = &vcpu->arch.cpuid_entries[i];
3002 if (is_matching_cpuid_entry(e, function, index)) {
3003 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3004 move_to_next_stateful_cpuid_entry(vcpu, i);
3009 * Both basic or both extended?
3011 if (((e->function ^ function) & 0x80000000) == 0)
3012 if (!best || e->function > best->function)
3018 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3020 u32 function, index;
3021 struct kvm_cpuid_entry2 *best;
3023 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3024 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3025 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3026 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3027 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3028 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3029 best = kvm_find_cpuid_entry(vcpu, function, index);
3031 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3032 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3033 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3034 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3036 kvm_x86_ops->skip_emulated_instruction(vcpu);
3037 KVMTRACE_5D(CPUID, vcpu, function,
3038 (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
3039 (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
3040 (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
3041 (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
3043 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3046 * Check if userspace requested an interrupt window, and that the
3047 * interrupt window is open.
3049 * No need to exit to userspace if we already have an interrupt queued.
3051 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3052 struct kvm_run *kvm_run)
3054 return (!vcpu->arch.irq_summary &&
3055 kvm_run->request_interrupt_window &&
3056 vcpu->arch.interrupt_window_open &&
3057 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
3060 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3061 struct kvm_run *kvm_run)
3063 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3064 kvm_run->cr8 = kvm_get_cr8(vcpu);
3065 kvm_run->apic_base = kvm_get_apic_base(vcpu);
3066 if (irqchip_in_kernel(vcpu->kvm))
3067 kvm_run->ready_for_interrupt_injection = 1;
3069 kvm_run->ready_for_interrupt_injection =
3070 (vcpu->arch.interrupt_window_open &&
3071 vcpu->arch.irq_summary == 0);
3074 static void vapic_enter(struct kvm_vcpu *vcpu)
3076 struct kvm_lapic *apic = vcpu->arch.apic;
3079 if (!apic || !apic->vapic_addr)
3082 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3084 vcpu->arch.apic->vapic_page = page;
3087 static void vapic_exit(struct kvm_vcpu *vcpu)
3089 struct kvm_lapic *apic = vcpu->arch.apic;
3091 if (!apic || !apic->vapic_addr)
3094 down_read(&vcpu->kvm->slots_lock);
3095 kvm_release_page_dirty(apic->vapic_page);
3096 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3097 up_read(&vcpu->kvm->slots_lock);
3100 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3105 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3106 kvm_mmu_unload(vcpu);
3108 r = kvm_mmu_reload(vcpu);
3112 if (vcpu->requests) {
3113 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3114 __kvm_migrate_timers(vcpu);
3115 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3116 kvm_write_guest_time(vcpu);
3117 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3118 kvm_mmu_sync_roots(vcpu);
3119 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3120 kvm_x86_ops->tlb_flush(vcpu);
3121 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3123 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3127 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3128 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3134 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3135 kvm_inject_pending_timer_irqs(vcpu);
3139 kvm_x86_ops->prepare_guest_switch(vcpu);
3140 kvm_load_guest_fpu(vcpu);
3142 local_irq_disable();
3144 if (vcpu->requests || need_resched() || signal_pending(current)) {
3151 vcpu->guest_mode = 1;
3153 * Make sure that guest_mode assignment won't happen after
3154 * testing the pending IRQ vector bitmap.
3158 if (vcpu->arch.exception.pending)
3159 __queue_exception(vcpu);
3160 else if (irqchip_in_kernel(vcpu->kvm))
3161 kvm_x86_ops->inject_pending_irq(vcpu);
3163 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
3165 kvm_lapic_sync_to_vapic(vcpu);
3167 up_read(&vcpu->kvm->slots_lock);
3171 get_debugreg(vcpu->arch.host_dr6, 6);
3172 get_debugreg(vcpu->arch.host_dr7, 7);
3173 if (unlikely(vcpu->arch.switch_db_regs)) {
3174 get_debugreg(vcpu->arch.host_db[0], 0);
3175 get_debugreg(vcpu->arch.host_db[1], 1);
3176 get_debugreg(vcpu->arch.host_db[2], 2);
3177 get_debugreg(vcpu->arch.host_db[3], 3);
3180 set_debugreg(vcpu->arch.eff_db[0], 0);
3181 set_debugreg(vcpu->arch.eff_db[1], 1);
3182 set_debugreg(vcpu->arch.eff_db[2], 2);
3183 set_debugreg(vcpu->arch.eff_db[3], 3);
3186 KVMTRACE_0D(VMENTRY, vcpu, entryexit);
3187 kvm_x86_ops->run(vcpu, kvm_run);
3189 if (unlikely(vcpu->arch.switch_db_regs)) {
3191 set_debugreg(vcpu->arch.host_db[0], 0);
3192 set_debugreg(vcpu->arch.host_db[1], 1);
3193 set_debugreg(vcpu->arch.host_db[2], 2);
3194 set_debugreg(vcpu->arch.host_db[3], 3);
3196 set_debugreg(vcpu->arch.host_dr6, 6);
3197 set_debugreg(vcpu->arch.host_dr7, 7);
3199 vcpu->guest_mode = 0;
3205 * We must have an instruction between local_irq_enable() and
3206 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3207 * the interrupt shadow. The stat.exits increment will do nicely.
3208 * But we need to prevent reordering, hence this barrier():
3216 down_read(&vcpu->kvm->slots_lock);
3219 * Profile KVM exit RIPs:
3221 if (unlikely(prof_on == KVM_PROFILING)) {
3222 unsigned long rip = kvm_rip_read(vcpu);
3223 profile_hit(KVM_PROFILING, (void *)rip);
3226 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
3227 vcpu->arch.exception.pending = false;
3229 kvm_lapic_sync_from_vapic(vcpu);
3231 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3236 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3240 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3241 pr_debug("vcpu %d received sipi with vector # %x\n",
3242 vcpu->vcpu_id, vcpu->arch.sipi_vector);
3243 kvm_lapic_reset(vcpu);
3244 r = kvm_arch_vcpu_reset(vcpu);
3247 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3250 down_read(&vcpu->kvm->slots_lock);
3255 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3256 r = vcpu_enter_guest(vcpu, kvm_run);
3258 up_read(&vcpu->kvm->slots_lock);
3259 kvm_vcpu_block(vcpu);
3260 down_read(&vcpu->kvm->slots_lock);
3261 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3262 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
3263 vcpu->arch.mp_state =
3264 KVM_MP_STATE_RUNNABLE;
3265 if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE)
3270 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3272 kvm_run->exit_reason = KVM_EXIT_INTR;
3273 ++vcpu->stat.request_irq_exits;
3275 if (signal_pending(current)) {
3277 kvm_run->exit_reason = KVM_EXIT_INTR;
3278 ++vcpu->stat.signal_exits;
3280 if (need_resched()) {
3281 up_read(&vcpu->kvm->slots_lock);
3283 down_read(&vcpu->kvm->slots_lock);
3288 up_read(&vcpu->kvm->slots_lock);
3289 post_kvm_run_save(vcpu, kvm_run);
3296 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3303 if (vcpu->sigset_active)
3304 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3306 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3307 kvm_vcpu_block(vcpu);
3308 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3313 /* re-sync apic's tpr */
3314 if (!irqchip_in_kernel(vcpu->kvm))
3315 kvm_set_cr8(vcpu, kvm_run->cr8);
3317 if (vcpu->arch.pio.cur_count) {
3318 r = complete_pio(vcpu);
3322 #if CONFIG_HAS_IOMEM
3323 if (vcpu->mmio_needed) {
3324 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3325 vcpu->mmio_read_completed = 1;
3326 vcpu->mmio_needed = 0;
3328 down_read(&vcpu->kvm->slots_lock);
3329 r = emulate_instruction(vcpu, kvm_run,
3330 vcpu->arch.mmio_fault_cr2, 0,
3331 EMULTYPE_NO_DECODE);
3332 up_read(&vcpu->kvm->slots_lock);
3333 if (r == EMULATE_DO_MMIO) {
3335 * Read-modify-write. Back to userspace.
3342 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3343 kvm_register_write(vcpu, VCPU_REGS_RAX,
3344 kvm_run->hypercall.ret);
3346 r = __vcpu_run(vcpu, kvm_run);
3349 if (vcpu->sigset_active)
3350 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3356 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3360 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3361 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3362 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3363 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3364 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3365 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3366 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3367 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3368 #ifdef CONFIG_X86_64
3369 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3370 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3371 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3372 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3373 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3374 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3375 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3376 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3379 regs->rip = kvm_rip_read(vcpu);
3380 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3383 * Don't leak debug flags in case they were set for guest debugging
3385 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3386 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3393 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3397 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3398 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3399 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3400 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3401 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3402 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3403 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3404 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3405 #ifdef CONFIG_X86_64
3406 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3407 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3408 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3409 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3410 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3411 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3412 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3413 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3417 kvm_rip_write(vcpu, regs->rip);
3418 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3421 vcpu->arch.exception.pending = false;
3428 void kvm_get_segment(struct kvm_vcpu *vcpu,
3429 struct kvm_segment *var, int seg)
3431 kvm_x86_ops->get_segment(vcpu, var, seg);
3434 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3436 struct kvm_segment cs;
3438 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3442 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3444 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3445 struct kvm_sregs *sregs)
3447 struct descriptor_table dt;
3452 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3453 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3454 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3455 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3456 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3457 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3459 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3460 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3462 kvm_x86_ops->get_idt(vcpu, &dt);
3463 sregs->idt.limit = dt.limit;
3464 sregs->idt.base = dt.base;
3465 kvm_x86_ops->get_gdt(vcpu, &dt);
3466 sregs->gdt.limit = dt.limit;
3467 sregs->gdt.base = dt.base;
3469 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3470 sregs->cr0 = vcpu->arch.cr0;
3471 sregs->cr2 = vcpu->arch.cr2;
3472 sregs->cr3 = vcpu->arch.cr3;
3473 sregs->cr4 = vcpu->arch.cr4;
3474 sregs->cr8 = kvm_get_cr8(vcpu);
3475 sregs->efer = vcpu->arch.shadow_efer;
3476 sregs->apic_base = kvm_get_apic_base(vcpu);
3478 if (irqchip_in_kernel(vcpu->kvm)) {
3479 memset(sregs->interrupt_bitmap, 0,
3480 sizeof sregs->interrupt_bitmap);
3481 pending_vec = kvm_x86_ops->get_irq(vcpu);
3482 if (pending_vec >= 0)
3483 set_bit(pending_vec,
3484 (unsigned long *)sregs->interrupt_bitmap);
3486 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
3487 sizeof sregs->interrupt_bitmap);
3494 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3495 struct kvm_mp_state *mp_state)
3498 mp_state->mp_state = vcpu->arch.mp_state;
3503 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3504 struct kvm_mp_state *mp_state)
3507 vcpu->arch.mp_state = mp_state->mp_state;
3512 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3513 struct kvm_segment *var, int seg)
3515 kvm_x86_ops->set_segment(vcpu, var, seg);
3518 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3519 struct kvm_segment *kvm_desct)
3521 kvm_desct->base = seg_desc->base0;
3522 kvm_desct->base |= seg_desc->base1 << 16;
3523 kvm_desct->base |= seg_desc->base2 << 24;
3524 kvm_desct->limit = seg_desc->limit0;
3525 kvm_desct->limit |= seg_desc->limit << 16;
3527 kvm_desct->limit <<= 12;
3528 kvm_desct->limit |= 0xfff;
3530 kvm_desct->selector = selector;
3531 kvm_desct->type = seg_desc->type;
3532 kvm_desct->present = seg_desc->p;
3533 kvm_desct->dpl = seg_desc->dpl;
3534 kvm_desct->db = seg_desc->d;
3535 kvm_desct->s = seg_desc->s;
3536 kvm_desct->l = seg_desc->l;
3537 kvm_desct->g = seg_desc->g;
3538 kvm_desct->avl = seg_desc->avl;
3540 kvm_desct->unusable = 1;
3542 kvm_desct->unusable = 0;
3543 kvm_desct->padding = 0;
3546 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
3548 struct descriptor_table *dtable)
3550 if (selector & 1 << 2) {
3551 struct kvm_segment kvm_seg;
3553 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3555 if (kvm_seg.unusable)
3558 dtable->limit = kvm_seg.limit;
3559 dtable->base = kvm_seg.base;
3562 kvm_x86_ops->get_gdt(vcpu, dtable);
3565 /* allowed just for 8 bytes segments */
3566 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3567 struct desc_struct *seg_desc)
3570 struct descriptor_table dtable;
3571 u16 index = selector >> 3;
3573 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3575 if (dtable.limit < index * 8 + 7) {
3576 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3579 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3581 return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3584 /* allowed just for 8 bytes segments */
3585 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3586 struct desc_struct *seg_desc)
3589 struct descriptor_table dtable;
3590 u16 index = selector >> 3;
3592 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3594 if (dtable.limit < index * 8 + 7)
3596 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3598 return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3601 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3602 struct desc_struct *seg_desc)
3606 base_addr = seg_desc->base0;
3607 base_addr |= (seg_desc->base1 << 16);
3608 base_addr |= (seg_desc->base2 << 24);
3610 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
3613 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3615 struct kvm_segment kvm_seg;
3617 kvm_get_segment(vcpu, &kvm_seg, seg);
3618 return kvm_seg.selector;
3621 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3623 struct kvm_segment *kvm_seg)
3625 struct desc_struct seg_desc;
3627 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3629 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3633 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
3635 struct kvm_segment segvar = {
3636 .base = selector << 4,
3638 .selector = selector,
3649 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
3653 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3654 int type_bits, int seg)
3656 struct kvm_segment kvm_seg;
3658 if (!(vcpu->arch.cr0 & X86_CR0_PE))
3659 return kvm_load_realmode_segment(vcpu, selector, seg);
3660 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3662 kvm_seg.type |= type_bits;
3664 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
3665 seg != VCPU_SREG_LDTR)
3667 kvm_seg.unusable = 1;
3669 kvm_set_segment(vcpu, &kvm_seg, seg);
3673 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
3674 struct tss_segment_32 *tss)
3676 tss->cr3 = vcpu->arch.cr3;
3677 tss->eip = kvm_rip_read(vcpu);
3678 tss->eflags = kvm_x86_ops->get_rflags(vcpu);
3679 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3680 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3681 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3682 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3683 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3684 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3685 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3686 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3687 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3688 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3689 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3690 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3691 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
3692 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
3693 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3694 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3697 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3698 struct tss_segment_32 *tss)
3700 kvm_set_cr3(vcpu, tss->cr3);
3702 kvm_rip_write(vcpu, tss->eip);
3703 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
3705 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
3706 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
3707 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
3708 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
3709 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
3710 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
3711 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
3712 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
3714 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
3717 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3720 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3723 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3726 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3729 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
3732 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
3737 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
3738 struct tss_segment_16 *tss)
3740 tss->ip = kvm_rip_read(vcpu);
3741 tss->flag = kvm_x86_ops->get_rflags(vcpu);
3742 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3743 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3744 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3745 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3746 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3747 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3748 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
3749 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
3751 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3752 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3753 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3754 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3755 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3756 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3759 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
3760 struct tss_segment_16 *tss)
3762 kvm_rip_write(vcpu, tss->ip);
3763 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
3764 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
3765 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
3766 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
3767 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
3768 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
3769 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
3770 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
3771 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
3773 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
3776 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3779 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3782 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3785 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3790 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
3792 struct desc_struct *nseg_desc)
3794 struct tss_segment_16 tss_segment_16;
3797 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3798 sizeof tss_segment_16))
3801 save_state_to_tss16(vcpu, &tss_segment_16);
3803 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3804 sizeof tss_segment_16))
3807 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3808 &tss_segment_16, sizeof tss_segment_16))
3811 if (load_state_from_tss16(vcpu, &tss_segment_16))
3819 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
3821 struct desc_struct *nseg_desc)
3823 struct tss_segment_32 tss_segment_32;
3826 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3827 sizeof tss_segment_32))
3830 save_state_to_tss32(vcpu, &tss_segment_32);
3832 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3833 sizeof tss_segment_32))
3836 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3837 &tss_segment_32, sizeof tss_segment_32))
3840 if (load_state_from_tss32(vcpu, &tss_segment_32))
3848 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
3850 struct kvm_segment tr_seg;
3851 struct desc_struct cseg_desc;
3852 struct desc_struct nseg_desc;
3854 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
3855 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
3857 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
3859 /* FIXME: Handle errors. Failure to read either TSS or their
3860 * descriptors should generate a pagefault.
3862 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
3865 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
3868 if (reason != TASK_SWITCH_IRET) {
3871 cpl = kvm_x86_ops->get_cpl(vcpu);
3872 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
3873 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
3878 if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
3879 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
3883 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
3884 cseg_desc.type &= ~(1 << 1); //clear the B flag
3885 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
3888 if (reason == TASK_SWITCH_IRET) {
3889 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3890 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
3893 kvm_x86_ops->skip_emulated_instruction(vcpu);
3895 if (nseg_desc.type & 8)
3896 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_base,
3899 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_base,
3902 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
3903 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3904 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
3907 if (reason != TASK_SWITCH_IRET) {
3908 nseg_desc.type |= (1 << 1);
3909 save_guest_segment_descriptor(vcpu, tss_selector,
3913 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
3914 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
3916 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
3920 EXPORT_SYMBOL_GPL(kvm_task_switch);
3922 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
3923 struct kvm_sregs *sregs)
3925 int mmu_reset_needed = 0;
3926 int i, pending_vec, max_bits;
3927 struct descriptor_table dt;
3931 dt.limit = sregs->idt.limit;
3932 dt.base = sregs->idt.base;
3933 kvm_x86_ops->set_idt(vcpu, &dt);
3934 dt.limit = sregs->gdt.limit;
3935 dt.base = sregs->gdt.base;
3936 kvm_x86_ops->set_gdt(vcpu, &dt);
3938 vcpu->arch.cr2 = sregs->cr2;
3939 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
3940 vcpu->arch.cr3 = sregs->cr3;
3942 kvm_set_cr8(vcpu, sregs->cr8);
3944 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
3945 kvm_x86_ops->set_efer(vcpu, sregs->efer);
3946 kvm_set_apic_base(vcpu, sregs->apic_base);
3948 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3950 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
3951 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
3952 vcpu->arch.cr0 = sregs->cr0;
3954 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
3955 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
3956 if (!is_long_mode(vcpu) && is_pae(vcpu))
3957 load_pdptrs(vcpu, vcpu->arch.cr3);
3959 if (mmu_reset_needed)
3960 kvm_mmu_reset_context(vcpu);
3962 if (!irqchip_in_kernel(vcpu->kvm)) {
3963 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
3964 sizeof vcpu->arch.irq_pending);
3965 vcpu->arch.irq_summary = 0;
3966 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
3967 if (vcpu->arch.irq_pending[i])
3968 __set_bit(i, &vcpu->arch.irq_summary);
3970 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
3971 pending_vec = find_first_bit(
3972 (const unsigned long *)sregs->interrupt_bitmap,
3974 /* Only pending external irq is handled here */
3975 if (pending_vec < max_bits) {
3976 kvm_x86_ops->set_irq(vcpu, pending_vec);
3977 pr_debug("Set back pending irq %d\n",
3980 kvm_pic_clear_isr_ack(vcpu->kvm);
3983 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3984 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3985 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3986 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3987 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3988 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3990 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3991 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3993 /* Older userspace won't unhalt the vcpu on reset. */
3994 if (vcpu->vcpu_id == 0 && kvm_rip_read(vcpu) == 0xfff0 &&
3995 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
3996 !(vcpu->arch.cr0 & X86_CR0_PE))
3997 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4004 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4005 struct kvm_guest_debug *dbg)
4011 if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
4012 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
4013 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4014 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4015 vcpu->arch.switch_db_regs =
4016 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4018 for (i = 0; i < KVM_NR_DB_REGS; i++)
4019 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4020 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4023 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4025 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4026 kvm_queue_exception(vcpu, DB_VECTOR);
4027 else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
4028 kvm_queue_exception(vcpu, BP_VECTOR);
4036 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4037 * we have asm/x86/processor.h
4048 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4049 #ifdef CONFIG_X86_64
4050 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4052 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4057 * Translate a guest virtual address to a guest physical address.
4059 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4060 struct kvm_translation *tr)
4062 unsigned long vaddr = tr->linear_address;
4066 down_read(&vcpu->kvm->slots_lock);
4067 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4068 up_read(&vcpu->kvm->slots_lock);
4069 tr->physical_address = gpa;
4070 tr->valid = gpa != UNMAPPED_GVA;
4078 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4080 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4084 memcpy(fpu->fpr, fxsave->st_space, 128);
4085 fpu->fcw = fxsave->cwd;
4086 fpu->fsw = fxsave->swd;
4087 fpu->ftwx = fxsave->twd;
4088 fpu->last_opcode = fxsave->fop;
4089 fpu->last_ip = fxsave->rip;
4090 fpu->last_dp = fxsave->rdp;
4091 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4098 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4100 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4104 memcpy(fxsave->st_space, fpu->fpr, 128);
4105 fxsave->cwd = fpu->fcw;
4106 fxsave->swd = fpu->fsw;
4107 fxsave->twd = fpu->ftwx;
4108 fxsave->fop = fpu->last_opcode;
4109 fxsave->rip = fpu->last_ip;
4110 fxsave->rdp = fpu->last_dp;
4111 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4118 void fx_init(struct kvm_vcpu *vcpu)
4120 unsigned after_mxcsr_mask;
4123 * Touch the fpu the first time in non atomic context as if
4124 * this is the first fpu instruction the exception handler
4125 * will fire before the instruction returns and it'll have to
4126 * allocate ram with GFP_KERNEL.
4129 kvm_fx_save(&vcpu->arch.host_fx_image);
4131 /* Initialize guest FPU by resetting ours and saving into guest's */
4133 kvm_fx_save(&vcpu->arch.host_fx_image);
4135 kvm_fx_save(&vcpu->arch.guest_fx_image);
4136 kvm_fx_restore(&vcpu->arch.host_fx_image);
4139 vcpu->arch.cr0 |= X86_CR0_ET;
4140 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4141 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4142 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4143 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4145 EXPORT_SYMBOL_GPL(fx_init);
4147 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4149 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4152 vcpu->guest_fpu_loaded = 1;
4153 kvm_fx_save(&vcpu->arch.host_fx_image);
4154 kvm_fx_restore(&vcpu->arch.guest_fx_image);
4156 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4158 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4160 if (!vcpu->guest_fpu_loaded)
4163 vcpu->guest_fpu_loaded = 0;
4164 kvm_fx_save(&vcpu->arch.guest_fx_image);
4165 kvm_fx_restore(&vcpu->arch.host_fx_image);
4166 ++vcpu->stat.fpu_reload;
4168 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4170 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4172 if (vcpu->arch.time_page) {
4173 kvm_release_page_dirty(vcpu->arch.time_page);
4174 vcpu->arch.time_page = NULL;
4177 kvm_x86_ops->vcpu_free(vcpu);
4180 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4183 return kvm_x86_ops->vcpu_create(kvm, id);
4186 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4190 /* We do fxsave: this must be aligned. */
4191 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4193 vcpu->arch.mtrr_state.have_fixed = 1;
4195 r = kvm_arch_vcpu_reset(vcpu);
4197 r = kvm_mmu_setup(vcpu);
4204 kvm_x86_ops->vcpu_free(vcpu);
4208 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4211 kvm_mmu_unload(vcpu);
4214 kvm_x86_ops->vcpu_free(vcpu);
4217 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4219 vcpu->arch.nmi_pending = false;
4220 vcpu->arch.nmi_injected = false;
4222 vcpu->arch.switch_db_regs = 0;
4223 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4224 vcpu->arch.dr6 = DR6_FIXED_1;
4225 vcpu->arch.dr7 = DR7_FIXED_1;
4227 return kvm_x86_ops->vcpu_reset(vcpu);
4230 void kvm_arch_hardware_enable(void *garbage)
4232 kvm_x86_ops->hardware_enable(garbage);
4235 void kvm_arch_hardware_disable(void *garbage)
4237 kvm_x86_ops->hardware_disable(garbage);
4240 int kvm_arch_hardware_setup(void)
4242 return kvm_x86_ops->hardware_setup();
4245 void kvm_arch_hardware_unsetup(void)
4247 kvm_x86_ops->hardware_unsetup();
4250 void kvm_arch_check_processor_compat(void *rtn)
4252 kvm_x86_ops->check_processor_compatibility(rtn);
4255 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4261 BUG_ON(vcpu->kvm == NULL);
4264 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4265 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
4266 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4268 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4270 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4275 vcpu->arch.pio_data = page_address(page);
4277 r = kvm_mmu_create(vcpu);
4279 goto fail_free_pio_data;
4281 if (irqchip_in_kernel(kvm)) {
4282 r = kvm_create_lapic(vcpu);
4284 goto fail_mmu_destroy;
4290 kvm_mmu_destroy(vcpu);
4292 free_page((unsigned long)vcpu->arch.pio_data);
4297 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4299 kvm_free_lapic(vcpu);
4300 down_read(&vcpu->kvm->slots_lock);
4301 kvm_mmu_destroy(vcpu);
4302 up_read(&vcpu->kvm->slots_lock);
4303 free_page((unsigned long)vcpu->arch.pio_data);
4306 struct kvm *kvm_arch_create_vm(void)
4308 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4311 return ERR_PTR(-ENOMEM);
4313 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4314 INIT_LIST_HEAD(&kvm->arch.oos_global_pages);
4315 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4317 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4318 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4320 rdtscll(kvm->arch.vm_init_tsc);
4325 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4328 kvm_mmu_unload(vcpu);
4332 static void kvm_free_vcpus(struct kvm *kvm)
4337 * Unpin any mmu pages first.
4339 for (i = 0; i < KVM_MAX_VCPUS; ++i)
4341 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
4342 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
4343 if (kvm->vcpus[i]) {
4344 kvm_arch_vcpu_free(kvm->vcpus[i]);
4345 kvm->vcpus[i] = NULL;
4351 void kvm_arch_sync_events(struct kvm *kvm)
4353 kvm_free_all_assigned_devices(kvm);
4356 void kvm_arch_destroy_vm(struct kvm *kvm)
4358 kvm_iommu_unmap_guest(kvm);
4360 kfree(kvm->arch.vpic);
4361 kfree(kvm->arch.vioapic);
4362 kvm_free_vcpus(kvm);
4363 kvm_free_physmem(kvm);
4364 if (kvm->arch.apic_access_page)
4365 put_page(kvm->arch.apic_access_page);
4366 if (kvm->arch.ept_identity_pagetable)
4367 put_page(kvm->arch.ept_identity_pagetable);
4371 int kvm_arch_set_memory_region(struct kvm *kvm,
4372 struct kvm_userspace_memory_region *mem,
4373 struct kvm_memory_slot old,
4376 int npages = mem->memory_size >> PAGE_SHIFT;
4377 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4379 /*To keep backward compatibility with older userspace,
4380 *x86 needs to hanlde !user_alloc case.
4383 if (npages && !old.rmap) {
4384 unsigned long userspace_addr;
4386 down_write(¤t->mm->mmap_sem);
4387 userspace_addr = do_mmap(NULL, 0,
4389 PROT_READ | PROT_WRITE,
4390 MAP_PRIVATE | MAP_ANONYMOUS,
4392 up_write(¤t->mm->mmap_sem);
4394 if (IS_ERR((void *)userspace_addr))
4395 return PTR_ERR((void *)userspace_addr);
4397 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4398 spin_lock(&kvm->mmu_lock);
4399 memslot->userspace_addr = userspace_addr;
4400 spin_unlock(&kvm->mmu_lock);
4402 if (!old.user_alloc && old.rmap) {
4405 down_write(¤t->mm->mmap_sem);
4406 ret = do_munmap(current->mm, old.userspace_addr,
4407 old.npages * PAGE_SIZE);
4408 up_write(¤t->mm->mmap_sem);
4411 "kvm_vm_ioctl_set_memory_region: "
4412 "failed to munmap memory\n");
4417 if (!kvm->arch.n_requested_mmu_pages) {
4418 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4419 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4422 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4423 kvm_flush_remote_tlbs(kvm);
4428 void kvm_arch_flush_shadow(struct kvm *kvm)
4430 kvm_mmu_zap_all(kvm);
4433 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4435 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4436 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4437 || vcpu->arch.nmi_pending;
4440 static void vcpu_kick_intr(void *info)
4443 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
4444 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
4448 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4450 int ipi_pcpu = vcpu->cpu;
4451 int cpu = get_cpu();
4453 if (waitqueue_active(&vcpu->wq)) {
4454 wake_up_interruptible(&vcpu->wq);
4455 ++vcpu->stat.halt_wakeup;
4458 * We may be called synchronously with irqs disabled in guest mode,
4459 * So need not to call smp_call_function_single() in that case.
4461 if (vcpu->guest_mode && vcpu->cpu != cpu)
4462 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);