git.oblomov.eu Git - linux-2.6/blob - drivers/usb/host/ohci-hcd.c

   1 /*
   2  * OHCI HCD (Host Controller Driver) for USB.
   3  *
   4  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
   5  * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
   6  *
   7  * [ Initialisation is based on Linus'  ]
   8  * [ uhci code and gregs ohci fragments ]
   9  * [ (C) Copyright 1999 Linus Torvalds  ]
  10  * [ (C) Copyright 1999 Gregory P. Smith]
  11  *
  12  *
  13  * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
  14  * interfaces (though some non-x86 Intel chips use it).  It supports
  15  * smarter hardware than UHCI.  A download link for the spec available
  16  * through the http://www.usb.org website.
  17  *
  18  * This file is licenced under the GPL.
  19  */
  20
  21 #include <linux/module.h>
  22 #include <linux/moduleparam.h>
  23 #include <linux/pci.h>
  24 #include <linux/kernel.h>
  25 #include <linux/delay.h>
  26 #include <linux/ioport.h>
  27 #include <linux/sched.h>
  28 #include <linux/slab.h>
  29 #include <linux/errno.h>
  30 #include <linux/init.h>
  31 #include <linux/timer.h>
  32 #include <linux/list.h>
  33 #include <linux/usb.h>
  34 #include <linux/usb/otg.h>
  35 #include <linux/dma-mapping.h>
  36 #include <linux/dmapool.h>
  37 #include <linux/reboot.h>
  38 #include <linux/workqueue.h>
  39 #include <linux/debugfs.h>
  40
  41 #include <asm/io.h>
  42 #include <asm/irq.h>
  43 #include <asm/system.h>
  44 #include <asm/unaligned.h>
  45 #include <asm/byteorder.h>
  46
  47 #include "../core/hcd.h"
  48
  49 #define DRIVER_VERSION "2006 August 04"
  50 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
  51 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
  52
  53 /*-------------------------------------------------------------------------*/
  54
  55 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
  56
  57 /* For initializing controller (mask in an HCFS mode too) */
  58 #define OHCI_CONTROL_INIT       OHCI_CTRL_CBSR
  59 #define OHCI_INTR_INIT \
  60                 (OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE \
  61                 | OHCI_INTR_RD | OHCI_INTR_WDH)
  62
  63 #ifdef __hppa__
  64 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
  65 #define IR_DISABLE
  66 #endif
  67
  68 #ifdef CONFIG_ARCH_OMAP
  69 /* OMAP doesn't support IR (no SMM; not needed) */
  70 #define IR_DISABLE
  71 #endif
  72
  73 /*-------------------------------------------------------------------------*/
  74
  75 static const char       hcd_name [] = "ohci_hcd";
  76
  77 #define STATECHANGE_DELAY       msecs_to_jiffies(300)
  78
  79 #include "ohci.h"
  80
  81 static void ohci_dump (struct ohci_hcd *ohci, int verbose);
  82 static int ohci_init (struct ohci_hcd *ohci);
  83 static void ohci_stop (struct usb_hcd *hcd);
  84
  85 #if defined(CONFIG_PM) || defined(CONFIG_PCI)
  86 static int ohci_restart (struct ohci_hcd *ohci);
  87 #endif
  88
  89 #include "ohci-hub.c"
  90 #include "ohci-dbg.c"
  91 #include "ohci-mem.c"
  92 #include "ohci-q.c"
  93
  94
  95 /*
  96  * On architectures with edge-triggered interrupts we must never return
  97  * IRQ_NONE.
  98  */
  99 #if defined(CONFIG_SA1111)  /* ... or other edge-triggered systems */
 100 #define IRQ_NOTMINE     IRQ_HANDLED
 101 #else
 102 #define IRQ_NOTMINE     IRQ_NONE
 103 #endif
 104
 105
 106 /* Some boards misreport power switching/overcurrent */
 107 static int distrust_firmware = 1;
 108 module_param (distrust_firmware, bool, 0);
 109 MODULE_PARM_DESC (distrust_firmware,
 110         "true to distrust firmware power/overcurrent setup");
 111
 112 /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
 113 static int no_handshake = 0;
 114 module_param (no_handshake, bool, 0);
 115 MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
 116
 117 /*-------------------------------------------------------------------------*/
 118
 119 /*
 120  * queue up an urb for anything except the root hub
 121  */
 122 static int ohci_urb_enqueue (
 123         struct usb_hcd  *hcd,
 124         struct urb      *urb,
 125         gfp_t           mem_flags
 126 ) {
 127         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
 128         struct ed       *ed;
 129         urb_priv_t      *urb_priv;
 130         unsigned int    pipe = urb->pipe;
 131         int             i, size = 0;
 132         unsigned long   flags;
 133         int             retval = 0;
 134
 135 #ifdef OHCI_VERBOSE_DEBUG
 136         urb_print(urb, "SUB", usb_pipein(pipe), -EINPROGRESS);
 137 #endif
 138
 139         /* every endpoint has a ed, locate and maybe (re)initialize it */
 140         if (! (ed = ed_get (ohci, urb->ep, urb->dev, pipe, urb->interval)))
 141                 return -ENOMEM;
 142
 143         /* for the private part of the URB we need the number of TDs (size) */
 144         switch (ed->type) {
 145                 case PIPE_CONTROL:
 146                         /* td_submit_urb() doesn't yet handle these */
 147                         if (urb->transfer_buffer_length > 4096)
 148                                 return -EMSGSIZE;
 149
 150                         /* 1 TD for setup, 1 for ACK, plus ... */
 151                         size = 2;
 152                         /* FALLTHROUGH */
 153                 // case PIPE_INTERRUPT:
 154                 // case PIPE_BULK:
 155                 default:
 156                         /* one TD for every 4096 Bytes (can be upto 8K) */
 157                         size += urb->transfer_buffer_length / 4096;
 158                         /* ... and for any remaining bytes ... */
 159                         if ((urb->transfer_buffer_length % 4096) != 0)
 160                                 size++;
 161                         /* ... and maybe a zero length packet to wrap it up */
 162                         if (size == 0)
 163                                 size++;
 164                         else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
 165                                 && (urb->transfer_buffer_length
 166                                         % usb_maxpacket (urb->dev, pipe,
 167                                                 usb_pipeout (pipe))) == 0)
 168                                 size++;
 169                         break;
 170                 case PIPE_ISOCHRONOUS: /* number of packets from URB */
 171                         size = urb->number_of_packets;
 172                         break;
 173         }
 174
 175         /* allocate the private part of the URB */
 176         urb_priv = kzalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
 177                         mem_flags);
 178         if (!urb_priv)
 179                 return -ENOMEM;
 180         INIT_LIST_HEAD (&urb_priv->pending);
 181         urb_priv->length = size;
 182         urb_priv->ed = ed;
 183
 184         /* allocate the TDs (deferring hash chain updates) */
 185         for (i = 0; i < size; i++) {
 186                 urb_priv->td [i] = td_alloc (ohci, mem_flags);
 187                 if (!urb_priv->td [i]) {
 188                         urb_priv->length = i;
 189                         urb_free_priv (ohci, urb_priv);
 190                         return -ENOMEM;
 191                 }
 192         }
 193
 194         spin_lock_irqsave (&ohci->lock, flags);
 195
 196         /* don't submit to a dead HC */
 197         if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
 198                 retval = -ENODEV;
 199                 goto fail;
 200         }
 201         if (!HC_IS_RUNNING(hcd->state)) {
 202                 retval = -ENODEV;
 203                 goto fail;
 204         }
 205         retval = usb_hcd_link_urb_to_ep(hcd, urb);
 206         if (retval)
 207                 goto fail;
 208
 209         /* schedule the ed if needed */
 210         if (ed->state == ED_IDLE) {
 211                 retval = ed_schedule (ohci, ed);
 212                 if (retval < 0) {
 213                         usb_hcd_unlink_urb_from_ep(hcd, urb);
 214                         goto fail;
 215                 }
 216                 if (ed->type == PIPE_ISOCHRONOUS) {
 217                         u16     frame = ohci_frame_no(ohci);
 218
 219                         /* delay a few frames before the first TD */
 220                         frame += max_t (u16, 8, ed->interval);
 221                         frame &= ~(ed->interval - 1);
 222                         frame |= ed->branch;
 223                         urb->start_frame = frame;
 224
 225                         /* yes, only URB_ISO_ASAP is supported, and
 226                          * urb->start_frame is never used as input.
 227                          */
 228                 }
 229         } else if (ed->type == PIPE_ISOCHRONOUS)
 230                 urb->start_frame = ed->last_iso + ed->interval;
 231
 232         /* fill the TDs and link them to the ed; and
 233          * enable that part of the schedule, if needed
 234          * and update count of queued periodic urbs
 235          */
 236         urb->hcpriv = urb_priv;
 237         td_submit_urb (ohci, urb);
 238
 239 fail:
 240         if (retval)
 241                 urb_free_priv (ohci, urb_priv);
 242         spin_unlock_irqrestore (&ohci->lock, flags);
 243         return retval;
 244 }
 245
 246 /*
 247  * decouple the URB from the HC queues (TDs, urb_priv).
 248  * reporting is always done
 249  * asynchronously, and we might be dealing with an urb that's
 250  * partially transferred, or an ED with other urbs being unlinked.
 251  */
 252 static int ohci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 253 {
 254         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 255         unsigned long           flags;
 256         int                     rc;
 257
 258 #ifdef OHCI_VERBOSE_DEBUG
 259         urb_print(urb, "UNLINK", 1, status);
 260 #endif
 261
 262         spin_lock_irqsave (&ohci->lock, flags);
 263         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 264         if (rc) {
 265                 ;       /* Do nothing */
 266         } else if (HC_IS_RUNNING(hcd->state)) {
 267                 urb_priv_t  *urb_priv;
 268
 269                 /* Unless an IRQ completed the unlink while it was being
 270                  * handed to us, flag it for unlink and giveback, and force
 271                  * some upcoming INTR_SF to call finish_unlinks()
 272                  */
 273                 urb_priv = urb->hcpriv;
 274                 if (urb_priv) {
 275                         if (urb_priv->ed->state == ED_OPER)
 276                                 start_ed_unlink (ohci, urb_priv->ed);
 277                 }
 278         } else {
 279                 /*
 280                  * with HC dead, we won't respect hc queue pointers
 281                  * any more ... just clean up every urb's memory.
 282                  */
 283                 if (urb->hcpriv)
 284                         finish_urb(ohci, urb, status);
 285         }
 286         spin_unlock_irqrestore (&ohci->lock, flags);
 287         return rc;
 288 }
 289
 290 /*-------------------------------------------------------------------------*/
 291
 292 /* frees config/altsetting state for endpoints,
 293  * including ED memory, dummy TD, and bulk/intr data toggle
 294  */
 295
 296 static void
 297 ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 298 {
 299         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 300         unsigned long           flags;
 301         struct ed               *ed = ep->hcpriv;
 302         unsigned                limit = 1000;
 303
 304         /* ASSERT:  any requests/urbs are being unlinked */
 305         /* ASSERT:  nobody can be submitting urbs for this any more */
 306
 307         if (!ed)
 308                 return;
 309
 310 rescan:
 311         spin_lock_irqsave (&ohci->lock, flags);
 312
 313         if (!HC_IS_RUNNING (hcd->state)) {
 314 sanitize:
 315                 ed->state = ED_IDLE;
 316                 if (quirk_zfmicro(ohci) && ed->type == PIPE_INTERRUPT)
 317                         ohci->eds_scheduled--;
 318                 finish_unlinks (ohci, 0);
 319         }
 320
 321         switch (ed->state) {
 322         case ED_UNLINK:         /* wait for hw to finish? */
 323                 /* major IRQ delivery trouble loses INTR_SF too... */
 324                 if (limit-- == 0) {
 325                         ohci_warn(ohci, "ED unlink timeout\n");
 326                         if (quirk_zfmicro(ohci)) {
 327                                 ohci_warn(ohci, "Attempting ZF TD recovery\n");
 328                                 ohci->ed_to_check = ed;
 329                                 ohci->zf_delay = 2;
 330                         }
 331                         goto sanitize;
 332                 }
 333                 spin_unlock_irqrestore (&ohci->lock, flags);
 334                 schedule_timeout_uninterruptible(1);
 335                 goto rescan;
 336         case ED_IDLE:           /* fully unlinked */
 337                 if (list_empty (&ed->td_list)) {
 338                         td_free (ohci, ed->dummy);
 339                         ed_free (ohci, ed);
 340                         break;
 341                 }
 342                 /* else FALL THROUGH */
 343         default:
 344                 /* caller was supposed to have unlinked any requests;
 345                  * that's not our job.  can't recover; must leak ed.
 346                  */
 347                 ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
 348                         ed, ep->desc.bEndpointAddress, ed->state,
 349                         list_empty (&ed->td_list) ? "" : " (has tds)");
 350                 td_free (ohci, ed->dummy);
 351                 break;
 352         }
 353         ep->hcpriv = NULL;
 354         spin_unlock_irqrestore (&ohci->lock, flags);
 355         return;
 356 }
 357
 358 static int ohci_get_frame (struct usb_hcd *hcd)
 359 {
 360         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 361
 362         return ohci_frame_no(ohci);
 363 }
 364
 365 static void ohci_usb_reset (struct ohci_hcd *ohci)
 366 {
 367         ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
 368         ohci->hc_control &= OHCI_CTRL_RWC;
 369         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 370 }
 371
 372 /* ohci_shutdown forcibly disables IRQs and DMA, helping kexec and
 373  * other cases where the next software may expect clean state from the
 374  * "firmware".  this is bus-neutral, unlike shutdown() methods.
 375  */
 376 static void
 377 ohci_shutdown (struct usb_hcd *hcd)
 378 {
 379         struct ohci_hcd *ohci;
 380
 381         ohci = hcd_to_ohci (hcd);
 382         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 383         ohci_usb_reset (ohci);
 384         /* flush the writes */
 385         (void) ohci_readl (ohci, &ohci->regs->control);
 386 }
 387
 388 static int check_ed(struct ohci_hcd *ohci, struct ed *ed)
 389 {
 390         return (hc32_to_cpu(ohci, ed->hwINFO) & ED_IN) != 0
 391                 && (hc32_to_cpu(ohci, ed->hwHeadP) & TD_MASK)
 392                         == (hc32_to_cpu(ohci, ed->hwTailP) & TD_MASK)
 393                 && !list_empty(&ed->td_list);
 394 }
 395
 396 /* ZF Micro watchdog timer callback. The ZF Micro chipset sometimes completes
 397  * an interrupt TD but neglects to add it to the donelist.  On systems with
 398  * this chipset, we need to periodically check the state of the queues to look
 399  * for such "lost" TDs.
 400  */
 401 static void unlink_watchdog_func(unsigned long _ohci)
 402 {
 403         unsigned long   flags;
 404         unsigned        max;
 405         unsigned        seen_count = 0;
 406         unsigned        i;
 407         struct ed       **seen = NULL;
 408         struct ohci_hcd *ohci = (struct ohci_hcd *) _ohci;
 409
 410         spin_lock_irqsave(&ohci->lock, flags);
 411         max = ohci->eds_scheduled;
 412         if (!max)
 413                 goto done;
 414
 415         if (ohci->ed_to_check)
 416                 goto out;
 417
 418         seen = kcalloc(max, sizeof *seen, GFP_ATOMIC);
 419         if (!seen)
 420                 goto out;
 421
 422         for (i = 0; i < NUM_INTS; i++) {
 423                 struct ed       *ed = ohci->periodic[i];
 424
 425                 while (ed) {
 426                         unsigned        temp;
 427
 428                         /* scan this branch of the periodic schedule tree */
 429                         for (temp = 0; temp < seen_count; temp++) {
 430                                 if (seen[temp] == ed) {
 431                                         /* we've checked it and what's after */
 432                                         ed = NULL;
 433                                         break;
 434                                 }
 435                         }
 436                         if (!ed)
 437                                 break;
 438                         seen[seen_count++] = ed;
 439                         if (!check_ed(ohci, ed)) {
 440                                 ed = ed->ed_next;
 441                                 continue;
 442                         }
 443
 444                         /* HC's TD list is empty, but HCD sees at least one
 445                          * TD that's not been sent through the donelist.
 446                          */
 447                         ohci->ed_to_check = ed;
 448                         ohci->zf_delay = 2;
 449
 450                         /* The HC may wait until the next frame to report the
 451                          * TD as done through the donelist and INTR_WDH.  (We
 452                          * just *assume* it's not a multi-TD interrupt URB;
 453                          * those could defer the IRQ more than one frame, using
 454                          * DI...)  Check again after the next INTR_SF.
 455                          */
 456                         ohci_writel(ohci, OHCI_INTR_SF,
 457                                         &ohci->regs->intrstatus);
 458                         ohci_writel(ohci, OHCI_INTR_SF,
 459                                         &ohci->regs->intrenable);
 460
 461                         /* flush those writes */
 462                         (void) ohci_readl(ohci, &ohci->regs->control);
 463
 464                         goto out;
 465                 }
 466         }
 467 out:
 468         kfree(seen);
 469         if (ohci->eds_scheduled)
 470                 mod_timer(&ohci->unlink_watchdog, round_jiffies(jiffies + HZ));
 471 done:
 472         spin_unlock_irqrestore(&ohci->lock, flags);
 473 }
 474
 475 /*-------------------------------------------------------------------------*
 476  * HC functions
 477  *-------------------------------------------------------------------------*/
 478
 479 /* init memory, and kick BIOS/SMM off */
 480
 481 static int ohci_init (struct ohci_hcd *ohci)
 482 {
 483         int ret;
 484         struct usb_hcd *hcd = ohci_to_hcd(ohci);
 485
 486         if (distrust_firmware)
 487                 ohci->flags |= OHCI_QUIRK_HUB_POWER;
 488
 489         disable (ohci);
 490         ohci->regs = hcd->regs;
 491
 492         /* REVISIT this BIOS handshake is now moved into PCI "quirks", and
 493          * was never needed for most non-PCI systems ... remove the code?
 494          */
 495
 496 #ifndef IR_DISABLE
 497         /* SMM owns the HC?  not for long! */
 498         if (!no_handshake && ohci_readl (ohci,
 499                                         &ohci->regs->control) & OHCI_CTRL_IR) {
 500                 u32 temp;
 501
 502                 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
 503
 504                 /* this timeout is arbitrary.  we make it long, so systems
 505                  * depending on usb keyboards may be usable even if the
 506                  * BIOS/SMM code seems pretty broken.
 507                  */
 508                 temp = 500;     /* arbitrary: five seconds */
 509
 510                 ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
 511                 ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
 512                 while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
 513                         msleep (10);
 514                         if (--temp == 0) {
 515                                 ohci_err (ohci, "USB HC takeover failed!"
 516                                         "  (BIOS/SMM bug)\n");
 517                                 return -EBUSY;
 518                         }
 519                 }
 520                 ohci_usb_reset (ohci);
 521         }
 522 #endif
 523
 524         /* Disable HC interrupts */
 525         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 526
 527         /* flush the writes, and save key bits like RWC */
 528         if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC)
 529                 ohci->hc_control |= OHCI_CTRL_RWC;
 530
 531         /* Read the number of ports unless overridden */
 532         if (ohci->num_ports == 0)
 533                 ohci->num_ports = roothub_a(ohci) & RH_A_NDP;
 534
 535         if (ohci->hcca)
 536                 return 0;
 537
 538         ohci->hcca = dma_alloc_coherent (hcd->self.controller,
 539                         sizeof *ohci->hcca, &ohci->hcca_dma, 0);
 540         if (!ohci->hcca)
 541                 return -ENOMEM;
 542
 543         if ((ret = ohci_mem_init (ohci)) < 0)
 544                 ohci_stop (hcd);
 545         else {
 546                 create_debug_files (ohci);
 547         }
 548
 549         return ret;
 550 }
 551
 552 /*-------------------------------------------------------------------------*/
 553
 554 /* Start an OHCI controller, set the BUS operational
 555  * resets USB and controller
 556  * enable interrupts
 557  */
 558 static int ohci_run (struct ohci_hcd *ohci)
 559 {
 560         u32                     mask, temp;
 561         int                     first = ohci->fminterval == 0;
 562         struct usb_hcd          *hcd = ohci_to_hcd(ohci);
 563
 564         disable (ohci);
 565
 566         /* boot firmware should have set this up (5.1.1.3.1) */
 567         if (first) {
 568
 569                 temp = ohci_readl (ohci, &ohci->regs->fminterval);
 570                 ohci->fminterval = temp & 0x3fff;
 571                 if (ohci->fminterval != FI)
 572                         ohci_dbg (ohci, "fminterval delta %d\n",
 573                                 ohci->fminterval - FI);
 574                 ohci->fminterval |= FSMP (ohci->fminterval) << 16;
 575                 /* also: power/overcurrent flags in roothub.a */
 576         }
 577
 578         /* Reset USB nearly "by the book".  RemoteWakeupConnected was
 579          * saved if boot firmware (BIOS/SMM/...) told us it's connected,
 580          * or if bus glue did the same (e.g. for PCI add-in cards with
 581          * PCI PM support).
 582          */
 583         if ((ohci->hc_control & OHCI_CTRL_RWC) != 0
 584                         && !device_may_wakeup(hcd->self.controller))
 585                 device_init_wakeup(hcd->self.controller, 1);
 586
 587         switch (ohci->hc_control & OHCI_CTRL_HCFS) {
 588         case OHCI_USB_OPER:
 589                 temp = 0;
 590                 break;
 591         case OHCI_USB_SUSPEND:
 592         case OHCI_USB_RESUME:
 593                 ohci->hc_control &= OHCI_CTRL_RWC;
 594                 ohci->hc_control |= OHCI_USB_RESUME;
 595                 temp = 10 /* msec wait */;
 596                 break;
 597         // case OHCI_USB_RESET:
 598         default:
 599                 ohci->hc_control &= OHCI_CTRL_RWC;
 600                 ohci->hc_control |= OHCI_USB_RESET;
 601                 temp = 50 /* msec wait */;
 602                 break;
 603         }
 604         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 605         // flush the writes
 606         (void) ohci_readl (ohci, &ohci->regs->control);
 607         msleep(temp);
 608
 609         memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
 610
 611         /* 2msec timelimit here means no irqs/preempt */
 612         spin_lock_irq (&ohci->lock);
 613
 614 retry:
 615         /* HC Reset requires max 10 us delay */
 616         ohci_writel (ohci, OHCI_HCR,  &ohci->regs->cmdstatus);
 617         temp = 30;      /* ... allow extra time */
 618         while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
 619                 if (--temp == 0) {
 620                         spin_unlock_irq (&ohci->lock);
 621                         ohci_err (ohci, "USB HC reset timed out!\n");
 622                         return -1;
 623                 }
 624                 udelay (1);
 625         }
 626
 627         /* now we're in the SUSPEND state ... must go OPERATIONAL
 628          * within 2msec else HC enters RESUME
 629          *
 630          * ... but some hardware won't init fmInterval "by the book"
 631          * (SiS, OPTi ...), so reset again instead.  SiS doesn't need
 632          * this if we write fmInterval after we're OPERATIONAL.
 633          * Unclear about ALi, ServerWorks, and others ... this could
 634          * easily be a longstanding bug in chip init on Linux.
 635          */
 636         if (ohci->flags & OHCI_QUIRK_INITRESET) {
 637                 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 638                 // flush those writes
 639                 (void) ohci_readl (ohci, &ohci->regs->control);
 640         }
 641
 642         /* Tell the controller where the control and bulk lists are
 643          * The lists are empty now. */
 644         ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
 645         ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
 646
 647         /* a reset clears this */
 648         ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
 649
 650         periodic_reinit (ohci);
 651
 652         /* some OHCI implementations are finicky about how they init.
 653          * bogus values here mean not even enumeration could work.
 654          */
 655         if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
 656                         || !ohci_readl (ohci, &ohci->regs->periodicstart)) {
 657                 if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
 658                         ohci->flags |= OHCI_QUIRK_INITRESET;
 659                         ohci_dbg (ohci, "enabling initreset quirk\n");
 660                         goto retry;
 661                 }
 662                 spin_unlock_irq (&ohci->lock);
 663                 ohci_err (ohci, "init err (%08x %04x)\n",
 664                         ohci_readl (ohci, &ohci->regs->fminterval),
 665                         ohci_readl (ohci, &ohci->regs->periodicstart));
 666                 return -EOVERFLOW;
 667         }
 668
 669         /* use rhsc irqs after khubd is fully initialized */
 670         hcd->poll_rh = 1;
 671         hcd->uses_new_polling = 1;
 672
 673         /* start controller operations */
 674         ohci->hc_control &= OHCI_CTRL_RWC;
 675         ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
 676         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 677         hcd->state = HC_STATE_RUNNING;
 678
 679         /* wake on ConnectStatusChange, matching external hubs */
 680         ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
 681
 682         /* Choose the interrupts we care about now, others later on demand */
 683         mask = OHCI_INTR_INIT;
 684         ohci_writel (ohci, ~0, &ohci->regs->intrstatus);
 685         ohci_writel (ohci, mask, &ohci->regs->intrenable);
 686
 687         /* handle root hub init quirks ... */
 688         temp = roothub_a (ohci);
 689         temp &= ~(RH_A_PSM | RH_A_OCPM);
 690         if (ohci->flags & OHCI_QUIRK_SUPERIO) {
 691                 /* NSC 87560 and maybe others */
 692                 temp |= RH_A_NOCP;
 693                 temp &= ~(RH_A_POTPGT | RH_A_NPS);
 694                 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
 695         } else if ((ohci->flags & OHCI_QUIRK_AMD756) ||
 696                         (ohci->flags & OHCI_QUIRK_HUB_POWER)) {
 697                 /* hub power always on; required for AMD-756 and some
 698                  * Mac platforms.  ganged overcurrent reporting, if any.
 699                  */
 700                 temp |= RH_A_NPS;
 701                 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
 702         }
 703         ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
 704         ohci_writel (ohci, (temp & RH_A_NPS) ? 0 : RH_B_PPCM,
 705                                                 &ohci->regs->roothub.b);
 706         // flush those writes
 707         (void) ohci_readl (ohci, &ohci->regs->control);
 708
 709         ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 710         spin_unlock_irq (&ohci->lock);
 711
 712         // POTPGT delay is bits 24-31, in 2 ms units.
 713         mdelay ((temp >> 23) & 0x1fe);
 714         hcd->state = HC_STATE_RUNNING;
 715
 716         if (quirk_zfmicro(ohci)) {
 717                 /* Create timer to watch for bad queue state on ZF Micro */
 718                 setup_timer(&ohci->unlink_watchdog, unlink_watchdog_func,
 719                                 (unsigned long) ohci);
 720
 721                 ohci->eds_scheduled = 0;
 722                 ohci->ed_to_check = NULL;
 723         }
 724
 725         ohci_dump (ohci, 1);
 726
 727         return 0;
 728 }
 729
 730 /*-------------------------------------------------------------------------*/
 731
 732 /* an interrupt happens */
 733
 734 static irqreturn_t ohci_irq (struct usb_hcd *hcd)
 735 {
 736         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 737         struct ohci_regs __iomem *regs = ohci->regs;
 738         int                     ints;
 739
 740         /* Read interrupt status (and flush pending writes).  We ignore the
 741          * optimization of checking the LSB of hcca->done_head; it doesn't
 742          * work on all systems (edge triggering for OHCI can be a factor).
 743          */
 744         ints = ohci_readl(ohci, &regs->intrstatus);
 745
 746         /* Check for an all 1's result which is a typical consequence
 747          * of dead, unclocked, or unplugged (CardBus...) devices
 748          */
 749         if (ints == ~(u32)0) {
 750                 disable (ohci);
 751                 ohci_dbg (ohci, "device removed!\n");
 752                 return IRQ_HANDLED;
 753         }
 754
 755         /* We only care about interrupts that are enabled */
 756         ints &= ohci_readl(ohci, &regs->intrenable);
 757
 758         /* interrupt for some other device? */
 759         if (ints == 0)
 760                 return IRQ_NOTMINE;
 761
 762         if (ints & OHCI_INTR_UE) {
 763                 // e.g. due to PCI Master/Target Abort
 764                 if (quirk_nec(ohci)) {
 765                         /* Workaround for a silicon bug in some NEC chips used
 766                          * in Apple's PowerBooks. Adapted from Darwin code.
 767                          */
 768                         ohci_err (ohci, "OHCI Unrecoverable Error, scheduling NEC chip restart\n");
 769
 770                         ohci_writel (ohci, OHCI_INTR_UE, &regs->intrdisable);
 771
 772                         schedule_work (&ohci->nec_work);
 773                 } else {
 774                         disable (ohci);
 775                         ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
 776                 }
 777
 778                 ohci_dump (ohci, 1);
 779                 ohci_usb_reset (ohci);
 780         }
 781
 782         if (ints & OHCI_INTR_RHSC) {
 783                 ohci_vdbg(ohci, "rhsc\n");
 784                 ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 785                 ohci_writel(ohci, OHCI_INTR_RD | OHCI_INTR_RHSC,
 786                                 &regs->intrstatus);
 787
 788                 /* NOTE: Vendors didn't always make the same implementation
 789                  * choices for RHSC.  Many followed the spec; RHSC triggers
 790                  * on an edge, like setting and maybe clearing a port status
 791                  * change bit.  With others it's level-triggered, active
 792                  * until khubd clears all the port status change bits.  We'll
 793                  * always disable it here and rely on polling until khubd
 794                  * re-enables it.
 795                  */
 796                 ohci_writel(ohci, OHCI_INTR_RHSC, &regs->intrdisable);
 797                 usb_hcd_poll_rh_status(hcd);
 798         }
 799
 800         /* For connect and disconnect events, we expect the controller
 801          * to turn on RHSC along with RD.  But for remote wakeup events
 802          * this might not happen.
 803          */
 804         else if (ints & OHCI_INTR_RD) {
 805                 ohci_vdbg(ohci, "resume detect\n");
 806                 ohci_writel(ohci, OHCI_INTR_RD, &regs->intrstatus);
 807                 hcd->poll_rh = 1;
 808                 if (ohci->autostop) {
 809                         spin_lock (&ohci->lock);
 810                         ohci_rh_resume (ohci);
 811                         spin_unlock (&ohci->lock);
 812                 } else
 813                         usb_hcd_resume_root_hub(hcd);
 814         }
 815
 816         if (ints & OHCI_INTR_WDH) {
 817                 spin_lock (&ohci->lock);
 818                 dl_done_list (ohci);
 819                 spin_unlock (&ohci->lock);
 820         }
 821
 822         if (quirk_zfmicro(ohci) && (ints & OHCI_INTR_SF)) {
 823                 spin_lock(&ohci->lock);
 824                 if (ohci->ed_to_check) {
 825                         struct ed *ed = ohci->ed_to_check;
 826
 827                         if (check_ed(ohci, ed)) {
 828                                 /* HC thinks the TD list is empty; HCD knows
 829                                  * at least one TD is outstanding
 830                                  */
 831                                 if (--ohci->zf_delay == 0) {
 832                                         struct td *td = list_entry(
 833                                                 ed->td_list.next,
 834                                                 struct td, td_list);
 835                                         ohci_warn(ohci,
 836                                                   "Reclaiming orphan TD %p\n",
 837                                                   td);
 838                                         takeback_td(ohci, td);
 839                                         ohci->ed_to_check = NULL;
 840                                 }
 841                         } else
 842                                 ohci->ed_to_check = NULL;
 843                 }
 844                 spin_unlock(&ohci->lock);
 845         }
 846
 847         /* could track INTR_SO to reduce available PCI/... bandwidth */
 848
 849         /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
 850          * when there's still unlinking to be done (next frame).
 851          */
 852         spin_lock (&ohci->lock);
 853         if (ohci->ed_rm_list)
 854                 finish_unlinks (ohci, ohci_frame_no(ohci));
 855         if ((ints & OHCI_INTR_SF) != 0
 856                         && !ohci->ed_rm_list
 857                         && !ohci->ed_to_check
 858                         && HC_IS_RUNNING(hcd->state))
 859                 ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable);
 860         spin_unlock (&ohci->lock);
 861
 862         if (HC_IS_RUNNING(hcd->state)) {
 863                 ohci_writel (ohci, ints, &regs->intrstatus);
 864                 ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable);
 865                 // flush those writes
 866                 (void) ohci_readl (ohci, &ohci->regs->control);
 867         }
 868
 869         return IRQ_HANDLED;
 870 }
 871
 872 /*-------------------------------------------------------------------------*/
 873
 874 static void ohci_stop (struct usb_hcd *hcd)
 875 {
 876         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 877
 878         ohci_dump (ohci, 1);
 879
 880         flush_scheduled_work();
 881
 882         ohci_usb_reset (ohci);
 883         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 884         free_irq(hcd->irq, hcd);
 885         hcd->irq = -1;
 886
 887         if (quirk_zfmicro(ohci))
 888                 del_timer(&ohci->unlink_watchdog);
 889
 890         remove_debug_files (ohci);
 891         ohci_mem_cleanup (ohci);
 892         if (ohci->hcca) {
 893                 dma_free_coherent (hcd->self.controller,
 894                                 sizeof *ohci->hcca,
 895                                 ohci->hcca, ohci->hcca_dma);
 896                 ohci->hcca = NULL;
 897                 ohci->hcca_dma = 0;
 898         }
 899 }
 900
 901 /*-------------------------------------------------------------------------*/
 902
 903 #if defined(CONFIG_PM) || defined(CONFIG_PCI)
 904
 905 /* must not be called from interrupt context */
 906 static int ohci_restart (struct ohci_hcd *ohci)
 907 {
 908         int temp;
 909         int i;
 910         struct urb_priv *priv;
 911
 912         spin_lock_irq(&ohci->lock);
 913         disable (ohci);
 914
 915         /* Recycle any "live" eds/tds (and urbs). */
 916         if (!list_empty (&ohci->pending))
 917                 ohci_dbg(ohci, "abort schedule...\n");
 918         list_for_each_entry (priv, &ohci->pending, pending) {
 919                 struct urb      *urb = priv->td[0]->urb;
 920                 struct ed       *ed = priv->ed;
 921
 922                 switch (ed->state) {
 923                 case ED_OPER:
 924                         ed->state = ED_UNLINK;
 925                         ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
 926                         ed_deschedule (ohci, ed);
 927
 928                         ed->ed_next = ohci->ed_rm_list;
 929                         ed->ed_prev = NULL;
 930                         ohci->ed_rm_list = ed;
 931                         /* FALLTHROUGH */
 932                 case ED_UNLINK:
 933                         break;
 934                 default:
 935                         ohci_dbg(ohci, "bogus ed %p state %d\n",
 936                                         ed, ed->state);
 937                 }
 938
 939                 if (!urb->unlinked)
 940                         urb->unlinked = -ESHUTDOWN;
 941         }
 942         finish_unlinks (ohci, 0);
 943         spin_unlock_irq(&ohci->lock);
 944
 945         /* paranoia, in case that didn't work: */
 946
 947         /* empty the interrupt branches */
 948         for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
 949         for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
 950
 951         /* no EDs to remove */
 952         ohci->ed_rm_list = NULL;
 953
 954         /* empty control and bulk lists */
 955         ohci->ed_controltail = NULL;
 956         ohci->ed_bulktail    = NULL;
 957
 958         if ((temp = ohci_run (ohci)) < 0) {
 959                 ohci_err (ohci, "can't restart, %d\n", temp);
 960                 return temp;
 961         }
 962         ohci_dbg(ohci, "restart complete\n");
 963         return 0;
 964 }
 965
 966 #endif
 967
 968 /*-------------------------------------------------------------------------*/
 969
 970 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
 971
 972 MODULE_AUTHOR (DRIVER_AUTHOR);
 973 MODULE_DESCRIPTION (DRIVER_INFO);
 974 MODULE_LICENSE ("GPL");
 975
 976 #ifdef CONFIG_PCI
 977 #include "ohci-pci.c"
 978 #define PCI_DRIVER              ohci_pci_driver
 979 #endif
 980
 981 #if defined(CONFIG_ARCH_SA1100) && defined(CONFIG_SA1111)
 982 #include "ohci-sa1111.c"
 983 #define SA1111_DRIVER           ohci_hcd_sa1111_driver
 984 #endif
 985
 986 #ifdef CONFIG_ARCH_S3C2410
 987 #include "ohci-s3c2410.c"
 988 #define PLATFORM_DRIVER         ohci_hcd_s3c2410_driver
 989 #endif
 990
 991 #ifdef CONFIG_ARCH_OMAP
 992 #include "ohci-omap.c"
 993 #define PLATFORM_DRIVER         ohci_hcd_omap_driver
 994 #endif
 995
 996 #ifdef CONFIG_ARCH_LH7A404
 997 #include "ohci-lh7a404.c"
 998 #define PLATFORM_DRIVER         ohci_hcd_lh7a404_driver
 999 #endif
1000
1001 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
1002 #include "ohci-pxa27x.c"
1003 #define PLATFORM_DRIVER         ohci_hcd_pxa27x_driver
1004 #endif
1005
1006 #ifdef CONFIG_ARCH_EP93XX
1007 #include "ohci-ep93xx.c"
1008 #define PLATFORM_DRIVER         ohci_hcd_ep93xx_driver
1009 #endif
1010
1011 #ifdef CONFIG_SOC_AU1X00
1012 #include "ohci-au1xxx.c"
1013 #define PLATFORM_DRIVER         ohci_hcd_au1xxx_driver
1014 #endif
1015
1016 #ifdef CONFIG_PNX8550
1017 #include "ohci-pnx8550.c"
1018 #define PLATFORM_DRIVER         ohci_hcd_pnx8550_driver
1019 #endif
1020
1021 #ifdef CONFIG_USB_OHCI_HCD_PPC_SOC
1022 #include "ohci-ppc-soc.c"
1023 #define PLATFORM_DRIVER         ohci_hcd_ppc_soc_driver
1024 #endif
1025
1026 #ifdef CONFIG_ARCH_AT91
1027 #include "ohci-at91.c"
1028 #define PLATFORM_DRIVER         ohci_hcd_at91_driver
1029 #endif
1030
1031 #ifdef CONFIG_ARCH_PNX4008
1032 #include "ohci-pnx4008.c"
1033 #define PLATFORM_DRIVER         usb_hcd_pnx4008_driver
1034 #endif
1035
1036 #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
1037     defined(CONFIG_CPU_SUBTYPE_SH7721) || \
1038     defined(CONFIG_CPU_SUBTYPE_SH7763)
1039 #include "ohci-sh.c"
1040 #define PLATFORM_DRIVER         ohci_hcd_sh_driver
1041 #endif
1042
1043
1044 #ifdef CONFIG_USB_OHCI_HCD_PPC_OF
1045 #include "ohci-ppc-of.c"
1046 #define OF_PLATFORM_DRIVER      ohci_hcd_ppc_of_driver
1047 #endif
1048
1049 #ifdef CONFIG_PPC_PS3
1050 #include "ohci-ps3.c"
1051 #define PS3_SYSTEM_BUS_DRIVER   ps3_ohci_driver
1052 #endif
1053
1054 #ifdef CONFIG_USB_OHCI_HCD_SSB
1055 #include "ohci-ssb.c"
1056 #define SSB_OHCI_DRIVER         ssb_ohci_driver
1057 #endif
1058
1059 #ifdef CONFIG_MFD_SM501
1060 #include "ohci-sm501.c"
1061 #define SM501_OHCI_DRIVER       ohci_hcd_sm501_driver
1062 #endif
1063
1064 #if     !defined(PCI_DRIVER) &&         \
1065         !defined(PLATFORM_DRIVER) &&    \
1066         !defined(OF_PLATFORM_DRIVER) && \
1067         !defined(SA1111_DRIVER) &&      \
1068         !defined(PS3_SYSTEM_BUS_DRIVER) && \
1069         !defined(SM501_OHCI_DRIVER) && \
1070         !defined(SSB_OHCI_DRIVER)
1071 #error "missing bus glue for ohci-hcd"
1072 #endif
1073
1074 static int __init ohci_hcd_mod_init(void)
1075 {
1076         int retval = 0;
1077
1078         if (usb_disabled())
1079                 return -ENODEV;
1080
1081         printk (KERN_DEBUG "%s: " DRIVER_INFO "\n", hcd_name);
1082         pr_debug ("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
1083                 sizeof (struct ed), sizeof (struct td));
1084
1085 #ifdef DEBUG
1086         ohci_debug_root = debugfs_create_dir("ohci", NULL);
1087         if (!ohci_debug_root) {
1088                 retval = -ENOENT;
1089                 goto error_debug;
1090         }
1091 #endif
1092
1093 #ifdef PS3_SYSTEM_BUS_DRIVER
1094         retval = ps3_ohci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1095         if (retval < 0)
1096                 goto error_ps3;
1097 #endif
1098
1099 #ifdef PLATFORM_DRIVER
1100         retval = platform_driver_register(&PLATFORM_DRIVER);
1101         if (retval < 0)
1102                 goto error_platform;
1103 #endif
1104
1105 #ifdef OF_PLATFORM_DRIVER
1106         retval = of_register_platform_driver(&OF_PLATFORM_DRIVER);
1107         if (retval < 0)
1108                 goto error_of_platform;
1109 #endif
1110
1111 #ifdef SA1111_DRIVER
1112         retval = sa1111_driver_register(&SA1111_DRIVER);
1113         if (retval < 0)
1114                 goto error_sa1111;
1115 #endif
1116
1117 #ifdef PCI_DRIVER
1118         retval = pci_register_driver(&PCI_DRIVER);
1119         if (retval < 0)
1120                 goto error_pci;
1121 #endif
1122
1123 #ifdef SSB_OHCI_DRIVER
1124         retval = ssb_driver_register(&SSB_OHCI_DRIVER);
1125         if (retval)
1126                 goto error_ssb;
1127 #endif
1128
1129 #ifdef SM501_OHCI_DRIVER
1130         retval = platform_driver_register(&SM501_OHCI_DRIVER);
1131         if (retval < 0)
1132                 goto error_sm501;
1133 #endif
1134
1135         return retval;
1136
1137         /* Error path */
1138 #ifdef SM501_OHCI_DRIVER
1139  error_sm501:
1140 #endif
1141 #ifdef SSB_OHCI_DRIVER
1142  error_ssb:
1143 #endif
1144 #ifdef PCI_DRIVER
1145         pci_unregister_driver(&PCI_DRIVER);
1146  error_pci:
1147 #endif
1148 #ifdef SA1111_DRIVER
1149         sa1111_driver_unregister(&SA1111_DRIVER);
1150  error_sa1111:
1151 #endif
1152 #ifdef OF_PLATFORM_DRIVER
1153         of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
1154  error_of_platform:
1155 #endif
1156 #ifdef PLATFORM_DRIVER
1157         platform_driver_unregister(&PLATFORM_DRIVER);
1158  error_platform:
1159 #endif
1160 #ifdef PS3_SYSTEM_BUS_DRIVER
1161         ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1162  error_ps3:
1163 #endif
1164 #ifdef DEBUG
1165         debugfs_remove(ohci_debug_root);
1166         ohci_debug_root = NULL;
1167  error_debug:
1168 #endif
1169
1170         return retval;
1171 }
1172 module_init(ohci_hcd_mod_init);
1173
1174 static void __exit ohci_hcd_mod_exit(void)
1175 {
1176 #ifdef SM501_OHCI_DRIVER
1177         platform_driver_unregister(&SM501_OHCI_DRIVER);
1178 #endif
1179 #ifdef SSB_OHCI_DRIVER
1180         ssb_driver_unregister(&SSB_OHCI_DRIVER);
1181 #endif
1182 #ifdef PCI_DRIVER
1183         pci_unregister_driver(&PCI_DRIVER);
1184 #endif
1185 #ifdef SA1111_DRIVER
1186         sa1111_driver_unregister(&SA1111_DRIVER);
1187 #endif
1188 #ifdef OF_PLATFORM_DRIVER
1189         of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
1190 #endif
1191 #ifdef PLATFORM_DRIVER
1192         platform_driver_unregister(&PLATFORM_DRIVER);
1193 #endif
1194 #ifdef PS3_SYSTEM_BUS_DRIVER
1195         ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1196 #endif
1197 #ifdef DEBUG
1198         debugfs_remove(ohci_debug_root);
1199 #endif
1200 }
1201 module_exit(ohci_hcd_mod_exit);
1202