Merge master.kernel.org:/pub/scm/linux/kernel/git/davej/agpgart
[linux-2.6] / drivers / media / video / cx88 / cx88-dvb.c
1 /*
2  *
3  * device driver for Conexant 2388x based TV cards
4  * MPEG Transport Stream (DVB) routines
5  *
6  * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7  * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
8  *
9  *  This program is free software; you can redistribute it and/or modify
10  *  it under the terms of the GNU General Public License as published by
11  *  the Free Software Foundation; either version 2 of the License, or
12  *  (at your option) any later version.
13  *
14  *  This program is distributed in the hope that it will be useful,
15  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *  GNU General Public License for more details.
18  *
19  *  You should have received a copy of the GNU General Public License
20  *  along with this program; if not, write to the Free Software
21  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22  */
23
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
27 #include <linux/fs.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
31
32 #include "cx88.h"
33 #include "dvb-pll.h"
34 #include <media/v4l2-common.h>
35
36 #ifdef HAVE_MT352
37 # include "mt352.h"
38 # include "mt352_priv.h"
39 # ifdef HAVE_VP3054_I2C
40 #  include "cx88-vp3054-i2c.h"
41 # endif
42 #endif
43 #ifdef HAVE_ZL10353
44 # include "zl10353.h"
45 #endif
46 #ifdef HAVE_CX22702
47 # include "cx22702.h"
48 #endif
49 #ifdef HAVE_OR51132
50 # include "or51132.h"
51 #endif
52 #ifdef HAVE_LGDT330X
53 # include "lgdt330x.h"
54 #endif
55 #ifdef HAVE_NXT200X
56 # include "nxt200x.h"
57 #endif
58 #ifdef HAVE_CX24123
59 # include "cx24123.h"
60 #endif
61
62 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
63 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
64 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
65 MODULE_LICENSE("GPL");
66
67 static unsigned int debug = 0;
68 module_param(debug, int, 0644);
69 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
70
71 #define dprintk(level,fmt, arg...)      if (debug >= level) \
72         printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->core->name , ## arg)
73
74 /* ------------------------------------------------------------------ */
75
76 static int dvb_buf_setup(struct videobuf_queue *q,
77                          unsigned int *count, unsigned int *size)
78 {
79         struct cx8802_dev *dev = q->priv_data;
80
81         dev->ts_packet_size  = 188 * 4;
82         dev->ts_packet_count = 32;
83
84         *size  = dev->ts_packet_size * dev->ts_packet_count;
85         *count = 32;
86         return 0;
87 }
88
89 static int dvb_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
90                            enum v4l2_field field)
91 {
92         struct cx8802_dev *dev = q->priv_data;
93         return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
94 }
95
96 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
97 {
98         struct cx8802_dev *dev = q->priv_data;
99         cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
100 }
101
102 static void dvb_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
103 {
104         cx88_free_buffer(q, (struct cx88_buffer*)vb);
105 }
106
107 static struct videobuf_queue_ops dvb_qops = {
108         .buf_setup    = dvb_buf_setup,
109         .buf_prepare  = dvb_buf_prepare,
110         .buf_queue    = dvb_buf_queue,
111         .buf_release  = dvb_buf_release,
112 };
113
114 /* ------------------------------------------------------------------ */
115
116 #if defined(HAVE_MT352) || defined(HAVE_ZL10353)
117 static int zarlink_pll_set(struct dvb_frontend *fe,
118                               struct dvb_frontend_parameters *params,
119                               u8 *pllbuf)
120 {
121         struct cx8802_dev *dev = fe->dvb->priv;
122
123         pllbuf[0] = dev->core->pll_addr << 1;
124         dvb_pll_configure(dev->core->pll_desc, pllbuf + 1,
125                           params->frequency,
126                           params->u.ofdm.bandwidth);
127         return 0;
128 }
129 #endif
130
131 #ifdef HAVE_MT352
132 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
133 {
134         static u8 clock_config []  = { CLOCK_CTL,  0x38, 0x39 };
135         static u8 reset []         = { RESET,      0x80 };
136         static u8 adc_ctl_1_cfg [] = { ADC_CTL_1,  0x40 };
137         static u8 agc_cfg []       = { AGC_TARGET, 0x24, 0x20 };
138         static u8 gpp_ctl_cfg []   = { GPP_CTL,    0x33 };
139         static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
140
141         mt352_write(fe, clock_config,   sizeof(clock_config));
142         udelay(200);
143         mt352_write(fe, reset,          sizeof(reset));
144         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
145
146         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
147         mt352_write(fe, gpp_ctl_cfg,    sizeof(gpp_ctl_cfg));
148         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
149         return 0;
150 }
151
152 static int dvico_dual_demod_init(struct dvb_frontend *fe)
153 {
154         static u8 clock_config []  = { CLOCK_CTL,  0x38, 0x38 };
155         static u8 reset []         = { RESET,      0x80 };
156         static u8 adc_ctl_1_cfg [] = { ADC_CTL_1,  0x40 };
157         static u8 agc_cfg []       = { AGC_TARGET, 0x28, 0x20 };
158         static u8 gpp_ctl_cfg []   = { GPP_CTL,    0x33 };
159         static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
160
161         mt352_write(fe, clock_config,   sizeof(clock_config));
162         udelay(200);
163         mt352_write(fe, reset,          sizeof(reset));
164         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
165
166         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
167         mt352_write(fe, gpp_ctl_cfg,    sizeof(gpp_ctl_cfg));
168         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
169
170         return 0;
171 }
172
173 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
174 {
175         static u8 clock_config []  = { 0x89, 0x38, 0x39 };
176         static u8 reset []         = { 0x50, 0x80 };
177         static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
178         static u8 agc_cfg []       = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
179                                        0x00, 0xFF, 0x00, 0x40, 0x40 };
180         static u8 dntv_extra[]     = { 0xB5, 0x7A };
181         static u8 capt_range_cfg[] = { 0x75, 0x32 };
182
183         mt352_write(fe, clock_config,   sizeof(clock_config));
184         udelay(2000);
185         mt352_write(fe, reset,          sizeof(reset));
186         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
187
188         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
189         udelay(2000);
190         mt352_write(fe, dntv_extra,     sizeof(dntv_extra));
191         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
192
193         return 0;
194 }
195
196 static struct mt352_config dvico_fusionhdtv = {
197         .demod_address = 0x0F,
198         .demod_init    = dvico_fusionhdtv_demod_init,
199         .pll_set       = zarlink_pll_set,
200 };
201
202 static struct mt352_config dntv_live_dvbt_config = {
203         .demod_address = 0x0f,
204         .demod_init    = dntv_live_dvbt_demod_init,
205         .pll_set       = zarlink_pll_set,
206 };
207
208 static struct mt352_config dvico_fusionhdtv_dual = {
209         .demod_address = 0x0F,
210         .demod_init    = dvico_dual_demod_init,
211         .pll_set       = zarlink_pll_set,
212 };
213
214 #ifdef HAVE_VP3054_I2C
215 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
216 {
217         static u8 clock_config []  = { 0x89, 0x38, 0x38 };
218         static u8 reset []         = { 0x50, 0x80 };
219         static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
220         static u8 agc_cfg []       = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
221                                        0x00, 0xFF, 0x00, 0x40, 0x40 };
222         static u8 dntv_extra[]     = { 0xB5, 0x7A };
223         static u8 capt_range_cfg[] = { 0x75, 0x32 };
224
225         mt352_write(fe, clock_config,   sizeof(clock_config));
226         udelay(2000);
227         mt352_write(fe, reset,          sizeof(reset));
228         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
229
230         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
231         udelay(2000);
232         mt352_write(fe, dntv_extra,     sizeof(dntv_extra));
233         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
234
235         return 0;
236 }
237
238 static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
239 {
240         struct cx8802_dev *dev= fe->dvb->priv;
241
242         /* this message is to set up ATC and ALC */
243         static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
244         struct i2c_msg msg =
245                 { .addr = dev->core->pll_addr, .flags = 0,
246                   .buf = fmd1216_init, .len = sizeof(fmd1216_init) };
247         int err;
248
249         if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
250                 if (err < 0)
251                         return err;
252                 else
253                         return -EREMOTEIO;
254         }
255
256         return 0;
257 }
258
259 static int dntv_live_dvbt_pro_pll_set(struct dvb_frontend* fe,
260                                       struct dvb_frontend_parameters* params,
261                                       u8* pllbuf)
262 {
263         struct cx8802_dev *dev= fe->dvb->priv;
264         struct i2c_msg msg =
265                 { .addr = dev->core->pll_addr, .flags = 0,
266                   .buf = pllbuf+1, .len = 4 };
267         int err;
268
269         /* Switch PLL to DVB mode */
270         err = philips_fmd1216_pll_init(fe);
271         if (err)
272                 return err;
273
274         /* Tune PLL */
275         pllbuf[0] = dev->core->pll_addr << 1;
276         dvb_pll_configure(dev->core->pll_desc, pllbuf+1,
277                           params->frequency,
278                           params->u.ofdm.bandwidth);
279         if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
280                 printk(KERN_WARNING "cx88-dvb: %s error "
281                            "(addr %02x <- %02x, err = %i)\n",
282                            __FUNCTION__, pllbuf[0], pllbuf[1], err);
283                 if (err < 0)
284                         return err;
285                 else
286                         return -EREMOTEIO;
287         }
288
289         return 0;
290 }
291
292 static struct mt352_config dntv_live_dvbt_pro_config = {
293         .demod_address = 0x0f,
294         .no_tuner      = 1,
295         .demod_init    = dntv_live_dvbt_pro_demod_init,
296         .pll_set       = dntv_live_dvbt_pro_pll_set,
297 };
298 #endif
299 #endif
300
301 #ifdef HAVE_ZL10353
302 static int dvico_hybrid_tune_pll(struct dvb_frontend *fe,
303                                  struct dvb_frontend_parameters *params,
304                                  u8 *pllbuf)
305 {
306         struct cx8802_dev *dev= fe->dvb->priv;
307         struct i2c_msg msg =
308                 { .addr = dev->core->pll_addr, .flags = 0,
309                   .buf = pllbuf + 1, .len = 4 };
310         int err;
311
312         pllbuf[0] = dev->core->pll_addr << 1;
313         dvb_pll_configure(dev->core->pll_desc, pllbuf + 1,
314                           params->frequency,
315                           params->u.ofdm.bandwidth);
316
317         if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
318                 printk(KERN_WARNING "cx88-dvb: %s error "
319                            "(addr %02x <- %02x, err = %i)\n",
320                            __FUNCTION__, pllbuf[0], pllbuf[1], err);
321                 if (err < 0)
322                         return err;
323                 else
324                         return -EREMOTEIO;
325         }
326
327         return 0;
328 }
329
330 static struct zl10353_config dvico_fusionhdtv_hybrid = {
331         .demod_address = 0x0F,
332         .pll_set       = dvico_hybrid_tune_pll,
333 };
334
335 static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
336         .demod_address = 0x0F,
337         .pll_set       = zarlink_pll_set,
338 };
339 #endif
340
341 #ifdef HAVE_CX22702
342 static struct cx22702_config connexant_refboard_config = {
343         .demod_address = 0x43,
344         .output_mode   = CX22702_SERIAL_OUTPUT,
345         .pll_address   = 0x60,
346         .pll_desc      = &dvb_pll_thomson_dtt7579,
347 };
348
349 static struct cx22702_config hauppauge_novat_config = {
350         .demod_address = 0x43,
351         .output_mode   = CX22702_SERIAL_OUTPUT,
352         .pll_address   = 0x61,
353         .pll_desc      = &dvb_pll_thomson_dtt759x,
354 };
355 static struct cx22702_config hauppauge_hvr1100_config = {
356         .demod_address = 0x63,
357         .output_mode   = CX22702_SERIAL_OUTPUT,
358         .pll_address   = 0x61,
359         .pll_desc      = &dvb_pll_fmd1216me,
360 };
361 #endif
362
363 #ifdef HAVE_OR51132
364 static int or51132_set_ts_param(struct dvb_frontend* fe,
365                                 int is_punctured)
366 {
367         struct cx8802_dev *dev= fe->dvb->priv;
368         dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
369         return 0;
370 }
371
372 static struct or51132_config pchdtv_hd3000 = {
373         .demod_address    = 0x15,
374         .pll_address      = 0x61,
375         .pll_desc         = &dvb_pll_thomson_dtt761x,
376         .set_ts_params    = or51132_set_ts_param,
377 };
378 #endif
379
380 #ifdef HAVE_LGDT330X
381 static int lgdt330x_pll_set(struct dvb_frontend* fe,
382                             struct dvb_frontend_parameters* params)
383 {
384         /* FIXME make this routine use the tuner-simple code.
385          * It could probably be shared with a number of ATSC
386          * frontends. Many share the same tuner with analog TV. */
387
388         struct cx8802_dev *dev= fe->dvb->priv;
389         struct cx88_core *core = dev->core;
390         u8 buf[4];
391         struct i2c_msg msg =
392                 { .addr = dev->core->pll_addr, .flags = 0, .buf = buf, .len = 4 };
393         int err;
394
395         /* Put the analog decoder in standby to keep it quiet */
396         cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
397
398         dvb_pll_configure(core->pll_desc, buf, params->frequency, 0);
399         dprintk(1, "%s: tuner at 0x%02x bytes: 0x%02x 0x%02x 0x%02x 0x%02x\n",
400                         __FUNCTION__, msg.addr, buf[0],buf[1],buf[2],buf[3]);
401         if ((err = i2c_transfer(&core->i2c_adap, &msg, 1)) != 1) {
402                 printk(KERN_WARNING "cx88-dvb: %s error "
403                            "(addr %02x <- %02x, err = %i)\n",
404                            __FUNCTION__, buf[0], buf[1], err);
405                 if (err < 0)
406                         return err;
407                 else
408                         return -EREMOTEIO;
409         }
410         if (core->tuner_type == TUNER_LG_TDVS_H062F) {
411                 /* Set the Auxiliary Byte. */
412                 buf[2] &= ~0x20;
413                 buf[2] |= 0x18;
414                 buf[3] = 0x50;
415                 i2c_transfer(&core->i2c_adap, &msg, 1);
416         }
417         return 0;
418 }
419
420 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
421 {
422         struct cx8802_dev *dev= fe->dvb->priv;
423         struct cx88_core *core = dev->core;
424
425         dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
426         if (index == 0)
427                 cx_clear(MO_GP0_IO, 8);
428         else
429                 cx_set(MO_GP0_IO, 8);
430         return 0;
431 }
432
433 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
434 {
435         struct cx8802_dev *dev= fe->dvb->priv;
436         if (is_punctured)
437                 dev->ts_gen_cntrl |= 0x04;
438         else
439                 dev->ts_gen_cntrl &= ~0x04;
440         return 0;
441 }
442
443 static struct lgdt330x_config fusionhdtv_3_gold = {
444         .demod_address    = 0x0e,
445         .demod_chip       = LGDT3302,
446         .serial_mpeg      = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
447         .pll_set          = lgdt330x_pll_set,
448         .set_ts_params    = lgdt330x_set_ts_param,
449 };
450
451 static struct lgdt330x_config fusionhdtv_5_gold = {
452         .demod_address    = 0x0e,
453         .demod_chip       = LGDT3303,
454         .serial_mpeg      = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
455         .pll_set          = lgdt330x_pll_set,
456         .set_ts_params    = lgdt330x_set_ts_param,
457 };
458 #endif
459
460 #ifdef HAVE_NXT200X
461 static int nxt200x_set_ts_param(struct dvb_frontend* fe,
462                                 int is_punctured)
463 {
464         struct cx8802_dev *dev= fe->dvb->priv;
465         dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
466         return 0;
467 }
468
469 static int nxt200x_set_pll_input(u8* buf, int input)
470 {
471         if (input)
472                 buf[3] |= 0x08;
473         else
474                 buf[3] &= ~0x08;
475         return 0;
476 }
477
478 static struct nxt200x_config ati_hdtvwonder = {
479         .demod_address    = 0x0a,
480         .pll_address      = 0x61,
481         .pll_desc         = &dvb_pll_tuv1236d,
482         .set_pll_input    = nxt200x_set_pll_input,
483         .set_ts_params    = nxt200x_set_ts_param,
484 };
485 #endif
486
487 #ifdef HAVE_CX24123
488 static int cx24123_set_ts_param(struct dvb_frontend* fe,
489         int is_punctured)
490 {
491         struct cx8802_dev *dev= fe->dvb->priv;
492         dev->ts_gen_cntrl = 0x2;
493         return 0;
494 }
495
496 static void cx24123_enable_lnb_voltage(struct dvb_frontend* fe, int on)
497 {
498         struct cx8802_dev *dev= fe->dvb->priv;
499         struct cx88_core *core = dev->core;
500
501         if (on)
502                 cx_write(MO_GP0_IO, 0x000006f9);
503         else
504                 cx_write(MO_GP0_IO, 0x000006fB);
505 }
506
507 static struct cx24123_config hauppauge_novas_config = {
508         .demod_address          = 0x55,
509         .use_isl6421            = 1,
510         .set_ts_params          = cx24123_set_ts_param,
511 };
512
513 static struct cx24123_config kworld_dvbs_100_config = {
514         .demod_address          = 0x15,
515         .use_isl6421            = 0,
516         .set_ts_params          = cx24123_set_ts_param,
517         .enable_lnb_voltage     = cx24123_enable_lnb_voltage,
518 };
519 #endif
520
521 static int dvb_register(struct cx8802_dev *dev)
522 {
523         /* init struct videobuf_dvb */
524         dev->dvb.name = dev->core->name;
525         dev->ts_gen_cntrl = 0x0c;
526
527         /* init frontend */
528         switch (dev->core->board) {
529 #ifdef HAVE_CX22702
530         case CX88_BOARD_HAUPPAUGE_DVB_T1:
531                 dev->dvb.frontend = cx22702_attach(&hauppauge_novat_config,
532                                                    &dev->core->i2c_adap);
533                 break;
534         case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
535         case CX88_BOARD_CONEXANT_DVB_T1:
536         case CX88_BOARD_KWORLD_DVB_T_CX22702:
537         case CX88_BOARD_WINFAST_DTV1000:
538                 dev->dvb.frontend = cx22702_attach(&connexant_refboard_config,
539                                                    &dev->core->i2c_adap);
540                 break;
541         case CX88_BOARD_HAUPPAUGE_HVR1100:
542         case CX88_BOARD_HAUPPAUGE_HVR1100LP:
543                 dev->dvb.frontend = cx22702_attach(&hauppauge_hvr1100_config,
544                                                    &dev->core->i2c_adap);
545                 break;
546 #endif
547 #if defined(HAVE_MT352) || defined(HAVE_ZL10353)
548         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
549                 dev->core->pll_addr = 0x60;
550                 dev->core->pll_desc = &dvb_pll_thomson_dtt7579;
551 #ifdef HAVE_MT352
552                 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
553                                                  &dev->core->i2c_adap);
554                 if (dev->dvb.frontend != NULL)
555                         break;
556 #endif
557 #ifdef HAVE_ZL10353
558                 /* ZL10353 replaces MT352 on later cards */
559                 dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_plus_v1_1,
560                                                    &dev->core->i2c_adap);
561 #endif
562                 break;
563 #endif /* HAVE_MT352 || HAVE_ZL10353 */
564 #ifdef HAVE_MT352
565         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
566                 dev->core->pll_addr = 0x61;
567                 dev->core->pll_desc = &dvb_pll_lg_z201;
568                 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
569                                                  &dev->core->i2c_adap);
570                 break;
571         case CX88_BOARD_KWORLD_DVB_T:
572         case CX88_BOARD_DNTV_LIVE_DVB_T:
573         case CX88_BOARD_ADSTECH_DVB_T_PCI:
574                 dev->core->pll_addr = 0x61;
575                 dev->core->pll_desc = &dvb_pll_unknown_1;
576                 dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_config,
577                                                  &dev->core->i2c_adap);
578                 break;
579         case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
580 #ifdef HAVE_VP3054_I2C
581                 dev->core->pll_addr = 0x61;
582                 dev->core->pll_desc = &dvb_pll_fmd1216me;
583                 dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_pro_config,
584                         &((struct vp3054_i2c_state *)dev->card_priv)->adap);
585 #else
586                 printk("%s: built without vp3054 support\n", dev->core->name);
587 #endif
588                 break;
589         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
590                 /* The tin box says DEE1601, but it seems to be DTT7579
591                  * compatible, with a slightly different MT352 AGC gain. */
592                 dev->core->pll_addr = 0x61;
593                 dev->core->pll_desc = &dvb_pll_thomson_dtt7579;
594                 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv_dual,
595                                                  &dev->core->i2c_adap);
596                 break;
597 #endif
598 #ifdef HAVE_ZL10353
599         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
600                 dev->core->pll_addr = 0x61;
601                 dev->core->pll_desc = &dvb_pll_thomson_fe6600;
602                 dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_hybrid,
603                                                    &dev->core->i2c_adap);
604                 break;
605 #endif
606 #ifdef HAVE_OR51132
607         case CX88_BOARD_PCHDTV_HD3000:
608                 dev->dvb.frontend = or51132_attach(&pchdtv_hd3000,
609                                                  &dev->core->i2c_adap);
610                 break;
611 #endif
612 #ifdef HAVE_LGDT330X
613         case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
614                 dev->ts_gen_cntrl = 0x08;
615                 {
616                 /* Do a hardware reset of chip before using it. */
617                 struct cx88_core *core = dev->core;
618
619                 cx_clear(MO_GP0_IO, 1);
620                 mdelay(100);
621                 cx_set(MO_GP0_IO, 1);
622                 mdelay(200);
623
624                 /* Select RF connector callback */
625                 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
626                 dev->core->pll_addr = 0x61;
627                 dev->core->pll_desc = &dvb_pll_microtune_4042;
628                 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
629                                                     &dev->core->i2c_adap);
630                 }
631                 break;
632         case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
633                 dev->ts_gen_cntrl = 0x08;
634                 {
635                 /* Do a hardware reset of chip before using it. */
636                 struct cx88_core *core = dev->core;
637
638                 cx_clear(MO_GP0_IO, 1);
639                 mdelay(100);
640                 cx_set(MO_GP0_IO, 9);
641                 mdelay(200);
642                 dev->core->pll_addr = 0x61;
643                 dev->core->pll_desc = &dvb_pll_thomson_dtt761x;
644                 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
645                                                     &dev->core->i2c_adap);
646                 }
647                 break;
648         case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
649                 dev->ts_gen_cntrl = 0x08;
650                 {
651                 /* Do a hardware reset of chip before using it. */
652                 struct cx88_core *core = dev->core;
653
654                 cx_clear(MO_GP0_IO, 1);
655                 mdelay(100);
656                 cx_set(MO_GP0_IO, 1);
657                 mdelay(200);
658                 dev->core->pll_addr = 0x61;
659                 dev->core->pll_desc = &dvb_pll_tdvs_tua6034;
660                 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_5_gold,
661                                                     &dev->core->i2c_adap);
662                 }
663                 break;
664 #endif
665 #ifdef HAVE_NXT200X
666         case CX88_BOARD_ATI_HDTVWONDER:
667                 dev->dvb.frontend = nxt200x_attach(&ati_hdtvwonder,
668                                                  &dev->core->i2c_adap);
669                 break;
670 #endif
671 #ifdef HAVE_CX24123
672         case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
673         case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
674                 dev->dvb.frontend = cx24123_attach(&hauppauge_novas_config,
675                         &dev->core->i2c_adap);
676                 break;
677         case CX88_BOARD_KWORLD_DVBS_100:
678                 dev->dvb.frontend = cx24123_attach(&kworld_dvbs_100_config,
679                         &dev->core->i2c_adap);
680                 break;
681 #endif
682         default:
683                 printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
684                        dev->core->name);
685                 break;
686         }
687         if (NULL == dev->dvb.frontend) {
688                 printk("%s: frontend initialization failed\n",dev->core->name);
689                 return -1;
690         }
691
692         if (dev->core->pll_desc) {
693                 dev->dvb.frontend->ops->info.frequency_min = dev->core->pll_desc->min;
694                 dev->dvb.frontend->ops->info.frequency_max = dev->core->pll_desc->max;
695         }
696
697         /* Put the analog decoder in standby to keep it quiet */
698         cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
699
700         /* register everything */
701         return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev);
702 }
703
704 /* ----------------------------------------------------------- */
705
706 static int __devinit dvb_probe(struct pci_dev *pci_dev,
707                                const struct pci_device_id *pci_id)
708 {
709         struct cx8802_dev *dev;
710         struct cx88_core  *core;
711         int err;
712
713         /* general setup */
714         core = cx88_core_get(pci_dev);
715         if (NULL == core)
716                 return -EINVAL;
717
718         err = -ENODEV;
719         if (!cx88_boards[core->board].dvb)
720                 goto fail_core;
721
722         err = -ENOMEM;
723         dev = kzalloc(sizeof(*dev),GFP_KERNEL);
724         if (NULL == dev)
725                 goto fail_core;
726         dev->pci = pci_dev;
727         dev->core = core;
728
729         err = cx8802_init_common(dev);
730         if (0 != err)
731                 goto fail_free;
732
733 #ifdef HAVE_VP3054_I2C
734         err = vp3054_i2c_probe(dev);
735         if (0 != err)
736                 goto fail_free;
737 #endif
738
739         /* dvb stuff */
740         printk("%s/2: cx2388x based dvb card\n", core->name);
741         videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
742                             dev->pci, &dev->slock,
743                             V4L2_BUF_TYPE_VIDEO_CAPTURE,
744                             V4L2_FIELD_TOP,
745                             sizeof(struct cx88_buffer),
746                             dev);
747         err = dvb_register(dev);
748         if (0 != err)
749                 goto fail_fini;
750
751         /* Maintain a reference to cx88-video can query the 8802 device. */
752         core->dvbdev = dev;
753         return 0;
754
755  fail_fini:
756         cx8802_fini_common(dev);
757  fail_free:
758         kfree(dev);
759  fail_core:
760         cx88_core_put(core,pci_dev);
761         return err;
762 }
763
764 static void __devexit dvb_remove(struct pci_dev *pci_dev)
765 {
766         struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
767
768         /* Destroy any 8802 reference. */
769         dev->core->dvbdev = NULL;
770
771         /* dvb */
772         videobuf_dvb_unregister(&dev->dvb);
773
774 #ifdef HAVE_VP3054_I2C
775         vp3054_i2c_remove(dev);
776 #endif
777
778         /* common */
779         cx8802_fini_common(dev);
780         cx88_core_put(dev->core,dev->pci);
781         kfree(dev);
782 }
783
784 static struct pci_device_id cx8802_pci_tbl[] = {
785         {
786                 .vendor       = 0x14f1,
787                 .device       = 0x8802,
788                 .subvendor    = PCI_ANY_ID,
789                 .subdevice    = PCI_ANY_ID,
790         },{
791                 /* --- end of list --- */
792         }
793 };
794 MODULE_DEVICE_TABLE(pci, cx8802_pci_tbl);
795
796 static struct pci_driver dvb_pci_driver = {
797         .name     = "cx88-dvb",
798         .id_table = cx8802_pci_tbl,
799         .probe    = dvb_probe,
800         .remove   = __devexit_p(dvb_remove),
801         .suspend  = cx8802_suspend_common,
802         .resume   = cx8802_resume_common,
803 };
804
805 static int dvb_init(void)
806 {
807         printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
808                (CX88_VERSION_CODE >> 16) & 0xff,
809                (CX88_VERSION_CODE >>  8) & 0xff,
810                CX88_VERSION_CODE & 0xff);
811 #ifdef SNAPSHOT
812         printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
813                SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
814 #endif
815         return pci_register_driver(&dvb_pci_driver);
816 }
817
818 static void dvb_fini(void)
819 {
820         pci_unregister_driver(&dvb_pci_driver);
821 }
822
823 module_init(dvb_init);
824 module_exit(dvb_fini);
825
826 /*
827  * Local variables:
828  * c-basic-offset: 8
829  * compile-command: "make DVB=1"
830  * End:
831  */