Merge master.kernel.org:/home/rmk/linux-2.6-arm
[linux-2.6] / drivers / video / s3c2410fb.c
1 /*
2  * linux/drivers/video/s3c2410fb.c
3  *      Copyright (c) Arnaud Patard, Ben Dooks
4  *
5  * This file is subject to the terms and conditions of the GNU General Public
6  * License.  See the file COPYING in the main directory of this archive for
7  * more details.
8  *
9  *          S3C2410 LCD Controller Frame Buffer Driver
10  *          based on skeletonfb.c, sa1100fb.c and others
11  *
12  * ChangeLog
13  * 2005-04-07: Arnaud Patard <arnaud.patard@rtp-net.org>
14  *      - u32 state -> pm_message_t state
15  *      - S3C2410_{VA,SZ}_LCD -> S3C24XX
16  *
17  * 2005-03-15: Arnaud Patard <arnaud.patard@rtp-net.org>
18  *      - Removed the ioctl
19  *      - use readl/writel instead of __raw_writel/__raw_readl
20  *
21  * 2004-12-04: Arnaud Patard <arnaud.patard@rtp-net.org>
22  *      - Added the possibility to set on or off the
23  *      debugging mesaages
24  *      - Replaced 0 and 1 by on or off when reading the
25  *      /sys files
26  *
27  * 2005-03-23: Ben Dooks <ben-linux@fluff.org>
28  *      - added non 16bpp modes
29  *      - updated platform information for range of x/y/bpp
30  *      - add code to ensure palette is written correctly
31  *      - add pixel clock divisor control
32  *
33  * 2004-11-11: Arnaud Patard <arnaud.patard@rtp-net.org>
34  *      - Removed the use of currcon as it no more exist
35  *      - Added LCD power sysfs interface
36  *
37  * 2004-11-03: Ben Dooks <ben-linux@fluff.org>
38  *      - minor cleanups
39  *      - add suspend/resume support
40  *      - s3c2410fb_setcolreg() not valid in >8bpp modes
41  *      - removed last CONFIG_FB_S3C2410_FIXED
42  *      - ensure lcd controller stopped before cleanup
43  *      - added sysfs interface for backlight power
44  *      - added mask for gpio configuration
45  *      - ensured IRQs disabled during GPIO configuration
46  *      - disable TPAL before enabling video
47  *
48  * 2004-09-20: Arnaud Patard <arnaud.patard@rtp-net.org>
49  *      - Suppress command line options
50  *
51  * 2004-09-15: Arnaud Patard <arnaud.patard@rtp-net.org>
52  *      - code cleanup
53  *
54  * 2004-09-07: Arnaud Patard <arnaud.patard@rtp-net.org>
55  *      - Renamed from h1940fb.c to s3c2410fb.c
56  *      - Add support for different devices
57  *      - Backlight support
58  *
59  * 2004-09-05: Herbert Pötzl <herbert@13thfloor.at>
60  *      - added clock (de-)allocation code
61  *      - added fixem fbmem option
62  *
63  * 2004-07-27: Arnaud Patard <arnaud.patard@rtp-net.org>
64  *      - code cleanup
65  *      - added a forgotten return in h1940fb_init
66  *
67  * 2004-07-19: Herbert Pötzl <herbert@13thfloor.at>
68  *      - code cleanup and extended debugging
69  *
70  * 2004-07-15: Arnaud Patard <arnaud.patard@rtp-net.org>
71  *      - First version
72  */
73
74 #include <linux/module.h>
75 #include <linux/kernel.h>
76 #include <linux/errno.h>
77 #include <linux/string.h>
78 #include <linux/mm.h>
79 #include <linux/slab.h>
80 #include <linux/delay.h>
81 #include <linux/fb.h>
82 #include <linux/init.h>
83 #include <linux/dma-mapping.h>
84 #include <linux/interrupt.h>
85 #include <linux/workqueue.h>
86 #include <linux/wait.h>
87 #include <linux/platform_device.h>
88 #include <linux/clk.h>
89
90 #include <asm/io.h>
91 #include <asm/uaccess.h>
92 #include <asm/div64.h>
93
94 #include <asm/mach/map.h>
95 #include <asm/arch/regs-lcd.h>
96 #include <asm/arch/regs-gpio.h>
97 #include <asm/arch/fb.h>
98
99 #ifdef CONFIG_PM
100 #include <linux/pm.h>
101 #endif
102
103 #include "s3c2410fb.h"
104
105
106 static struct s3c2410fb_mach_info *mach_info;
107
108 /* Debugging stuff */
109 #ifdef CONFIG_FB_S3C2410_DEBUG
110 static int debug           = 1;
111 #else
112 static int debug           = 0;
113 #endif
114
115 #define dprintk(msg...) if (debug) { printk(KERN_DEBUG "s3c2410fb: " msg); }
116
117 /* useful functions */
118
119 /* s3c2410fb_set_lcdaddr
120  *
121  * initialise lcd controller address pointers
122 */
123
124 static void s3c2410fb_set_lcdaddr(struct s3c2410fb_info *fbi)
125 {
126         struct fb_var_screeninfo *var = &fbi->fb->var;
127         unsigned long saddr1, saddr2, saddr3;
128
129         saddr1  = fbi->fb->fix.smem_start >> 1;
130         saddr2  = fbi->fb->fix.smem_start;
131         saddr2 += (var->xres * var->yres * var->bits_per_pixel)/8;
132         saddr2>>= 1;
133
134         saddr3 =  S3C2410_OFFSIZE(0) | S3C2410_PAGEWIDTH(var->xres);
135
136         dprintk("LCDSADDR1 = 0x%08lx\n", saddr1);
137         dprintk("LCDSADDR2 = 0x%08lx\n", saddr2);
138         dprintk("LCDSADDR3 = 0x%08lx\n", saddr3);
139
140         writel(saddr1, S3C2410_LCDSADDR1);
141         writel(saddr2, S3C2410_LCDSADDR2);
142         writel(saddr3, S3C2410_LCDSADDR3);
143 }
144
145 /* s3c2410fb_calc_pixclk()
146  *
147  * calculate divisor for clk->pixclk
148 */
149
150 static unsigned int s3c2410fb_calc_pixclk(struct s3c2410fb_info *fbi,
151                                           unsigned long pixclk)
152 {
153         unsigned long clk = clk_get_rate(fbi->clk);
154         unsigned long long div;
155
156         /* pixclk is in picoseoncds, our clock is in Hz
157          *
158          * Hz -> picoseconds is / 10^-12
159          */
160
161         div = (unsigned long long)clk * pixclk;
162         do_div(div,1000000UL);
163         do_div(div,1000000UL);
164
165         dprintk("pixclk %ld, divisor is %ld\n", pixclk, (long)div);
166         return div;
167 }
168
169 /*
170  *      s3c2410fb_check_var():
171  *      Get the video params out of 'var'. If a value doesn't fit, round it up,
172  *      if it's too big, return -EINVAL.
173  *
174  */
175 static int s3c2410fb_check_var(struct fb_var_screeninfo *var,
176                                struct fb_info *info)
177 {
178         struct s3c2410fb_info *fbi = info->par;
179
180         dprintk("check_var(var=%p, info=%p)\n", var, info);
181
182         /* validate x/y resolution */
183
184         if (var->yres > fbi->mach_info->yres.max)
185                 var->yres = fbi->mach_info->yres.max;
186         else if (var->yres < fbi->mach_info->yres.min)
187                 var->yres = fbi->mach_info->yres.min;
188
189         if (var->xres > fbi->mach_info->xres.max)
190                 var->yres = fbi->mach_info->xres.max;
191         else if (var->xres < fbi->mach_info->xres.min)
192                 var->xres = fbi->mach_info->xres.min;
193
194         /* validate bpp */
195
196         if (var->bits_per_pixel > fbi->mach_info->bpp.max)
197                 var->bits_per_pixel = fbi->mach_info->bpp.max;
198         else if (var->bits_per_pixel < fbi->mach_info->bpp.min)
199                 var->bits_per_pixel = fbi->mach_info->bpp.min;
200
201         /* set r/g/b positions */
202
203         if (var->bits_per_pixel == 16) {
204                 var->red.offset         = 11;
205                 var->green.offset       = 5;
206                 var->blue.offset        = 0;
207                 var->red.length         = 5;
208                 var->green.length       = 6;
209                 var->blue.length        = 5;
210                 var->transp.length      = 0;
211         } else {
212                 var->red.length         = var->bits_per_pixel;
213                 var->red.offset         = 0;
214                 var->green.length       = var->bits_per_pixel;
215                 var->green.offset       = 0;
216                 var->blue.length        = var->bits_per_pixel;
217                 var->blue.offset        = 0;
218                 var->transp.length      = 0;
219         }
220
221         return 0;
222 }
223
224 /* s3c2410fb_activate_var
225  *
226  * activate (set) the controller from the given framebuffer
227  * information
228 */
229
230 static void s3c2410fb_activate_var(struct s3c2410fb_info *fbi,
231                                    struct fb_var_screeninfo *var)
232 {
233         fbi->regs.lcdcon1 &= ~S3C2410_LCDCON1_MODEMASK;
234
235         dprintk("%s: var->xres  = %d\n", __FUNCTION__, var->xres);
236         dprintk("%s: var->yres  = %d\n", __FUNCTION__, var->yres);
237         dprintk("%s: var->bpp   = %d\n", __FUNCTION__, var->bits_per_pixel);
238
239         switch (var->bits_per_pixel) {
240         case 1:
241                 fbi->regs.lcdcon1 |= S3C2410_LCDCON1_TFT1BPP;
242                 break;
243         case 2:
244                 fbi->regs.lcdcon1 |= S3C2410_LCDCON1_TFT2BPP;
245                 break;
246         case 4:
247                 fbi->regs.lcdcon1 |= S3C2410_LCDCON1_TFT4BPP;
248                 break;
249         case 8:
250                 fbi->regs.lcdcon1 |= S3C2410_LCDCON1_TFT8BPP;
251                 break;
252         case 16:
253                 fbi->regs.lcdcon1 |= S3C2410_LCDCON1_TFT16BPP;
254                 break;
255         }
256
257         /* check to see if we need to update sync/borders */
258
259         if (!fbi->mach_info->fixed_syncs) {
260                 dprintk("setting vert: up=%d, low=%d, sync=%d\n",
261                         var->upper_margin, var->lower_margin,
262                         var->vsync_len);
263
264                 dprintk("setting horz: lft=%d, rt=%d, sync=%d\n",
265                         var->left_margin, var->right_margin,
266                         var->hsync_len);
267
268                 fbi->regs.lcdcon2 =
269                         S3C2410_LCDCON2_VBPD(var->upper_margin - 1) |
270                         S3C2410_LCDCON2_VFPD(var->lower_margin - 1) |
271                         S3C2410_LCDCON2_VSPW(var->vsync_len - 1);
272
273                 fbi->regs.lcdcon3 =
274                         S3C2410_LCDCON3_HBPD(var->right_margin - 1) |
275                         S3C2410_LCDCON3_HFPD(var->left_margin - 1);
276
277                 fbi->regs.lcdcon4 &= ~S3C2410_LCDCON4_HSPW(0xff);
278                 fbi->regs.lcdcon4 |=  S3C2410_LCDCON4_HSPW(var->hsync_len - 1);
279         }
280
281         /* update X/Y info */
282
283         fbi->regs.lcdcon2 &= ~S3C2410_LCDCON2_LINEVAL(0x3ff);
284         fbi->regs.lcdcon2 |=  S3C2410_LCDCON2_LINEVAL(var->yres - 1);
285
286         fbi->regs.lcdcon3 &= ~S3C2410_LCDCON3_HOZVAL(0x7ff);
287         fbi->regs.lcdcon3 |=  S3C2410_LCDCON3_HOZVAL(var->xres - 1);
288
289         if (var->pixclock > 0) {
290                 int clkdiv = s3c2410fb_calc_pixclk(fbi, var->pixclock);
291
292                 clkdiv = (clkdiv / 2) -1;
293                 if (clkdiv < 0)
294                         clkdiv = 0;
295
296                 fbi->regs.lcdcon1 &= ~S3C2410_LCDCON1_CLKVAL(0x3ff);
297                 fbi->regs.lcdcon1 |=  S3C2410_LCDCON1_CLKVAL(clkdiv);
298         }
299
300         /* write new registers */
301
302         dprintk("new register set:\n");
303         dprintk("lcdcon[1] = 0x%08lx\n", fbi->regs.lcdcon1);
304         dprintk("lcdcon[2] = 0x%08lx\n", fbi->regs.lcdcon2);
305         dprintk("lcdcon[3] = 0x%08lx\n", fbi->regs.lcdcon3);
306         dprintk("lcdcon[4] = 0x%08lx\n", fbi->regs.lcdcon4);
307         dprintk("lcdcon[5] = 0x%08lx\n", fbi->regs.lcdcon5);
308
309         writel(fbi->regs.lcdcon1 & ~S3C2410_LCDCON1_ENVID, S3C2410_LCDCON1);
310         writel(fbi->regs.lcdcon2, S3C2410_LCDCON2);
311         writel(fbi->regs.lcdcon3, S3C2410_LCDCON3);
312         writel(fbi->regs.lcdcon4, S3C2410_LCDCON4);
313         writel(fbi->regs.lcdcon5, S3C2410_LCDCON5);
314
315         /* set lcd address pointers */
316         s3c2410fb_set_lcdaddr(fbi);
317
318         writel(fbi->regs.lcdcon1, S3C2410_LCDCON1);
319 }
320
321
322 /*
323  *      s3c2410fb_set_par - Optional function. Alters the hardware state.
324  *      @info: frame buffer structure that represents a single frame buffer
325  *
326  */
327 static int s3c2410fb_set_par(struct fb_info *info)
328 {
329         struct s3c2410fb_info *fbi = info->par;
330         struct fb_var_screeninfo *var = &info->var;
331
332         if (var->bits_per_pixel == 16)
333                 fbi->fb->fix.visual = FB_VISUAL_TRUECOLOR;
334         else
335                 fbi->fb->fix.visual = FB_VISUAL_PSEUDOCOLOR;
336
337         fbi->fb->fix.line_length     = (var->width*var->bits_per_pixel)/8;
338
339         /* activate this new configuration */
340
341         s3c2410fb_activate_var(fbi, var);
342         return 0;
343 }
344
345 static void schedule_palette_update(struct s3c2410fb_info *fbi,
346                                     unsigned int regno, unsigned int val)
347 {
348         unsigned long flags;
349         unsigned long irqen;
350
351         local_irq_save(flags);
352
353         fbi->palette_buffer[regno] = val;
354
355         if (!fbi->palette_ready) {
356                 fbi->palette_ready = 1;
357
358                 /* enable IRQ */
359                 irqen = readl(S3C2410_LCDINTMSK);
360                 irqen &= ~S3C2410_LCDINT_FRSYNC;
361                 writel(irqen, S3C2410_LCDINTMSK);
362         }
363
364         local_irq_restore(flags);
365 }
366
367 /* from pxafb.c */
368 static inline unsigned int chan_to_field(unsigned int chan, struct fb_bitfield *bf)
369 {
370         chan &= 0xffff;
371         chan >>= 16 - bf->length;
372         return chan << bf->offset;
373 }
374
375 static int s3c2410fb_setcolreg(unsigned regno,
376                                unsigned red, unsigned green, unsigned blue,
377                                unsigned transp, struct fb_info *info)
378 {
379         struct s3c2410fb_info *fbi = info->par;
380         unsigned int val;
381
382         /* dprintk("setcol: regno=%d, rgb=%d,%d,%d\n", regno, red, green, blue); */
383
384         switch (fbi->fb->fix.visual) {
385         case FB_VISUAL_TRUECOLOR:
386                 /* true-colour, use pseuo-palette */
387
388                 if (regno < 16) {
389                         u32 *pal = fbi->fb->pseudo_palette;
390
391                         val  = chan_to_field(red,   &fbi->fb->var.red);
392                         val |= chan_to_field(green, &fbi->fb->var.green);
393                         val |= chan_to_field(blue,  &fbi->fb->var.blue);
394
395                         pal[regno] = val;
396                 }
397                 break;
398
399         case FB_VISUAL_PSEUDOCOLOR:
400                 if (regno < 256) {
401                         /* currently assume RGB 5-6-5 mode */
402
403                         val  = ((red   >>  0) & 0xf800);
404                         val |= ((green >>  5) & 0x07e0);
405                         val |= ((blue  >> 11) & 0x001f);
406
407                         writel(val, S3C2410_TFTPAL(regno));
408                         schedule_palette_update(fbi, regno, val);
409                 }
410
411                 break;
412
413         default:
414                 return 1;   /* unknown type */
415         }
416
417         return 0;
418 }
419
420
421 /**
422  *      s3c2410fb_blank
423  *      @blank_mode: the blank mode we want.
424  *      @info: frame buffer structure that represents a single frame buffer
425  *
426  *      Blank the screen if blank_mode != 0, else unblank. Return 0 if
427  *      blanking succeeded, != 0 if un-/blanking failed due to e.g. a
428  *      video mode which doesn't support it. Implements VESA suspend
429  *      and powerdown modes on hardware that supports disabling hsync/vsync:
430  *      blank_mode == 2: suspend vsync
431  *      blank_mode == 3: suspend hsync
432  *      blank_mode == 4: powerdown
433  *
434  *      Returns negative errno on error, or zero on success.
435  *
436  */
437 static int s3c2410fb_blank(int blank_mode, struct fb_info *info)
438 {
439         dprintk("blank(mode=%d, info=%p)\n", blank_mode, info);
440
441         if (mach_info == NULL)
442                 return -EINVAL;
443
444         if (blank_mode == FB_BLANK_UNBLANK)
445                 writel(0x0, S3C2410_TPAL);
446         else {
447                 dprintk("setting TPAL to output 0x000000\n");
448                 writel(S3C2410_TPAL_EN, S3C2410_TPAL);
449         }
450
451         return 0;
452 }
453
454 static int s3c2410fb_debug_show(struct device *dev, struct device_attribute *attr, char *buf)
455 {
456         return snprintf(buf, PAGE_SIZE, "%s\n", debug ? "on" : "off");
457 }
458 static int s3c2410fb_debug_store(struct device *dev, struct device_attribute *attr,
459                                            const char *buf, size_t len)
460 {
461         if (mach_info == NULL)
462                 return -EINVAL;
463
464         if (len < 1)
465                 return -EINVAL;
466
467         if (strnicmp(buf, "on", 2) == 0 ||
468             strnicmp(buf, "1", 1) == 0) {
469                 debug = 1;
470                 printk(KERN_DEBUG "s3c2410fb: Debug On");
471         } else if (strnicmp(buf, "off", 3) == 0 ||
472                    strnicmp(buf, "0", 1) == 0) {
473                 debug = 0;
474                 printk(KERN_DEBUG "s3c2410fb: Debug Off");
475         } else {
476                 return -EINVAL;
477         }
478
479         return len;
480 }
481
482
483 static DEVICE_ATTR(debug, 0666,
484                    s3c2410fb_debug_show,
485                    s3c2410fb_debug_store);
486
487 static struct fb_ops s3c2410fb_ops = {
488         .owner          = THIS_MODULE,
489         .fb_check_var   = s3c2410fb_check_var,
490         .fb_set_par     = s3c2410fb_set_par,
491         .fb_blank       = s3c2410fb_blank,
492         .fb_setcolreg   = s3c2410fb_setcolreg,
493         .fb_fillrect    = cfb_fillrect,
494         .fb_copyarea    = cfb_copyarea,
495         .fb_imageblit   = cfb_imageblit,
496 };
497
498
499 /*
500  * s3c2410fb_map_video_memory():
501  *      Allocates the DRAM memory for the frame buffer.  This buffer is
502  *      remapped into a non-cached, non-buffered, memory region to
503  *      allow palette and pixel writes to occur without flushing the
504  *      cache.  Once this area is remapped, all virtual memory
505  *      access to the video memory should occur at the new region.
506  */
507 static int __init s3c2410fb_map_video_memory(struct s3c2410fb_info *fbi)
508 {
509         dprintk("map_video_memory(fbi=%p)\n", fbi);
510
511         fbi->map_size = PAGE_ALIGN(fbi->fb->fix.smem_len + PAGE_SIZE);
512         fbi->map_cpu  = dma_alloc_writecombine(fbi->dev, fbi->map_size,
513                                                &fbi->map_dma, GFP_KERNEL);
514
515         fbi->map_size = fbi->fb->fix.smem_len;
516
517         if (fbi->map_cpu) {
518                 /* prevent initial garbage on screen */
519                 dprintk("map_video_memory: clear %p:%08x\n",
520                         fbi->map_cpu, fbi->map_size);
521                 memset(fbi->map_cpu, 0xf0, fbi->map_size);
522
523                 fbi->screen_dma         = fbi->map_dma;
524                 fbi->fb->screen_base    = fbi->map_cpu;
525                 fbi->fb->fix.smem_start  = fbi->screen_dma;
526
527                 dprintk("map_video_memory: dma=%08x cpu=%p size=%08x\n",
528                         fbi->map_dma, fbi->map_cpu, fbi->fb->fix.smem_len);
529         }
530
531         return fbi->map_cpu ? 0 : -ENOMEM;
532 }
533
534 static inline void s3c2410fb_unmap_video_memory(struct s3c2410fb_info *fbi)
535 {
536         dma_free_writecombine(fbi->dev,fbi->map_size,fbi->map_cpu, fbi->map_dma);
537 }
538
539 static inline void modify_gpio(void __iomem *reg,
540                                unsigned long set, unsigned long mask)
541 {
542         unsigned long tmp;
543
544         tmp = readl(reg) & ~mask;
545         writel(tmp | set, reg);
546 }
547
548
549 /*
550  * s3c2410fb_init_registers - Initialise all LCD-related registers
551  */
552
553 static int s3c2410fb_init_registers(struct s3c2410fb_info *fbi)
554 {
555         unsigned long flags;
556
557         /* Initialise LCD with values from haret */
558
559         local_irq_save(flags);
560
561         /* modify the gpio(s) with interrupts set (bjd) */
562
563         modify_gpio(S3C2410_GPCUP,  mach_info->gpcup,  mach_info->gpcup_mask);
564         modify_gpio(S3C2410_GPCCON, mach_info->gpccon, mach_info->gpccon_mask);
565         modify_gpio(S3C2410_GPDUP,  mach_info->gpdup,  mach_info->gpdup_mask);
566         modify_gpio(S3C2410_GPDCON, mach_info->gpdcon, mach_info->gpdcon_mask);
567
568         local_irq_restore(flags);
569
570         writel(fbi->regs.lcdcon1, S3C2410_LCDCON1);
571         writel(fbi->regs.lcdcon2, S3C2410_LCDCON2);
572         writel(fbi->regs.lcdcon3, S3C2410_LCDCON3);
573         writel(fbi->regs.lcdcon4, S3C2410_LCDCON4);
574         writel(fbi->regs.lcdcon5, S3C2410_LCDCON5);
575
576         s3c2410fb_set_lcdaddr(fbi);
577
578         dprintk("LPCSEL    = 0x%08lx\n", mach_info->lpcsel);
579         writel(mach_info->lpcsel, S3C2410_LPCSEL);
580
581         dprintk("replacing TPAL %08x\n", readl(S3C2410_TPAL));
582
583         /* ensure temporary palette disabled */
584         writel(0x00, S3C2410_TPAL);
585
586         /* Enable video by setting the ENVID bit to 1 */
587         fbi->regs.lcdcon1 |= S3C2410_LCDCON1_ENVID;
588         writel(fbi->regs.lcdcon1, S3C2410_LCDCON1);
589         return 0;
590 }
591
592 static void s3c2410fb_write_palette(struct s3c2410fb_info *fbi)
593 {
594         unsigned int i;
595         unsigned long ent;
596
597         fbi->palette_ready = 0;
598
599         for (i = 0; i < 256; i++) {
600                 if ((ent = fbi->palette_buffer[i]) == PALETTE_BUFF_CLEAR)
601                         continue;
602
603                 writel(ent, S3C2410_TFTPAL(i));
604
605                 /* it seems the only way to know exactly
606                  * if the palette wrote ok, is to check
607                  * to see if the value verifies ok
608                  */
609
610                 if (readw(S3C2410_TFTPAL(i)) == ent)
611                         fbi->palette_buffer[i] = PALETTE_BUFF_CLEAR;
612                 else
613                         fbi->palette_ready = 1;   /* retry */
614         }
615 }
616
617 static irqreturn_t s3c2410fb_irq(int irq, void *dev_id, struct pt_regs *r)
618 {
619         struct s3c2410fb_info *fbi = dev_id;
620         unsigned long lcdirq = readl(S3C2410_LCDINTPND);
621
622         if (lcdirq & S3C2410_LCDINT_FRSYNC) {
623                 if (fbi->palette_ready)
624                         s3c2410fb_write_palette(fbi);
625
626                 writel(S3C2410_LCDINT_FRSYNC, S3C2410_LCDINTPND);
627                 writel(S3C2410_LCDINT_FRSYNC, S3C2410_LCDSRCPND);
628         }
629
630         return IRQ_HANDLED;
631 }
632
633 static char driver_name[]="s3c2410fb";
634
635 static int __init s3c2410fb_probe(struct platform_device *pdev)
636 {
637         struct s3c2410fb_info *info;
638         struct fb_info     *fbinfo;
639         struct s3c2410fb_hw *mregs;
640         int ret;
641         int irq;
642         int i;
643         u32 lcdcon1;
644
645         mach_info = pdev->dev.platform_data;
646         if (mach_info == NULL) {
647                 dev_err(&pdev->dev,"no platform data for lcd, cannot attach\n");
648                 return -EINVAL;
649         }
650
651         mregs = &mach_info->regs;
652
653         irq = platform_get_irq(pdev, 0);
654         if (irq < 0) {
655                 dev_err(&pdev->dev, "no irq for device\n");
656                 return -ENOENT;
657         }
658
659         fbinfo = framebuffer_alloc(sizeof(struct s3c2410fb_info), &pdev->dev);
660         if (!fbinfo) {
661                 return -ENOMEM;
662         }
663
664
665         info = fbinfo->par;
666         info->fb = fbinfo;
667         platform_set_drvdata(pdev, fbinfo);
668
669         dprintk("devinit\n");
670
671         strcpy(fbinfo->fix.id, driver_name);
672
673         memcpy(&info->regs, &mach_info->regs, sizeof(info->regs));
674
675         /* Stop the video and unset ENVID if set */
676         info->regs.lcdcon1 &= ~S3C2410_LCDCON1_ENVID;
677         lcdcon1 = readl(S3C2410_LCDCON1);
678         writel(lcdcon1 & ~S3C2410_LCDCON1_ENVID, S3C2410_LCDCON1);
679
680         info->mach_info             = pdev->dev.platform_data;
681
682         fbinfo->fix.type            = FB_TYPE_PACKED_PIXELS;
683         fbinfo->fix.type_aux        = 0;
684         fbinfo->fix.xpanstep        = 0;
685         fbinfo->fix.ypanstep        = 0;
686         fbinfo->fix.ywrapstep       = 0;
687         fbinfo->fix.accel           = FB_ACCEL_NONE;
688
689         fbinfo->var.nonstd          = 0;
690         fbinfo->var.activate        = FB_ACTIVATE_NOW;
691         fbinfo->var.height          = mach_info->height;
692         fbinfo->var.width           = mach_info->width;
693         fbinfo->var.accel_flags     = 0;
694         fbinfo->var.vmode           = FB_VMODE_NONINTERLACED;
695
696         fbinfo->fbops               = &s3c2410fb_ops;
697         fbinfo->flags               = FBINFO_FLAG_DEFAULT;
698         fbinfo->pseudo_palette      = &info->pseudo_pal;
699
700         fbinfo->var.xres            = mach_info->xres.defval;
701         fbinfo->var.xres_virtual    = mach_info->xres.defval;
702         fbinfo->var.yres            = mach_info->yres.defval;
703         fbinfo->var.yres_virtual    = mach_info->yres.defval;
704         fbinfo->var.bits_per_pixel  = mach_info->bpp.defval;
705
706         fbinfo->var.upper_margin    = S3C2410_LCDCON2_GET_VBPD(mregs->lcdcon2) + 1;
707         fbinfo->var.lower_margin    = S3C2410_LCDCON2_GET_VFPD(mregs->lcdcon2) + 1;
708         fbinfo->var.vsync_len       = S3C2410_LCDCON2_GET_VSPW(mregs->lcdcon2) + 1;
709
710         fbinfo->var.left_margin     = S3C2410_LCDCON3_GET_HFPD(mregs->lcdcon3) + 1;
711         fbinfo->var.right_margin    = S3C2410_LCDCON3_GET_HBPD(mregs->lcdcon3) + 1;
712         fbinfo->var.hsync_len       = S3C2410_LCDCON4_GET_HSPW(mregs->lcdcon4) + 1;
713
714         fbinfo->var.red.offset      = 11;
715         fbinfo->var.green.offset    = 5;
716         fbinfo->var.blue.offset     = 0;
717         fbinfo->var.transp.offset   = 0;
718         fbinfo->var.red.length      = 5;
719         fbinfo->var.green.length    = 6;
720         fbinfo->var.blue.length     = 5;
721         fbinfo->var.transp.length   = 0;
722         fbinfo->fix.smem_len        =   mach_info->xres.max *
723                                         mach_info->yres.max *
724                                         mach_info->bpp.max / 8;
725
726         for (i = 0; i < 256; i++)
727                 info->palette_buffer[i] = PALETTE_BUFF_CLEAR;
728
729         if (!request_mem_region((unsigned long)S3C24XX_VA_LCD, SZ_1M, "s3c2410-lcd")) {
730                 ret = -EBUSY;
731                 goto dealloc_fb;
732         }
733
734
735         dprintk("got LCD region\n");
736
737         ret = request_irq(irq, s3c2410fb_irq, IRQF_DISABLED, pdev->name, info);
738         if (ret) {
739                 dev_err(&pdev->dev, "cannot get irq %d - err %d\n", irq, ret);
740                 ret = -EBUSY;
741                 goto release_mem;
742         }
743
744         info->clk = clk_get(NULL, "lcd");
745         if (!info->clk || IS_ERR(info->clk)) {
746                 printk(KERN_ERR "failed to get lcd clock source\n");
747                 ret = -ENOENT;
748                 goto release_irq;
749         }
750
751         clk_enable(info->clk);
752         dprintk("got and enabled clock\n");
753
754         msleep(1);
755
756         /* Initialize video memory */
757         ret = s3c2410fb_map_video_memory(info);
758         if (ret) {
759                 printk( KERN_ERR "Failed to allocate video RAM: %d\n", ret);
760                 ret = -ENOMEM;
761                 goto release_clock;
762         }
763         dprintk("got video memory\n");
764
765         ret = s3c2410fb_init_registers(info);
766
767         ret = s3c2410fb_check_var(&fbinfo->var, fbinfo);
768
769         ret = register_framebuffer(fbinfo);
770         if (ret < 0) {
771                 printk(KERN_ERR "Failed to register framebuffer device: %d\n", ret);
772                 goto free_video_memory;
773         }
774
775         /* create device files */
776         device_create_file(&pdev->dev, &dev_attr_debug);
777
778         printk(KERN_INFO "fb%d: %s frame buffer device\n",
779                 fbinfo->node, fbinfo->fix.id);
780
781         return 0;
782
783 free_video_memory:
784         s3c2410fb_unmap_video_memory(info);
785 release_clock:
786         clk_disable(info->clk);
787         clk_put(info->clk);
788 release_irq:
789         free_irq(irq,info);
790 release_mem:
791         release_mem_region((unsigned long)S3C24XX_VA_LCD, S3C24XX_SZ_LCD);
792 dealloc_fb:
793         framebuffer_release(fbinfo);
794         return ret;
795 }
796
797 /* s3c2410fb_stop_lcd
798  *
799  * shutdown the lcd controller
800 */
801
802 static void s3c2410fb_stop_lcd(struct s3c2410fb_info *fbi)
803 {
804         unsigned long flags;
805
806         local_irq_save(flags);
807
808         fbi->regs.lcdcon1 &= ~S3C2410_LCDCON1_ENVID;
809         writel(fbi->regs.lcdcon1, S3C2410_LCDCON1);
810
811         local_irq_restore(flags);
812 }
813
814 /*
815  *  Cleanup
816  */
817 static int s3c2410fb_remove(struct platform_device *pdev)
818 {
819         struct fb_info     *fbinfo = platform_get_drvdata(pdev);
820         struct s3c2410fb_info *info = fbinfo->par;
821         int irq;
822
823         s3c2410fb_stop_lcd(info);
824         msleep(1);
825
826         s3c2410fb_unmap_video_memory(info);
827
828         if (info->clk) {
829                 clk_disable(info->clk);
830                 clk_put(info->clk);
831                 info->clk = NULL;
832         }
833
834         irq = platform_get_irq(pdev, 0);
835         free_irq(irq,info);
836         release_mem_region((unsigned long)S3C24XX_VA_LCD, S3C24XX_SZ_LCD);
837         unregister_framebuffer(fbinfo);
838
839         return 0;
840 }
841
842 #ifdef CONFIG_PM
843
844 /* suspend and resume support for the lcd controller */
845
846 static int s3c2410fb_suspend(struct platform_device *dev, pm_message_t state)
847 {
848         struct fb_info     *fbinfo = platform_get_drvdata(dev);
849         struct s3c2410fb_info *info = fbinfo->par;
850
851         s3c2410fb_stop_lcd(info);
852
853         /* sleep before disabling the clock, we need to ensure
854          * the LCD DMA engine is not going to get back on the bus
855          * before the clock goes off again (bjd) */
856
857         msleep(1);
858         clk_disable(info->clk);
859
860         return 0;
861 }
862
863 static int s3c2410fb_resume(struct platform_device *dev)
864 {
865         struct fb_info     *fbinfo = platform_get_drvdata(dev);
866         struct s3c2410fb_info *info = fbinfo->par;
867
868         clk_enable(info->clk);
869         msleep(1);
870
871         s3c2410fb_init_registers(info);
872
873         return 0;
874 }
875
876 #else
877 #define s3c2410fb_suspend NULL
878 #define s3c2410fb_resume  NULL
879 #endif
880
881 static struct platform_driver s3c2410fb_driver = {
882         .probe          = s3c2410fb_probe,
883         .remove         = s3c2410fb_remove,
884         .suspend        = s3c2410fb_suspend,
885         .resume         = s3c2410fb_resume,
886         .driver         = {
887                 .name   = "s3c2410-lcd",
888                 .owner  = THIS_MODULE,
889         },
890 };
891
892 int __devinit s3c2410fb_init(void)
893 {
894         return platform_driver_register(&s3c2410fb_driver);
895 }
896
897 static void __exit s3c2410fb_cleanup(void)
898 {
899         platform_driver_unregister(&s3c2410fb_driver);
900 }
901
902
903 module_init(s3c2410fb_init);
904 module_exit(s3c2410fb_cleanup);
905
906 MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>, Ben Dooks <ben-linux@fluff.org>");
907 MODULE_DESCRIPTION("Framebuffer driver for the s3c2410");
908 MODULE_LICENSE("GPL");