2 * Lite5200 board Device Tree Source
4 * Copyright 2006-2007 Secret Lab Technologies Ltd.
5 * Grant Likely <grant.likely@secretlab.ca>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
14 * WARNING: Do not depend on this tree layout remaining static just yet.
15 * The MPC5200 device tree conventions are still in flux
16 * Keep an eye on the linuxppc-dev mailing list for more details
20 model = "fsl,lite5200";
22 compatible = "fsl,lite5200","generic-mpc5200";
33 d-cache-line-size = <20>;
34 i-cache-line-size = <20>;
35 d-cache-size = <4000>; // L1, 16K
36 i-cache-size = <4000>; // L1, 16K
37 timebase-frequency = <0>; // from bootloader
38 bus-frequency = <0>; // from bootloader
39 clock-frequency = <0>; // from bootloader
44 device_type = "memory";
45 reg = <00000000 04000000>; // 64MB
49 model = "fsl,mpc5200";
50 compatible = "mpc5200";
51 revision = ""; // from bootloader
53 ranges = <0 f0000000 0000c000>;
54 reg = <f0000000 00000100>;
55 bus-frequency = <0>; // from bootloader
56 system-frequency = <0>; // from bootloader
59 compatible = "mpc5200-cdm";
63 mpc5200_pic: pic@500 {
64 // 5200 interrupts are encoded into two levels;
66 #interrupt-cells = <3>;
67 device_type = "interrupt-controller";
68 compatible = "mpc5200-pic";
72 gpt@600 { // General Purpose Timer
73 compatible = "mpc5200-gpt";
78 interrupt-parent = <&mpc5200_pic>;
82 gpt@610 { // General Purpose Timer
83 compatible = "mpc5200-gpt";
88 interrupt-parent = <&mpc5200_pic>;
91 gpt@620 { // General Purpose Timer
92 compatible = "mpc5200-gpt";
97 interrupt-parent = <&mpc5200_pic>;
100 gpt@630 { // General Purpose Timer
101 compatible = "mpc5200-gpt";
105 interrupts = <1 c 0>;
106 interrupt-parent = <&mpc5200_pic>;
109 gpt@640 { // General Purpose Timer
110 compatible = "mpc5200-gpt";
114 interrupts = <1 d 0>;
115 interrupt-parent = <&mpc5200_pic>;
118 gpt@650 { // General Purpose Timer
119 compatible = "mpc5200-gpt";
123 interrupts = <1 e 0>;
124 interrupt-parent = <&mpc5200_pic>;
127 gpt@660 { // General Purpose Timer
128 compatible = "mpc5200-gpt";
132 interrupts = <1 f 0>;
133 interrupt-parent = <&mpc5200_pic>;
136 gpt@670 { // General Purpose Timer
137 compatible = "mpc5200-gpt";
141 interrupts = <1 10 0>;
142 interrupt-parent = <&mpc5200_pic>;
145 rtc@800 { // Real time clock
146 compatible = "mpc5200-rtc";
149 interrupts = <1 5 0 1 6 0>;
150 interrupt-parent = <&mpc5200_pic>;
154 device_type = "mscan";
155 compatible = "mpc5200-mscan";
157 interrupts = <2 11 0>;
158 interrupt-parent = <&mpc5200_pic>;
163 device_type = "mscan";
164 compatible = "mpc5200-mscan";
166 interrupts = <2 12 0>;
167 interrupt-parent = <&mpc5200_pic>;
172 compatible = "mpc5200-gpio";
174 interrupts = <1 7 0>;
175 interrupt-parent = <&mpc5200_pic>;
179 compatible = "mpc5200-gpio-wkup";
181 interrupts = <1 8 0 0 3 0>;
182 interrupt-parent = <&mpc5200_pic>;
187 compatible = "mpc5200-spi";
189 interrupts = <2 d 0 2 e 0>;
190 interrupt-parent = <&mpc5200_pic>;
194 device_type = "usb-ohci-be";
195 compatible = "mpc5200-ohci","ohci-be";
197 interrupts = <2 6 0>;
198 interrupt-parent = <&mpc5200_pic>;
202 device_type = "dma-controller";
203 compatible = "mpc5200-bestcomm";
205 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
206 3 4 0 3 5 0 3 6 0 3 7 0
207 3 8 0 3 9 0 3 a 0 3 b 0
208 3 c 0 3 d 0 3 e 0 3 f 0>;
209 interrupt-parent = <&mpc5200_pic>;
213 compatible = "mpc5200-xlb";
217 serial@2000 { // PSC1
218 device_type = "serial";
219 compatible = "mpc5200-psc-uart";
220 port-number = <0>; // Logical port assignment
223 interrupts = <2 1 0>;
224 interrupt-parent = <&mpc5200_pic>;
227 // PSC2 in ac97 mode example
228 //ac97@2200 { // PSC2
229 // device_type = "sound";
230 // compatible = "mpc5200-psc-ac97";
233 // interrupts = <2 2 0>;
234 // interrupt-parent = <&mpc5200_pic>;
237 // PSC3 in CODEC mode example
239 // device_type = "sound";
240 // compatible = "mpc5200-psc-i2s";
243 // interrupts = <2 3 0>;
244 // interrupt-parent = <&mpc5200_pic>;
247 // PSC4 in uart mode example
248 //serial@2600 { // PSC4
249 // device_type = "serial";
250 // compatible = "mpc5200-psc-uart";
253 // interrupts = <2 b 0>;
254 // interrupt-parent = <&mpc5200_pic>;
257 // PSC5 in uart mode example
258 //serial@2800 { // PSC5
259 // device_type = "serial";
260 // compatible = "mpc5200-psc-uart";
263 // interrupts = <2 c 0>;
264 // interrupt-parent = <&mpc5200_pic>;
267 // PSC6 in spi mode example
269 // device_type = "spi";
270 // compatible = "mpc5200-psc-spi";
273 // interrupts = <2 4 0>;
274 // interrupt-parent = <&mpc5200_pic>;
278 device_type = "network";
279 compatible = "mpc5200-fec";
281 mac-address = [ 02 03 04 05 06 07 ]; // Bad!
282 interrupts = <2 5 0>;
283 interrupt-parent = <&mpc5200_pic>;
288 compatible = "mpc5200-ata";
290 interrupts = <2 7 0>;
291 interrupt-parent = <&mpc5200_pic>;
296 compatible = "mpc5200-i2c","fsl-i2c";
299 interrupts = <2 f 0>;
300 interrupt-parent = <&mpc5200_pic>;
306 compatible = "mpc5200-i2c","fsl-i2c";
309 interrupts = <2 10 0>;
310 interrupt-parent = <&mpc5200_pic>;
314 device_type = "sram";
315 compatible = "mpc5200-sram","sram";
321 #interrupt-cells = <1>;
323 #address-cells = <3>;
325 compatible = "mpc5200-pci";
326 reg = <f0000d00 100>;
327 interrupt-map-mask = <f800 0 0 7>;
328 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3
329 c000 0 0 2 &mpc5200_pic 0 0 3
330 c000 0 0 3 &mpc5200_pic 0 0 3
331 c000 0 0 4 &mpc5200_pic 0 0 3>;
332 clock-frequency = <0>; // From boot loader
333 interrupts = <2 8 0 2 9 0 2 a 0>;
334 interrupt-parent = <&mpc5200_pic>;
336 ranges = <42000000 0 80000000 80000000 0 20000000
337 02000000 0 a0000000 a0000000 0 10000000
338 01000000 0 00000000 b0000000 0 01000000>;