2 * at25.c -- support most SPI EEPROMs, such as Atmel AT25 models
4 * Copyright (C) 2006 David Brownell
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
16 #include <linux/delay.h>
17 #include <linux/device.h>
18 #include <linux/sched.h>
20 #include <linux/spi/spi.h>
21 #include <linux/spi/eeprom.h>
25 struct spi_device *spi;
27 struct spi_eeprom chip;
28 struct bin_attribute bin;
32 #define AT25_WREN 0x06 /* latch the write enable */
33 #define AT25_WRDI 0x04 /* reset the write enable */
34 #define AT25_RDSR 0x05 /* read status register */
35 #define AT25_WRSR 0x01 /* write status register */
36 #define AT25_READ 0x03 /* read byte(s) */
37 #define AT25_WRITE 0x02 /* write byte(s)/sector */
39 #define AT25_SR_nRDY 0x01 /* nRDY = write-in-progress */
40 #define AT25_SR_WEN 0x02 /* write enable (latched) */
41 #define AT25_SR_BP0 0x04 /* BP for software writeprotect */
42 #define AT25_SR_BP1 0x08
43 #define AT25_SR_WPEN 0x80 /* writeprotect enable */
46 #define EE_MAXADDRLEN 3 /* 24 bit addresses, up to 2 MBytes */
48 /* Specs often allow 5 msec for a page write, sometimes 20 msec;
49 * it's important to recover from write timeouts.
53 /*-------------------------------------------------------------------------*/
55 #define io_limit PAGE_SIZE /* bytes */
59 struct at25_data *at25,
65 u8 command[EE_MAXADDRLEN + 1];
68 struct spi_transfer t[2];
74 /* 8/16/24-bit address is written MSB first */
75 switch (at25->addrlen) {
81 case 0: /* can't happen: for better codegen */
86 memset(t, 0, sizeof t);
88 t[0].tx_buf = command;
89 t[0].len = at25->addrlen + 1;
90 spi_message_add_tail(&t[0], &m);
94 spi_message_add_tail(&t[1], &m);
96 mutex_lock(&at25->lock);
98 /* Read it all at once.
100 * REVISIT that's potentially a problem with large chips, if
101 * other devices on the bus need to be accessed regularly or
102 * this chip is clocked very slowly
104 status = spi_sync(at25->spi, &m);
105 dev_dbg(&at25->spi->dev,
106 "read %Zd bytes at %d --> %d\n",
107 count, offset, (int) status);
109 mutex_unlock(&at25->lock);
110 return status ? status : count;
114 at25_bin_read(struct kobject *kobj, struct bin_attribute *bin_attr,
115 char *buf, loff_t off, size_t count)
118 struct at25_data *at25;
120 dev = container_of(kobj, struct device, kobj);
121 at25 = dev_get_drvdata(dev);
123 if (unlikely(off >= at25->bin.size))
125 if ((off + count) > at25->bin.size)
126 count = at25->bin.size - off;
127 if (unlikely(!count))
130 return at25_ee_read(at25, buf, off, count);
135 at25_ee_write(struct at25_data *at25, char *buf, loff_t off, size_t count)
138 unsigned written = 0;
142 /* Temp buffer starts with command and address */
143 buf_size = at25->chip.page_size;
144 if (buf_size > io_limit)
146 bounce = kmalloc(buf_size + at25->addrlen + 1, GFP_KERNEL);
150 /* For write, rollover is within the page ... so we write at
151 * most one page, then manually roll over to the next page.
153 bounce[0] = AT25_WRITE;
154 mutex_lock(&at25->lock);
156 unsigned long timeout, retries;
158 unsigned offset = (unsigned) off;
162 status = spi_write(at25->spi, cp, 1);
164 dev_dbg(&at25->spi->dev, "WREN --> %d\n",
169 /* 8/16/24-bit address is written MSB first */
170 switch (at25->addrlen) {
171 default: /* case 3 */
172 *cp++ = offset >> 16;
176 case 0: /* can't happen: for better codegen */
180 /* Write as much of a page as we can */
181 segment = buf_size - (offset % buf_size);
184 memcpy(cp, buf, segment);
185 status = spi_write(at25->spi, bounce,
186 segment + at25->addrlen + 1);
187 dev_dbg(&at25->spi->dev,
188 "write %u bytes at %u --> %d\n",
189 segment, offset, (int) status);
193 /* REVISIT this should detect (or prevent) failed writes
194 * to readonly sections of the EEPROM...
197 /* Wait for non-busy status */
198 timeout = jiffies + msecs_to_jiffies(EE_TIMEOUT);
203 sr = spi_w8r8(at25->spi, AT25_RDSR);
204 if (sr < 0 || (sr & AT25_SR_nRDY)) {
205 dev_dbg(&at25->spi->dev,
206 "rdsr --> %d (%02x)\n", sr, sr);
207 /* at HZ=100, this is sloooow */
211 if (!(sr & AT25_SR_nRDY))
213 } while (retries++ < 3 || time_before_eq(jiffies, timeout));
215 if (time_after(jiffies, timeout)) {
216 dev_err(&at25->spi->dev,
217 "write %d bytes offset %d, "
218 "timeout after %u msecs\n",
220 jiffies_to_msecs(jiffies -
221 (timeout - EE_TIMEOUT)));
233 mutex_unlock(&at25->lock);
236 return written ? written : status;
240 at25_bin_write(struct kobject *kobj, struct bin_attribute *bin_attr,
241 char *buf, loff_t off, size_t count)
244 struct at25_data *at25;
246 dev = container_of(kobj, struct device, kobj);
247 at25 = dev_get_drvdata(dev);
249 if (unlikely(off >= at25->bin.size))
251 if ((off + count) > at25->bin.size)
252 count = at25->bin.size - off;
253 if (unlikely(!count))
256 return at25_ee_write(at25, buf, off, count);
259 /*-------------------------------------------------------------------------*/
261 static int at25_probe(struct spi_device *spi)
263 struct at25_data *at25 = NULL;
264 const struct spi_eeprom *chip;
269 /* Chip description */
270 chip = spi->dev.platform_data;
272 dev_dbg(&spi->dev, "no chip description\n");
277 /* For now we only support 8/16/24 bit addressing */
278 if (chip->flags & EE_ADDR1)
280 else if (chip->flags & EE_ADDR2)
282 else if (chip->flags & EE_ADDR3)
285 dev_dbg(&spi->dev, "unsupported address type\n");
290 /* Ping the chip ... the status register is pretty portable,
291 * unlike probing manufacturer IDs. We do expect that system
292 * firmware didn't write it in the past few milliseconds!
294 sr = spi_w8r8(spi, AT25_RDSR);
295 if (sr < 0 || sr & AT25_SR_nRDY) {
296 dev_dbg(&spi->dev, "rdsr --> %d (%02x)\n", sr, sr);
301 if (!(at25 = kzalloc(sizeof *at25, GFP_KERNEL))) {
306 mutex_init(&at25->lock);
308 at25->spi = spi_dev_get(spi);
309 dev_set_drvdata(&spi->dev, at25);
310 at25->addrlen = addrlen;
312 /* Export the EEPROM bytes through sysfs, since that's convenient.
313 * Default to root-only access to the data; EEPROMs often hold data
314 * that's sensitive for read and/or write, like ethernet addresses,
315 * security codes, board-specific manufacturing calibrations, etc.
317 at25->bin.attr.name = "eeprom";
318 at25->bin.attr.mode = S_IRUSR;
319 at25->bin.read = at25_bin_read;
321 at25->bin.size = at25->chip.byte_len;
322 if (!(chip->flags & EE_READONLY)) {
323 at25->bin.write = at25_bin_write;
324 at25->bin.attr.mode |= S_IWUSR;
327 err = sysfs_create_bin_file(&spi->dev.kobj, &at25->bin);
331 dev_info(&spi->dev, "%Zd %s %s eeprom%s, pagesize %u\n",
332 (at25->bin.size < 1024)
334 : (at25->bin.size / 1024),
335 (at25->bin.size < 1024) ? "Byte" : "KByte",
337 (chip->flags & EE_READONLY) ? " (readonly)" : "",
338 at25->chip.page_size);
341 dev_dbg(&spi->dev, "probe err %d\n", err);
346 static int __devexit at25_remove(struct spi_device *spi)
348 struct at25_data *at25;
350 at25 = dev_get_drvdata(&spi->dev);
351 sysfs_remove_bin_file(&spi->dev.kobj, &at25->bin);
356 /*-------------------------------------------------------------------------*/
358 static struct spi_driver at25_driver = {
361 .owner = THIS_MODULE,
364 .remove = __devexit_p(at25_remove),
367 static int __init at25_init(void)
369 return spi_register_driver(&at25_driver);
371 module_init(at25_init);
373 static void __exit at25_exit(void)
375 spi_unregister_driver(&at25_driver);
377 module_exit(at25_exit);
379 MODULE_DESCRIPTION("Driver for most SPI EEPROMs");
380 MODULE_AUTHOR("David Brownell");
381 MODULE_LICENSE("GPL");