Merge git://git.infradead.org/~dwmw2/hdroneline
[linux-2.6] / arch / x86_64 / kernel / genapic_flat.c
1 /*
2  * Copyright 2004 James Cleverdon, IBM.
3  * Subject to the GNU Public License, v.2
4  *
5  * Flat APIC subarch code.
6  *
7  * Hacked for x86-64 by James Cleverdon from i386 architecture code by
8  * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
9  * James Cleverdon.
10  */
11 #include <linux/threads.h>
12 #include <linux/cpumask.h>
13 #include <linux/string.h>
14 #include <linux/kernel.h>
15 #include <linux/ctype.h>
16 #include <linux/init.h>
17 #include <asm/smp.h>
18 #include <asm/ipi.h>
19
20 static cpumask_t flat_target_cpus(void)
21 {
22         return cpu_online_map;
23 }
24
25 /*
26  * Set up the logical destination ID.
27  *
28  * Intel recommends to set DFR, LDR and TPR before enabling
29  * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
30  * document number 292116).  So here it goes...
31  */
32 static void flat_init_apic_ldr(void)
33 {
34         unsigned long val;
35         unsigned long num, id;
36
37         num = smp_processor_id();
38         id = 1UL << num;
39         x86_cpu_to_log_apicid[num] = id;
40         apic_write(APIC_DFR, APIC_DFR_FLAT);
41         val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
42         val |= SET_APIC_LOGICAL_ID(id);
43         apic_write(APIC_LDR, val);
44 }
45
46 static void flat_send_IPI_mask(cpumask_t cpumask, int vector)
47 {
48         unsigned long mask = cpus_addr(cpumask)[0];
49         unsigned long cfg;
50         unsigned long flags;
51
52         local_save_flags(flags);
53         local_irq_disable();
54
55         /*
56          * Wait for idle.
57          */
58         apic_wait_icr_idle();
59
60         /*
61          * prepare target chip field
62          */
63         cfg = __prepare_ICR2(mask);
64         apic_write(APIC_ICR2, cfg);
65
66         /*
67          * program the ICR
68          */
69         cfg = __prepare_ICR(0, vector, APIC_DEST_LOGICAL);
70
71         /*
72          * Send the IPI. The write to APIC_ICR fires this off.
73          */
74         apic_write(APIC_ICR, cfg);
75         local_irq_restore(flags);
76 }
77
78 static void flat_send_IPI_allbutself(int vector)
79 {
80 #ifdef  CONFIG_HOTPLUG_CPU
81         int hotplug = 1;
82 #else
83         int hotplug = 0;
84 #endif
85         if (hotplug || vector == NMI_VECTOR) {
86                 cpumask_t allbutme = cpu_online_map;
87
88                 cpu_clear(smp_processor_id(), allbutme);
89
90                 if (!cpus_empty(allbutme))
91                         flat_send_IPI_mask(allbutme, vector);
92         } else if (num_online_cpus() > 1) {
93                 __send_IPI_shortcut(APIC_DEST_ALLBUT, vector,APIC_DEST_LOGICAL);
94         }
95 }
96
97 static void flat_send_IPI_all(int vector)
98 {
99         if (vector == NMI_VECTOR)
100                 flat_send_IPI_mask(cpu_online_map, vector);
101         else
102                 __send_IPI_shortcut(APIC_DEST_ALLINC, vector, APIC_DEST_LOGICAL);
103 }
104
105 static int flat_apic_id_registered(void)
106 {
107         return physid_isset(GET_APIC_ID(apic_read(APIC_ID)), phys_cpu_present_map);
108 }
109
110 static unsigned int flat_cpu_mask_to_apicid(cpumask_t cpumask)
111 {
112         return cpus_addr(cpumask)[0] & APIC_ALL_CPUS;
113 }
114
115 static unsigned int phys_pkg_id(int index_msb)
116 {
117         return hard_smp_processor_id() >> index_msb;
118 }
119
120 struct genapic apic_flat =  {
121         .name = "flat",
122         .int_delivery_mode = dest_LowestPrio,
123         .int_dest_mode = (APIC_DEST_LOGICAL != 0),
124         .int_delivery_dest = APIC_DEST_LOGICAL | APIC_DM_LOWEST,
125         .target_cpus = flat_target_cpus,
126         .apic_id_registered = flat_apic_id_registered,
127         .init_apic_ldr = flat_init_apic_ldr,
128         .send_IPI_all = flat_send_IPI_all,
129         .send_IPI_allbutself = flat_send_IPI_allbutself,
130         .send_IPI_mask = flat_send_IPI_mask,
131         .cpu_mask_to_apicid = flat_cpu_mask_to_apicid,
132         .phys_pkg_id = phys_pkg_id,
133 };
134
135 /*
136  * Physflat mode is used when there are more than 8 CPUs on a AMD system.
137  * We cannot use logical delivery in this case because the mask
138  * overflows, so use physical mode.
139  */
140
141 static cpumask_t physflat_target_cpus(void)
142 {
143         return cpumask_of_cpu(0);
144 }
145
146 static void physflat_send_IPI_mask(cpumask_t cpumask, int vector)
147 {
148         send_IPI_mask_sequence(cpumask, vector);
149 }
150
151 static void physflat_send_IPI_allbutself(int vector)
152 {
153         cpumask_t allbutme = cpu_online_map;
154
155         cpu_clear(smp_processor_id(), allbutme);
156         physflat_send_IPI_mask(allbutme, vector);
157 }
158
159 static void physflat_send_IPI_all(int vector)
160 {
161         physflat_send_IPI_mask(cpu_online_map, vector);
162 }
163
164 static unsigned int physflat_cpu_mask_to_apicid(cpumask_t cpumask)
165 {
166         int cpu;
167
168         /*
169          * We're using fixed IRQ delivery, can only return one phys APIC ID.
170          * May as well be the first.
171          */
172         cpu = first_cpu(cpumask);
173         if ((unsigned)cpu < NR_CPUS)
174                 return x86_cpu_to_apicid[cpu];
175         else
176                 return BAD_APICID;
177 }
178
179 struct genapic apic_physflat =  {
180         .name = "physical flat",
181         .int_delivery_mode = dest_Fixed,
182         .int_dest_mode = (APIC_DEST_PHYSICAL != 0),
183         .int_delivery_dest = APIC_DEST_PHYSICAL | APIC_DM_FIXED,
184         .target_cpus = physflat_target_cpus,
185         .apic_id_registered = flat_apic_id_registered,
186         .init_apic_ldr = flat_init_apic_ldr,/*not needed, but shouldn't hurt*/
187         .send_IPI_all = physflat_send_IPI_all,
188         .send_IPI_allbutself = physflat_send_IPI_allbutself,
189         .send_IPI_mask = physflat_send_IPI_mask,
190         .cpu_mask_to_apicid = physflat_cpu_mask_to_apicid,
191         .phys_pkg_id = phys_pkg_id,
192 };