1 /* EtherLinkXL.c: A 3Com EtherLink PCI III/XL ethernet driver for linux. */
3 Written 1996-1999 by Donald Becker.
5 This software may be used and distributed according to the terms
6 of the GNU General Public License, incorporated herein by reference.
8 This driver is for the 3Com "Vortex" and "Boomerang" series ethercards.
9 Members of the series include Fast EtherLink 3c590/3c592/3c595/3c597
10 and the EtherLink XL 3c900 and 3c905 cards.
12 Problem reports and questions should be directed to
15 The author may be reached as becker@scyld.com, or C/O
16 Scyld Computing Corporation
17 410 Severn Ave., Suite 210
20 Linux Kernel Additions:
22 0.99H+lk0.9 - David S. Miller - softnet, PCI DMA updates
23 0.99H+lk1.0 - Jeff Garzik <jgarzik@pobox.com>
24 Remove compatibility defines for kernel versions < 2.2.x.
25 Update for new 2.3.x module interface
26 LK1.1.2 (March 19, 2000)
27 * New PCI interface (jgarzik)
29 LK1.1.3 25 April 2000, Andrew Morton <andrewm@uow.edu.au>
30 - Merged with 3c575_cb.c
31 - Don't set RxComplete in boomerang interrupt enable reg
32 - spinlock in vortex_timer to protect mdio functions
33 - disable local interrupts around call to vortex_interrupt in
34 vortex_tx_timeout() (So vortex_interrupt can use spin_lock())
35 - Select window 3 in vortex_timer()'s write to Wn3_MAC_Ctrl
36 - In vortex_start_xmit(), move the lock to _after_ we've altered
37 vp->cur_tx and vp->tx_full. This defeats the race between
38 vortex_start_xmit() and vortex_interrupt which was identified
40 - Merged back support for six new cards from various sources
41 - Set vortex_have_pci if pci_module_init returns zero (fixes cardbus
43 - Tell it that 3c905C has NWAY for 100bT autoneg
44 - Fix handling of SetStatusEnd in 'Too much work..' code, as
45 per 2.3.99's 3c575_cb (Dave Hinds).
46 - Split ISR into two for vortex & boomerang
47 - Fix MOD_INC/DEC races
48 - Handle resource allocation failures.
49 - Fix 3CCFE575CT LED polarity
50 - Make tx_interrupt_mitigation the default
52 LK1.1.4 25 April 2000, Andrew Morton <andrewm@uow.edu.au>
53 - Add extra TxReset to vortex_up() to fix 575_cb hotplug initialisation probs.
54 - Put vortex_info_tbl into __devinitdata
55 - In the vortex_error StatsFull HACK, disable stats in vp->intr_enable as well
57 - Increased the loop counter in issue_and_wait from 2,000 to 4,000.
59 LK1.1.5 28 April 2000, andrewm
60 - Added powerpc defines (John Daniel <jdaniel@etresoft.com> said these work...)
61 - Some extra diagnostics
62 - In vortex_error(), reset the Tx on maxCollisions. Otherwise most
63 chips usually get a Tx timeout.
64 - Added extra_reset module parm
65 - Replaced some inline timer manip with mod_timer
66 (Franois romieu <Francois.Romieu@nic.fr>)
67 - In vortex_up(), don't make Wn3_config initialisation dependent upon has_nway
68 (this came across from 3c575_cb).
70 LK1.1.6 06 Jun 2000, andrewm
71 - Backed out the PPC defines.
72 - Use del_timer_sync(), mod_timer().
73 - Fix wrapped ulong comparison in boomerang_rx()
74 - Add IS_TORNADO, use it to suppress 3c905C checksum error msg
75 (Donald Becker, I Lee Hetherington <ilh@sls.lcs.mit.edu>)
76 - Replace union wn3_config with BFINS/BFEXT manipulation for
77 sparc64 (Pete Zaitcev, Peter Jones)
78 - In vortex_error, do_tx_reset and vortex_tx_timeout(Vortex):
79 do a netif_wake_queue() to better recover from errors. (Anders Pedersen,
81 - Print a warning on out-of-memory (rate limited to 1 per 10 secs)
82 - Added two more Cardbus 575 NICs: 5b57 and 6564 (Paul Wagland)
84 LK1.1.7 2 Jul 2000 andrewm
85 - Better handling of shared IRQs
86 - Reset the transmitter on a Tx reclaim error
87 - Fixed crash under OOM during vortex_open() (Mark Hemment)
88 - Fix Rx cessation problem during OOM (help from Mark Hemment)
89 - The spinlocks around the mdio access were blocking interrupts for 300uS.
90 Fix all this to use spin_lock_bh() within mdio_read/write
91 - Only write to TxFreeThreshold if it's a boomerang - other NICs don't
93 - Added 802.3x MAC-layer flow control support
95 LK1.1.8 13 Aug 2000 andrewm
96 - Ignore request_region() return value - already reserved if Cardbus.
97 - Merged some additional Cardbus flags from Don's 0.99Qk
98 - Some fixes for 3c556 (Fred Maciel)
99 - Fix for EISA initialisation (Jan Rekorajski)
100 - Renamed MII_XCVR_PWR and EEPROM_230 to align with 3c575_cb and D. Becker's drivers
101 - Fixed MII_XCVR_PWR for 3CCFE575CT
102 - Added INVERT_LED_PWR, used it.
103 - Backed out the extra_reset stuff
105 LK1.1.9 12 Sep 2000 andrewm
106 - Backed out the tx_reset_resume flags. It was a no-op.
107 - In vortex_error, don't reset the Tx on txReclaim errors
108 - In vortex_error, don't reset the Tx on maxCollisions errors.
109 Hence backed out all the DownListPtr logic here.
110 - In vortex_error, give Tornado cards a partial TxReset on
111 maxCollisions (David Hinds). Defined MAX_COLLISION_RESET for this.
112 - Redid some driver flags and device names based on pcmcia_cs-3.1.20.
113 - Fixed a bug where, if vp->tx_full is set when the interface
114 is downed, it remains set when the interface is upped. Bad
117 LK1.1.10 17 Sep 2000 andrewm
118 - Added EEPROM_8BIT for 3c555 (Fred Maciel)
119 - Added experimental support for the 3c556B Laptop Hurricane (Louis Gerbarg)
120 - Add HAS_NWAY to "3c900 Cyclone 10Mbps TPO"
122 LK1.1.11 13 Nov 2000 andrewm
123 - Dump MOD_INC/DEC_USE_COUNT, use SET_MODULE_OWNER
125 LK1.1.12 1 Jan 2001 andrewm (2.4.0-pre1)
126 - Call pci_enable_device before we request our IRQ (Tobias Ringstrom)
127 - Add 3c590 PCI latency timer hack to vortex_probe1 (from 0.99Ra)
128 - Added extended issue_and_wait for the 3c905CX.
129 - Look for an MII on PHY index 24 first (3c905CX oddity).
130 - Add HAS_NWAY to 3cSOHO100-TX (Brett Frankenberger)
131 - Don't free skbs we don't own on oom path in vortex_open().
134 - Added explicit `medialock' flag so we can truly
135 lock the media type down with `options'.
136 - "check ioremap return and some tidbits" (Arnaldo Carvalho de Melo <acme@conectiva.com.br>)
137 - Added and used EEPROM_NORESET for 3c556B PM resumes.
138 - Fixed leakage of vp->rx_ring.
139 - Break out separate HAS_HWCKSM device capability flag.
140 - Kill vp->tx_full (ANK)
141 - Merge zerocopy fragment handling (ANK?)
144 - Enable WOL. Can be turned on with `enable_wol' module option.
145 - EISA and PCI initialisation fixes (jgarzik, Manfred Spraul)
146 - If a device's internalconfig register reports it has NWAY,
147 use it, even if autoselect is enabled.
149 LK1.1.15 6 June 2001 akpm
150 - Prevent double counting of received bytes (Lars Christensen)
151 - Add ethtool support (jgarzik)
152 - Add module parm descriptions (Andrzej M. Krzysztofowicz)
153 - Implemented alloc_etherdev() API
154 - Special-case the 'Tx error 82' message.
156 LK1.1.16 18 July 2001 akpm
157 - Make NETIF_F_SG dependent upon nr_free_highpages(), not on CONFIG_HIGHMEM
158 - Lessen verbosity of bootup messages
159 - Fix WOL - use new PM API functions.
160 - Use netif_running() instead of vp->open in suspend/resume.
161 - Don't reset the interface logic on open/close/rmmod. It upsets
162 autonegotiation, and hence DHCP (from 0.99T).
163 - Back out EEPROM_NORESET flag because of the above (we do it for all
165 - Correct 3c982 identification string
166 - Rename wait_for_completion() to issue_and_wait() to avoid completion.h
169 LK1.1.17 18Dec01 akpm
170 - PCI ID 9805 is a Python-T, not a dual-port Cyclone. Apparently.
172 - Mask our advertised modes (vp->advertising) with our capabilities
173 (MII reg5) when deciding which duplex mode to use.
174 - Add `global_options' as default for options[]. Ditto global_enable_wol,
177 LK1.1.18 01Jul02 akpm
178 - Fix for undocumented transceiver power-up bit on some 3c566B's
179 (Donald Becker, Rahul Karnik)
181 - See http://www.zip.com.au/~akpm/linux/#3c59x-2.3 for more details.
182 - Also see Documentation/networking/vortex.txt
184 LK1.1.19 10Nov02 Marc Zyngier <maz@wild-wind.fr.eu.org>
185 - EISA sysfs integration.
189 * FIXME: This driver _could_ support MTU changing, but doesn't. See Don's hamachi.c implementation
190 * as well as other drivers
192 * NOTE: If you make 'vortex_debug' a constant (#define vortex_debug 0) the driver shrinks by 2k
193 * due to dead code elimination. There will be some performance benefits from this due to
194 * elimination of all the tests and reduced cache footprint.
198 #define DRV_NAME "3c59x"
199 #define DRV_VERSION "LK1.1.19"
200 #define DRV_RELDATE "10 Nov 2002"
204 /* A few values that may be tweaked. */
205 /* Keep the ring sizes a power of two for efficiency. */
206 #define TX_RING_SIZE 16
207 #define RX_RING_SIZE 32
208 #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
210 /* "Knobs" that adjust features and parameters. */
211 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
212 Setting to > 1512 effectively disables this feature. */
214 static int rx_copybreak = 200;
216 /* ARM systems perform better by disregarding the bus-master
217 transfer capability of these cards. -- rmk */
218 static int rx_copybreak = 1513;
220 /* Allow setting MTU to a larger size, bypassing the normal ethernet setup. */
221 static const int mtu = 1500;
222 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
223 static int max_interrupt_work = 32;
224 /* Tx timeout interval (millisecs) */
225 static int watchdog = 5000;
227 /* Allow aggregation of Tx interrupts. Saves CPU load at the cost
228 * of possible Tx stalls if the system is blocking interrupts
229 * somewhere else. Undefine this to disable.
231 #define tx_interrupt_mitigation 1
233 /* Put out somewhat more debugging messages. (0: no msg, 1 minimal .. 6). */
234 #define vortex_debug debug
236 static int vortex_debug = VORTEX_DEBUG;
238 static int vortex_debug = 1;
241 #include <linux/config.h>
242 #include <linux/module.h>
243 #include <linux/kernel.h>
244 #include <linux/string.h>
245 #include <linux/timer.h>
246 #include <linux/errno.h>
247 #include <linux/in.h>
248 #include <linux/ioport.h>
249 #include <linux/slab.h>
250 #include <linux/interrupt.h>
251 #include <linux/pci.h>
252 #include <linux/mii.h>
253 #include <linux/init.h>
254 #include <linux/netdevice.h>
255 #include <linux/etherdevice.h>
256 #include <linux/skbuff.h>
257 #include <linux/ethtool.h>
258 #include <linux/highmem.h>
259 #include <linux/eisa.h>
260 #include <linux/bitops.h>
261 #include <linux/jiffies.h>
262 #include <asm/irq.h> /* For NR_IRQS only. */
264 #include <asm/uaccess.h>
266 /* Kernel compatibility defines, some common to David Hinds' PCMCIA package.
267 This is only in the support-all-kernels source code. */
269 #define RUN_AT(x) (jiffies + (x))
271 #include <linux/delay.h>
274 static char version[] __devinitdata =
275 DRV_NAME ": Donald Becker and others. www.scyld.com/network/vortex.html\n";
277 MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
278 MODULE_DESCRIPTION("3Com 3c59x/3c9xx ethernet driver "
279 DRV_VERSION " " DRV_RELDATE);
280 MODULE_LICENSE("GPL");
281 MODULE_VERSION(DRV_VERSION);
284 /* Operational parameter that usually are not changed. */
286 /* The Vortex size is twice that of the original EtherLinkIII series: the
287 runtime register window, window 1, is now always mapped in.
288 The Boomerang size is twice as large as the Vortex -- it has additional
289 bus master control registers. */
290 #define VORTEX_TOTAL_SIZE 0x20
291 #define BOOMERANG_TOTAL_SIZE 0x40
293 /* Set iff a MII transceiver on any interface requires mdio preamble.
294 This only set with the original DP83840 on older 3c905 boards, so the extra
295 code size of a per-interface flag is not worthwhile. */
296 static char mii_preamble_required;
298 #define PFX DRV_NAME ": "
305 I. Board Compatibility
307 This device driver is designed for the 3Com FastEtherLink and FastEtherLink
308 XL, 3Com's PCI to 10/100baseT adapters. It also works with the 10Mbs
309 versions of the FastEtherLink cards. The supported product IDs are
310 3c590, 3c592, 3c595, 3c597, 3c900, 3c905
312 The related ISA 3c515 is supported with a separate driver, 3c515.c, included
313 with the kernel source or available from
314 cesdis.gsfc.nasa.gov:/pub/linux/drivers/3c515.html
316 II. Board-specific settings
318 PCI bus devices are configured by the system at boot time, so no jumpers
319 need to be set on the board. The system BIOS should be set to assign the
320 PCI INTA signal to an otherwise unused system IRQ line.
322 The EEPROM settings for media type and forced-full-duplex are observed.
323 The EEPROM media type should be left at the default "autoselect" unless using
324 10base2 or AUI connections which cannot be reliably detected.
326 III. Driver operation
328 The 3c59x series use an interface that's very similar to the previous 3c5x9
329 series. The primary interface is two programmed-I/O FIFOs, with an
330 alternate single-contiguous-region bus-master transfer (see next).
332 The 3c900 "Boomerang" series uses a full-bus-master interface with separate
333 lists of transmit and receive descriptors, similar to the AMD LANCE/PCnet,
334 DEC Tulip and Intel Speedo3. The first chip version retains a compatible
335 programmed-I/O interface that has been removed in 'B' and subsequent board
338 One extension that is advertised in a very large font is that the adapters
339 are capable of being bus masters. On the Vortex chip this capability was
340 only for a single contiguous region making it far less useful than the full
341 bus master capability. There is a significant performance impact of taking
342 an extra interrupt or polling for the completion of each transfer, as well
343 as difficulty sharing the single transfer engine between the transmit and
344 receive threads. Using DMA transfers is a win only with large blocks or
345 with the flawed versions of the Intel Orion motherboard PCI controller.
347 The Boomerang chip's full-bus-master interface is useful, and has the
348 currently-unused advantages over other similar chips that queued transmit
349 packets may be reordered and receive buffer groups are associated with a
352 With full-bus-master support, this driver uses a "RX_COPYBREAK" scheme.
353 Rather than a fixed intermediate receive buffer, this scheme allocates
354 full-sized skbuffs as receive buffers. The value RX_COPYBREAK is used as
355 the copying breakpoint: it is chosen to trade-off the memory wasted by
356 passing the full-sized skbuff to the queue layer for all frames vs. the
357 copying cost of copying a frame to a correctly-sized skbuff.
359 IIIC. Synchronization
360 The driver runs as two independent, single-threaded flows of control. One
361 is the send-packet routine, which enforces single-threaded use by the
362 dev->tbusy flag. The other thread is the interrupt handler, which is single
363 threaded by the hardware and other software.
367 Thanks to Cameron Spitzer and Terry Murphy of 3Com for providing development
368 3c590, 3c595, and 3c900 boards.
369 The name "Vortex" is the internal 3Com project name for the PCI ASIC, and
370 the EISA version is called "Demon". According to Terry these names come
371 from rides at the local amusement park.
373 The new chips support both ethernet (1.5K) and FDDI (4.5K) packet sizes!
374 This driver only supports ethernet packets because of the skbuff allocation
378 /* This table drives the PCI probe routines. It's mostly boilerplate in all
379 of the drivers, and will likely be provided by some future kernel.
382 PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4,
383 PCI_ADDR0=0x10<<0, PCI_ADDR1=0x10<<1, PCI_ADDR2=0x10<<2, PCI_ADDR3=0x10<<3,
386 enum { IS_VORTEX=1, IS_BOOMERANG=2, IS_CYCLONE=4, IS_TORNADO=8,
387 EEPROM_8BIT=0x10, /* AKPM: Uses 0x230 as the base bitmaps for EEPROM reads */
388 HAS_PWR_CTRL=0x20, HAS_MII=0x40, HAS_NWAY=0x80, HAS_CB_FNS=0x100,
389 INVERT_MII_PWR=0x200, INVERT_LED_PWR=0x400, MAX_COLLISION_RESET=0x800,
390 EEPROM_OFFSET=0x1000, HAS_HWCKSM=0x2000, WNO_XCVR_PWR=0x4000,
391 EXTRA_PREAMBLE=0x8000, EEPROM_RESET=0x10000, };
442 /* note: this array directly indexed by above enums, and MUST
443 * be kept in sync with both the enums above, and the PCI device
446 static struct vortex_chip_info {
451 } vortex_info_tbl[] __devinitdata = {
452 {"3c590 Vortex 10Mbps",
453 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
454 {"3c592 EISA 10Mbps Demon/Vortex", /* AKPM: from Don's 3c59x_cb.c 0.49H */
455 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
456 {"3c597 EISA Fast Demon/Vortex", /* AKPM: from Don's 3c59x_cb.c 0.49H */
457 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
458 {"3c595 Vortex 100baseTx",
459 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
460 {"3c595 Vortex 100baseT4",
461 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
463 {"3c595 Vortex 100base-MII",
464 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
465 {"3c900 Boomerang 10baseT",
466 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|EEPROM_RESET, 64, },
467 {"3c900 Boomerang 10Mbps Combo",
468 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|EEPROM_RESET, 64, },
469 {"3c900 Cyclone 10Mbps TPO", /* AKPM: from Don's 0.99M */
470 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
471 {"3c900 Cyclone 10Mbps Combo",
472 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
474 {"3c900 Cyclone 10Mbps TPC", /* AKPM: from Don's 0.99M */
475 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
476 {"3c900B-FL Cyclone 10base-FL",
477 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
478 {"3c905 Boomerang 100baseTx",
479 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_RESET, 64, },
480 {"3c905 Boomerang 100baseT4",
481 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_RESET, 64, },
482 {"3c905B Cyclone 100baseTx",
483 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM|EXTRA_PREAMBLE, 128, },
485 {"3c905B Cyclone 10/100/BNC",
486 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
487 {"3c905B-FX Cyclone 100baseFx",
488 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
490 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM|EXTRA_PREAMBLE, 128, },
491 {"3c920B-EMB-WNM (ATI Radeon 9100 IGP)",
492 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_MII|HAS_HWCKSM, 128, },
494 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
497 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
498 {"3cSOHO100-TX Hurricane",
499 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
500 {"3c555 Laptop Hurricane",
501 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|EEPROM_8BIT|HAS_HWCKSM, 128, },
502 {"3c556 Laptop Tornado",
503 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|EEPROM_8BIT|HAS_CB_FNS|INVERT_MII_PWR|
505 {"3c556B Laptop Hurricane",
506 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|EEPROM_OFFSET|HAS_CB_FNS|INVERT_MII_PWR|
507 WNO_XCVR_PWR|HAS_HWCKSM, 128, },
509 {"3c575 [Megahertz] 10/100 LAN CardBus",
510 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_8BIT, 128, },
511 {"3c575 Boomerang CardBus",
512 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_8BIT, 128, },
513 {"3CCFE575BT Cyclone CardBus",
514 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|
515 INVERT_LED_PWR|HAS_HWCKSM, 128, },
516 {"3CCFE575CT Tornado CardBus",
517 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
518 MAX_COLLISION_RESET|HAS_HWCKSM, 128, },
519 {"3CCFE656 Cyclone CardBus",
520 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
521 INVERT_LED_PWR|HAS_HWCKSM, 128, },
523 {"3CCFEM656B Cyclone+Winmodem CardBus",
524 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
525 INVERT_LED_PWR|HAS_HWCKSM, 128, },
526 {"3CXFEM656C Tornado+Winmodem CardBus", /* From pcmcia-cs-3.1.5 */
527 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
528 MAX_COLLISION_RESET|HAS_HWCKSM, 128, },
529 {"3c450 HomePNA Tornado", /* AKPM: from Don's 0.99Q */
530 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
532 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
533 {"3c982 Hydra Dual Port A",
534 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_HWCKSM|HAS_NWAY, 128, },
536 {"3c982 Hydra Dual Port B",
537 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_HWCKSM|HAS_NWAY, 128, },
539 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM|EXTRA_PREAMBLE, 128, },
540 {"3c920B-EMB-WNM Tornado",
541 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
543 {NULL,}, /* NULL terminated list. */
547 static struct pci_device_id vortex_pci_tbl[] = {
548 { 0x10B7, 0x5900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C590 },
549 { 0x10B7, 0x5920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C592 },
550 { 0x10B7, 0x5970, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C597 },
551 { 0x10B7, 0x5950, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C595_1 },
552 { 0x10B7, 0x5951, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C595_2 },
554 { 0x10B7, 0x5952, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C595_3 },
555 { 0x10B7, 0x9000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_1 },
556 { 0x10B7, 0x9001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_2 },
557 { 0x10B7, 0x9004, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_3 },
558 { 0x10B7, 0x9005, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_4 },
560 { 0x10B7, 0x9006, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_5 },
561 { 0x10B7, 0x900A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900B_FL },
562 { 0x10B7, 0x9050, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905_1 },
563 { 0x10B7, 0x9051, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905_2 },
564 { 0x10B7, 0x9055, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905B_1 },
566 { 0x10B7, 0x9058, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905B_2 },
567 { 0x10B7, 0x905A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905B_FX },
568 { 0x10B7, 0x9200, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905C },
569 { 0x10B7, 0x9202, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C9202 },
570 { 0x10B7, 0x9800, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C980 },
571 { 0x10B7, 0x9805, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C9805 },
573 { 0x10B7, 0x7646, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CSOHO100_TX },
574 { 0x10B7, 0x5055, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C555 },
575 { 0x10B7, 0x6055, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C556 },
576 { 0x10B7, 0x6056, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C556B },
577 { 0x10B7, 0x5b57, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C575 },
579 { 0x10B7, 0x5057, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C575_1 },
580 { 0x10B7, 0x5157, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFE575 },
581 { 0x10B7, 0x5257, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFE575CT },
582 { 0x10B7, 0x6560, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFE656 },
583 { 0x10B7, 0x6562, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFEM656 },
585 { 0x10B7, 0x6564, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFEM656_1 },
586 { 0x10B7, 0x4500, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C450 },
587 { 0x10B7, 0x9201, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C920 },
588 { 0x10B7, 0x1201, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C982A },
589 { 0x10B7, 0x1202, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C982B },
591 { 0x10B7, 0x9056, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_905BT4 },
592 { 0x10B7, 0x9210, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_920B_EMB_WNM },
594 {0,} /* 0 terminated list. */
596 MODULE_DEVICE_TABLE(pci, vortex_pci_tbl);
599 /* Operational definitions.
600 These are not used by other compilation units and thus are not
601 exported in a ".h" file.
603 First the windows. There are eight register windows, with the command
604 and status registers available in each.
606 #define EL3WINDOW(win_num) iowrite16(SelectWindow + (win_num), ioaddr + EL3_CMD)
608 #define EL3_STATUS 0x0e
610 /* The top five bits written to EL3_CMD are a command, the lower
611 11 bits are the parameter, if applicable.
612 Note that 11 parameters bits was fine for ethernet, but the new chip
613 can handle FDDI length frames (~4500 octets) and now parameters count
614 32-bit 'Dwords' rather than octets. */
617 TotalReset = 0<<11, SelectWindow = 1<<11, StartCoax = 2<<11,
618 RxDisable = 3<<11, RxEnable = 4<<11, RxReset = 5<<11,
619 UpStall = 6<<11, UpUnstall = (6<<11)+1,
620 DownStall = (6<<11)+2, DownUnstall = (6<<11)+3,
621 RxDiscard = 8<<11, TxEnable = 9<<11, TxDisable = 10<<11, TxReset = 11<<11,
622 FakeIntr = 12<<11, AckIntr = 13<<11, SetIntrEnb = 14<<11,
623 SetStatusEnb = 15<<11, SetRxFilter = 16<<11, SetRxThreshold = 17<<11,
624 SetTxThreshold = 18<<11, SetTxStart = 19<<11,
625 StartDMAUp = 20<<11, StartDMADown = (20<<11)+1, StatsEnable = 21<<11,
626 StatsDisable = 22<<11, StopCoax = 23<<11, SetFilterBit = 25<<11,};
628 /* The SetRxFilter command accepts the following classes: */
630 RxStation = 1, RxMulticast = 2, RxBroadcast = 4, RxProm = 8 };
632 /* Bits in the general status register. */
634 IntLatch = 0x0001, HostError = 0x0002, TxComplete = 0x0004,
635 TxAvailable = 0x0008, RxComplete = 0x0010, RxEarly = 0x0020,
636 IntReq = 0x0040, StatsFull = 0x0080,
637 DMADone = 1<<8, DownComplete = 1<<9, UpComplete = 1<<10,
638 DMAInProgress = 1<<11, /* DMA controller is still busy.*/
639 CmdInProgress = 1<<12, /* EL3_CMD is still busy.*/
642 /* Register window 1 offsets, the window used in normal operation.
643 On the Vortex this window is always mapped at offsets 0x10-0x1f. */
645 TX_FIFO = 0x10, RX_FIFO = 0x10, RxErrors = 0x14,
646 RxStatus = 0x18, Timer=0x1A, TxStatus = 0x1B,
647 TxFree = 0x1C, /* Remaining free bytes in Tx buffer. */
650 Wn0EepromCmd = 10, /* Window 0: EEPROM command register. */
651 Wn0EepromData = 12, /* Window 0: EEPROM results register. */
652 IntrStatus=0x0E, /* Valid in all windows. */
654 enum Win0_EEPROM_bits {
655 EEPROM_Read = 0x80, EEPROM_WRITE = 0x40, EEPROM_ERASE = 0xC0,
656 EEPROM_EWENB = 0x30, /* Enable erasing/writing for 10 msec. */
657 EEPROM_EWDIS = 0x00, /* Disable EWENB before 10 msec timeout. */
659 /* EEPROM locations. */
661 PhysAddr01=0, PhysAddr23=1, PhysAddr45=2, ModelID=3,
662 EtherLink3ID=7, IFXcvrIO=8, IRQLine=9,
663 NodeAddr01=10, NodeAddr23=11, NodeAddr45=12,
664 DriverTune=13, Checksum=15};
666 enum Window2 { /* Window 2. */
669 enum Window3 { /* Window 3: MAC/config bits. */
670 Wn3_Config=0, Wn3_MaxPktSize=4, Wn3_MAC_Ctrl=6, Wn3_Options=8,
673 #define BFEXT(value, offset, bitcount) \
674 ((((unsigned long)(value)) >> (offset)) & ((1 << (bitcount)) - 1))
676 #define BFINS(lhs, rhs, offset, bitcount) \
677 (((lhs) & ~((((1 << (bitcount)) - 1)) << (offset))) | \
678 (((rhs) & ((1 << (bitcount)) - 1)) << (offset)))
680 #define RAM_SIZE(v) BFEXT(v, 0, 3)
681 #define RAM_WIDTH(v) BFEXT(v, 3, 1)
682 #define RAM_SPEED(v) BFEXT(v, 4, 2)
683 #define ROM_SIZE(v) BFEXT(v, 6, 2)
684 #define RAM_SPLIT(v) BFEXT(v, 16, 2)
685 #define XCVR(v) BFEXT(v, 20, 4)
686 #define AUTOSELECT(v) BFEXT(v, 24, 1)
688 enum Window4 { /* Window 4: Xcvr/media bits. */
689 Wn4_FIFODiag = 4, Wn4_NetDiag = 6, Wn4_PhysicalMgmt=8, Wn4_Media = 10,
691 enum Win4_Media_bits {
692 Media_SQE = 0x0008, /* Enable SQE error counting for AUI. */
693 Media_10TP = 0x00C0, /* Enable link beat and jabber for 10baseT. */
694 Media_Lnk = 0x0080, /* Enable just link beat for 100TX/100FX. */
695 Media_LnkBeat = 0x0800,
697 enum Window7 { /* Window 7: Bus Master control. */
698 Wn7_MasterAddr = 0, Wn7_VlanEtherType=4, Wn7_MasterLen = 6,
699 Wn7_MasterStatus = 12,
701 /* Boomerang bus master control registers. */
703 PktStatus = 0x20, DownListPtr = 0x24, FragAddr = 0x28, FragLen = 0x2c,
704 TxFreeThreshold = 0x2f, UpPktStatus = 0x30, UpListPtr = 0x38,
707 /* The Rx and Tx descriptor lists.
708 Caution Alpha hackers: these types are 32 bits! Note also the 8 byte
709 alignment contraint on tx_ring[] and rx_ring[]. */
710 #define LAST_FRAG 0x80000000 /* Last Addr/Len pair in descriptor. */
711 #define DN_COMPLETE 0x00010000 /* This packet has been downloaded */
712 struct boom_rx_desc {
713 u32 next; /* Last entry points to 0. */
715 u32 addr; /* Up to 63 addr/len pairs possible. */
716 s32 length; /* Set LAST_FRAG to indicate last pair. */
718 /* Values for the Rx status entry. */
719 enum rx_desc_status {
720 RxDComplete=0x00008000, RxDError=0x4000,
721 /* See boomerang_rx() for actual error bits */
722 IPChksumErr=1<<25, TCPChksumErr=1<<26, UDPChksumErr=1<<27,
723 IPChksumValid=1<<29, TCPChksumValid=1<<30, UDPChksumValid=1<<31,
727 #define DO_ZEROCOPY 1
729 #define DO_ZEROCOPY 0
732 struct boom_tx_desc {
733 u32 next; /* Last entry points to 0. */
734 s32 status; /* bits 0:12 length, others see below. */
739 } frag[1+MAX_SKB_FRAGS];
746 /* Values for the Tx status entry. */
747 enum tx_desc_status {
748 CRCDisable=0x2000, TxDComplete=0x8000,
749 AddIPChksum=0x02000000, AddTCPChksum=0x04000000, AddUDPChksum=0x08000000,
750 TxIntrUploaded=0x80000000, /* IRQ when in FIFO, but maybe not sent. */
753 /* Chip features we care about in vp->capabilities, read from the EEPROM. */
754 enum ChipCaps { CapBusMaster=0x20, CapPwrMgmt=0x2000 };
756 struct vortex_extra_stats {
757 unsigned long tx_deferred;
758 unsigned long tx_max_collisions;
759 unsigned long tx_multiple_collisions;
760 unsigned long tx_single_collisions;
761 unsigned long rx_bad_ssd;
764 struct vortex_private {
765 /* The Rx and Tx rings should be quad-word-aligned. */
766 struct boom_rx_desc* rx_ring;
767 struct boom_tx_desc* tx_ring;
768 dma_addr_t rx_ring_dma;
769 dma_addr_t tx_ring_dma;
770 /* The addresses of transmit- and receive-in-place skbuffs. */
771 struct sk_buff* rx_skbuff[RX_RING_SIZE];
772 struct sk_buff* tx_skbuff[TX_RING_SIZE];
773 unsigned int cur_rx, cur_tx; /* The next free ring entry */
774 unsigned int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
775 struct net_device_stats stats; /* Generic stats */
776 struct vortex_extra_stats xstats; /* NIC-specific extra stats */
777 struct sk_buff *tx_skb; /* Packet being eaten by bus master ctrl. */
778 dma_addr_t tx_skb_dma; /* Allocated DMA address for bus master ctrl DMA. */
780 /* PCI configuration space information. */
781 struct device *gendev;
782 void __iomem *ioaddr; /* IO address space */
783 void __iomem *cb_fn_base; /* CardBus function status addr space. */
785 /* Some values here only for performance evaluation and path-coverage */
786 int rx_nocopy, rx_copy, queued_packet, rx_csumhits;
789 /* The remainder are related to chip state, mostly media selection. */
790 struct timer_list timer; /* Media selection timer. */
791 struct timer_list rx_oom_timer; /* Rx skb allocation retry timer */
792 int options; /* User-settable misc. driver options. */
793 unsigned int media_override:4, /* Passed-in media type. */
794 default_media:4, /* Read from the EEPROM/Wn3_Config. */
795 full_duplex:1, force_fd:1, autoselect:1,
796 bus_master:1, /* Vortex can only do a fragment bus-m. */
797 full_bus_master_tx:1, full_bus_master_rx:2, /* Boomerang */
798 flow_ctrl:1, /* Use 802.3x flow control (PAUSE only) */
799 partner_flow_ctrl:1, /* Partner supports flow control */
801 enable_wol:1, /* Wake-on-LAN is enabled */
802 pm_state_valid:1, /* pci_dev->saved_config_space has sane contents */
805 must_free_region:1, /* Flag: if zero, Cardbus owns the I/O region */
806 large_frames:1; /* accept large frames */
810 u16 available_media; /* From Wn3_Options. */
811 u16 capabilities, info1, info2; /* Various, from EEPROM. */
812 u16 advertising; /* NWay media advertisement */
813 unsigned char phys[2]; /* MII device addresses. */
814 u16 deferred; /* Resend these interrupts when we
815 * bale from the ISR */
816 u16 io_size; /* Size of PCI region (for release_region) */
817 spinlock_t lock; /* Serialise access to device & its vortex_private */
818 struct mii_if_info mii; /* MII lib hooks/info */
822 #define DEVICE_PCI(dev) (((dev)->bus == &pci_bus_type) ? to_pci_dev((dev)) : NULL)
824 #define DEVICE_PCI(dev) NULL
827 #define VORTEX_PCI(vp) (((vp)->gendev) ? DEVICE_PCI((vp)->gendev) : NULL)
830 #define DEVICE_EISA(dev) (((dev)->bus == &eisa_bus_type) ? to_eisa_device((dev)) : NULL)
832 #define DEVICE_EISA(dev) NULL
835 #define VORTEX_EISA(vp) (((vp)->gendev) ? DEVICE_EISA((vp)->gendev) : NULL)
837 /* The action to take with a media selection timer tick.
838 Note that we deviate from the 3Com order by checking 10base2 before AUI.
841 XCVR_10baseT=0, XCVR_AUI, XCVR_10baseTOnly, XCVR_10base2, XCVR_100baseTx,
842 XCVR_100baseFx, XCVR_MII=6, XCVR_NWAY=8, XCVR_ExtMII=9, XCVR_Default=10,
845 static const struct media_table {
847 unsigned int media_bits:16, /* Bits to set in Wn4_Media register. */
848 mask:8, /* The transceiver-present bit in Wn3_Config.*/
849 next:8; /* The media type to try next. */
850 int wait; /* Time before we check media status. */
852 { "10baseT", Media_10TP,0x08, XCVR_10base2, (14*HZ)/10},
853 { "10Mbs AUI", Media_SQE, 0x20, XCVR_Default, (1*HZ)/10},
854 { "undefined", 0, 0x80, XCVR_10baseT, 10000},
855 { "10base2", 0, 0x10, XCVR_AUI, (1*HZ)/10},
856 { "100baseTX", Media_Lnk, 0x02, XCVR_100baseFx, (14*HZ)/10},
857 { "100baseFX", Media_Lnk, 0x04, XCVR_MII, (14*HZ)/10},
858 { "MII", 0, 0x41, XCVR_10baseT, 3*HZ },
859 { "undefined", 0, 0x01, XCVR_10baseT, 10000},
860 { "Autonegotiate", 0, 0x41, XCVR_10baseT, 3*HZ},
861 { "MII-External", 0, 0x41, XCVR_10baseT, 3*HZ },
862 { "Default", 0, 0xFF, XCVR_10baseT, 10000},
866 const char str[ETH_GSTRING_LEN];
867 } ethtool_stats_keys[] = {
869 { "tx_max_collisions" },
870 { "tx_multiple_collisions" },
871 { "tx_single_collisions" },
875 /* number of ETHTOOL_GSTATS u64's */
876 #define VORTEX_NUM_STATS 5
878 static int vortex_probe1(struct device *gendev, void __iomem *ioaddr, int irq,
879 int chip_idx, int card_idx);
880 static void vortex_up(struct net_device *dev);
881 static void vortex_down(struct net_device *dev, int final);
882 static int vortex_open(struct net_device *dev);
883 static void mdio_sync(void __iomem *ioaddr, int bits);
884 static int mdio_read(struct net_device *dev, int phy_id, int location);
885 static void mdio_write(struct net_device *vp, int phy_id, int location, int value);
886 static void vortex_timer(unsigned long arg);
887 static void rx_oom_timer(unsigned long arg);
888 static int vortex_start_xmit(struct sk_buff *skb, struct net_device *dev);
889 static int boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev);
890 static int vortex_rx(struct net_device *dev);
891 static int boomerang_rx(struct net_device *dev);
892 static irqreturn_t vortex_interrupt(int irq, void *dev_id, struct pt_regs *regs);
893 static irqreturn_t boomerang_interrupt(int irq, void *dev_id, struct pt_regs *regs);
894 static int vortex_close(struct net_device *dev);
895 static void dump_tx_ring(struct net_device *dev);
896 static void update_stats(void __iomem *ioaddr, struct net_device *dev);
897 static struct net_device_stats *vortex_get_stats(struct net_device *dev);
898 static void set_rx_mode(struct net_device *dev);
900 static int vortex_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
902 static void vortex_tx_timeout(struct net_device *dev);
903 static void acpi_set_WOL(struct net_device *dev);
904 static struct ethtool_ops vortex_ethtool_ops;
905 static void set_8021q_mode(struct net_device *dev, int enable);
908 /* This driver uses 'options' to pass the media type, full-duplex flag, etc. */
909 /* Option count limit only -- unlimited interfaces are supported. */
911 static int options[MAX_UNITS] = { [0 ... MAX_UNITS-1] = -1 };
912 static int full_duplex[MAX_UNITS] = {[0 ... MAX_UNITS-1] = -1 };
913 static int hw_checksums[MAX_UNITS] = {[0 ... MAX_UNITS-1] = -1 };
914 static int flow_ctrl[MAX_UNITS] = {[0 ... MAX_UNITS-1] = -1 };
915 static int enable_wol[MAX_UNITS] = {[0 ... MAX_UNITS-1] = -1 };
916 static int use_mmio[MAX_UNITS] = {[0 ... MAX_UNITS-1] = -1 };
917 static int global_options = -1;
918 static int global_full_duplex = -1;
919 static int global_enable_wol = -1;
920 static int global_use_mmio = -1;
922 /* #define dev_alloc_skb dev_alloc_skb_debug */
924 /* Variables to work-around the Compaq PCI BIOS32 problem. */
925 static int compaq_ioaddr, compaq_irq, compaq_device_id = 0x5900;
926 static struct net_device *compaq_net_device;
928 static int vortex_cards_found;
930 module_param(debug, int, 0);
931 module_param(global_options, int, 0);
932 module_param_array(options, int, NULL, 0);
933 module_param(global_full_duplex, int, 0);
934 module_param_array(full_duplex, int, NULL, 0);
935 module_param_array(hw_checksums, int, NULL, 0);
936 module_param_array(flow_ctrl, int, NULL, 0);
937 module_param(global_enable_wol, int, 0);
938 module_param_array(enable_wol, int, NULL, 0);
939 module_param(rx_copybreak, int, 0);
940 module_param(max_interrupt_work, int, 0);
941 module_param(compaq_ioaddr, int, 0);
942 module_param(compaq_irq, int, 0);
943 module_param(compaq_device_id, int, 0);
944 module_param(watchdog, int, 0);
945 module_param(global_use_mmio, int, 0);
946 module_param_array(use_mmio, int, NULL, 0);
947 MODULE_PARM_DESC(debug, "3c59x debug level (0-6)");
948 MODULE_PARM_DESC(options, "3c59x: Bits 0-3: media type, bit 4: bus mastering, bit 9: full duplex");
949 MODULE_PARM_DESC(global_options, "3c59x: same as options, but applies to all NICs if options is unset");
950 MODULE_PARM_DESC(full_duplex, "3c59x full duplex setting(s) (1)");
951 MODULE_PARM_DESC(global_full_duplex, "3c59x: same as full_duplex, but applies to all NICs if full_duplex is unset");
952 MODULE_PARM_DESC(hw_checksums, "3c59x Hardware checksum checking by adapter(s) (0-1)");
953 MODULE_PARM_DESC(flow_ctrl, "3c59x 802.3x flow control usage (PAUSE only) (0-1)");
954 MODULE_PARM_DESC(enable_wol, "3c59x: Turn on Wake-on-LAN for adapter(s) (0-1)");
955 MODULE_PARM_DESC(global_enable_wol, "3c59x: same as enable_wol, but applies to all NICs if enable_wol is unset");
956 MODULE_PARM_DESC(rx_copybreak, "3c59x copy breakpoint for copy-only-tiny-frames");
957 MODULE_PARM_DESC(max_interrupt_work, "3c59x maximum events handled per interrupt");
958 MODULE_PARM_DESC(compaq_ioaddr, "3c59x PCI I/O base address (Compaq BIOS problem workaround)");
959 MODULE_PARM_DESC(compaq_irq, "3c59x PCI IRQ number (Compaq BIOS problem workaround)");
960 MODULE_PARM_DESC(compaq_device_id, "3c59x PCI device ID (Compaq BIOS problem workaround)");
961 MODULE_PARM_DESC(watchdog, "3c59x transmit timeout in milliseconds");
962 MODULE_PARM_DESC(global_use_mmio, "3c59x: same as use_mmio, but applies to all NICs if options is unset");
963 MODULE_PARM_DESC(use_mmio, "3c59x: use memory-mapped PCI I/O resource (0-1)");
965 #ifdef CONFIG_NET_POLL_CONTROLLER
966 static void poll_vortex(struct net_device *dev)
968 struct vortex_private *vp = netdev_priv(dev);
970 local_save_flags(flags);
972 (vp->full_bus_master_rx ? boomerang_interrupt:vortex_interrupt)(dev->irq,dev,NULL);
973 local_irq_restore(flags);
979 static int vortex_suspend (struct pci_dev *pdev, pm_message_t state)
981 struct net_device *dev = pci_get_drvdata(pdev);
983 if (dev && dev->priv) {
984 if (netif_running(dev)) {
985 netif_device_detach(dev);
988 pci_save_state(pdev);
989 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
990 free_irq(dev->irq, dev);
991 pci_disable_device(pdev);
992 pci_set_power_state(pdev, pci_choose_state(pdev, state));
997 static int vortex_resume (struct pci_dev *pdev)
999 struct net_device *dev = pci_get_drvdata(pdev);
1000 struct vortex_private *vp = netdev_priv(dev);
1003 pci_set_power_state(pdev, PCI_D0);
1004 pci_restore_state(pdev);
1005 pci_enable_device(pdev);
1006 pci_set_master(pdev);
1007 if (request_irq(dev->irq, vp->full_bus_master_rx ?
1008 &boomerang_interrupt : &vortex_interrupt, SA_SHIRQ, dev->name, dev)) {
1009 printk(KERN_WARNING "%s: Could not reserve IRQ %d\n", dev->name, dev->irq);
1010 pci_disable_device(pdev);
1013 if (netif_running(dev)) {
1015 netif_device_attach(dev);
1021 #endif /* CONFIG_PM */
1024 static struct eisa_device_id vortex_eisa_ids[] = {
1025 { "TCM5920", CH_3C592 },
1026 { "TCM5970", CH_3C597 },
1030 static int vortex_eisa_probe (struct device *device);
1031 static int vortex_eisa_remove (struct device *device);
1033 static struct eisa_driver vortex_eisa_driver = {
1034 .id_table = vortex_eisa_ids,
1037 .probe = vortex_eisa_probe,
1038 .remove = vortex_eisa_remove
1042 static int vortex_eisa_probe (struct device *device)
1044 void __iomem *ioaddr;
1045 struct eisa_device *edev;
1047 edev = to_eisa_device (device);
1049 if (!request_region(edev->base_addr, VORTEX_TOTAL_SIZE, DRV_NAME))
1052 ioaddr = ioport_map(edev->base_addr, VORTEX_TOTAL_SIZE);
1054 if (vortex_probe1(device, ioaddr, ioread16(ioaddr + 0xC88) >> 12,
1055 edev->id.driver_data, vortex_cards_found)) {
1056 release_region (edev->base_addr, VORTEX_TOTAL_SIZE);
1060 vortex_cards_found++;
1065 static int vortex_eisa_remove (struct device *device)
1067 struct eisa_device *edev;
1068 struct net_device *dev;
1069 struct vortex_private *vp;
1070 void __iomem *ioaddr;
1072 edev = to_eisa_device (device);
1073 dev = eisa_get_drvdata (edev);
1076 printk("vortex_eisa_remove called for Compaq device!\n");
1080 vp = netdev_priv(dev);
1081 ioaddr = vp->ioaddr;
1083 unregister_netdev (dev);
1084 iowrite16 (TotalReset|0x14, ioaddr + EL3_CMD);
1085 release_region (dev->base_addr, VORTEX_TOTAL_SIZE);
1092 /* returns count found (>= 0), or negative on error */
1093 static int __init vortex_eisa_init (void)
1096 int orig_cards_found = vortex_cards_found;
1099 if (eisa_driver_register (&vortex_eisa_driver) >= 0) {
1100 /* Because of the way EISA bus is probed, we cannot assume
1101 * any device have been found when we exit from
1102 * eisa_driver_register (the bus root driver may not be
1103 * initialized yet). So we blindly assume something was
1104 * found, and let the sysfs magic happend... */
1110 /* Special code to work-around the Compaq PCI BIOS32 problem. */
1111 if (compaq_ioaddr) {
1112 vortex_probe1(NULL, ioport_map(compaq_ioaddr, VORTEX_TOTAL_SIZE),
1113 compaq_irq, compaq_device_id, vortex_cards_found++);
1116 return vortex_cards_found - orig_cards_found + eisa_found;
1119 /* returns count (>= 0), or negative on error */
1120 static int __devinit vortex_init_one (struct pci_dev *pdev,
1121 const struct pci_device_id *ent)
1123 int rc, unit, pci_bar;
1124 struct vortex_chip_info *vci;
1125 void __iomem *ioaddr;
1127 /* wake up and enable device */
1128 rc = pci_enable_device (pdev);
1132 unit = vortex_cards_found;
1134 if (global_use_mmio < 0 && (unit >= MAX_UNITS || use_mmio[unit] < 0)) {
1135 /* Determine the default if the user didn't override us */
1136 vci = &vortex_info_tbl[ent->driver_data];
1137 pci_bar = vci->drv_flags & (IS_CYCLONE | IS_TORNADO) ? 1 : 0;
1138 } else if (unit < MAX_UNITS && use_mmio[unit] >= 0)
1139 pci_bar = use_mmio[unit] ? 1 : 0;
1141 pci_bar = global_use_mmio ? 1 : 0;
1143 ioaddr = pci_iomap(pdev, pci_bar, 0);
1144 if (!ioaddr) /* If mapping fails, fall-back to BAR 0... */
1145 ioaddr = pci_iomap(pdev, 0, 0);
1147 rc = vortex_probe1(&pdev->dev, ioaddr, pdev->irq,
1148 ent->driver_data, unit);
1150 pci_disable_device (pdev);
1154 vortex_cards_found++;
1161 * Start up the PCI/EISA device which is described by *gendev.
1162 * Return 0 on success.
1164 * NOTE: pdev can be NULL, for the case of a Compaq device
1166 static int __devinit vortex_probe1(struct device *gendev,
1167 void __iomem *ioaddr, int irq,
1168 int chip_idx, int card_idx)
1170 struct vortex_private *vp;
1172 unsigned int eeprom[0x40], checksum = 0; /* EEPROM contents */
1174 struct net_device *dev;
1175 static int printed_version;
1176 int retval, print_info;
1177 struct vortex_chip_info * const vci = &vortex_info_tbl[chip_idx];
1178 char *print_name = "3c59x";
1179 struct pci_dev *pdev = NULL;
1180 struct eisa_device *edev = NULL;
1182 if (!printed_version) {
1184 printed_version = 1;
1188 if ((pdev = DEVICE_PCI(gendev))) {
1189 print_name = pci_name(pdev);
1192 if ((edev = DEVICE_EISA(gendev))) {
1193 print_name = edev->dev.bus_id;
1197 dev = alloc_etherdev(sizeof(*vp));
1200 printk (KERN_ERR PFX "unable to allocate etherdev, aborting\n");
1203 SET_MODULE_OWNER(dev);
1204 SET_NETDEV_DEV(dev, gendev);
1205 vp = netdev_priv(dev);
1207 option = global_options;
1209 /* The lower four bits are the media type. */
1210 if (dev->mem_start) {
1212 * The 'options' param is passed in as the third arg to the
1213 * LILO 'ether=' argument for non-modular use
1215 option = dev->mem_start;
1217 else if (card_idx < MAX_UNITS) {
1218 if (options[card_idx] >= 0)
1219 option = options[card_idx];
1223 if (option & 0x8000)
1225 if (option & 0x4000)
1227 if (option & 0x0400)
1231 print_info = (vortex_debug > 1);
1233 printk (KERN_INFO "See Documentation/networking/vortex.txt\n");
1235 printk(KERN_INFO "%s: 3Com %s %s at %p. Vers " DRV_VERSION "\n",
1237 pdev ? "PCI" : "EISA",
1241 dev->base_addr = (unsigned long)ioaddr;
1244 vp->ioaddr = ioaddr;
1245 vp->large_frames = mtu > 1500;
1246 vp->drv_flags = vci->drv_flags;
1247 vp->has_nway = (vci->drv_flags & HAS_NWAY) ? 1 : 0;
1248 vp->io_size = vci->io_size;
1249 vp->card_idx = card_idx;
1251 /* module list only for Compaq device */
1252 if (gendev == NULL) {
1253 compaq_net_device = dev;
1256 /* PCI-only startup logic */
1258 /* EISA resources already marked, so only PCI needs to do this here */
1259 /* Ignore return value, because Cardbus drivers already allocate for us */
1260 if (request_region(dev->base_addr, vci->io_size, print_name) != NULL)
1261 vp->must_free_region = 1;
1263 /* enable bus-mastering if necessary */
1264 if (vci->flags & PCI_USES_MASTER)
1265 pci_set_master (pdev);
1267 if (vci->drv_flags & IS_VORTEX) {
1269 u8 new_latency = 248;
1271 /* Check the PCI latency value. On the 3c590 series the latency timer
1272 must be set to the maximum value to avoid data corruption that occurs
1273 when the timer expires during a transfer. This bug exists the Vortex
1275 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &pci_latency);
1276 if (pci_latency < new_latency) {
1277 printk(KERN_INFO "%s: Overriding PCI latency"
1278 " timer (CFLT) setting of %d, new value is %d.\n",
1279 print_name, pci_latency, new_latency);
1280 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, new_latency);
1285 spin_lock_init(&vp->lock);
1286 vp->gendev = gendev;
1288 vp->mii.mdio_read = mdio_read;
1289 vp->mii.mdio_write = mdio_write;
1290 vp->mii.phy_id_mask = 0x1f;
1291 vp->mii.reg_num_mask = 0x1f;
1293 /* Makes sure rings are at least 16 byte aligned. */
1294 vp->rx_ring = pci_alloc_consistent(pdev, sizeof(struct boom_rx_desc) * RX_RING_SIZE
1295 + sizeof(struct boom_tx_desc) * TX_RING_SIZE,
1298 if (vp->rx_ring == 0)
1301 vp->tx_ring = (struct boom_tx_desc *)(vp->rx_ring + RX_RING_SIZE);
1302 vp->tx_ring_dma = vp->rx_ring_dma + sizeof(struct boom_rx_desc) * RX_RING_SIZE;
1304 /* if we are a PCI driver, we store info in pdev->driver_data
1305 * instead of a module list */
1307 pci_set_drvdata(pdev, dev);
1309 eisa_set_drvdata (edev, dev);
1311 vp->media_override = 7;
1313 vp->media_override = ((option & 7) == 2) ? 0 : option & 15;
1314 if (vp->media_override != 7)
1316 vp->full_duplex = (option & 0x200) ? 1 : 0;
1317 vp->bus_master = (option & 16) ? 1 : 0;
1320 if (global_full_duplex > 0)
1321 vp->full_duplex = 1;
1322 if (global_enable_wol > 0)
1325 if (card_idx < MAX_UNITS) {
1326 if (full_duplex[card_idx] > 0)
1327 vp->full_duplex = 1;
1328 if (flow_ctrl[card_idx] > 0)
1330 if (enable_wol[card_idx] > 0)
1334 vp->force_fd = vp->full_duplex;
1335 vp->options = option;
1336 /* Read the station address from the EEPROM. */
1341 if (vci->drv_flags & EEPROM_8BIT)
1343 else if (vci->drv_flags & EEPROM_OFFSET)
1344 base = EEPROM_Read + 0x30;
1348 for (i = 0; i < 0x40; i++) {
1350 iowrite16(base + i, ioaddr + Wn0EepromCmd);
1351 /* Pause for at least 162 us. for the read to take place. */
1352 for (timer = 10; timer >= 0; timer--) {
1354 if ((ioread16(ioaddr + Wn0EepromCmd) & 0x8000) == 0)
1357 eeprom[i] = ioread16(ioaddr + Wn0EepromData);
1360 for (i = 0; i < 0x18; i++)
1361 checksum ^= eeprom[i];
1362 checksum = (checksum ^ (checksum >> 8)) & 0xff;
1363 if (checksum != 0x00) { /* Grrr, needless incompatible change 3Com. */
1365 checksum ^= eeprom[i++];
1366 checksum = (checksum ^ (checksum >> 8)) & 0xff;
1368 if ((checksum != 0x00) && !(vci->drv_flags & IS_TORNADO))
1369 printk(" ***INVALID CHECKSUM %4.4x*** ", checksum);
1370 for (i = 0; i < 3; i++)
1371 ((u16 *)dev->dev_addr)[i] = htons(eeprom[i + 10]);
1372 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
1374 for (i = 0; i < 6; i++)
1375 printk("%c%2.2x", i ? ':' : ' ', dev->dev_addr[i]);
1377 /* Unfortunately an all zero eeprom passes the checksum and this
1378 gets found in the wild in failure cases. Crypto is hard 8) */
1379 if (!is_valid_ether_addr(dev->dev_addr)) {
1381 printk(KERN_ERR "*** EEPROM MAC address is invalid.\n");
1382 goto free_ring; /* With every pack */
1385 for (i = 0; i < 6; i++)
1386 iowrite8(dev->dev_addr[i], ioaddr + i);
1390 printk(", IRQ %s\n", __irq_itoa(dev->irq));
1393 printk(", IRQ %d\n", dev->irq);
1394 /* Tell them about an invalid IRQ. */
1395 if (dev->irq <= 0 || dev->irq >= NR_IRQS)
1396 printk(KERN_WARNING " *** Warning: IRQ %d is unlikely to work! ***\n",
1401 step = (ioread8(ioaddr + Wn4_NetDiag) & 0x1e) >> 1;
1403 printk(KERN_INFO " product code %02x%02x rev %02x.%d date %02d-"
1404 "%02d-%02d\n", eeprom[6]&0xff, eeprom[6]>>8, eeprom[0x14],
1405 step, (eeprom[4]>>5) & 15, eeprom[4] & 31, eeprom[4]>>9);
1409 if (pdev && vci->drv_flags & HAS_CB_FNS) {
1412 vp->cb_fn_base = pci_iomap(pdev, 2, 0);
1413 if (!vp->cb_fn_base) {
1419 printk(KERN_INFO "%s: CardBus functions mapped %8.8lx->%p\n",
1420 print_name, pci_resource_start(pdev, 2),
1425 n = ioread16(ioaddr + Wn2_ResetOptions) & ~0x4010;
1426 if (vp->drv_flags & INVERT_LED_PWR)
1428 if (vp->drv_flags & INVERT_MII_PWR)
1430 iowrite16(n, ioaddr + Wn2_ResetOptions);
1431 if (vp->drv_flags & WNO_XCVR_PWR) {
1433 iowrite16(0x0800, ioaddr);
1437 /* Extract our information from the EEPROM data. */
1438 vp->info1 = eeprom[13];
1439 vp->info2 = eeprom[15];
1440 vp->capabilities = eeprom[16];
1442 if (vp->info1 & 0x8000) {
1443 vp->full_duplex = 1;
1445 printk(KERN_INFO "Full duplex capable\n");
1449 static const char * const ram_split[] = {"5:3", "3:1", "1:1", "3:5"};
1450 unsigned int config;
1452 vp->available_media = ioread16(ioaddr + Wn3_Options);
1453 if ((vp->available_media & 0xff) == 0) /* Broken 3c916 */
1454 vp->available_media = 0x40;
1455 config = ioread32(ioaddr + Wn3_Config);
1457 printk(KERN_DEBUG " Internal config register is %4.4x, "
1458 "transceivers %#x.\n", config, ioread16(ioaddr + Wn3_Options));
1459 printk(KERN_INFO " %dK %s-wide RAM %s Rx:Tx split, %s%s interface.\n",
1460 8 << RAM_SIZE(config),
1461 RAM_WIDTH(config) ? "word" : "byte",
1462 ram_split[RAM_SPLIT(config)],
1463 AUTOSELECT(config) ? "autoselect/" : "",
1464 XCVR(config) > XCVR_ExtMII ? "<invalid transceiver>" :
1465 media_tbl[XCVR(config)].name);
1467 vp->default_media = XCVR(config);
1468 if (vp->default_media == XCVR_NWAY)
1470 vp->autoselect = AUTOSELECT(config);
1473 if (vp->media_override != 7) {
1474 printk(KERN_INFO "%s: Media override to transceiver type %d (%s).\n",
1475 print_name, vp->media_override,
1476 media_tbl[vp->media_override].name);
1477 dev->if_port = vp->media_override;
1479 dev->if_port = vp->default_media;
1481 if ((vp->available_media & 0x40) || (vci->drv_flags & HAS_NWAY) ||
1482 dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) {
1483 int phy, phy_idx = 0;
1485 mii_preamble_required++;
1486 if (vp->drv_flags & EXTRA_PREAMBLE)
1487 mii_preamble_required++;
1488 mdio_sync(ioaddr, 32);
1489 mdio_read(dev, 24, MII_BMSR);
1490 for (phy = 0; phy < 32 && phy_idx < 1; phy++) {
1491 int mii_status, phyx;
1494 * For the 3c905CX we look at index 24 first, because it bogusly
1495 * reports an external PHY at all indices
1503 mii_status = mdio_read(dev, phyx, MII_BMSR);
1504 if (mii_status && mii_status != 0xffff) {
1505 vp->phys[phy_idx++] = phyx;
1507 printk(KERN_INFO " MII transceiver found at address %d,"
1508 " status %4x.\n", phyx, mii_status);
1510 if ((mii_status & 0x0040) == 0)
1511 mii_preamble_required++;
1514 mii_preamble_required--;
1516 printk(KERN_WARNING" ***WARNING*** No MII transceivers found!\n");
1519 vp->advertising = mdio_read(dev, vp->phys[0], MII_ADVERTISE);
1520 if (vp->full_duplex) {
1521 /* Only advertise the FD media types. */
1522 vp->advertising &= ~0x02A0;
1523 mdio_write(dev, vp->phys[0], 4, vp->advertising);
1526 vp->mii.phy_id = vp->phys[0];
1529 if (vp->capabilities & CapBusMaster) {
1530 vp->full_bus_master_tx = 1;
1532 printk(KERN_INFO " Enabling bus-master transmits and %s receives.\n",
1533 (vp->info2 & 1) ? "early" : "whole-frame" );
1535 vp->full_bus_master_rx = (vp->info2 & 1) ? 1 : 2;
1536 vp->bus_master = 0; /* AKPM: vortex only */
1539 /* The 3c59x-specific entries in the device structure. */
1540 dev->open = vortex_open;
1541 if (vp->full_bus_master_tx) {
1542 dev->hard_start_xmit = boomerang_start_xmit;
1543 /* Actually, it still should work with iommu. */
1544 if (card_idx < MAX_UNITS &&
1545 ((hw_checksums[card_idx] == -1 && (vp->drv_flags & HAS_HWCKSM)) ||
1546 hw_checksums[card_idx] == 1)) {
1547 dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG;
1550 dev->hard_start_xmit = vortex_start_xmit;
1554 printk(KERN_INFO "%s: scatter/gather %sabled. h/w checksums %sabled\n",
1556 (dev->features & NETIF_F_SG) ? "en":"dis",
1557 (dev->features & NETIF_F_IP_CSUM) ? "en":"dis");
1560 dev->stop = vortex_close;
1561 dev->get_stats = vortex_get_stats;
1563 dev->do_ioctl = vortex_ioctl;
1565 dev->ethtool_ops = &vortex_ethtool_ops;
1566 dev->set_multicast_list = set_rx_mode;
1567 dev->tx_timeout = vortex_tx_timeout;
1568 dev->watchdog_timeo = (watchdog * HZ) / 1000;
1569 #ifdef CONFIG_NET_POLL_CONTROLLER
1570 dev->poll_controller = poll_vortex;
1573 vp->pm_state_valid = 1;
1574 pci_save_state(VORTEX_PCI(vp));
1577 retval = register_netdev(dev);
1582 pci_free_consistent(pdev,
1583 sizeof(struct boom_rx_desc) * RX_RING_SIZE
1584 + sizeof(struct boom_tx_desc) * TX_RING_SIZE,
1588 if (vp->must_free_region)
1589 release_region(dev->base_addr, vci->io_size);
1591 printk(KERN_ERR PFX "vortex_probe1 fails. Returns %d\n", retval);
1597 issue_and_wait(struct net_device *dev, int cmd)
1599 struct vortex_private *vp = netdev_priv(dev);
1600 void __iomem *ioaddr = vp->ioaddr;
1603 iowrite16(cmd, ioaddr + EL3_CMD);
1604 for (i = 0; i < 2000; i++) {
1605 if (!(ioread16(ioaddr + EL3_STATUS) & CmdInProgress))
1609 /* OK, that didn't work. Do it the slow way. One second */
1610 for (i = 0; i < 100000; i++) {
1611 if (!(ioread16(ioaddr + EL3_STATUS) & CmdInProgress)) {
1612 if (vortex_debug > 1)
1613 printk(KERN_INFO "%s: command 0x%04x took %d usecs\n",
1614 dev->name, cmd, i * 10);
1619 printk(KERN_ERR "%s: command 0x%04x did not complete! Status=0x%x\n",
1620 dev->name, cmd, ioread16(ioaddr + EL3_STATUS));
1624 vortex_up(struct net_device *dev)
1626 struct vortex_private *vp = netdev_priv(dev);
1627 void __iomem *ioaddr = vp->ioaddr;
1628 unsigned int config;
1631 if (VORTEX_PCI(vp)) {
1632 pci_set_power_state(VORTEX_PCI(vp), PCI_D0); /* Go active */
1633 if (vp->pm_state_valid)
1634 pci_restore_state(VORTEX_PCI(vp));
1635 pci_enable_device(VORTEX_PCI(vp));
1638 /* Before initializing select the active media port. */
1640 config = ioread32(ioaddr + Wn3_Config);
1642 if (vp->media_override != 7) {
1643 printk(KERN_INFO "%s: Media override to transceiver %d (%s).\n",
1644 dev->name, vp->media_override,
1645 media_tbl[vp->media_override].name);
1646 dev->if_port = vp->media_override;
1647 } else if (vp->autoselect) {
1649 if (vortex_debug > 1)
1650 printk(KERN_INFO "%s: using NWAY device table, not %d\n",
1651 dev->name, dev->if_port);
1652 dev->if_port = XCVR_NWAY;
1654 /* Find first available media type, starting with 100baseTx. */
1655 dev->if_port = XCVR_100baseTx;
1656 while (! (vp->available_media & media_tbl[dev->if_port].mask))
1657 dev->if_port = media_tbl[dev->if_port].next;
1658 if (vortex_debug > 1)
1659 printk(KERN_INFO "%s: first available media type: %s\n",
1660 dev->name, media_tbl[dev->if_port].name);
1663 dev->if_port = vp->default_media;
1664 if (vortex_debug > 1)
1665 printk(KERN_INFO "%s: using default media %s\n",
1666 dev->name, media_tbl[dev->if_port].name);
1669 init_timer(&vp->timer);
1670 vp->timer.expires = RUN_AT(media_tbl[dev->if_port].wait);
1671 vp->timer.data = (unsigned long)dev;
1672 vp->timer.function = vortex_timer; /* timer handler */
1673 add_timer(&vp->timer);
1675 init_timer(&vp->rx_oom_timer);
1676 vp->rx_oom_timer.data = (unsigned long)dev;
1677 vp->rx_oom_timer.function = rx_oom_timer;
1679 if (vortex_debug > 1)
1680 printk(KERN_DEBUG "%s: Initial media type %s.\n",
1681 dev->name, media_tbl[dev->if_port].name);
1683 vp->full_duplex = vp->force_fd;
1684 config = BFINS(config, dev->if_port, 20, 4);
1685 if (vortex_debug > 6)
1686 printk(KERN_DEBUG "vortex_up(): writing 0x%x to InternalConfig\n", config);
1687 iowrite32(config, ioaddr + Wn3_Config);
1689 if (dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) {
1690 int mii_reg1, mii_reg5;
1692 /* Read BMSR (reg1) only to clear old status. */
1693 mii_reg1 = mdio_read(dev, vp->phys[0], MII_BMSR);
1694 mii_reg5 = mdio_read(dev, vp->phys[0], MII_LPA);
1695 if (mii_reg5 == 0xffff || mii_reg5 == 0x0000) {
1696 netif_carrier_off(dev); /* No MII device or no link partner report */
1698 mii_reg5 &= vp->advertising;
1699 if ((mii_reg5 & 0x0100) != 0 /* 100baseTx-FD */
1700 || (mii_reg5 & 0x00C0) == 0x0040) /* 10T-FD, but not 100-HD */
1701 vp->full_duplex = 1;
1702 netif_carrier_on(dev);
1704 vp->partner_flow_ctrl = ((mii_reg5 & 0x0400) != 0);
1705 if (vortex_debug > 1)
1706 printk(KERN_INFO "%s: MII #%d status %4.4x, link partner capability %4.4x,"
1707 " info1 %04x, setting %s-duplex.\n",
1708 dev->name, vp->phys[0],
1710 vp->info1, ((vp->info1 & 0x8000) || vp->full_duplex) ? "full" : "half");
1714 /* Set the full-duplex bit. */
1715 iowrite16( ((vp->info1 & 0x8000) || vp->full_duplex ? 0x20 : 0) |
1716 (vp->large_frames ? 0x40 : 0) |
1717 ((vp->full_duplex && vp->flow_ctrl && vp->partner_flow_ctrl) ? 0x100 : 0),
1718 ioaddr + Wn3_MAC_Ctrl);
1720 if (vortex_debug > 1) {
1721 printk(KERN_DEBUG "%s: vortex_up() InternalConfig %8.8x.\n",
1725 issue_and_wait(dev, TxReset);
1727 * Don't reset the PHY - that upsets autonegotiation during DHCP operations.
1729 issue_and_wait(dev, RxReset|0x04);
1731 iowrite16(SetStatusEnb | 0x00, ioaddr + EL3_CMD);
1733 if (vortex_debug > 1) {
1735 printk(KERN_DEBUG "%s: vortex_up() irq %d media status %4.4x.\n",
1736 dev->name, dev->irq, ioread16(ioaddr + Wn4_Media));
1739 /* Set the station address and mask in window 2 each time opened. */
1741 for (i = 0; i < 6; i++)
1742 iowrite8(dev->dev_addr[i], ioaddr + i);
1743 for (; i < 12; i+=2)
1744 iowrite16(0, ioaddr + i);
1746 if (vp->cb_fn_base) {
1747 unsigned short n = ioread16(ioaddr + Wn2_ResetOptions) & ~0x4010;
1748 if (vp->drv_flags & INVERT_LED_PWR)
1750 if (vp->drv_flags & INVERT_MII_PWR)
1752 iowrite16(n, ioaddr + Wn2_ResetOptions);
1755 if (dev->if_port == XCVR_10base2)
1756 /* Start the thinnet transceiver. We should really wait 50ms...*/
1757 iowrite16(StartCoax, ioaddr + EL3_CMD);
1758 if (dev->if_port != XCVR_NWAY) {
1760 iowrite16((ioread16(ioaddr + Wn4_Media) & ~(Media_10TP|Media_SQE)) |
1761 media_tbl[dev->if_port].media_bits, ioaddr + Wn4_Media);
1764 /* Switch to the stats window, and clear all stats by reading. */
1765 iowrite16(StatsDisable, ioaddr + EL3_CMD);
1767 for (i = 0; i < 10; i++)
1768 ioread8(ioaddr + i);
1769 ioread16(ioaddr + 10);
1770 ioread16(ioaddr + 12);
1771 /* New: On the Vortex we must also clear the BadSSD counter. */
1773 ioread8(ioaddr + 12);
1774 /* ..and on the Boomerang we enable the extra statistics bits. */
1775 iowrite16(0x0040, ioaddr + Wn4_NetDiag);
1777 /* Switch to register set 7 for normal use. */
1780 if (vp->full_bus_master_rx) { /* Boomerang bus master. */
1781 vp->cur_rx = vp->dirty_rx = 0;
1782 /* Initialize the RxEarly register as recommended. */
1783 iowrite16(SetRxThreshold + (1536>>2), ioaddr + EL3_CMD);
1784 iowrite32(0x0020, ioaddr + PktStatus);
1785 iowrite32(vp->rx_ring_dma, ioaddr + UpListPtr);
1787 if (vp->full_bus_master_tx) { /* Boomerang bus master Tx. */
1788 vp->cur_tx = vp->dirty_tx = 0;
1789 if (vp->drv_flags & IS_BOOMERANG)
1790 iowrite8(PKT_BUF_SZ>>8, ioaddr + TxFreeThreshold); /* Room for a packet. */
1791 /* Clear the Rx, Tx rings. */
1792 for (i = 0; i < RX_RING_SIZE; i++) /* AKPM: this is done in vortex_open, too */
1793 vp->rx_ring[i].status = 0;
1794 for (i = 0; i < TX_RING_SIZE; i++)
1795 vp->tx_skbuff[i] = NULL;
1796 iowrite32(0, ioaddr + DownListPtr);
1798 /* Set receiver mode: presumably accept b-case and phys addr only. */
1800 /* enable 802.1q tagged frames */
1801 set_8021q_mode(dev, 1);
1802 iowrite16(StatsEnable, ioaddr + EL3_CMD); /* Turn on statistics. */
1804 // issue_and_wait(dev, SetTxStart|0x07ff);
1805 iowrite16(RxEnable, ioaddr + EL3_CMD); /* Enable the receiver. */
1806 iowrite16(TxEnable, ioaddr + EL3_CMD); /* Enable transmitter. */
1807 /* Allow status bits to be seen. */
1808 vp->status_enable = SetStatusEnb | HostError|IntReq|StatsFull|TxComplete|
1809 (vp->full_bus_master_tx ? DownComplete : TxAvailable) |
1810 (vp->full_bus_master_rx ? UpComplete : RxComplete) |
1811 (vp->bus_master ? DMADone : 0);
1812 vp->intr_enable = SetIntrEnb | IntLatch | TxAvailable |
1813 (vp->full_bus_master_rx ? 0 : RxComplete) |
1814 StatsFull | HostError | TxComplete | IntReq
1815 | (vp->bus_master ? DMADone : 0) | UpComplete | DownComplete;
1816 iowrite16(vp->status_enable, ioaddr + EL3_CMD);
1817 /* Ack all pending events, and set active indicator mask. */
1818 iowrite16(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
1820 iowrite16(vp->intr_enable, ioaddr + EL3_CMD);
1821 if (vp->cb_fn_base) /* The PCMCIA people are idiots. */
1822 iowrite32(0x8000, vp->cb_fn_base + 4);
1823 netif_start_queue (dev);
1827 vortex_open(struct net_device *dev)
1829 struct vortex_private *vp = netdev_priv(dev);
1833 /* Use the now-standard shared IRQ implementation. */
1834 if ((retval = request_irq(dev->irq, vp->full_bus_master_rx ?
1835 &boomerang_interrupt : &vortex_interrupt, SA_SHIRQ, dev->name, dev))) {
1836 printk(KERN_ERR "%s: Could not reserve IRQ %d\n", dev->name, dev->irq);
1840 if (vp->full_bus_master_rx) { /* Boomerang bus master. */
1841 if (vortex_debug > 2)
1842 printk(KERN_DEBUG "%s: Filling in the Rx ring.\n", dev->name);
1843 for (i = 0; i < RX_RING_SIZE; i++) {
1844 struct sk_buff *skb;
1845 vp->rx_ring[i].next = cpu_to_le32(vp->rx_ring_dma + sizeof(struct boom_rx_desc) * (i+1));
1846 vp->rx_ring[i].status = 0; /* Clear complete bit. */
1847 vp->rx_ring[i].length = cpu_to_le32(PKT_BUF_SZ | LAST_FRAG);
1848 skb = dev_alloc_skb(PKT_BUF_SZ);
1849 vp->rx_skbuff[i] = skb;
1851 break; /* Bad news! */
1852 skb->dev = dev; /* Mark as being used by this device. */
1853 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1854 vp->rx_ring[i].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data, PKT_BUF_SZ, PCI_DMA_FROMDEVICE));
1856 if (i != RX_RING_SIZE) {
1858 printk(KERN_EMERG "%s: no memory for rx ring\n", dev->name);
1859 for (j = 0; j < i; j++) {
1860 if (vp->rx_skbuff[j]) {
1861 dev_kfree_skb(vp->rx_skbuff[j]);
1862 vp->rx_skbuff[j] = NULL;
1868 /* Wrap the ring. */
1869 vp->rx_ring[i-1].next = cpu_to_le32(vp->rx_ring_dma);
1876 free_irq(dev->irq, dev);
1878 if (vortex_debug > 1)
1879 printk(KERN_ERR "%s: vortex_open() fails: returning %d\n", dev->name, retval);
1884 vortex_timer(unsigned long data)
1886 struct net_device *dev = (struct net_device *)data;
1887 struct vortex_private *vp = netdev_priv(dev);
1888 void __iomem *ioaddr = vp->ioaddr;
1889 int next_tick = 60*HZ;
1891 int media_status, mii_status, old_window;
1893 if (vortex_debug > 2) {
1894 printk(KERN_DEBUG "%s: Media selection timer tick happened, %s.\n",
1895 dev->name, media_tbl[dev->if_port].name);
1896 printk(KERN_DEBUG "dev->watchdog_timeo=%d\n", dev->watchdog_timeo);
1900 goto leave_media_alone;
1901 disable_irq(dev->irq);
1902 old_window = ioread16(ioaddr + EL3_CMD) >> 13;
1904 media_status = ioread16(ioaddr + Wn4_Media);
1905 switch (dev->if_port) {
1906 case XCVR_10baseT: case XCVR_100baseTx: case XCVR_100baseFx:
1907 if (media_status & Media_LnkBeat) {
1908 netif_carrier_on(dev);
1910 if (vortex_debug > 1)
1911 printk(KERN_DEBUG "%s: Media %s has link beat, %x.\n",
1912 dev->name, media_tbl[dev->if_port].name, media_status);
1914 netif_carrier_off(dev);
1915 if (vortex_debug > 1) {
1916 printk(KERN_DEBUG "%s: Media %s has no link beat, %x.\n",
1917 dev->name, media_tbl[dev->if_port].name, media_status);
1921 case XCVR_MII: case XCVR_NWAY:
1923 spin_lock_bh(&vp->lock);
1924 mii_status = mdio_read(dev, vp->phys[0], MII_BMSR);
1925 if (!(mii_status & BMSR_LSTATUS)) {
1926 /* Re-read to get actual link status */
1927 mii_status = mdio_read(dev, vp->phys[0], MII_BMSR);
1930 if (vortex_debug > 2)
1931 printk(KERN_DEBUG "%s: MII transceiver has status %4.4x.\n",
1932 dev->name, mii_status);
1933 if (mii_status & BMSR_LSTATUS) {
1934 int mii_reg5 = mdio_read(dev, vp->phys[0], MII_LPA);
1935 if (! vp->force_fd && mii_reg5 != 0xffff) {
1938 mii_reg5 &= vp->advertising;
1939 duplex = (mii_reg5&0x0100) || (mii_reg5 & 0x01C0) == 0x0040;
1940 if (vp->full_duplex != duplex) {
1941 vp->full_duplex = duplex;
1942 printk(KERN_INFO "%s: Setting %s-duplex based on MII "
1943 "#%d link partner capability of %4.4x.\n",
1944 dev->name, vp->full_duplex ? "full" : "half",
1945 vp->phys[0], mii_reg5);
1946 /* Set the full-duplex bit. */
1948 iowrite16( (vp->full_duplex ? 0x20 : 0) |
1949 (vp->large_frames ? 0x40 : 0) |
1950 ((vp->full_duplex && vp->flow_ctrl && vp->partner_flow_ctrl) ? 0x100 : 0),
1951 ioaddr + Wn3_MAC_Ctrl);
1952 if (vortex_debug > 1)
1953 printk(KERN_DEBUG "Setting duplex in Wn3_MAC_Ctrl\n");
1954 /* AKPM: bug: should reset Tx and Rx after setting Duplex. Page 180 */
1957 netif_carrier_on(dev);
1959 netif_carrier_off(dev);
1961 spin_unlock_bh(&vp->lock);
1964 default: /* Other media types handled by Tx timeouts. */
1965 if (vortex_debug > 1)
1966 printk(KERN_DEBUG "%s: Media %s has no indication, %x.\n",
1967 dev->name, media_tbl[dev->if_port].name, media_status);
1971 unsigned int config;
1974 dev->if_port = media_tbl[dev->if_port].next;
1975 } while ( ! (vp->available_media & media_tbl[dev->if_port].mask));
1976 if (dev->if_port == XCVR_Default) { /* Go back to default. */
1977 dev->if_port = vp->default_media;
1978 if (vortex_debug > 1)
1979 printk(KERN_DEBUG "%s: Media selection failing, using default "
1981 dev->name, media_tbl[dev->if_port].name);
1983 if (vortex_debug > 1)
1984 printk(KERN_DEBUG "%s: Media selection failed, now trying "
1986 dev->name, media_tbl[dev->if_port].name);
1987 next_tick = media_tbl[dev->if_port].wait;
1989 iowrite16((media_status & ~(Media_10TP|Media_SQE)) |
1990 media_tbl[dev->if_port].media_bits, ioaddr + Wn4_Media);
1993 config = ioread32(ioaddr + Wn3_Config);
1994 config = BFINS(config, dev->if_port, 20, 4);
1995 iowrite32(config, ioaddr + Wn3_Config);
1997 iowrite16(dev->if_port == XCVR_10base2 ? StartCoax : StopCoax,
1999 if (vortex_debug > 1)
2000 printk(KERN_DEBUG "wrote 0x%08x to Wn3_Config\n", config);
2001 /* AKPM: FIXME: Should reset Rx & Tx here. P60 of 3c90xc.pdf */
2003 EL3WINDOW(old_window);
2004 enable_irq(dev->irq);
2007 if (vortex_debug > 2)
2008 printk(KERN_DEBUG "%s: Media selection timer finished, %s.\n",
2009 dev->name, media_tbl[dev->if_port].name);
2011 mod_timer(&vp->timer, RUN_AT(next_tick));
2013 iowrite16(FakeIntr, ioaddr + EL3_CMD);
2017 static void vortex_tx_timeout(struct net_device *dev)
2019 struct vortex_private *vp = netdev_priv(dev);
2020 void __iomem *ioaddr = vp->ioaddr;
2022 printk(KERN_ERR "%s: transmit timed out, tx_status %2.2x status %4.4x.\n",
2023 dev->name, ioread8(ioaddr + TxStatus),
2024 ioread16(ioaddr + EL3_STATUS));
2026 printk(KERN_ERR " diagnostics: net %04x media %04x dma %08x fifo %04x\n",
2027 ioread16(ioaddr + Wn4_NetDiag),
2028 ioread16(ioaddr + Wn4_Media),
2029 ioread32(ioaddr + PktStatus),
2030 ioread16(ioaddr + Wn4_FIFODiag));
2031 /* Slight code bloat to be user friendly. */
2032 if ((ioread8(ioaddr + TxStatus) & 0x88) == 0x88)
2033 printk(KERN_ERR "%s: Transmitter encountered 16 collisions --"
2034 " network cable problem?\n", dev->name);
2035 if (ioread16(ioaddr + EL3_STATUS) & IntLatch) {
2036 printk(KERN_ERR "%s: Interrupt posted but not delivered --"
2037 " IRQ blocked by another device?\n", dev->name);
2038 /* Bad idea here.. but we might as well handle a few events. */
2041 * Block interrupts because vortex_interrupt does a bare spin_lock()
2043 unsigned long flags;
2044 local_irq_save(flags);
2045 if (vp->full_bus_master_tx)
2046 boomerang_interrupt(dev->irq, dev, NULL);
2048 vortex_interrupt(dev->irq, dev, NULL);
2049 local_irq_restore(flags);
2053 if (vortex_debug > 0)
2056 issue_and_wait(dev, TxReset);
2058 vp->stats.tx_errors++;
2059 if (vp->full_bus_master_tx) {
2060 printk(KERN_DEBUG "%s: Resetting the Tx ring pointer.\n", dev->name);
2061 if (vp->cur_tx - vp->dirty_tx > 0 && ioread32(ioaddr + DownListPtr) == 0)
2062 iowrite32(vp->tx_ring_dma + (vp->dirty_tx % TX_RING_SIZE) * sizeof(struct boom_tx_desc),
2063 ioaddr + DownListPtr);
2064 if (vp->cur_tx - vp->dirty_tx < TX_RING_SIZE)
2065 netif_wake_queue (dev);
2066 if (vp->drv_flags & IS_BOOMERANG)
2067 iowrite8(PKT_BUF_SZ>>8, ioaddr + TxFreeThreshold);
2068 iowrite16(DownUnstall, ioaddr + EL3_CMD);
2070 vp->stats.tx_dropped++;
2071 netif_wake_queue(dev);
2074 /* Issue Tx Enable */
2075 iowrite16(TxEnable, ioaddr + EL3_CMD);
2076 dev->trans_start = jiffies;
2078 /* Switch to register set 7 for normal use. */
2083 * Handle uncommon interrupt sources. This is a separate routine to minimize
2087 vortex_error(struct net_device *dev, int status)
2089 struct vortex_private *vp = netdev_priv(dev);
2090 void __iomem *ioaddr = vp->ioaddr;
2091 int do_tx_reset = 0, reset_mask = 0;
2092 unsigned char tx_status = 0;
2094 if (vortex_debug > 2) {
2095 printk(KERN_ERR "%s: vortex_error(), status=0x%x\n", dev->name, status);
2098 if (status & TxComplete) { /* Really "TxError" for us. */
2099 tx_status = ioread8(ioaddr + TxStatus);
2100 /* Presumably a tx-timeout. We must merely re-enable. */
2101 if (vortex_debug > 2
2102 || (tx_status != 0x88 && vortex_debug > 0)) {
2103 printk(KERN_ERR "%s: Transmit error, Tx status register %2.2x.\n",
2104 dev->name, tx_status);
2105 if (tx_status == 0x82) {
2106 printk(KERN_ERR "Probably a duplex mismatch. See "
2107 "Documentation/networking/vortex.txt\n");
2111 if (tx_status & 0x14) vp->stats.tx_fifo_errors++;
2112 if (tx_status & 0x38) vp->stats.tx_aborted_errors++;
2113 iowrite8(0, ioaddr + TxStatus);
2114 if (tx_status & 0x30) { /* txJabber or txUnderrun */
2116 } else if (tx_status & 0x08) { /* maxCollisions */
2117 vp->xstats.tx_max_collisions++;
2118 if (vp->drv_flags & MAX_COLLISION_RESET) {
2120 reset_mask = 0x0108; /* Reset interface logic, but not download logic */
2122 } else { /* Merely re-enable the transmitter. */
2123 iowrite16(TxEnable, ioaddr + EL3_CMD);
2127 if (status & RxEarly) { /* Rx early is unused. */
2129 iowrite16(AckIntr | RxEarly, ioaddr + EL3_CMD);
2131 if (status & StatsFull) { /* Empty statistics. */
2132 static int DoneDidThat;
2133 if (vortex_debug > 4)
2134 printk(KERN_DEBUG "%s: Updating stats.\n", dev->name);
2135 update_stats(ioaddr, dev);
2136 /* HACK: Disable statistics as an interrupt source. */
2137 /* This occurs when we have the wrong media type! */
2138 if (DoneDidThat == 0 &&
2139 ioread16(ioaddr + EL3_STATUS) & StatsFull) {
2140 printk(KERN_WARNING "%s: Updating statistics failed, disabling "
2141 "stats as an interrupt source.\n", dev->name);
2143 iowrite16(SetIntrEnb | (ioread16(ioaddr + 10) & ~StatsFull), ioaddr + EL3_CMD);
2144 vp->intr_enable &= ~StatsFull;
2149 if (status & IntReq) { /* Restore all interrupt sources. */
2150 iowrite16(vp->status_enable, ioaddr + EL3_CMD);
2151 iowrite16(vp->intr_enable, ioaddr + EL3_CMD);
2153 if (status & HostError) {
2156 fifo_diag = ioread16(ioaddr + Wn4_FIFODiag);
2157 printk(KERN_ERR "%s: Host error, FIFO diagnostic register %4.4x.\n",
2158 dev->name, fifo_diag);
2159 /* Adapter failure requires Tx/Rx reset and reinit. */
2160 if (vp->full_bus_master_tx) {
2161 int bus_status = ioread32(ioaddr + PktStatus);
2162 /* 0x80000000 PCI master abort. */
2163 /* 0x40000000 PCI target abort. */
2165 printk(KERN_ERR "%s: PCI bus error, bus status %8.8x\n", dev->name, bus_status);
2167 /* In this case, blow the card away */
2168 /* Must not enter D3 or we can't legally issue the reset! */
2169 vortex_down(dev, 0);
2170 issue_and_wait(dev, TotalReset | 0xff);
2171 vortex_up(dev); /* AKPM: bug. vortex_up() assumes that the rx ring is full. It may not be. */
2172 } else if (fifo_diag & 0x0400)
2174 if (fifo_diag & 0x3000) {
2175 /* Reset Rx fifo and upload logic */
2176 issue_and_wait(dev, RxReset|0x07);
2177 /* Set the Rx filter to the current state. */
2179 /* enable 802.1q VLAN tagged frames */
2180 set_8021q_mode(dev, 1);
2181 iowrite16(RxEnable, ioaddr + EL3_CMD); /* Re-enable the receiver. */
2182 iowrite16(AckIntr | HostError, ioaddr + EL3_CMD);
2187 issue_and_wait(dev, TxReset|reset_mask);
2188 iowrite16(TxEnable, ioaddr + EL3_CMD);
2189 if (!vp->full_bus_master_tx)
2190 netif_wake_queue(dev);
2195 vortex_start_xmit(struct sk_buff *skb, struct net_device *dev)
2197 struct vortex_private *vp = netdev_priv(dev);
2198 void __iomem *ioaddr = vp->ioaddr;
2200 /* Put out the doubleword header... */
2201 iowrite32(skb->len, ioaddr + TX_FIFO);
2202 if (vp->bus_master) {
2203 /* Set the bus-master controller to transfer the packet. */
2204 int len = (skb->len + 3) & ~3;
2205 iowrite32( vp->tx_skb_dma = pci_map_single(VORTEX_PCI(vp), skb->data, len, PCI_DMA_TODEVICE),
2206 ioaddr + Wn7_MasterAddr);
2207 iowrite16(len, ioaddr + Wn7_MasterLen);
2209 iowrite16(StartDMADown, ioaddr + EL3_CMD);
2210 /* netif_wake_queue() will be called at the DMADone interrupt. */
2212 /* ... and the packet rounded to a doubleword. */
2213 iowrite32_rep(ioaddr + TX_FIFO, skb->data, (skb->len + 3) >> 2);
2214 dev_kfree_skb (skb);
2215 if (ioread16(ioaddr + TxFree) > 1536) {
2216 netif_start_queue (dev); /* AKPM: redundant? */
2218 /* Interrupt us when the FIFO has room for max-sized packet. */
2219 netif_stop_queue(dev);
2220 iowrite16(SetTxThreshold + (1536>>2), ioaddr + EL3_CMD);
2224 dev->trans_start = jiffies;
2226 /* Clear the Tx status stack. */
2231 while (--i > 0 && (tx_status = ioread8(ioaddr + TxStatus)) > 0) {
2232 if (tx_status & 0x3C) { /* A Tx-disabling error occurred. */
2233 if (vortex_debug > 2)
2234 printk(KERN_DEBUG "%s: Tx error, status %2.2x.\n",
2235 dev->name, tx_status);
2236 if (tx_status & 0x04) vp->stats.tx_fifo_errors++;
2237 if (tx_status & 0x38) vp->stats.tx_aborted_errors++;
2238 if (tx_status & 0x30) {
2239 issue_and_wait(dev, TxReset);
2241 iowrite16(TxEnable, ioaddr + EL3_CMD);
2243 iowrite8(0x00, ioaddr + TxStatus); /* Pop the status stack. */
2250 boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev)
2252 struct vortex_private *vp = netdev_priv(dev);
2253 void __iomem *ioaddr = vp->ioaddr;
2254 /* Calculate the next Tx descriptor entry. */
2255 int entry = vp->cur_tx % TX_RING_SIZE;
2256 struct boom_tx_desc *prev_entry = &vp->tx_ring[(vp->cur_tx-1) % TX_RING_SIZE];
2257 unsigned long flags;
2259 if (vortex_debug > 6) {
2260 printk(KERN_DEBUG "boomerang_start_xmit()\n");
2261 printk(KERN_DEBUG "%s: Trying to send a packet, Tx index %d.\n",
2262 dev->name, vp->cur_tx);
2265 if (vp->cur_tx - vp->dirty_tx >= TX_RING_SIZE) {
2266 if (vortex_debug > 0)
2267 printk(KERN_WARNING "%s: BUG! Tx Ring full, refusing to send buffer.\n",
2269 netif_stop_queue(dev);
2273 vp->tx_skbuff[entry] = skb;
2275 vp->tx_ring[entry].next = 0;
2277 if (skb->ip_summed != CHECKSUM_HW)
2278 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded);
2280 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded | AddTCPChksum | AddUDPChksum);
2282 if (!skb_shinfo(skb)->nr_frags) {
2283 vp->tx_ring[entry].frag[0].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data,
2284 skb->len, PCI_DMA_TODEVICE));
2285 vp->tx_ring[entry].frag[0].length = cpu_to_le32(skb->len | LAST_FRAG);
2289 vp->tx_ring[entry].frag[0].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data,
2290 skb->len-skb->data_len, PCI_DMA_TODEVICE));
2291 vp->tx_ring[entry].frag[0].length = cpu_to_le32(skb->len-skb->data_len);
2293 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2294 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2296 vp->tx_ring[entry].frag[i+1].addr =
2297 cpu_to_le32(pci_map_single(VORTEX_PCI(vp),
2298 (void*)page_address(frag->page) + frag->page_offset,
2299 frag->size, PCI_DMA_TODEVICE));
2301 if (i == skb_shinfo(skb)->nr_frags-1)
2302 vp->tx_ring[entry].frag[i+1].length = cpu_to_le32(frag->size|LAST_FRAG);
2304 vp->tx_ring[entry].frag[i+1].length = cpu_to_le32(frag->size);
2308 vp->tx_ring[entry].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data, skb->len, PCI_DMA_TODEVICE));
2309 vp->tx_ring[entry].length = cpu_to_le32(skb->len | LAST_FRAG);
2310 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded);
2313 spin_lock_irqsave(&vp->lock, flags);
2314 /* Wait for the stall to complete. */
2315 issue_and_wait(dev, DownStall);
2316 prev_entry->next = cpu_to_le32(vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc));
2317 if (ioread32(ioaddr + DownListPtr) == 0) {
2318 iowrite32(vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc), ioaddr + DownListPtr);
2319 vp->queued_packet++;
2323 if (vp->cur_tx - vp->dirty_tx > TX_RING_SIZE - 1) {
2324 netif_stop_queue (dev);
2325 } else { /* Clear previous interrupt enable. */
2326 #if defined(tx_interrupt_mitigation)
2327 /* Dubious. If in boomeang_interrupt "faster" cyclone ifdef
2328 * were selected, this would corrupt DN_COMPLETE. No?
2330 prev_entry->status &= cpu_to_le32(~TxIntrUploaded);
2333 iowrite16(DownUnstall, ioaddr + EL3_CMD);
2334 spin_unlock_irqrestore(&vp->lock, flags);
2335 dev->trans_start = jiffies;
2339 /* The interrupt handler does all of the Rx thread work and cleans up
2340 after the Tx thread. */
2343 * This is the ISR for the vortex series chips.
2344 * full_bus_master_tx == 0 && full_bus_master_rx == 0
2348 vortex_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2350 struct net_device *dev = dev_id;
2351 struct vortex_private *vp = netdev_priv(dev);
2352 void __iomem *ioaddr;
2354 int work_done = max_interrupt_work;
2357 ioaddr = vp->ioaddr;
2358 spin_lock(&vp->lock);
2360 status = ioread16(ioaddr + EL3_STATUS);
2362 if (vortex_debug > 6)
2363 printk("vortex_interrupt(). status=0x%4x\n", status);
2365 if ((status & IntLatch) == 0)
2366 goto handler_exit; /* No interrupt: shared IRQs cause this */
2369 if (status & IntReq) {
2370 status |= vp->deferred;
2374 if (status == 0xffff) /* h/w no longer present (hotplug)? */
2377 if (vortex_debug > 4)
2378 printk(KERN_DEBUG "%s: interrupt, status %4.4x, latency %d ticks.\n",
2379 dev->name, status, ioread8(ioaddr + Timer));
2382 if (vortex_debug > 5)
2383 printk(KERN_DEBUG "%s: In interrupt loop, status %4.4x.\n",
2385 if (status & RxComplete)
2388 if (status & TxAvailable) {
2389 if (vortex_debug > 5)
2390 printk(KERN_DEBUG " TX room bit was handled.\n");
2391 /* There's room in the FIFO for a full-sized packet. */
2392 iowrite16(AckIntr | TxAvailable, ioaddr + EL3_CMD);
2393 netif_wake_queue (dev);
2396 if (status & DMADone) {
2397 if (ioread16(ioaddr + Wn7_MasterStatus) & 0x1000) {
2398 iowrite16(0x1000, ioaddr + Wn7_MasterStatus); /* Ack the event. */
2399 pci_unmap_single(VORTEX_PCI(vp), vp->tx_skb_dma, (vp->tx_skb->len + 3) & ~3, PCI_DMA_TODEVICE);
2400 dev_kfree_skb_irq(vp->tx_skb); /* Release the transferred buffer */
2401 if (ioread16(ioaddr + TxFree) > 1536) {
2403 * AKPM: FIXME: I don't think we need this. If the queue was stopped due to
2404 * insufficient FIFO room, the TxAvailable test will succeed and call
2405 * netif_wake_queue()
2407 netif_wake_queue(dev);
2408 } else { /* Interrupt when FIFO has room for max-sized packet. */
2409 iowrite16(SetTxThreshold + (1536>>2), ioaddr + EL3_CMD);
2410 netif_stop_queue(dev);
2414 /* Check for all uncommon interrupts at once. */
2415 if (status & (HostError | RxEarly | StatsFull | TxComplete | IntReq)) {
2416 if (status == 0xffff)
2418 vortex_error(dev, status);
2421 if (--work_done < 0) {
2422 printk(KERN_WARNING "%s: Too much work in interrupt, status "
2423 "%4.4x.\n", dev->name, status);
2424 /* Disable all pending interrupts. */
2426 vp->deferred |= status;
2427 iowrite16(SetStatusEnb | (~vp->deferred & vp->status_enable),
2429 iowrite16(AckIntr | (vp->deferred & 0x7ff), ioaddr + EL3_CMD);
2430 } while ((status = ioread16(ioaddr + EL3_CMD)) & IntLatch);
2431 /* The timer will reenable interrupts. */
2432 mod_timer(&vp->timer, jiffies + 1*HZ);
2435 /* Acknowledge the IRQ. */
2436 iowrite16(AckIntr | IntReq | IntLatch, ioaddr + EL3_CMD);
2437 } while ((status = ioread16(ioaddr + EL3_STATUS)) & (IntLatch | RxComplete));
2439 if (vortex_debug > 4)
2440 printk(KERN_DEBUG "%s: exiting interrupt, status %4.4x.\n",
2443 spin_unlock(&vp->lock);
2444 return IRQ_RETVAL(handled);
2448 * This is the ISR for the boomerang series chips.
2449 * full_bus_master_tx == 1 && full_bus_master_rx == 1
2453 boomerang_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2455 struct net_device *dev = dev_id;
2456 struct vortex_private *vp = netdev_priv(dev);
2457 void __iomem *ioaddr;
2459 int work_done = max_interrupt_work;
2461 ioaddr = vp->ioaddr;
2464 * It seems dopey to put the spinlock this early, but we could race against vortex_tx_timeout
2465 * and boomerang_start_xmit
2467 spin_lock(&vp->lock);
2469 status = ioread16(ioaddr + EL3_STATUS);
2471 if (vortex_debug > 6)
2472 printk(KERN_DEBUG "boomerang_interrupt. status=0x%4x\n", status);
2474 if ((status & IntLatch) == 0)
2475 goto handler_exit; /* No interrupt: shared IRQs can cause this */
2477 if (status == 0xffff) { /* h/w no longer present (hotplug)? */
2478 if (vortex_debug > 1)
2479 printk(KERN_DEBUG "boomerang_interrupt(1): status = 0xffff\n");
2483 if (status & IntReq) {
2484 status |= vp->deferred;
2488 if (vortex_debug > 4)
2489 printk(KERN_DEBUG "%s: interrupt, status %4.4x, latency %d ticks.\n",
2490 dev->name, status, ioread8(ioaddr + Timer));
2492 if (vortex_debug > 5)
2493 printk(KERN_DEBUG "%s: In interrupt loop, status %4.4x.\n",
2495 if (status & UpComplete) {
2496 iowrite16(AckIntr | UpComplete, ioaddr + EL3_CMD);
2497 if (vortex_debug > 5)
2498 printk(KERN_DEBUG "boomerang_interrupt->boomerang_rx\n");
2502 if (status & DownComplete) {
2503 unsigned int dirty_tx = vp->dirty_tx;
2505 iowrite16(AckIntr | DownComplete, ioaddr + EL3_CMD);
2506 while (vp->cur_tx - dirty_tx > 0) {
2507 int entry = dirty_tx % TX_RING_SIZE;
2508 #if 1 /* AKPM: the latter is faster, but cyclone-only */
2509 if (ioread32(ioaddr + DownListPtr) ==
2510 vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc))
2511 break; /* It still hasn't been processed. */
2513 if ((vp->tx_ring[entry].status & DN_COMPLETE) == 0)
2514 break; /* It still hasn't been processed. */
2517 if (vp->tx_skbuff[entry]) {
2518 struct sk_buff *skb = vp->tx_skbuff[entry];
2521 for (i=0; i<=skb_shinfo(skb)->nr_frags; i++)
2522 pci_unmap_single(VORTEX_PCI(vp),
2523 le32_to_cpu(vp->tx_ring[entry].frag[i].addr),
2524 le32_to_cpu(vp->tx_ring[entry].frag[i].length)&0xFFF,
2527 pci_unmap_single(VORTEX_PCI(vp),
2528 le32_to_cpu(vp->tx_ring[entry].addr), skb->len, PCI_DMA_TODEVICE);
2530 dev_kfree_skb_irq(skb);
2531 vp->tx_skbuff[entry] = NULL;
2533 printk(KERN_DEBUG "boomerang_interrupt: no skb!\n");
2535 /* vp->stats.tx_packets++; Counted below. */
2538 vp->dirty_tx = dirty_tx;
2539 if (vp->cur_tx - dirty_tx <= TX_RING_SIZE - 1) {
2540 if (vortex_debug > 6)
2541 printk(KERN_DEBUG "boomerang_interrupt: wake queue\n");
2542 netif_wake_queue (dev);
2546 /* Check for all uncommon interrupts at once. */
2547 if (status & (HostError | RxEarly | StatsFull | TxComplete | IntReq))
2548 vortex_error(dev, status);
2550 if (--work_done < 0) {
2551 printk(KERN_WARNING "%s: Too much work in interrupt, status "
2552 "%4.4x.\n", dev->name, status);
2553 /* Disable all pending interrupts. */
2555 vp->deferred |= status;
2556 iowrite16(SetStatusEnb | (~vp->deferred & vp->status_enable),
2558 iowrite16(AckIntr | (vp->deferred & 0x7ff), ioaddr + EL3_CMD);
2559 } while ((status = ioread16(ioaddr + EL3_CMD)) & IntLatch);
2560 /* The timer will reenable interrupts. */
2561 mod_timer(&vp->timer, jiffies + 1*HZ);
2564 /* Acknowledge the IRQ. */
2565 iowrite16(AckIntr | IntReq | IntLatch, ioaddr + EL3_CMD);
2566 if (vp->cb_fn_base) /* The PCMCIA people are idiots. */
2567 iowrite32(0x8000, vp->cb_fn_base + 4);
2569 } while ((status = ioread16(ioaddr + EL3_STATUS)) & IntLatch);
2571 if (vortex_debug > 4)
2572 printk(KERN_DEBUG "%s: exiting interrupt, status %4.4x.\n",
2575 spin_unlock(&vp->lock);
2579 static int vortex_rx(struct net_device *dev)
2581 struct vortex_private *vp = netdev_priv(dev);
2582 void __iomem *ioaddr = vp->ioaddr;
2586 if (vortex_debug > 5)
2587 printk(KERN_DEBUG "vortex_rx(): status %4.4x, rx_status %4.4x.\n",
2588 ioread16(ioaddr+EL3_STATUS), ioread16(ioaddr+RxStatus));
2589 while ((rx_status = ioread16(ioaddr + RxStatus)) > 0) {
2590 if (rx_status & 0x4000) { /* Error, update stats. */
2591 unsigned char rx_error = ioread8(ioaddr + RxErrors);
2592 if (vortex_debug > 2)
2593 printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error);
2594 vp->stats.rx_errors++;
2595 if (rx_error & 0x01) vp->stats.rx_over_errors++;
2596 if (rx_error & 0x02) vp->stats.rx_length_errors++;
2597 if (rx_error & 0x04) vp->stats.rx_frame_errors++;
2598 if (rx_error & 0x08) vp->stats.rx_crc_errors++;
2599 if (rx_error & 0x10) vp->stats.rx_length_errors++;
2601 /* The packet length: up to 4.5K!. */
2602 int pkt_len = rx_status & 0x1fff;
2603 struct sk_buff *skb;
2605 skb = dev_alloc_skb(pkt_len + 5);
2606 if (vortex_debug > 4)
2607 printk(KERN_DEBUG "Receiving packet size %d status %4.4x.\n",
2608 pkt_len, rx_status);
2611 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
2612 /* 'skb_put()' points to the start of sk_buff data area. */
2613 if (vp->bus_master &&
2614 ! (ioread16(ioaddr + Wn7_MasterStatus) & 0x8000)) {
2615 dma_addr_t dma = pci_map_single(VORTEX_PCI(vp), skb_put(skb, pkt_len),
2616 pkt_len, PCI_DMA_FROMDEVICE);
2617 iowrite32(dma, ioaddr + Wn7_MasterAddr);
2618 iowrite16((skb->len + 3) & ~3, ioaddr + Wn7_MasterLen);
2619 iowrite16(StartDMAUp, ioaddr + EL3_CMD);
2620 while (ioread16(ioaddr + Wn7_MasterStatus) & 0x8000)
2622 pci_unmap_single(VORTEX_PCI(vp), dma, pkt_len, PCI_DMA_FROMDEVICE);
2624 ioread32_rep(ioaddr + RX_FIFO,
2625 skb_put(skb, pkt_len),
2626 (pkt_len + 3) >> 2);
2628 iowrite16(RxDiscard, ioaddr + EL3_CMD); /* Pop top Rx packet. */
2629 skb->protocol = eth_type_trans(skb, dev);
2631 dev->last_rx = jiffies;
2632 vp->stats.rx_packets++;
2633 /* Wait a limited time to go to next packet. */
2634 for (i = 200; i >= 0; i--)
2635 if ( ! (ioread16(ioaddr + EL3_STATUS) & CmdInProgress))
2638 } else if (vortex_debug > 0)
2639 printk(KERN_NOTICE "%s: No memory to allocate a sk_buff of "
2640 "size %d.\n", dev->name, pkt_len);
2641 vp->stats.rx_dropped++;
2643 issue_and_wait(dev, RxDiscard);
2650 boomerang_rx(struct net_device *dev)
2652 struct vortex_private *vp = netdev_priv(dev);
2653 int entry = vp->cur_rx % RX_RING_SIZE;
2654 void __iomem *ioaddr = vp->ioaddr;
2656 int rx_work_limit = vp->dirty_rx + RX_RING_SIZE - vp->cur_rx;
2658 if (vortex_debug > 5)
2659 printk(KERN_DEBUG "boomerang_rx(): status %4.4x\n", ioread16(ioaddr+EL3_STATUS));
2661 while ((rx_status = le32_to_cpu(vp->rx_ring[entry].status)) & RxDComplete){
2662 if (--rx_work_limit < 0)
2664 if (rx_status & RxDError) { /* Error, update stats. */
2665 unsigned char rx_error = rx_status >> 16;
2666 if (vortex_debug > 2)
2667 printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error);
2668 vp->stats.rx_errors++;
2669 if (rx_error & 0x01) vp->stats.rx_over_errors++;
2670 if (rx_error & 0x02) vp->stats.rx_length_errors++;
2671 if (rx_error & 0x04) vp->stats.rx_frame_errors++;
2672 if (rx_error & 0x08) vp->stats.rx_crc_errors++;
2673 if (rx_error & 0x10) vp->stats.rx_length_errors++;
2675 /* The packet length: up to 4.5K!. */
2676 int pkt_len = rx_status & 0x1fff;
2677 struct sk_buff *skb;
2678 dma_addr_t dma = le32_to_cpu(vp->rx_ring[entry].addr);
2680 if (vortex_debug > 4)
2681 printk(KERN_DEBUG "Receiving packet size %d status %4.4x.\n",
2682 pkt_len, rx_status);
2684 /* Check if the packet is long enough to just accept without
2685 copying to a properly sized skbuff. */
2686 if (pkt_len < rx_copybreak && (skb = dev_alloc_skb(pkt_len + 2)) != 0) {
2688 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
2689 pci_dma_sync_single_for_cpu(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2690 /* 'skb_put()' points to the start of sk_buff data area. */
2691 memcpy(skb_put(skb, pkt_len),
2692 vp->rx_skbuff[entry]->data,
2694 pci_dma_sync_single_for_device(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2697 /* Pass up the skbuff already on the Rx ring. */
2698 skb = vp->rx_skbuff[entry];
2699 vp->rx_skbuff[entry] = NULL;
2700 skb_put(skb, pkt_len);
2701 pci_unmap_single(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2704 skb->protocol = eth_type_trans(skb, dev);
2705 { /* Use hardware checksum info. */
2706 int csum_bits = rx_status & 0xee000000;
2708 (csum_bits == (IPChksumValid | TCPChksumValid) ||
2709 csum_bits == (IPChksumValid | UDPChksumValid))) {
2710 skb->ip_summed = CHECKSUM_UNNECESSARY;
2715 dev->last_rx = jiffies;
2716 vp->stats.rx_packets++;
2718 entry = (++vp->cur_rx) % RX_RING_SIZE;
2720 /* Refill the Rx ring buffers. */
2721 for (; vp->cur_rx - vp->dirty_rx > 0; vp->dirty_rx++) {
2722 struct sk_buff *skb;
2723 entry = vp->dirty_rx % RX_RING_SIZE;
2724 if (vp->rx_skbuff[entry] == NULL) {
2725 skb = dev_alloc_skb(PKT_BUF_SZ);
2727 static unsigned long last_jif;
2728 if (time_after(jiffies, last_jif + 10 * HZ)) {
2729 printk(KERN_WARNING "%s: memory shortage\n", dev->name);
2732 if ((vp->cur_rx - vp->dirty_rx) == RX_RING_SIZE)
2733 mod_timer(&vp->rx_oom_timer, RUN_AT(HZ * 1));
2734 break; /* Bad news! */
2736 skb->dev = dev; /* Mark as being used by this device. */
2737 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
2738 vp->rx_ring[entry].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data, PKT_BUF_SZ, PCI_DMA_FROMDEVICE));
2739 vp->rx_skbuff[entry] = skb;
2741 vp->rx_ring[entry].status = 0; /* Clear complete bit. */
2742 iowrite16(UpUnstall, ioaddr + EL3_CMD);
2748 * If we've hit a total OOM refilling the Rx ring we poll once a second
2749 * for some memory. Otherwise there is no way to restart the rx process.
2752 rx_oom_timer(unsigned long arg)
2754 struct net_device *dev = (struct net_device *)arg;
2755 struct vortex_private *vp = netdev_priv(dev);
2757 spin_lock_irq(&vp->lock);
2758 if ((vp->cur_rx - vp->dirty_rx) == RX_RING_SIZE) /* This test is redundant, but makes me feel good */
2760 if (vortex_debug > 1) {
2761 printk(KERN_DEBUG "%s: rx_oom_timer %s\n", dev->name,
2762 ((vp->cur_rx - vp->dirty_rx) != RX_RING_SIZE) ? "succeeded" : "retrying");
2764 spin_unlock_irq(&vp->lock);
2768 vortex_down(struct net_device *dev, int final_down)
2770 struct vortex_private *vp = netdev_priv(dev);
2771 void __iomem *ioaddr = vp->ioaddr;
2773 netif_stop_queue (dev);
2775 del_timer_sync(&vp->rx_oom_timer);
2776 del_timer_sync(&vp->timer);
2778 /* Turn off statistics ASAP. We update vp->stats below. */
2779 iowrite16(StatsDisable, ioaddr + EL3_CMD);
2781 /* Disable the receiver and transmitter. */
2782 iowrite16(RxDisable, ioaddr + EL3_CMD);
2783 iowrite16(TxDisable, ioaddr + EL3_CMD);
2785 /* Disable receiving 802.1q tagged frames */
2786 set_8021q_mode(dev, 0);
2788 if (dev->if_port == XCVR_10base2)
2789 /* Turn off thinnet power. Green! */
2790 iowrite16(StopCoax, ioaddr + EL3_CMD);
2792 iowrite16(SetIntrEnb | 0x0000, ioaddr + EL3_CMD);
2794 update_stats(ioaddr, dev);
2795 if (vp->full_bus_master_rx)
2796 iowrite32(0, ioaddr + UpListPtr);
2797 if (vp->full_bus_master_tx)
2798 iowrite32(0, ioaddr + DownListPtr);
2800 if (final_down && VORTEX_PCI(vp)) {
2801 vp->pm_state_valid = 1;
2802 pci_save_state(VORTEX_PCI(vp));
2808 vortex_close(struct net_device *dev)
2810 struct vortex_private *vp = netdev_priv(dev);
2811 void __iomem *ioaddr = vp->ioaddr;
2814 if (netif_device_present(dev))
2815 vortex_down(dev, 1);
2817 if (vortex_debug > 1) {
2818 printk(KERN_DEBUG"%s: vortex_close() status %4.4x, Tx status %2.2x.\n",
2819 dev->name, ioread16(ioaddr + EL3_STATUS), ioread8(ioaddr + TxStatus));
2820 printk(KERN_DEBUG "%s: vortex close stats: rx_nocopy %d rx_copy %d"
2821 " tx_queued %d Rx pre-checksummed %d.\n",
2822 dev->name, vp->rx_nocopy, vp->rx_copy, vp->queued_packet, vp->rx_csumhits);
2826 if (vp->rx_csumhits &&
2827 (vp->drv_flags & HAS_HWCKSM) == 0 &&
2828 (vp->card_idx >= MAX_UNITS || hw_checksums[vp->card_idx] == -1)) {
2829 printk(KERN_WARNING "%s supports hardware checksums, and we're "
2830 "not using them!\n", dev->name);
2834 free_irq(dev->irq, dev);
2836 if (vp->full_bus_master_rx) { /* Free Boomerang bus master Rx buffers. */
2837 for (i = 0; i < RX_RING_SIZE; i++)
2838 if (vp->rx_skbuff[i]) {
2839 pci_unmap_single( VORTEX_PCI(vp), le32_to_cpu(vp->rx_ring[i].addr),
2840 PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2841 dev_kfree_skb(vp->rx_skbuff[i]);
2842 vp->rx_skbuff[i] = NULL;
2845 if (vp->full_bus_master_tx) { /* Free Boomerang bus master Tx buffers. */
2846 for (i = 0; i < TX_RING_SIZE; i++) {
2847 if (vp->tx_skbuff[i]) {
2848 struct sk_buff *skb = vp->tx_skbuff[i];
2852 for (k=0; k<=skb_shinfo(skb)->nr_frags; k++)
2853 pci_unmap_single(VORTEX_PCI(vp),
2854 le32_to_cpu(vp->tx_ring[i].frag[k].addr),
2855 le32_to_cpu(vp->tx_ring[i].frag[k].length)&0xFFF,
2858 pci_unmap_single(VORTEX_PCI(vp), le32_to_cpu(vp->tx_ring[i].addr), skb->len, PCI_DMA_TODEVICE);
2861 vp->tx_skbuff[i] = NULL;
2870 dump_tx_ring(struct net_device *dev)
2872 if (vortex_debug > 0) {
2873 struct vortex_private *vp = netdev_priv(dev);
2874 void __iomem *ioaddr = vp->ioaddr;
2876 if (vp->full_bus_master_tx) {
2878 int stalled = ioread32(ioaddr + PktStatus) & 0x04; /* Possible racy. But it's only debug stuff */
2880 printk(KERN_ERR " Flags; bus-master %d, dirty %d(%d) current %d(%d)\n",
2881 vp->full_bus_master_tx,
2882 vp->dirty_tx, vp->dirty_tx % TX_RING_SIZE,
2883 vp->cur_tx, vp->cur_tx % TX_RING_SIZE);
2884 printk(KERN_ERR " Transmit list %8.8x vs. %p.\n",
2885 ioread32(ioaddr + DownListPtr),
2886 &vp->tx_ring[vp->dirty_tx % TX_RING_SIZE]);
2887 issue_and_wait(dev, DownStall);
2888 for (i = 0; i < TX_RING_SIZE; i++) {
2889 printk(KERN_ERR " %d: @%p length %8.8x status %8.8x\n", i,
2892 le32_to_cpu(vp->tx_ring[i].frag[0].length),
2894 le32_to_cpu(vp->tx_ring[i].length),
2896 le32_to_cpu(vp->tx_ring[i].status));
2899 iowrite16(DownUnstall, ioaddr + EL3_CMD);
2904 static struct net_device_stats *vortex_get_stats(struct net_device *dev)
2906 struct vortex_private *vp = netdev_priv(dev);
2907 void __iomem *ioaddr = vp->ioaddr;
2908 unsigned long flags;
2910 if (netif_device_present(dev)) { /* AKPM: Used to be netif_running */
2911 spin_lock_irqsave (&vp->lock, flags);
2912 update_stats(ioaddr, dev);
2913 spin_unlock_irqrestore (&vp->lock, flags);
2918 /* Update statistics.
2919 Unlike with the EL3 we need not worry about interrupts changing
2920 the window setting from underneath us, but we must still guard
2921 against a race condition with a StatsUpdate interrupt updating the
2922 table. This is done by checking that the ASM (!) code generated uses
2923 atomic updates with '+='.
2925 static void update_stats(void __iomem *ioaddr, struct net_device *dev)
2927 struct vortex_private *vp = netdev_priv(dev);
2928 int old_window = ioread16(ioaddr + EL3_CMD);
2930 if (old_window == 0xffff) /* Chip suspended or ejected. */
2932 /* Unlike the 3c5x9 we need not turn off stats updates while reading. */
2933 /* Switch to the stats window, and read everything. */
2935 vp->stats.tx_carrier_errors += ioread8(ioaddr + 0);
2936 vp->stats.tx_heartbeat_errors += ioread8(ioaddr + 1);
2937 vp->stats.tx_window_errors += ioread8(ioaddr + 4);
2938 vp->stats.rx_fifo_errors += ioread8(ioaddr + 5);
2939 vp->stats.tx_packets += ioread8(ioaddr + 6);
2940 vp->stats.tx_packets += (ioread8(ioaddr + 9)&0x30) << 4;
2941 /* Rx packets */ ioread8(ioaddr + 7); /* Must read to clear */
2942 /* Don't bother with register 9, an extension of registers 6&7.
2943 If we do use the 6&7 values the atomic update assumption above
2945 vp->stats.rx_bytes += ioread16(ioaddr + 10);
2946 vp->stats.tx_bytes += ioread16(ioaddr + 12);
2947 /* Extra stats for get_ethtool_stats() */
2948 vp->xstats.tx_multiple_collisions += ioread8(ioaddr + 2);
2949 vp->xstats.tx_single_collisions += ioread8(ioaddr + 3);
2950 vp->xstats.tx_deferred += ioread8(ioaddr + 8);
2952 vp->xstats.rx_bad_ssd += ioread8(ioaddr + 12);
2954 vp->stats.collisions = vp->xstats.tx_multiple_collisions
2955 + vp->xstats.tx_single_collisions
2956 + vp->xstats.tx_max_collisions;
2959 u8 up = ioread8(ioaddr + 13);
2960 vp->stats.rx_bytes += (up & 0x0f) << 16;
2961 vp->stats.tx_bytes += (up & 0xf0) << 12;
2964 EL3WINDOW(old_window >> 13);
2968 static int vortex_nway_reset(struct net_device *dev)
2970 struct vortex_private *vp = netdev_priv(dev);
2971 void __iomem *ioaddr = vp->ioaddr;
2972 unsigned long flags;
2975 spin_lock_irqsave(&vp->lock, flags);
2977 rc = mii_nway_restart(&vp->mii);
2978 spin_unlock_irqrestore(&vp->lock, flags);
2982 static u32 vortex_get_link(struct net_device *dev)
2984 struct vortex_private *vp = netdev_priv(dev);
2985 void __iomem *ioaddr = vp->ioaddr;
2986 unsigned long flags;
2989 spin_lock_irqsave(&vp->lock, flags);
2991 rc = mii_link_ok(&vp->mii);
2992 spin_unlock_irqrestore(&vp->lock, flags);
2996 static int vortex_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2998 struct vortex_private *vp = netdev_priv(dev);
2999 void __iomem *ioaddr = vp->ioaddr;
3000 unsigned long flags;
3003 spin_lock_irqsave(&vp->lock, flags);
3005 rc = mii_ethtool_gset(&vp->mii, cmd);
3006 spin_unlock_irqrestore(&vp->lock, flags);
3010 static int vortex_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3012 struct vortex_private *vp = netdev_priv(dev);
3013 void __iomem *ioaddr = vp->ioaddr;
3014 unsigned long flags;
3017 spin_lock_irqsave(&vp->lock, flags);
3019 rc = mii_ethtool_sset(&vp->mii, cmd);
3020 spin_unlock_irqrestore(&vp->lock, flags);
3024 static u32 vortex_get_msglevel(struct net_device *dev)
3026 return vortex_debug;
3029 static void vortex_set_msglevel(struct net_device *dev, u32 dbg)
3034 static int vortex_get_stats_count(struct net_device *dev)
3036 return VORTEX_NUM_STATS;
3039 static void vortex_get_ethtool_stats(struct net_device *dev,
3040 struct ethtool_stats *stats, u64 *data)
3042 struct vortex_private *vp = netdev_priv(dev);
3043 void __iomem *ioaddr = vp->ioaddr;
3044 unsigned long flags;
3046 spin_lock_irqsave(&vp->lock, flags);
3047 update_stats(ioaddr, dev);
3048 spin_unlock_irqrestore(&vp->lock, flags);
3050 data[0] = vp->xstats.tx_deferred;
3051 data[1] = vp->xstats.tx_max_collisions;
3052 data[2] = vp->xstats.tx_multiple_collisions;
3053 data[3] = vp->xstats.tx_single_collisions;
3054 data[4] = vp->xstats.rx_bad_ssd;
3058 static void vortex_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3060 switch (stringset) {
3062 memcpy(data, ðtool_stats_keys, sizeof(ethtool_stats_keys));
3070 static void vortex_get_drvinfo(struct net_device *dev,
3071 struct ethtool_drvinfo *info)
3073 struct vortex_private *vp = netdev_priv(dev);
3075 strcpy(info->driver, DRV_NAME);
3076 strcpy(info->version, DRV_VERSION);
3077 if (VORTEX_PCI(vp)) {
3078 strcpy(info->bus_info, pci_name(VORTEX_PCI(vp)));
3080 if (VORTEX_EISA(vp))
3081 sprintf(info->bus_info, vp->gendev->bus_id);
3083 sprintf(info->bus_info, "EISA 0x%lx %d",
3084 dev->base_addr, dev->irq);
3088 static struct ethtool_ops vortex_ethtool_ops = {
3089 .get_drvinfo = vortex_get_drvinfo,
3090 .get_strings = vortex_get_strings,
3091 .get_msglevel = vortex_get_msglevel,
3092 .set_msglevel = vortex_set_msglevel,
3093 .get_ethtool_stats = vortex_get_ethtool_stats,
3094 .get_stats_count = vortex_get_stats_count,
3095 .get_settings = vortex_get_settings,
3096 .set_settings = vortex_set_settings,
3097 .get_link = vortex_get_link,
3098 .nway_reset = vortex_nway_reset,
3099 .get_perm_addr = ethtool_op_get_perm_addr,
3104 * Must power the device up to do MDIO operations
3106 static int vortex_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3109 struct vortex_private *vp = netdev_priv(dev);
3110 void __iomem *ioaddr = vp->ioaddr;
3111 unsigned long flags;
3115 state = VORTEX_PCI(vp)->current_state;
3117 /* The kernel core really should have pci_get_power_state() */
3120 pci_set_power_state(VORTEX_PCI(vp), PCI_D0);
3121 spin_lock_irqsave(&vp->lock, flags);
3123 err = generic_mii_ioctl(&vp->mii, if_mii(rq), cmd, NULL);
3124 spin_unlock_irqrestore(&vp->lock, flags);
3126 pci_set_power_state(VORTEX_PCI(vp), state);
3133 /* Pre-Cyclone chips have no documented multicast filter, so the only
3134 multicast setting is to receive all multicast frames. At least
3135 the chip has a very clean way to set the mode, unlike many others. */
3136 static void set_rx_mode(struct net_device *dev)
3138 struct vortex_private *vp = netdev_priv(dev);
3139 void __iomem *ioaddr = vp->ioaddr;
3142 if (dev->flags & IFF_PROMISC) {
3143 if (vortex_debug > 0)
3144 printk(KERN_NOTICE "%s: Setting promiscuous mode.\n", dev->name);
3145 new_mode = SetRxFilter|RxStation|RxMulticast|RxBroadcast|RxProm;
3146 } else if ((dev->mc_list) || (dev->flags & IFF_ALLMULTI)) {
3147 new_mode = SetRxFilter|RxStation|RxMulticast|RxBroadcast;
3149 new_mode = SetRxFilter | RxStation | RxBroadcast;
3151 iowrite16(new_mode, ioaddr + EL3_CMD);
3154 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
3155 /* Setup the card so that it can receive frames with an 802.1q VLAN tag.
3156 Note that this must be done after each RxReset due to some backwards
3157 compatibility logic in the Cyclone and Tornado ASICs */
3159 /* The Ethernet Type used for 802.1q tagged frames */
3160 #define VLAN_ETHER_TYPE 0x8100
3162 static void set_8021q_mode(struct net_device *dev, int enable)
3164 struct vortex_private *vp = netdev_priv(dev);
3165 void __iomem *ioaddr = vp->ioaddr;
3166 int old_window = ioread16(ioaddr + EL3_CMD);
3169 if ((vp->drv_flags&IS_CYCLONE) || (vp->drv_flags&IS_TORNADO)) {
3170 /* cyclone and tornado chipsets can recognize 802.1q
3171 * tagged frames and treat them correctly */
3173 int max_pkt_size = dev->mtu+14; /* MTU+Ethernet header */
3175 max_pkt_size += 4; /* 802.1Q VLAN tag */
3178 iowrite16(max_pkt_size, ioaddr+Wn3_MaxPktSize);
3180 /* set VlanEtherType to let the hardware checksumming
3181 treat tagged frames correctly */
3183 iowrite16(VLAN_ETHER_TYPE, ioaddr+Wn7_VlanEtherType);
3185 /* on older cards we have to enable large frames */
3187 vp->large_frames = dev->mtu > 1500 || enable;
3190 mac_ctrl = ioread16(ioaddr+Wn3_MAC_Ctrl);
3191 if (vp->large_frames)
3195 iowrite16(mac_ctrl, ioaddr+Wn3_MAC_Ctrl);
3198 EL3WINDOW(old_window);
3202 static void set_8021q_mode(struct net_device *dev, int enable)
3209 /* MII transceiver control section.
3210 Read and write the MII registers using software-generated serial
3211 MDIO protocol. See the MII specifications or DP83840A data sheet
3214 /* The maximum data clock rate is 2.5 Mhz. The minimum timing is usually
3215 met by back-to-back PCI I/O cycles, but we insert a delay to avoid
3216 "overclocking" issues. */
3217 #define mdio_delay() ioread32(mdio_addr)
3219 #define MDIO_SHIFT_CLK 0x01
3220 #define MDIO_DIR_WRITE 0x04
3221 #define MDIO_DATA_WRITE0 (0x00 | MDIO_DIR_WRITE)
3222 #define MDIO_DATA_WRITE1 (0x02 | MDIO_DIR_WRITE)
3223 #define MDIO_DATA_READ 0x02
3224 #define MDIO_ENB_IN 0x00
3226 /* Generate the preamble required for initial synchronization and
3227 a few older transceivers. */
3228 static void mdio_sync(void __iomem *ioaddr, int bits)
3230 void __iomem *mdio_addr = ioaddr + Wn4_PhysicalMgmt;
3232 /* Establish sync by sending at least 32 logic ones. */
3233 while (-- bits >= 0) {
3234 iowrite16(MDIO_DATA_WRITE1, mdio_addr);
3236 iowrite16(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr);
3241 static int mdio_read(struct net_device *dev, int phy_id, int location)
3244 struct vortex_private *vp = netdev_priv(dev);
3245 void __iomem *ioaddr = vp->ioaddr;
3246 int read_cmd = (0xf6 << 10) | (phy_id << 5) | location;
3247 unsigned int retval = 0;
3248 void __iomem *mdio_addr = ioaddr + Wn4_PhysicalMgmt;
3250 if (mii_preamble_required)
3251 mdio_sync(ioaddr, 32);
3253 /* Shift the read command bits out. */
3254 for (i = 14; i >= 0; i--) {
3255 int dataval = (read_cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
3256 iowrite16(dataval, mdio_addr);
3258 iowrite16(dataval | MDIO_SHIFT_CLK, mdio_addr);
3261 /* Read the two transition, 16 data, and wire-idle bits. */
3262 for (i = 19; i > 0; i--) {
3263 iowrite16(MDIO_ENB_IN, mdio_addr);
3265 retval = (retval << 1) | ((ioread16(mdio_addr) & MDIO_DATA_READ) ? 1 : 0);
3266 iowrite16(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
3269 return retval & 0x20000 ? 0xffff : retval>>1 & 0xffff;
3272 static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
3274 struct vortex_private *vp = netdev_priv(dev);
3275 void __iomem *ioaddr = vp->ioaddr;
3276 int write_cmd = 0x50020000 | (phy_id << 23) | (location << 18) | value;
3277 void __iomem *mdio_addr = ioaddr + Wn4_PhysicalMgmt;
3280 if (mii_preamble_required)
3281 mdio_sync(ioaddr, 32);
3283 /* Shift the command bits out. */
3284 for (i = 31; i >= 0; i--) {
3285 int dataval = (write_cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
3286 iowrite16(dataval, mdio_addr);
3288 iowrite16(dataval | MDIO_SHIFT_CLK, mdio_addr);
3291 /* Leave the interface idle. */
3292 for (i = 1; i >= 0; i--) {
3293 iowrite16(MDIO_ENB_IN, mdio_addr);
3295 iowrite16(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
3301 /* ACPI: Advanced Configuration and Power Interface. */
3302 /* Set Wake-On-LAN mode and put the board into D3 (power-down) state. */
3303 static void acpi_set_WOL(struct net_device *dev)
3305 struct vortex_private *vp = netdev_priv(dev);
3306 void __iomem *ioaddr = vp->ioaddr;
3308 if (vp->enable_wol) {
3309 /* Power up on: 1==Downloaded Filter, 2==Magic Packets, 4==Link Status. */
3311 iowrite16(2, ioaddr + 0x0c);
3312 /* The RxFilter must accept the WOL frames. */
3313 iowrite16(SetRxFilter|RxStation|RxMulticast|RxBroadcast, ioaddr + EL3_CMD);
3314 iowrite16(RxEnable, ioaddr + EL3_CMD);
3316 pci_enable_wake(VORTEX_PCI(vp), 0, 1);
3318 /* Change the power state to D3; RxEnable doesn't take effect. */
3319 pci_set_power_state(VORTEX_PCI(vp), PCI_D3hot);
3324 static void __devexit vortex_remove_one (struct pci_dev *pdev)
3326 struct net_device *dev = pci_get_drvdata(pdev);
3327 struct vortex_private *vp;
3330 printk("vortex_remove_one called for Compaq device!\n");
3334 vp = netdev_priv(dev);
3337 pci_iounmap(VORTEX_PCI(vp), vp->cb_fn_base);
3339 unregister_netdev(dev);
3341 if (VORTEX_PCI(vp)) {
3342 pci_set_power_state(VORTEX_PCI(vp), PCI_D0); /* Go active */
3343 if (vp->pm_state_valid)
3344 pci_restore_state(VORTEX_PCI(vp));
3345 pci_disable_device(VORTEX_PCI(vp));
3347 /* Should really use issue_and_wait() here */
3348 iowrite16(TotalReset | ((vp->drv_flags & EEPROM_RESET) ? 0x04 : 0x14),
3349 vp->ioaddr + EL3_CMD);
3351 pci_iounmap(VORTEX_PCI(vp), vp->ioaddr);
3353 pci_free_consistent(pdev,
3354 sizeof(struct boom_rx_desc) * RX_RING_SIZE
3355 + sizeof(struct boom_tx_desc) * TX_RING_SIZE,
3358 if (vp->must_free_region)
3359 release_region(dev->base_addr, vp->io_size);
3364 static struct pci_driver vortex_driver = {
3366 .probe = vortex_init_one,
3367 .remove = __devexit_p(vortex_remove_one),
3368 .id_table = vortex_pci_tbl,
3370 .suspend = vortex_suspend,
3371 .resume = vortex_resume,
3376 static int vortex_have_pci;
3377 static int vortex_have_eisa;
3380 static int __init vortex_init (void)
3382 int pci_rc, eisa_rc;
3384 pci_rc = pci_module_init(&vortex_driver);
3385 eisa_rc = vortex_eisa_init();
3388 vortex_have_pci = 1;
3390 vortex_have_eisa = 1;
3392 return (vortex_have_pci + vortex_have_eisa) ? 0 : -ENODEV;
3396 static void __exit vortex_eisa_cleanup (void)
3398 struct vortex_private *vp;
3399 void __iomem *ioaddr;
3402 /* Take care of the EISA devices */
3403 eisa_driver_unregister (&vortex_eisa_driver);
3406 if (compaq_net_device) {
3407 vp = compaq_net_device->priv;
3408 ioaddr = ioport_map(compaq_net_device->base_addr,
3411 unregister_netdev (compaq_net_device);
3412 iowrite16 (TotalReset, ioaddr + EL3_CMD);
3413 release_region(compaq_net_device->base_addr,
3416 free_netdev (compaq_net_device);
3421 static void __exit vortex_cleanup (void)
3423 if (vortex_have_pci)
3424 pci_unregister_driver (&vortex_driver);
3425 if (vortex_have_eisa)
3426 vortex_eisa_cleanup ();
3430 module_init(vortex_init);
3431 module_exit(vortex_cleanup);
projects / linux-2.6 / blob