git.oblomov.eu Git - linux-2.6/blob - arch/arm/mach-omap2/mcbsp.c

   1 /*
   2  * linux/arch/arm/mach-omap2/mcbsp.c
   3  *
   4  * Copyright (C) 2008 Instituto Nokia de Tecnologia
   5  * Contact: Eduardo Valentin <eduardo.valentin@indt.org.br>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * Multichannel mode not supported.
  12  */
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/clk.h>
  16 #include <linux/err.h>
  17 #include <linux/io.h>
  18 #include <linux/platform_device.h>
  19
  20 #include <mach/irqs.h>
  21 #include <mach/dma.h>
  22 #include <mach/irqs.h>
  23 #include <mach/mux.h>
  24 #include <mach/cpu.h>
  25 #include <mach/mcbsp.h>
  26
  27 struct mcbsp_internal_clk {
  28         struct clk clk;
  29         struct clk **childs;
  30         int n_childs;
  31 };
  32
  33 #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
  34 static void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
  35 {
  36         const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" };
  37         int i;
  38
  39         mclk->n_childs = ARRAY_SIZE(clk_names);
  40         mclk->childs = kzalloc(mclk->n_childs * sizeof(struct clk *),
  41                                 GFP_KERNEL);
  42
  43         for (i = 0; i < mclk->n_childs; i++) {
  44                 /* We fake a platform device to get correct device id */
  45                 struct platform_device pdev;
  46
  47                 pdev.dev.bus = &platform_bus_type;
  48                 pdev.id = mclk->clk.id;
  49                 mclk->childs[i] = clk_get(&pdev.dev, clk_names[i]);
  50                 if (IS_ERR(mclk->childs[i]))
  51                         printk(KERN_ERR "Could not get clock %s (%d).\n",
  52                                 clk_names[i], mclk->clk.id);
  53         }
  54 }
  55
  56 static int omap_mcbsp_clk_enable(struct clk *clk)
  57 {
  58         struct mcbsp_internal_clk *mclk = container_of(clk,
  59                                         struct mcbsp_internal_clk, clk);
  60         int i;
  61
  62         for (i = 0; i < mclk->n_childs; i++)
  63                 clk_enable(mclk->childs[i]);
  64         return 0;
  65 }
  66
  67 static void omap_mcbsp_clk_disable(struct clk *clk)
  68 {
  69         struct mcbsp_internal_clk *mclk = container_of(clk,
  70                                         struct mcbsp_internal_clk, clk);
  71         int i;
  72
  73         for (i = 0; i < mclk->n_childs; i++)
  74                 clk_disable(mclk->childs[i]);
  75 }
  76
  77 static struct mcbsp_internal_clk omap_mcbsp_clks[] = {
  78         {
  79                 .clk = {
  80                         .name           = "mcbsp_clk",
  81                         .id             = 1,
  82                         .enable         = omap_mcbsp_clk_enable,
  83                         .disable        = omap_mcbsp_clk_disable,
  84                 },
  85         },
  86         {
  87                 .clk = {
  88                         .name           = "mcbsp_clk",
  89                         .id             = 2,
  90                         .enable         = omap_mcbsp_clk_enable,
  91                         .disable        = omap_mcbsp_clk_disable,
  92                 },
  93         },
  94         {
  95                 .clk = {
  96                         .name           = "mcbsp_clk",
  97                         .id             = 3,
  98                         .enable         = omap_mcbsp_clk_enable,
  99                         .disable        = omap_mcbsp_clk_disable,
 100                 },
 101         },
 102         {
 103                 .clk = {
 104                         .name           = "mcbsp_clk",
 105                         .id             = 4,
 106                         .enable         = omap_mcbsp_clk_enable,
 107                         .disable        = omap_mcbsp_clk_disable,
 108                 },
 109         },
 110         {
 111                 .clk = {
 112                         .name           = "mcbsp_clk",
 113                         .id             = 5,
 114                         .enable         = omap_mcbsp_clk_enable,
 115                         .disable        = omap_mcbsp_clk_disable,
 116                 },
 117         },
 118 };
 119
 120 #define omap_mcbsp_clks_size    ARRAY_SIZE(omap_mcbsp_clks)
 121 #else
 122 #define omap_mcbsp_clks_size    0
 123 static struct mcbsp_internal_clk __initdata *omap_mcbsp_clks;
 124 static inline void omap_mcbsp_clk_init(struct clk *clk)
 125 { }
 126 #endif
 127
 128 static void omap2_mcbsp2_mux_setup(void)
 129 {
 130         omap_cfg_reg(Y15_24XX_MCBSP2_CLKX);
 131         omap_cfg_reg(R14_24XX_MCBSP2_FSX);
 132         omap_cfg_reg(W15_24XX_MCBSP2_DR);
 133         omap_cfg_reg(V15_24XX_MCBSP2_DX);
 134         omap_cfg_reg(V14_24XX_GPIO117);
 135         /*
 136          * TODO: Need to add MUX settings for OMAP 2430 SDP
 137          */
 138 }
 139
 140 static void omap2_mcbsp_request(unsigned int id)
 141 {
 142         if (cpu_is_omap2420() && (id == OMAP_MCBSP2))
 143                 omap2_mcbsp2_mux_setup();
 144 }
 145
 146 static struct omap_mcbsp_ops omap2_mcbsp_ops = {
 147         .request        = omap2_mcbsp_request,
 148 };
 149
 150 #ifdef CONFIG_ARCH_OMAP2420
 151 static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
 152         {
 153                 .phys_base      = OMAP24XX_MCBSP1_BASE,
 154                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP1_RX,
 155                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP1_TX,
 156                 .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
 157                 .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
 158                 .ops            = &omap2_mcbsp_ops,
 159                 .clk_name       = "mcbsp_clk",
 160         },
 161         {
 162                 .phys_base      = OMAP24XX_MCBSP2_BASE,
 163                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP2_RX,
 164                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP2_TX,
 165                 .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
 166                 .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
 167                 .ops            = &omap2_mcbsp_ops,
 168                 .clk_name       = "mcbsp_clk",
 169         },
 170 };
 171 #define OMAP2420_MCBSP_PDATA_SZ         ARRAY_SIZE(omap2420_mcbsp_pdata)
 172 #else
 173 #define omap2420_mcbsp_pdata            NULL
 174 #define OMAP2420_MCBSP_PDATA_SZ         0
 175 #endif
 176
 177 #ifdef CONFIG_ARCH_OMAP2430
 178 static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
 179         {
 180                 .phys_base      = OMAP24XX_MCBSP1_BASE,
 181                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP1_RX,
 182                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP1_TX,
 183                 .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
 184                 .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
 185                 .ops            = &omap2_mcbsp_ops,
 186                 .clk_name       = "mcbsp_clk",
 187         },
 188         {
 189                 .phys_base      = OMAP24XX_MCBSP2_BASE,
 190                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP2_RX,
 191                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP2_TX,
 192                 .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
 193                 .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
 194                 .ops            = &omap2_mcbsp_ops,
 195                 .clk_name       = "mcbsp_clk",
 196         },
 197         {
 198                 .phys_base      = OMAP2430_MCBSP3_BASE,
 199                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP3_RX,
 200                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP3_TX,
 201                 .rx_irq         = INT_24XX_MCBSP3_IRQ_RX,
 202                 .tx_irq         = INT_24XX_MCBSP3_IRQ_TX,
 203                 .ops            = &omap2_mcbsp_ops,
 204                 .clk_name       = "mcbsp_clk",
 205         },
 206         {
 207                 .phys_base      = OMAP2430_MCBSP4_BASE,
 208                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP4_RX,
 209                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP4_TX,
 210                 .rx_irq         = INT_24XX_MCBSP4_IRQ_RX,
 211                 .tx_irq         = INT_24XX_MCBSP4_IRQ_TX,
 212                 .ops            = &omap2_mcbsp_ops,
 213                 .clk_name       = "mcbsp_clk",
 214         },
 215         {
 216                 .phys_base      = OMAP2430_MCBSP5_BASE,
 217                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP5_RX,
 218                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP5_TX,
 219                 .rx_irq         = INT_24XX_MCBSP5_IRQ_RX,
 220                 .tx_irq         = INT_24XX_MCBSP5_IRQ_TX,
 221                 .ops            = &omap2_mcbsp_ops,
 222                 .clk_name       = "mcbsp_clk",
 223         },
 224 };
 225 #define OMAP2430_MCBSP_PDATA_SZ         ARRAY_SIZE(omap2430_mcbsp_pdata)
 226 #else
 227 #define omap2430_mcbsp_pdata            NULL
 228 #define OMAP2430_MCBSP_PDATA_SZ         0
 229 #endif
 230
 231 #ifdef CONFIG_ARCH_OMAP34XX
 232 static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
 233         {
 234                 .phys_base      = OMAP34XX_MCBSP1_BASE,
 235                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP1_RX,
 236                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP1_TX,
 237                 .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
 238                 .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
 239                 .ops            = &omap2_mcbsp_ops,
 240                 .clk_name       = "mcbsp_clk",
 241         },
 242         {
 243                 .phys_base      = OMAP34XX_MCBSP2_BASE,
 244                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP2_RX,
 245                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP2_TX,
 246                 .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
 247                 .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
 248                 .ops            = &omap2_mcbsp_ops,
 249                 .clk_name       = "mcbsp_clk",
 250         },
 251         {
 252                 .phys_base      = OMAP34XX_MCBSP3_BASE,
 253                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP3_RX,
 254                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP3_TX,
 255                 .rx_irq         = INT_24XX_MCBSP3_IRQ_RX,
 256                 .tx_irq         = INT_24XX_MCBSP3_IRQ_TX,
 257                 .ops            = &omap2_mcbsp_ops,
 258                 .clk_name       = "mcbsp_clk",
 259         },
 260         {
 261                 .phys_base      = OMAP34XX_MCBSP4_BASE,
 262                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP4_RX,
 263                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP4_TX,
 264                 .rx_irq         = INT_24XX_MCBSP4_IRQ_RX,
 265                 .tx_irq         = INT_24XX_MCBSP4_IRQ_TX,
 266                 .ops            = &omap2_mcbsp_ops,
 267                 .clk_name       = "mcbsp_clk",
 268         },
 269         {
 270                 .phys_base      = OMAP34XX_MCBSP5_BASE,
 271                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP5_RX,
 272                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP5_TX,
 273                 .rx_irq         = INT_24XX_MCBSP5_IRQ_RX,
 274                 .tx_irq         = INT_24XX_MCBSP5_IRQ_TX,
 275                 .ops            = &omap2_mcbsp_ops,
 276                 .clk_name       = "mcbsp_clk",
 277         },
 278 };
 279 #define OMAP34XX_MCBSP_PDATA_SZ         ARRAY_SIZE(omap34xx_mcbsp_pdata)
 280 #else
 281 #define omap34xx_mcbsp_pdata            NULL
 282 #define OMAP34XX_MCBSP_PDATA_SZ         0
 283 #endif
 284
 285 static int __init omap2_mcbsp_init(void)
 286 {
 287         int i;
 288
 289         for (i = 0; i < omap_mcbsp_clks_size; i++) {
 290                 /* Once we call clk_get inside init, we do not register it */
 291                 omap_mcbsp_clk_init(&omap_mcbsp_clks[i]);
 292                 clk_register(&omap_mcbsp_clks[i].clk);
 293         }
 294
 295         if (cpu_is_omap2420())
 296                 omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ;
 297         if (cpu_is_omap2430())
 298                 omap_mcbsp_count = OMAP2430_MCBSP_PDATA_SZ;
 299         if (cpu_is_omap34xx())
 300                 omap_mcbsp_count = OMAP34XX_MCBSP_PDATA_SZ;
 301
 302         mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
 303                                                                 GFP_KERNEL);
 304         if (!mcbsp_ptr)
 305                 return -ENOMEM;
 306
 307         if (cpu_is_omap2420())
 308                 omap_mcbsp_register_board_cfg(omap2420_mcbsp_pdata,
 309                                                 OMAP2420_MCBSP_PDATA_SZ);
 310         if (cpu_is_omap2430())
 311                 omap_mcbsp_register_board_cfg(omap2430_mcbsp_pdata,
 312                                                 OMAP2430_MCBSP_PDATA_SZ);
 313         if (cpu_is_omap34xx())
 314                 omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata,
 315                                                 OMAP34XX_MCBSP_PDATA_SZ);
 316
 317         return omap_mcbsp_init();
 318 }
 319 arch_initcall(omap2_mcbsp_init);