git.oblomov.eu Git - linux-2.6/blob - drivers/pci/hotplug/cpqphp_pci.c

   1 /*
   2  * Compaq Hot Plug Controller Driver
   3  *
   4  * Copyright (C) 1995,2001 Compaq Computer Corporation
   5  * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
   6  * Copyright (C) 2001 IBM Corp.
   7  *
   8  * All rights reserved.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or (at
  13  * your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful, but
  16  * WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  18  * NON INFRINGEMENT.  See the GNU General Public License for more
  19  * details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24  *
  25  * Send feedback to <greg@kroah.com>
  26  *
  27  */
  28
  29 #include <linux/config.h>
  30 #include <linux/module.h>
  31 #include <linux/kernel.h>
  32 #include <linux/types.h>
  33 #include <linux/slab.h>
  34 #include <linux/workqueue.h>
  35 #include <linux/proc_fs.h>
  36 #include <linux/pci.h>
  37 #include "../pci.h"
  38 #include "cpqphp.h"
  39 #include "cpqphp_nvram.h"
  40 #include "../../../arch/i386/pci/pci.h" /* horrible hack showing how processor dependent we are... */
  41
  42
  43 u8 cpqhp_nic_irq;
  44 u8 cpqhp_disk_irq;
  45
  46 static u16 unused_IRQ;
  47
  48 /*
  49  * detect_HRT_floating_pointer
  50  *
  51  * find the Hot Plug Resource Table in the specified region of memory.
  52  *
  53  */
  54 static void __iomem *detect_HRT_floating_pointer(void __iomem *begin, void __iomem *end)
  55 {
  56         void __iomem *fp;
  57         void __iomem *endp;
  58         u8 temp1, temp2, temp3, temp4;
  59         int status = 0;
  60
  61         endp = (end - sizeof(struct hrt) + 1);
  62
  63         for (fp = begin; fp <= endp; fp += 16) {
  64                 temp1 = readb(fp + SIG0);
  65                 temp2 = readb(fp + SIG1);
  66                 temp3 = readb(fp + SIG2);
  67                 temp4 = readb(fp + SIG3);
  68                 if (temp1 == '$' &&
  69                     temp2 == 'H' &&
  70                     temp3 == 'R' &&
  71                     temp4 == 'T') {
  72                         status = 1;
  73                         break;
  74                 }
  75         }
  76
  77         if (!status)
  78                 fp = NULL;
  79
  80         dbg("Discovered Hotplug Resource Table at %p\n", fp);
  81         return fp;
  82 }
  83
  84
  85 int cpqhp_configure_device (struct controller* ctrl, struct pci_func* func)
  86 {
  87         unsigned char bus;
  88         struct pci_bus *child;
  89         int num;
  90
  91         if (func->pci_dev == NULL)
  92                 func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function));
  93
  94         /* No pci device, we need to create it then */
  95         if (func->pci_dev == NULL) {
  96                 dbg("INFO: pci_dev still null\n");
  97
  98                 num = pci_scan_slot(ctrl->pci_dev->bus, PCI_DEVFN(func->device, func->function));
  99                 if (num)
 100                         pci_bus_add_devices(ctrl->pci_dev->bus);
 101
 102                 func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function));
 103                 if (func->pci_dev == NULL) {
 104                         dbg("ERROR: pci_dev still null\n");
 105                         return 0;
 106                 }
 107         }
 108
 109         if (func->pci_dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
 110                 pci_read_config_byte(func->pci_dev, PCI_SECONDARY_BUS, &bus);
 111                 child = (struct pci_bus*) pci_add_new_bus(func->pci_dev->bus, (func->pci_dev), bus);
 112                 pci_do_scan_bus(child);
 113         }
 114
 115         return 0;
 116 }
 117
 118
 119 int cpqhp_unconfigure_device(struct pci_func* func)
 120 {
 121         int j;
 122
 123         dbg("%s: bus/dev/func = %x/%x/%x\n", __FUNCTION__, func->bus, func->device, func->function);
 124
 125         for (j=0; j<8 ; j++) {
 126                 struct pci_dev* temp = pci_find_slot(func->bus, PCI_DEVFN(func->device, j));
 127                 if (temp)
 128                         pci_remove_bus_device(temp);
 129         }
 130         return 0;
 131 }
 132
 133 static int PCI_RefinedAccessConfig(struct pci_bus *bus, unsigned int devfn, u8 offset, u32 *value)
 134 {
 135         u32 vendID = 0;
 136
 137         if (pci_bus_read_config_dword (bus, devfn, PCI_VENDOR_ID, &vendID) == -1)
 138                 return -1;
 139         if (vendID == 0xffffffff)
 140                 return -1;
 141         return pci_bus_read_config_dword (bus, devfn, offset, value);
 142 }
 143
 144
 145 /*
 146  * cpqhp_set_irq
 147  *
 148  * @bus_num: bus number of PCI device
 149  * @dev_num: device number of PCI device
 150  * @slot: pointer to u8 where slot number will be returned
 151  */
 152 int cpqhp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num)
 153 {
 154         int rc = 0;
 155
 156         if (cpqhp_legacy_mode) {
 157                 struct pci_dev *fakedev;
 158                 struct pci_bus *fakebus;
 159                 u16 temp_word;
 160
 161                 fakedev = kmalloc(sizeof(*fakedev), GFP_KERNEL);
 162                 fakebus = kmalloc(sizeof(*fakebus), GFP_KERNEL);
 163                 if (!fakedev || !fakebus) {
 164                         kfree(fakedev);
 165                         kfree(fakebus);
 166                         return -ENOMEM;
 167                 }
 168
 169                 fakedev->devfn = dev_num << 3;
 170                 fakedev->bus = fakebus;
 171                 fakebus->number = bus_num;
 172                 dbg("%s: dev %d, bus %d, pin %d, num %d\n",
 173                     __FUNCTION__, dev_num, bus_num, int_pin, irq_num);
 174                 rc = pcibios_set_irq_routing(fakedev, int_pin - 0x0a, irq_num);
 175                 kfree(fakedev);
 176                 kfree(fakebus);
 177                 dbg("%s: rc %d\n", __FUNCTION__, rc);
 178                 if (!rc)
 179                         return !rc;
 180
 181                 // set the Edge Level Control Register (ELCR)
 182                 temp_word = inb(0x4d0);
 183                 temp_word |= inb(0x4d1) << 8;
 184
 185                 temp_word |= 0x01 << irq_num;
 186
 187                 // This should only be for x86 as it sets the Edge Level Control Register
 188                 outb((u8) (temp_word & 0xFF), 0x4d0);
 189                 outb((u8) ((temp_word & 0xFF00) >> 8), 0x4d1);
 190                 rc = 0;
 191         }
 192
 193         return rc;
 194 }
 195
 196
 197 /*
 198  * WTF??? This function isn't in the code, yet a function calls it, but the
 199  * compiler optimizes it away?  strange.  Here as a placeholder to keep the
 200  * compiler happy.
 201  */
 202 static int PCI_ScanBusNonBridge (u8 bus, u8 device)
 203 {
 204         return 0;
 205 }
 206
 207 static int PCI_ScanBusForNonBridge(struct controller *ctrl, u8 bus_num, u8 * dev_num)
 208 {
 209         u16 tdevice;
 210         u32 work;
 211         u8 tbus;
 212
 213         ctrl->pci_bus->number = bus_num;
 214
 215         for (tdevice = 0; tdevice < 0xFF; tdevice++) {
 216                 //Scan for access first
 217                 if (PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work) == -1)
 218                         continue;
 219                 dbg("Looking for nonbridge bus_num %d dev_num %d\n", bus_num, tdevice);
 220                 //Yep we got one. Not a bridge ?
 221                 if ((work >> 8) != PCI_TO_PCI_BRIDGE_CLASS) {
 222                         *dev_num = tdevice;
 223                         dbg("found it !\n");
 224                         return 0;
 225                 }
 226         }
 227         for (tdevice = 0; tdevice < 0xFF; tdevice++) {
 228                 //Scan for access first
 229                 if (PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work) == -1)
 230                         continue;
 231                 dbg("Looking for bridge bus_num %d dev_num %d\n", bus_num, tdevice);
 232                 //Yep we got one. bridge ?
 233                 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
 234                         pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(tdevice, 0), PCI_SECONDARY_BUS, &tbus);
 235                         dbg("Recurse on bus_num %d tdevice %d\n", tbus, tdevice);
 236                         if (PCI_ScanBusNonBridge(tbus, tdevice) == 0)
 237                                 return 0;
 238                 }
 239         }
 240
 241         return -1;
 242 }
 243
 244
 245 static int PCI_GetBusDevHelper(struct controller *ctrl, u8 *bus_num, u8 *dev_num, u8 slot, u8 nobridge)
 246 {
 247         struct irq_routing_table *PCIIRQRoutingInfoLength;
 248         long len;
 249         long loop;
 250         u32 work;
 251
 252         u8 tbus, tdevice, tslot;
 253
 254         PCIIRQRoutingInfoLength = pcibios_get_irq_routing_table();
 255         if (!PCIIRQRoutingInfoLength)
 256                 return -1;
 257
 258         len = (PCIIRQRoutingInfoLength->size -
 259                sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
 260         // Make sure I got at least one entry
 261         if (len == 0) {
 262                 kfree(PCIIRQRoutingInfoLength );
 263                 return -1;
 264         }
 265
 266         for (loop = 0; loop < len; ++loop) {
 267                 tbus = PCIIRQRoutingInfoLength->slots[loop].bus;
 268                 tdevice = PCIIRQRoutingInfoLength->slots[loop].devfn;
 269                 tslot = PCIIRQRoutingInfoLength->slots[loop].slot;
 270
 271                 if (tslot == slot) {
 272                         *bus_num = tbus;
 273                         *dev_num = tdevice;
 274                         ctrl->pci_bus->number = tbus;
 275                         pci_bus_read_config_dword (ctrl->pci_bus, *dev_num, PCI_VENDOR_ID, &work);
 276                         if (!nobridge || (work == 0xffffffff)) {
 277                                 kfree(PCIIRQRoutingInfoLength );
 278                                 return 0;
 279                         }
 280
 281                         dbg("bus_num %d devfn %d\n", *bus_num, *dev_num);
 282                         pci_bus_read_config_dword (ctrl->pci_bus, *dev_num, PCI_CLASS_REVISION, &work);
 283                         dbg("work >> 8 (%x) = BRIDGE (%x)\n", work >> 8, PCI_TO_PCI_BRIDGE_CLASS);
 284
 285                         if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
 286                                 pci_bus_read_config_byte (ctrl->pci_bus, *dev_num, PCI_SECONDARY_BUS, &tbus);
 287                                 dbg("Scan bus for Non Bridge: bus %d\n", tbus);
 288                                 if (PCI_ScanBusForNonBridge(ctrl, tbus, dev_num) == 0) {
 289                                         *bus_num = tbus;
 290                                         kfree(PCIIRQRoutingInfoLength );
 291                                         return 0;
 292                                 }
 293                         } else {
 294                                 kfree(PCIIRQRoutingInfoLength );
 295                                 return 0;
 296                         }
 297
 298                 }
 299         }
 300         kfree(PCIIRQRoutingInfoLength );
 301         return -1;
 302 }
 303
 304
 305 int cpqhp_get_bus_dev (struct controller *ctrl, u8 * bus_num, u8 * dev_num, u8 slot)
 306 {
 307         return PCI_GetBusDevHelper(ctrl, bus_num, dev_num, slot, 0);    //plain (bridges allowed)
 308 }
 309
 310
 311 /* More PCI configuration routines; this time centered around hotplug controller */
 312
 313
 314 /*
 315  * cpqhp_save_config
 316  *
 317  * Reads configuration for all slots in a PCI bus and saves info.
 318  *
 319  * Note:  For non-hot plug busses, the slot # saved is the device #
 320  *
 321  * returns 0 if success
 322  */
 323 int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
 324 {
 325         long rc;
 326         u8 class_code;
 327         u8 header_type;
 328         u32 ID;
 329         u8 secondary_bus;
 330         struct pci_func *new_slot;
 331         int sub_bus;
 332         int FirstSupported;
 333         int LastSupported;
 334         int max_functions;
 335         int function;
 336         u8 DevError;
 337         int device = 0;
 338         int cloop = 0;
 339         int stop_it;
 340         int index;
 341
 342         //              Decide which slots are supported
 343
 344         if (is_hot_plug) {
 345                 //*********************************
 346                 // is_hot_plug is the slot mask
 347                 //*********************************
 348                 FirstSupported = is_hot_plug >> 4;
 349                 LastSupported = FirstSupported + (is_hot_plug & 0x0F) - 1;
 350         } else {
 351                 FirstSupported = 0;
 352                 LastSupported = 0x1F;
 353         }
 354
 355         //     Save PCI configuration space for all devices in supported slots
 356         ctrl->pci_bus->number = busnumber;
 357         for (device = FirstSupported; device <= LastSupported; device++) {
 358                 ID = 0xFFFFFFFF;
 359                 rc = pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(device, 0), PCI_VENDOR_ID, &ID);
 360
 361                 if (ID != 0xFFFFFFFF) {   //  device in slot
 362                         rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, 0), 0x0B, &class_code);
 363                         if (rc)
 364                                 return rc;
 365
 366                         rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, 0), PCI_HEADER_TYPE, &header_type);
 367                         if (rc)
 368                                 return rc;
 369
 370                         // If multi-function device, set max_functions to 8
 371                         if (header_type & 0x80)
 372                                 max_functions = 8;
 373                         else
 374                                 max_functions = 1;
 375
 376                         function = 0;
 377
 378                         do {
 379                                 DevError = 0;
 380
 381                                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {   // P-P Bridge
 382                                         //  Recurse the subordinate bus
 383                                         //  get the subordinate bus number
 384                                         rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, function), PCI_SECONDARY_BUS, &secondary_bus);
 385                                         if (rc) {
 386                                                 return rc;
 387                                         } else {
 388                                                 sub_bus = (int) secondary_bus;
 389
 390                                                 // Save secondary bus cfg spc
 391                                                 // with this recursive call.
 392                                                 rc = cpqhp_save_config(ctrl, sub_bus, 0);
 393                                                 if (rc)
 394                                                         return rc;
 395                                                 ctrl->pci_bus->number = busnumber;
 396                                         }
 397                                 }
 398
 399                                 index = 0;
 400                                 new_slot = cpqhp_slot_find(busnumber, device, index++);
 401                                 while (new_slot &&
 402                                        (new_slot->function != (u8) function))
 403                                         new_slot = cpqhp_slot_find(busnumber, device, index++);
 404
 405                                 if (!new_slot) {
 406                                         // Setup slot structure.
 407                                         new_slot = cpqhp_slot_create(busnumber);
 408
 409                                         if (new_slot == NULL)
 410                                                 return(1);
 411                                 }
 412
 413                                 new_slot->bus = (u8) busnumber;
 414                                 new_slot->device = (u8) device;
 415                                 new_slot->function = (u8) function;
 416                                 new_slot->is_a_board = 1;
 417                                 new_slot->switch_save = 0x10;
 418                                 // In case of unsupported board
 419                                 new_slot->status = DevError;
 420                                 new_slot->pci_dev = pci_find_slot(new_slot->bus, (new_slot->device << 3) | new_slot->function);
 421
 422                                 for (cloop = 0; cloop < 0x20; cloop++) {
 423                                         rc = pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(device, function), cloop << 2, (u32 *) & (new_slot-> config_space [cloop]));
 424                                         if (rc)
 425                                                 return rc;
 426                                 }
 427
 428                                 function++;
 429
 430                                 stop_it = 0;
 431
 432                                 //  this loop skips to the next present function
 433                                 //  reading in Class Code and Header type.
 434
 435                                 while ((function < max_functions)&&(!stop_it)) {
 436                                         rc = pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(device, function), PCI_VENDOR_ID, &ID);
 437                                         if (ID == 0xFFFFFFFF) {  // nothing there.
 438                                                 function++;
 439                                         } else {  // Something there
 440                                                 rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, function), 0x0B, &class_code);
 441                                                 if (rc)
 442                                                         return rc;
 443
 444                                                 rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, function), PCI_HEADER_TYPE, &header_type);
 445                                                 if (rc)
 446                                                         return rc;
 447
 448                                                 stop_it++;
 449                                         }
 450                                 }
 451
 452                         } while (function < max_functions);
 453                 }               // End of IF (device in slot?)
 454                 else if (is_hot_plug) {
 455                         // Setup slot structure with entry for empty slot
 456                         new_slot = cpqhp_slot_create(busnumber);
 457
 458                         if (new_slot == NULL) {
 459                                 return(1);
 460                         }
 461
 462                         new_slot->bus = (u8) busnumber;
 463                         new_slot->device = (u8) device;
 464                         new_slot->function = 0;
 465                         new_slot->is_a_board = 0;
 466                         new_slot->presence_save = 0;
 467                         new_slot->switch_save = 0;
 468                 }
 469         }                       // End of FOR loop
 470
 471         return(0);
 472 }
 473
 474
 475 /*
 476  * cpqhp_save_slot_config
 477  *
 478  * Saves configuration info for all PCI devices in a given slot
 479  * including subordinate busses.
 480  *
 481  * returns 0 if success
 482  */
 483 int cpqhp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot)
 484 {
 485         long rc;
 486         u8 class_code;
 487         u8 header_type;
 488         u32 ID;
 489         u8 secondary_bus;
 490         int sub_bus;
 491         int max_functions;
 492         int function;
 493         int cloop = 0;
 494         int stop_it;
 495
 496         ID = 0xFFFFFFFF;
 497
 498         ctrl->pci_bus->number = new_slot->bus;
 499         pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), PCI_VENDOR_ID, &ID);
 500
 501         if (ID != 0xFFFFFFFF) {   //  device in slot
 502                 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), 0x0B, &class_code);
 503                 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), PCI_HEADER_TYPE, &header_type);
 504
 505                 if (header_type & 0x80) // Multi-function device
 506                         max_functions = 8;
 507                 else
 508                         max_functions = 1;
 509
 510                 function = 0;
 511
 512                 do {
 513                         if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {     // PCI-PCI Bridge
 514                                 //  Recurse the subordinate bus
 515                                 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_SECONDARY_BUS, &secondary_bus);
 516
 517                                 sub_bus = (int) secondary_bus;
 518
 519                                 // Save the config headers for the secondary bus.
 520                                 rc = cpqhp_save_config(ctrl, sub_bus, 0);
 521                                 if (rc)
 522                                         return(rc);
 523                                 ctrl->pci_bus->number = new_slot->bus;
 524
 525                         }       // End of IF
 526
 527                         new_slot->status = 0;
 528
 529                         for (cloop = 0; cloop < 0x20; cloop++) {
 530                                 pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), cloop << 2, (u32 *) & (new_slot-> config_space [cloop]));
 531                         }
 532
 533                         function++;
 534
 535                         stop_it = 0;
 536
 537                         //  this loop skips to the next present function
 538                         //  reading in the Class Code and the Header type.
 539
 540                         while ((function < max_functions) && (!stop_it)) {
 541                                 pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_VENDOR_ID, &ID);
 542
 543                                 if (ID == 0xFFFFFFFF) {  // nothing there.
 544                                         function++;
 545                                 } else {  // Something there
 546                                         pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), 0x0B, &class_code);
 547
 548                                         pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_HEADER_TYPE, &header_type);
 549
 550                                         stop_it++;
 551                                 }
 552                         }
 553
 554                 } while (function < max_functions);
 555         }                       // End of IF (device in slot?)
 556         else {
 557                 return 2;
 558         }
 559
 560         return 0;
 561 }
 562
 563
 564 /*
 565  * cpqhp_save_base_addr_length
 566  *
 567  * Saves the length of all base address registers for the
 568  * specified slot.  this is for hot plug REPLACE
 569  *
 570  * returns 0 if success
 571  */
 572 int cpqhp_save_base_addr_length(struct controller *ctrl, struct pci_func * func)
 573 {
 574         u8 cloop;
 575         u8 header_type;
 576         u8 secondary_bus;
 577         u8 type;
 578         int sub_bus;
 579         u32 temp_register;
 580         u32 base;
 581         u32 rc;
 582         struct pci_func *next;
 583         int index = 0;
 584         struct pci_bus *pci_bus = ctrl->pci_bus;
 585         unsigned int devfn;
 586
 587         func = cpqhp_slot_find(func->bus, func->device, index++);
 588
 589         while (func != NULL) {
 590                 pci_bus->number = func->bus;
 591                 devfn = PCI_DEVFN(func->device, func->function);
 592
 593                 // Check for Bridge
 594                 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
 595
 596                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
 597                         // PCI-PCI Bridge
 598                         pci_bus_read_config_byte (pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
 599
 600                         sub_bus = (int) secondary_bus;
 601
 602                         next = cpqhp_slot_list[sub_bus];
 603
 604                         while (next != NULL) {
 605                                 rc = cpqhp_save_base_addr_length(ctrl, next);
 606                                 if (rc)
 607                                         return rc;
 608
 609                                 next = next->next;
 610                         }
 611                         pci_bus->number = func->bus;
 612
 613                         //FIXME: this loop is duplicated in the non-bridge case.  The two could be rolled together
 614                         // Figure out IO and memory base lengths
 615                         for (cloop = 0x10; cloop <= 0x14; cloop += 4) {
 616                                 temp_register = 0xFFFFFFFF;
 617                                 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
 618                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base);
 619
 620                                 if (base) {  // If this register is implemented
 621                                         if (base & 0x01L) {
 622                                                 // IO base
 623                                                 // set base = amount of IO space requested
 624                                                 base = base & 0xFFFFFFFE;
 625                                                 base = (~base) + 1;
 626
 627                                                 type = 1;
 628                                         } else {
 629                                                 // memory base
 630                                                 base = base & 0xFFFFFFF0;
 631                                                 base = (~base) + 1;
 632
 633                                                 type = 0;
 634                                         }
 635                                 } else {
 636                                         base = 0x0L;
 637                                         type = 0;
 638                                 }
 639
 640                                 // Save information in slot structure
 641                                 func->base_length[(cloop - 0x10) >> 2] =
 642                                 base;
 643                                 func->base_type[(cloop - 0x10) >> 2] = type;
 644
 645                         }       // End of base register loop
 646
 647
 648                 } else if ((header_type & 0x7F) == 0x00) {        // PCI-PCI Bridge
 649                         // Figure out IO and memory base lengths
 650                         for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
 651                                 temp_register = 0xFFFFFFFF;
 652                                 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
 653                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base);
 654
 655                                 if (base) {  // If this register is implemented
 656                                         if (base & 0x01L) {
 657                                                 // IO base
 658                                                 // base = amount of IO space requested
 659                                                 base = base & 0xFFFFFFFE;
 660                                                 base = (~base) + 1;
 661
 662                                                 type = 1;
 663                                         } else {
 664                                                 // memory base
 665                                                 // base = amount of memory space requested
 666                                                 base = base & 0xFFFFFFF0;
 667                                                 base = (~base) + 1;
 668
 669                                                 type = 0;
 670                                         }
 671                                 } else {
 672                                         base = 0x0L;
 673                                         type = 0;
 674                                 }
 675
 676                                 // Save information in slot structure
 677                                 func->base_length[(cloop - 0x10) >> 2] = base;
 678                                 func->base_type[(cloop - 0x10) >> 2] = type;
 679
 680                         }       // End of base register loop
 681
 682                 } else {          // Some other unknown header type
 683                 }
 684
 685                 // find the next device in this slot
 686                 func = cpqhp_slot_find(func->bus, func->device, index++);
 687         }
 688
 689         return(0);
 690 }
 691
 692
 693 /*
 694  * cpqhp_save_used_resources
 695  *
 696  * Stores used resource information for existing boards.  this is
 697  * for boards that were in the system when this driver was loaded.
 698  * this function is for hot plug ADD
 699  *
 700  * returns 0 if success
 701  */
 702 int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
 703 {
 704         u8 cloop;
 705         u8 header_type;
 706         u8 secondary_bus;
 707         u8 temp_byte;
 708         u8 b_base;
 709         u8 b_length;
 710         u16 command;
 711         u16 save_command;
 712         u16 w_base;
 713         u16 w_length;
 714         u32 temp_register;
 715         u32 save_base;
 716         u32 base;
 717         int index = 0;
 718         struct pci_resource *mem_node;
 719         struct pci_resource *p_mem_node;
 720         struct pci_resource *io_node;
 721         struct pci_resource *bus_node;
 722         struct pci_bus *pci_bus = ctrl->pci_bus;
 723         unsigned int devfn;
 724
 725         func = cpqhp_slot_find(func->bus, func->device, index++);
 726
 727         while ((func != NULL) && func->is_a_board) {
 728                 pci_bus->number = func->bus;
 729                 devfn = PCI_DEVFN(func->device, func->function);
 730
 731                 // Save the command register
 732                 pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &save_command);
 733
 734                 // disable card
 735                 command = 0x00;
 736                 pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
 737
 738                 // Check for Bridge
 739                 pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
 740
 741                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {     // PCI-PCI Bridge
 742                         // Clear Bridge Control Register
 743                         command = 0x00;
 744                         pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
 745                         pci_bus_read_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
 746                         pci_bus_read_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, &temp_byte);
 747
 748                         bus_node = kmalloc(sizeof(*bus_node), GFP_KERNEL);
 749                         if (!bus_node)
 750                                 return -ENOMEM;
 751
 752                         bus_node->base = secondary_bus;
 753                         bus_node->length = temp_byte - secondary_bus + 1;
 754
 755                         bus_node->next = func->bus_head;
 756                         func->bus_head = bus_node;
 757
 758                         // Save IO base and Limit registers
 759                         pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_BASE, &b_base);
 760                         pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_LIMIT, &b_length);
 761
 762                         if ((b_base <= b_length) && (save_command & 0x01)) {
 763                                 io_node = kmalloc(sizeof(*io_node), GFP_KERNEL);
 764                                 if (!io_node)
 765                                         return -ENOMEM;
 766
 767                                 io_node->base = (b_base & 0xF0) << 8;
 768                                 io_node->length = (b_length - b_base + 0x10) << 8;
 769
 770                                 io_node->next = func->io_head;
 771                                 func->io_head = io_node;
 772                         }
 773
 774                         // Save memory base and Limit registers
 775                         pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_BASE, &w_base);
 776                         pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, &w_length);
 777
 778                         if ((w_base <= w_length) && (save_command & 0x02)) {
 779                                 mem_node = kmalloc(sizeof(*mem_node), GFP_KERNEL);
 780                                 if (!mem_node)
 781                                         return -ENOMEM;
 782
 783                                 mem_node->base = w_base << 16;
 784                                 mem_node->length = (w_length - w_base + 0x10) << 16;
 785
 786                                 mem_node->next = func->mem_head;
 787                                 func->mem_head = mem_node;
 788                         }
 789
 790                         // Save prefetchable memory base and Limit registers
 791                         pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, &w_base);
 792                         pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, &w_length);
 793
 794                         if ((w_base <= w_length) && (save_command & 0x02)) {
 795                                 p_mem_node = kmalloc(sizeof(*p_mem_node), GFP_KERNEL);
 796                                 if (!p_mem_node)
 797                                         return -ENOMEM;
 798
 799                                 p_mem_node->base = w_base << 16;
 800                                 p_mem_node->length = (w_length - w_base + 0x10) << 16;
 801
 802                                 p_mem_node->next = func->p_mem_head;
 803                                 func->p_mem_head = p_mem_node;
 804                         }
 805                         // Figure out IO and memory base lengths
 806                         for (cloop = 0x10; cloop <= 0x14; cloop += 4) {
 807                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &save_base);
 808
 809                                 temp_register = 0xFFFFFFFF;
 810                                 pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register);
 811                                 pci_bus_read_config_dword(pci_bus, devfn, cloop, &base);
 812
 813                                 temp_register = base;
 814
 815                                 if (base) {  // If this register is implemented
 816                                         if (((base & 0x03L) == 0x01)
 817                                             && (save_command & 0x01)) {
 818                                                 // IO base
 819                                                 // set temp_register = amount of IO space requested
 820                                                 temp_register = base & 0xFFFFFFFE;
 821                                                 temp_register = (~temp_register) + 1;
 822
 823                                                 io_node = kmalloc(sizeof(*io_node),
 824                                                                 GFP_KERNEL);
 825                                                 if (!io_node)
 826                                                         return -ENOMEM;
 827
 828                                                 io_node->base =
 829                                                 save_base & (~0x03L);
 830                                                 io_node->length = temp_register;
 831
 832                                                 io_node->next = func->io_head;
 833                                                 func->io_head = io_node;
 834                                         } else
 835                                                 if (((base & 0x0BL) == 0x08)
 836                                                     && (save_command & 0x02)) {
 837                                                 // prefetchable memory base
 838                                                 temp_register = base & 0xFFFFFFF0;
 839                                                 temp_register = (~temp_register) + 1;
 840
 841                                                 p_mem_node = kmalloc(sizeof(*p_mem_node),
 842                                                                 GFP_KERNEL);
 843                                                 if (!p_mem_node)
 844                                                         return -ENOMEM;
 845
 846                                                 p_mem_node->base = save_base & (~0x0FL);
 847                                                 p_mem_node->length = temp_register;
 848
 849                                                 p_mem_node->next = func->p_mem_head;
 850                                                 func->p_mem_head = p_mem_node;
 851                                         } else
 852                                                 if (((base & 0x0BL) == 0x00)
 853                                                     && (save_command & 0x02)) {
 854                                                 // prefetchable memory base
 855                                                 temp_register = base & 0xFFFFFFF0;
 856                                                 temp_register = (~temp_register) + 1;
 857
 858                                                 mem_node = kmalloc(sizeof(*mem_node),
 859                                                                 GFP_KERNEL);
 860                                                 if (!mem_node)
 861                                                         return -ENOMEM;
 862
 863                                                 mem_node->base = save_base & (~0x0FL);
 864                                                 mem_node->length = temp_register;
 865
 866                                                 mem_node->next = func->mem_head;
 867                                                 func->mem_head = mem_node;
 868                                         } else
 869                                                 return(1);
 870                                 }
 871                         }       // End of base register loop
 872                 } else if ((header_type & 0x7F) == 0x00) {        // Standard header
 873                         // Figure out IO and memory base lengths
 874                         for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
 875                                 pci_bus_read_config_dword(pci_bus, devfn, cloop, &save_base);
 876
 877                                 temp_register = 0xFFFFFFFF;
 878                                 pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register);
 879                                 pci_bus_read_config_dword(pci_bus, devfn, cloop, &base);
 880
 881                                 temp_register = base;
 882
 883                                 if (base) {       // If this register is implemented
 884                                         if (((base & 0x03L) == 0x01)
 885                                             && (save_command & 0x01)) {
 886                                                 // IO base
 887                                                 // set temp_register = amount of IO space requested
 888                                                 temp_register = base & 0xFFFFFFFE;
 889                                                 temp_register = (~temp_register) + 1;
 890
 891                                                 io_node = kmalloc(sizeof(*io_node),
 892                                                                 GFP_KERNEL);
 893                                                 if (!io_node)
 894                                                         return -ENOMEM;
 895
 896                                                 io_node->base = save_base & (~0x01L);
 897                                                 io_node->length = temp_register;
 898
 899                                                 io_node->next = func->io_head;
 900                                                 func->io_head = io_node;
 901                                         } else
 902                                                 if (((base & 0x0BL) == 0x08)
 903                                                     && (save_command & 0x02)) {
 904                                                 // prefetchable memory base
 905                                                 temp_register = base & 0xFFFFFFF0;
 906                                                 temp_register = (~temp_register) + 1;
 907
 908                                                 p_mem_node = kmalloc(sizeof(*p_mem_node),
 909                                                                 GFP_KERNEL);
 910                                                 if (!p_mem_node)
 911                                                         return -ENOMEM;
 912
 913                                                 p_mem_node->base = save_base & (~0x0FL);
 914                                                 p_mem_node->length = temp_register;
 915
 916                                                 p_mem_node->next = func->p_mem_head;
 917                                                 func->p_mem_head = p_mem_node;
 918                                         } else
 919                                                 if (((base & 0x0BL) == 0x00)
 920                                                     && (save_command & 0x02)) {
 921                                                 // prefetchable memory base
 922                                                 temp_register = base & 0xFFFFFFF0;
 923                                                 temp_register = (~temp_register) + 1;
 924
 925                                                 mem_node = kmalloc(sizeof(*mem_node),
 926                                                                 GFP_KERNEL);
 927                                                 if (!mem_node)
 928                                                         return -ENOMEM;
 929
 930                                                 mem_node->base = save_base & (~0x0FL);
 931                                                 mem_node->length = temp_register;
 932
 933                                                 mem_node->next = func->mem_head;
 934                                                 func->mem_head = mem_node;
 935                                         } else
 936                                                 return(1);
 937                                 }
 938                         }       // End of base register loop
 939                 } else {          // Some other unknown header type
 940                 }
 941
 942                 // find the next device in this slot
 943                 func = cpqhp_slot_find(func->bus, func->device, index++);
 944         }
 945
 946         return(0);
 947 }
 948
 949
 950 /*
 951  * cpqhp_configure_board
 952  *
 953  * Copies saved configuration information to one slot.
 954  * this is called recursively for bridge devices.
 955  * this is for hot plug REPLACE!
 956  *
 957  * returns 0 if success
 958  */
 959 int cpqhp_configure_board(struct controller *ctrl, struct pci_func * func)
 960 {
 961         int cloop;
 962         u8 header_type;
 963         u8 secondary_bus;
 964         int sub_bus;
 965         struct pci_func *next;
 966         u32 temp;
 967         u32 rc;
 968         int index = 0;
 969         struct pci_bus *pci_bus = ctrl->pci_bus;
 970         unsigned int devfn;
 971
 972         func = cpqhp_slot_find(func->bus, func->device, index++);
 973
 974         while (func != NULL) {
 975                 pci_bus->number = func->bus;
 976                 devfn = PCI_DEVFN(func->device, func->function);
 977
 978                 // Start at the top of config space so that the control
 979                 // registers are programmed last
 980                 for (cloop = 0x3C; cloop > 0; cloop -= 4) {
 981                         pci_bus_write_config_dword (pci_bus, devfn, cloop, func->config_space[cloop >> 2]);
 982                 }
 983
 984                 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
 985
 986                 // If this is a bridge device, restore subordinate devices
 987                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {     // PCI-PCI Bridge
 988                         pci_bus_read_config_byte (pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
 989
 990                         sub_bus = (int) secondary_bus;
 991
 992                         next = cpqhp_slot_list[sub_bus];
 993
 994                         while (next != NULL) {
 995                                 rc = cpqhp_configure_board(ctrl, next);
 996                                 if (rc)
 997                                         return rc;
 998
 999                                 next = next->next;
1000                         }
1001                 } else {
1002
1003                         // Check all the base Address Registers to make sure
1004                         // they are the same.  If not, the board is different.
1005
1006                         for (cloop = 16; cloop < 40; cloop += 4) {
1007                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &temp);
1008
1009                                 if (temp != func->config_space[cloop >> 2]) {
1010                                         dbg("Config space compare failure!!! offset = %x\n", cloop);
1011                                         dbg("bus = %x, device = %x, function = %x\n", func->bus, func->device, func->function);
1012                                         dbg("temp = %x, config space = %x\n\n", temp, func->config_space[cloop >> 2]);
1013                                         return 1;
1014                                 }
1015                         }
1016                 }
1017
1018                 func->configured = 1;
1019
1020                 func = cpqhp_slot_find(func->bus, func->device, index++);
1021         }
1022
1023         return 0;
1024 }
1025
1026
1027 /*
1028  * cpqhp_valid_replace
1029  *
1030  * this function checks to see if a board is the same as the
1031  * one it is replacing.  this check will detect if the device's
1032  * vendor or device id's are the same
1033  *
1034  * returns 0 if the board is the same nonzero otherwise
1035  */
1036 int cpqhp_valid_replace(struct controller *ctrl, struct pci_func * func)
1037 {
1038         u8 cloop;
1039         u8 header_type;
1040         u8 secondary_bus;
1041         u8 type;
1042         u32 temp_register = 0;
1043         u32 base;
1044         u32 rc;
1045         struct pci_func *next;
1046         int index = 0;
1047         struct pci_bus *pci_bus = ctrl->pci_bus;
1048         unsigned int devfn;
1049
1050         if (!func->is_a_board)
1051                 return(ADD_NOT_SUPPORTED);
1052
1053         func = cpqhp_slot_find(func->bus, func->device, index++);
1054
1055         while (func != NULL) {
1056                 pci_bus->number = func->bus;
1057                 devfn = PCI_DEVFN(func->device, func->function);
1058
1059                 pci_bus_read_config_dword (pci_bus, devfn, PCI_VENDOR_ID, &temp_register);
1060
1061                 // No adapter present
1062                 if (temp_register == 0xFFFFFFFF)
1063                         return(NO_ADAPTER_PRESENT);
1064
1065                 if (temp_register != func->config_space[0])
1066                         return(ADAPTER_NOT_SAME);
1067
1068                 // Check for same revision number and class code
1069                 pci_bus_read_config_dword (pci_bus, devfn, PCI_CLASS_REVISION, &temp_register);
1070
1071                 // Adapter not the same
1072                 if (temp_register != func->config_space[0x08 >> 2])
1073                         return(ADAPTER_NOT_SAME);
1074
1075                 // Check for Bridge
1076                 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
1077
1078                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {     // PCI-PCI Bridge
1079                         // In order to continue checking, we must program the
1080                         // bus registers in the bridge to respond to accesses
1081                         // for it's subordinate bus(es)
1082
1083                         temp_register = func->config_space[0x18 >> 2];
1084                         pci_bus_write_config_dword (pci_bus, devfn, PCI_PRIMARY_BUS, temp_register);
1085
1086                         secondary_bus = (temp_register >> 8) & 0xFF;
1087
1088                         next = cpqhp_slot_list[secondary_bus];
1089
1090                         while (next != NULL) {
1091                                 rc = cpqhp_valid_replace(ctrl, next);
1092                                 if (rc)
1093                                         return rc;
1094
1095                                 next = next->next;
1096                         }
1097
1098                 }
1099                 // Check to see if it is a standard config header
1100                 else if ((header_type & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
1101                         // Check subsystem vendor and ID
1102                         pci_bus_read_config_dword (pci_bus, devfn, PCI_SUBSYSTEM_VENDOR_ID, &temp_register);
1103
1104                         if (temp_register != func->config_space[0x2C >> 2]) {
1105                                 // If it's a SMART-2 and the register isn't filled
1106                                 // in, ignore the difference because
1107                                 // they just have an old rev of the firmware
1108
1109                                 if (!((func->config_space[0] == 0xAE100E11)
1110                                       && (temp_register == 0x00L)))
1111                                         return(ADAPTER_NOT_SAME);
1112                         }
1113                         // Figure out IO and memory base lengths
1114                         for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
1115                                 temp_register = 0xFFFFFFFF;
1116                                 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
1117                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base);
1118                                 if (base) {       // If this register is implemented
1119                                         if (base & 0x01L) {
1120                                                 // IO base
1121                                                 // set base = amount of IO space requested
1122                                                 base = base & 0xFFFFFFFE;
1123                                                 base = (~base) + 1;
1124
1125                                                 type = 1;
1126                                         } else {
1127                                                 // memory base
1128                                                 base = base & 0xFFFFFFF0;
1129                                                 base = (~base) + 1;
1130
1131                                                 type = 0;
1132                                         }
1133                                 } else {
1134                                         base = 0x0L;
1135                                         type = 0;
1136                                 }
1137
1138                                 // Check information in slot structure
1139                                 if (func->base_length[(cloop - 0x10) >> 2] != base)
1140                                         return(ADAPTER_NOT_SAME);
1141
1142                                 if (func->base_type[(cloop - 0x10) >> 2] != type)
1143                                         return(ADAPTER_NOT_SAME);
1144
1145                         }       // End of base register loop
1146
1147                 }               // End of (type 0 config space) else
1148                 else {
1149                         // this is not a type 0 or 1 config space header so
1150                         // we don't know how to do it
1151                         return(DEVICE_TYPE_NOT_SUPPORTED);
1152                 }
1153
1154                 // Get the next function
1155                 func = cpqhp_slot_find(func->bus, func->device, index++);
1156         }
1157
1158
1159         return 0;
1160 }
1161
1162
1163 /*
1164  * cpqhp_find_available_resources
1165  *
1166  * Finds available memory, IO, and IRQ resources for programming
1167  * devices which may be added to the system
1168  * this function is for hot plug ADD!
1169  *
1170  * returns 0 if success
1171  */
1172 int cpqhp_find_available_resources(struct controller *ctrl, void __iomem *rom_start)
1173 {
1174         u8 temp;
1175         u8 populated_slot;
1176         u8 bridged_slot;
1177         void __iomem *one_slot;
1178         void __iomem *rom_resource_table;
1179         struct pci_func *func = NULL;
1180         int i = 10, index;
1181         u32 temp_dword, rc;
1182         struct pci_resource *mem_node;
1183         struct pci_resource *p_mem_node;
1184         struct pci_resource *io_node;
1185         struct pci_resource *bus_node;
1186
1187         rom_resource_table = detect_HRT_floating_pointer(rom_start, rom_start+0xffff);
1188         dbg("rom_resource_table = %p\n", rom_resource_table);
1189
1190         if (rom_resource_table == NULL) {
1191                 return -ENODEV;
1192         }
1193         // Sum all resources and setup resource maps
1194         unused_IRQ = readl(rom_resource_table + UNUSED_IRQ);
1195         dbg("unused_IRQ = %x\n", unused_IRQ);
1196
1197         temp = 0;
1198         while (unused_IRQ) {
1199                 if (unused_IRQ & 1) {
1200                         cpqhp_disk_irq = temp;
1201                         break;
1202                 }
1203                 unused_IRQ = unused_IRQ >> 1;
1204                 temp++;
1205         }
1206
1207         dbg("cpqhp_disk_irq= %d\n", cpqhp_disk_irq);
1208         unused_IRQ = unused_IRQ >> 1;
1209         temp++;
1210
1211         while (unused_IRQ) {
1212                 if (unused_IRQ & 1) {
1213                         cpqhp_nic_irq = temp;
1214                         break;
1215                 }
1216                 unused_IRQ = unused_IRQ >> 1;
1217                 temp++;
1218         }
1219
1220         dbg("cpqhp_nic_irq= %d\n", cpqhp_nic_irq);
1221         unused_IRQ = readl(rom_resource_table + PCIIRQ);
1222
1223         temp = 0;
1224
1225         if (!cpqhp_nic_irq) {
1226                 cpqhp_nic_irq = ctrl->cfgspc_irq;
1227         }
1228
1229         if (!cpqhp_disk_irq) {
1230                 cpqhp_disk_irq = ctrl->cfgspc_irq;
1231         }
1232
1233         dbg("cpqhp_disk_irq, cpqhp_nic_irq= %d, %d\n", cpqhp_disk_irq, cpqhp_nic_irq);
1234
1235         rc = compaq_nvram_load(rom_start, ctrl);
1236         if (rc)
1237                 return rc;
1238
1239         one_slot = rom_resource_table + sizeof (struct hrt);
1240
1241         i = readb(rom_resource_table + NUMBER_OF_ENTRIES);
1242         dbg("number_of_entries = %d\n", i);
1243
1244         if (!readb(one_slot + SECONDARY_BUS))
1245                 return 1;
1246
1247         dbg("dev|IO base|length|Mem base|length|Pre base|length|PB SB MB\n");
1248
1249         while (i && readb(one_slot + SECONDARY_BUS)) {
1250                 u8 dev_func = readb(one_slot + DEV_FUNC);
1251                 u8 primary_bus = readb(one_slot + PRIMARY_BUS);
1252                 u8 secondary_bus = readb(one_slot + SECONDARY_BUS);
1253                 u8 max_bus = readb(one_slot + MAX_BUS);
1254                 u16 io_base = readw(one_slot + IO_BASE);
1255                 u16 io_length = readw(one_slot + IO_LENGTH);
1256                 u16 mem_base = readw(one_slot + MEM_BASE);
1257                 u16 mem_length = readw(one_slot + MEM_LENGTH);
1258                 u16 pre_mem_base = readw(one_slot + PRE_MEM_BASE);
1259                 u16 pre_mem_length = readw(one_slot + PRE_MEM_LENGTH);
1260
1261                 dbg("%2.2x | %4.4x  | %4.4x | %4.4x   | %4.4x | %4.4x   | %4.4x |%2.2x %2.2x %2.2x\n",
1262                     dev_func, io_base, io_length, mem_base, mem_length, pre_mem_base, pre_mem_length,
1263                     primary_bus, secondary_bus, max_bus);
1264
1265                 // If this entry isn't for our controller's bus, ignore it
1266                 if (primary_bus != ctrl->bus) {
1267                         i--;
1268                         one_slot += sizeof (struct slot_rt);
1269                         continue;
1270                 }
1271                 // find out if this entry is for an occupied slot
1272                 ctrl->pci_bus->number = primary_bus;
1273                 pci_bus_read_config_dword (ctrl->pci_bus, dev_func, PCI_VENDOR_ID, &temp_dword);
1274                 dbg("temp_D_word = %x\n", temp_dword);
1275
1276                 if (temp_dword != 0xFFFFFFFF) {
1277                         index = 0;
1278                         func = cpqhp_slot_find(primary_bus, dev_func >> 3, 0);
1279
1280                         while (func && (func->function != (dev_func & 0x07))) {
1281                                 dbg("func = %p (bus, dev, fun) = (%d, %d, %d)\n", func, primary_bus, dev_func >> 3, index);
1282                                 func = cpqhp_slot_find(primary_bus, dev_func >> 3, index++);
1283                         }
1284
1285                         // If we can't find a match, skip this table entry
1286                         if (!func) {
1287                                 i--;
1288                                 one_slot += sizeof (struct slot_rt);
1289                                 continue;
1290                         }
1291                         // this may not work and shouldn't be used
1292                         if (secondary_bus != primary_bus)
1293                                 bridged_slot = 1;
1294                         else
1295                                 bridged_slot = 0;
1296
1297                         populated_slot = 1;
1298                 } else {
1299                         populated_slot = 0;
1300                         bridged_slot = 0;
1301                 }
1302
1303
1304                 // If we've got a valid IO base, use it
1305
1306                 temp_dword = io_base + io_length;
1307
1308                 if ((io_base) && (temp_dword < 0x10000)) {
1309                         io_node = kmalloc(sizeof(*io_node), GFP_KERNEL);
1310                         if (!io_node)
1311                                 return -ENOMEM;
1312
1313                         io_node->base = io_base;
1314                         io_node->length = io_length;
1315
1316                         dbg("found io_node(base, length) = %x, %x\n",
1317                                         io_node->base, io_node->length);
1318                         dbg("populated slot =%d \n", populated_slot);
1319                         if (!populated_slot) {
1320                                 io_node->next = ctrl->io_head;
1321                                 ctrl->io_head = io_node;
1322                         } else {
1323                                 io_node->next = func->io_head;
1324                                 func->io_head = io_node;
1325                         }
1326                 }
1327
1328                 // If we've got a valid memory base, use it
1329                 temp_dword = mem_base + mem_length;
1330                 if ((mem_base) && (temp_dword < 0x10000)) {
1331                         mem_node = kmalloc(sizeof(*mem_node), GFP_KERNEL);
1332                         if (!mem_node)
1333                                 return -ENOMEM;
1334
1335                         mem_node->base = mem_base << 16;
1336
1337                         mem_node->length = mem_length << 16;
1338
1339                         dbg("found mem_node(base, length) = %x, %x\n",
1340                                         mem_node->base, mem_node->length);
1341                         dbg("populated slot =%d \n", populated_slot);
1342                         if (!populated_slot) {
1343                                 mem_node->next = ctrl->mem_head;
1344                                 ctrl->mem_head = mem_node;
1345                         } else {
1346                                 mem_node->next = func->mem_head;
1347                                 func->mem_head = mem_node;
1348                         }
1349                 }
1350
1351                 // If we've got a valid prefetchable memory base, and
1352                 // the base + length isn't greater than 0xFFFF
1353                 temp_dword = pre_mem_base + pre_mem_length;
1354                 if ((pre_mem_base) && (temp_dword < 0x10000)) {
1355                         p_mem_node = kmalloc(sizeof(*p_mem_node), GFP_KERNEL);
1356                         if (!p_mem_node)
1357                                 return -ENOMEM;
1358
1359                         p_mem_node->base = pre_mem_base << 16;
1360
1361                         p_mem_node->length = pre_mem_length << 16;
1362                         dbg("found p_mem_node(base, length) = %x, %x\n",
1363                                         p_mem_node->base, p_mem_node->length);
1364                         dbg("populated slot =%d \n", populated_slot);
1365
1366                         if (!populated_slot) {
1367                                 p_mem_node->next = ctrl->p_mem_head;
1368                                 ctrl->p_mem_head = p_mem_node;
1369                         } else {
1370                                 p_mem_node->next = func->p_mem_head;
1371                                 func->p_mem_head = p_mem_node;
1372                         }
1373                 }
1374
1375                 // If we've got a valid bus number, use it
1376                 // The second condition is to ignore bus numbers on
1377                 // populated slots that don't have PCI-PCI bridges
1378                 if (secondary_bus && (secondary_bus != primary_bus)) {
1379                         bus_node = kmalloc(sizeof(*bus_node), GFP_KERNEL);
1380                         if (!bus_node)
1381                                 return -ENOMEM;
1382
1383                         bus_node->base = secondary_bus;
1384                         bus_node->length = max_bus - secondary_bus + 1;
1385                         dbg("found bus_node(base, length) = %x, %x\n",
1386                                         bus_node->base, bus_node->length);
1387                         dbg("populated slot =%d \n", populated_slot);
1388                         if (!populated_slot) {
1389                                 bus_node->next = ctrl->bus_head;
1390                                 ctrl->bus_head = bus_node;
1391                         } else {
1392                                 bus_node->next = func->bus_head;
1393                                 func->bus_head = bus_node;
1394                         }
1395                 }
1396
1397                 i--;
1398                 one_slot += sizeof (struct slot_rt);
1399         }
1400
1401         // If all of the following fail, we don't have any resources for
1402         // hot plug add
1403         rc = 1;
1404         rc &= cpqhp_resource_sort_and_combine(&(ctrl->mem_head));
1405         rc &= cpqhp_resource_sort_and_combine(&(ctrl->p_mem_head));
1406         rc &= cpqhp_resource_sort_and_combine(&(ctrl->io_head));
1407         rc &= cpqhp_resource_sort_and_combine(&(ctrl->bus_head));
1408
1409         return rc;
1410 }
1411
1412
1413 /*
1414  * cpqhp_return_board_resources
1415  *
1416  * this routine returns all resources allocated to a board to
1417  * the available pool.
1418  *
1419  * returns 0 if success
1420  */
1421 int cpqhp_return_board_resources(struct pci_func * func, struct resource_lists * resources)
1422 {
1423         int rc = 0;
1424         struct pci_resource *node;
1425         struct pci_resource *t_node;
1426         dbg("%s\n", __FUNCTION__);
1427
1428         if (!func)
1429                 return 1;
1430
1431         node = func->io_head;
1432         func->io_head = NULL;
1433         while (node) {
1434                 t_node = node->next;
1435                 return_resource(&(resources->io_head), node);
1436                 node = t_node;
1437         }
1438
1439         node = func->mem_head;
1440         func->mem_head = NULL;
1441         while (node) {
1442                 t_node = node->next;
1443                 return_resource(&(resources->mem_head), node);
1444                 node = t_node;
1445         }
1446
1447         node = func->p_mem_head;
1448         func->p_mem_head = NULL;
1449         while (node) {
1450                 t_node = node->next;
1451                 return_resource(&(resources->p_mem_head), node);
1452                 node = t_node;
1453         }
1454
1455         node = func->bus_head;
1456         func->bus_head = NULL;
1457         while (node) {
1458                 t_node = node->next;
1459                 return_resource(&(resources->bus_head), node);
1460                 node = t_node;
1461         }
1462
1463         rc |= cpqhp_resource_sort_and_combine(&(resources->mem_head));
1464         rc |= cpqhp_resource_sort_and_combine(&(resources->p_mem_head));
1465         rc |= cpqhp_resource_sort_and_combine(&(resources->io_head));
1466         rc |= cpqhp_resource_sort_and_combine(&(resources->bus_head));
1467
1468         return rc;
1469 }
1470
1471
1472 /*
1473  * cpqhp_destroy_resource_list
1474  *
1475  * Puts node back in the resource list pointed to by head
1476  */
1477 void cpqhp_destroy_resource_list (struct resource_lists * resources)
1478 {
1479         struct pci_resource *res, *tres;
1480
1481         res = resources->io_head;
1482         resources->io_head = NULL;
1483
1484         while (res) {
1485                 tres = res;
1486                 res = res->next;
1487                 kfree(tres);
1488         }
1489
1490         res = resources->mem_head;
1491         resources->mem_head = NULL;
1492
1493         while (res) {
1494                 tres = res;
1495                 res = res->next;
1496                 kfree(tres);
1497         }
1498
1499         res = resources->p_mem_head;
1500         resources->p_mem_head = NULL;
1501
1502         while (res) {
1503                 tres = res;
1504                 res = res->next;
1505                 kfree(tres);
1506         }
1507
1508         res = resources->bus_head;
1509         resources->bus_head = NULL;
1510
1511         while (res) {
1512                 tres = res;
1513                 res = res->next;
1514                 kfree(tres);
1515         }
1516 }
1517
1518
1519 /*
1520  * cpqhp_destroy_board_resources
1521  *
1522  * Puts node back in the resource list pointed to by head
1523  */
1524 void cpqhp_destroy_board_resources (struct pci_func * func)
1525 {
1526         struct pci_resource *res, *tres;
1527
1528         res = func->io_head;
1529         func->io_head = NULL;
1530
1531         while (res) {
1532                 tres = res;
1533                 res = res->next;
1534                 kfree(tres);
1535         }
1536
1537         res = func->mem_head;
1538         func->mem_head = NULL;
1539
1540         while (res) {
1541                 tres = res;
1542                 res = res->next;
1543                 kfree(tres);
1544         }
1545
1546         res = func->p_mem_head;
1547         func->p_mem_head = NULL;
1548
1549         while (res) {
1550                 tres = res;
1551                 res = res->next;
1552                 kfree(tres);
1553         }
1554
1555         res = func->bus_head;
1556         func->bus_head = NULL;
1557
1558         while (res) {
1559                 tres = res;
1560                 res = res->next;
1561                 kfree(tres);
1562         }
1563 }
1564