2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/acpi.h>
38 #include <linux/dmi.h>
39 #include <linux/moduleparam.h>
40 #include <linux/sched.h> /* need_resched() */
43 #include <asm/uaccess.h>
45 #include <acpi/acpi_bus.h>
46 #include <acpi/processor.h>
48 #define ACPI_PROCESSOR_COMPONENT 0x01000000
49 #define ACPI_PROCESSOR_CLASS "processor"
50 #define ACPI_PROCESSOR_DRIVER_NAME "ACPI Processor Driver"
51 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
52 ACPI_MODULE_NAME("acpi_processor")
53 #define ACPI_PROCESSOR_FILE_POWER "power"
54 #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
55 #define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */
56 #define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */
57 static void (*pm_idle_save) (void) __read_mostly;
58 module_param(max_cstate, uint, 0644);
60 static unsigned int nocst __read_mostly;
61 module_param(nocst, uint, 0000);
64 * bm_history -- bit-mask with a bit per jiffy of bus-master activity
65 * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms
66 * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms
67 * 100 HZ: 0x0000000F: 4 jiffies = 40ms
68 * reduce history for more aggressive entry into C3
70 static unsigned int bm_history __read_mostly =
71 (HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1));
72 module_param(bm_history, uint, 0644);
73 /* --------------------------------------------------------------------------
75 -------------------------------------------------------------------------- */
78 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
79 * For now disable this. Probably a bug somewhere else.
81 * To skip this limit, boot/load with a large max_cstate limit.
83 static int set_max_cstate(struct dmi_system_id *id)
85 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
88 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
89 " Override with \"processor.max_cstate=%d\"\n", id->ident,
90 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
92 max_cstate = (long)id->driver_data;
97 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
98 callers to only run once -AK */
99 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
100 { set_max_cstate, "IBM ThinkPad R40e", {
101 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
102 DMI_MATCH(DMI_BIOS_VERSION,"1SET70WW")}, (void *)1},
103 { set_max_cstate, "IBM ThinkPad R40e", {
104 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
105 DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1},
106 { set_max_cstate, "IBM ThinkPad R40e", {
107 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
108 DMI_MATCH(DMI_BIOS_VERSION,"1SET43WW") }, (void*)1},
109 { set_max_cstate, "IBM ThinkPad R40e", {
110 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
111 DMI_MATCH(DMI_BIOS_VERSION,"1SET45WW") }, (void*)1},
112 { set_max_cstate, "IBM ThinkPad R40e", {
113 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
114 DMI_MATCH(DMI_BIOS_VERSION,"1SET47WW") }, (void*)1},
115 { set_max_cstate, "IBM ThinkPad R40e", {
116 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
117 DMI_MATCH(DMI_BIOS_VERSION,"1SET50WW") }, (void*)1},
118 { set_max_cstate, "IBM ThinkPad R40e", {
119 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
120 DMI_MATCH(DMI_BIOS_VERSION,"1SET52WW") }, (void*)1},
121 { set_max_cstate, "IBM ThinkPad R40e", {
122 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
123 DMI_MATCH(DMI_BIOS_VERSION,"1SET55WW") }, (void*)1},
124 { set_max_cstate, "IBM ThinkPad R40e", {
125 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
126 DMI_MATCH(DMI_BIOS_VERSION,"1SET56WW") }, (void*)1},
127 { set_max_cstate, "IBM ThinkPad R40e", {
128 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
129 DMI_MATCH(DMI_BIOS_VERSION,"1SET59WW") }, (void*)1},
130 { set_max_cstate, "IBM ThinkPad R40e", {
131 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
132 DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }, (void*)1},
133 { set_max_cstate, "IBM ThinkPad R40e", {
134 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
135 DMI_MATCH(DMI_BIOS_VERSION,"1SET61WW") }, (void*)1},
136 { set_max_cstate, "IBM ThinkPad R40e", {
137 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
138 DMI_MATCH(DMI_BIOS_VERSION,"1SET62WW") }, (void*)1},
139 { set_max_cstate, "IBM ThinkPad R40e", {
140 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
141 DMI_MATCH(DMI_BIOS_VERSION,"1SET64WW") }, (void*)1},
142 { set_max_cstate, "IBM ThinkPad R40e", {
143 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
144 DMI_MATCH(DMI_BIOS_VERSION,"1SET65WW") }, (void*)1},
145 { set_max_cstate, "IBM ThinkPad R40e", {
146 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
147 DMI_MATCH(DMI_BIOS_VERSION,"1SET68WW") }, (void*)1},
148 { set_max_cstate, "Medion 41700", {
149 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
150 DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1},
151 { set_max_cstate, "Clevo 5600D", {
152 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
153 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
158 static inline u32 ticks_elapsed(u32 t1, u32 t2)
162 else if (!acpi_fadt.tmr_val_ext)
163 return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
165 return ((0xFFFFFFFF - t1) + t2);
169 acpi_processor_power_activate(struct acpi_processor *pr,
170 struct acpi_processor_cx *new)
172 struct acpi_processor_cx *old;
177 old = pr->power.state;
180 old->promotion.count = 0;
181 new->demotion.count = 0;
183 /* Cleanup from old state. */
187 /* Disable bus master reload */
188 if (new->type != ACPI_STATE_C3 && pr->flags.bm_check)
189 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0,
190 ACPI_MTX_DO_NOT_LOCK);
195 /* Prepare to use new state. */
198 /* Enable bus master reload */
199 if (old->type != ACPI_STATE_C3 && pr->flags.bm_check)
200 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1,
201 ACPI_MTX_DO_NOT_LOCK);
205 pr->power.state = new;
210 static void acpi_safe_halt(void)
212 current_thread_info()->status &= ~TS_POLLING;
213 smp_mb__after_clear_bit();
216 current_thread_info()->status |= TS_POLLING;
219 static atomic_t c3_cpu_count;
221 static void acpi_processor_idle(void)
223 struct acpi_processor *pr = NULL;
224 struct acpi_processor_cx *cx = NULL;
225 struct acpi_processor_cx *next_state = NULL;
229 pr = processors[smp_processor_id()];
234 * Interrupts must be disabled during bus mastering calculations and
235 * for C2/C3 transitions.
240 * Check whether we truly need to go idle, or should
243 if (unlikely(need_resched())) {
248 cx = pr->power.state;
260 * Check for bus mastering activity (if required), record, and check
263 if (pr->flags.bm_check) {
265 unsigned long diff = jiffies - pr->power.bm_check_timestamp;
270 pr->power.bm_activity <<= diff;
272 acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS,
273 &bm_status, ACPI_MTX_DO_NOT_LOCK);
275 pr->power.bm_activity |= 0x1;
276 acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS,
277 1, ACPI_MTX_DO_NOT_LOCK);
280 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
281 * the true state of bus mastering activity; forcing us to
282 * manually check the BMIDEA bit of each IDE channel.
284 else if (errata.piix4.bmisx) {
285 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
286 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
287 pr->power.bm_activity |= 0x1;
290 pr->power.bm_check_timestamp = jiffies;
293 * If bus mastering is or was active this jiffy, demote
294 * to avoid a faulty transition. Note that the processor
295 * won't enter a low-power state during this call (to this
296 * function) but should upon the next.
298 * TBD: A better policy might be to fallback to the demotion
299 * state (use it for this quantum only) istead of
300 * demoting -- and rely on duration as our sole demotion
301 * qualification. This may, however, introduce DMA
302 * issues (e.g. floppy DMA transfer overrun/underrun).
304 if ((pr->power.bm_activity & 0x1) &&
305 cx->demotion.threshold.bm) {
307 next_state = cx->demotion.state;
312 #ifdef CONFIG_HOTPLUG_CPU
314 * Check for P_LVL2_UP flag before entering C2 and above on
315 * an SMP system. We do it here instead of doing it at _CST/P_LVL
316 * detection phase, to work cleanly with logical CPU hotplug.
318 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
319 !pr->flags.has_cst && !acpi_fadt.plvl2_up)
320 cx = &pr->power.states[ACPI_STATE_C1];
326 * Invoke the current Cx state to put the processor to sleep.
328 if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) {
329 current_thread_info()->status &= ~TS_POLLING;
330 smp_mb__after_clear_bit();
331 if (need_resched()) {
332 current_thread_info()->status |= TS_POLLING;
343 * Use the appropriate idle routine, the one that would
344 * be used without acpi C-states.
352 * TBD: Can't get time duration while in C1, as resumes
353 * go to an ISR rather than here. Need to instrument
354 * base interrupt handler.
356 sleep_ticks = 0xFFFFFFFF;
360 /* Get start time (ticks) */
361 t1 = inl(acpi_fadt.xpm_tmr_blk.address);
364 /* Dummy wait op - must do something useless after P_LVL2 read
365 because chipsets cannot guarantee that STPCLK# signal
366 gets asserted in time to freeze execution properly. */
367 t2 = inl(acpi_fadt.xpm_tmr_blk.address);
368 /* Get end time (ticks) */
369 t2 = inl(acpi_fadt.xpm_tmr_blk.address);
371 #ifdef CONFIG_GENERIC_TIME
372 /* TSC halts in C2, so notify users */
375 /* Re-enable interrupts */
377 current_thread_info()->status |= TS_POLLING;
378 /* Compute time (ticks) that we were actually asleep */
380 ticks_elapsed(t1, t2) - cx->latency_ticks - C2_OVERHEAD;
385 if (pr->flags.bm_check) {
386 if (atomic_inc_return(&c3_cpu_count) ==
389 * All CPUs are trying to go to C3
390 * Disable bus master arbitration
392 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1,
393 ACPI_MTX_DO_NOT_LOCK);
396 /* SMP with no shared cache... Invalidate cache */
397 ACPI_FLUSH_CPU_CACHE();
400 /* Get start time (ticks) */
401 t1 = inl(acpi_fadt.xpm_tmr_blk.address);
404 /* Dummy wait op (see above) */
405 t2 = inl(acpi_fadt.xpm_tmr_blk.address);
406 /* Get end time (ticks) */
407 t2 = inl(acpi_fadt.xpm_tmr_blk.address);
408 if (pr->flags.bm_check) {
409 /* Enable bus master arbitration */
410 atomic_dec(&c3_cpu_count);
411 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0,
412 ACPI_MTX_DO_NOT_LOCK);
415 #ifdef CONFIG_GENERIC_TIME
416 /* TSC halts in C3, so notify users */
419 /* Re-enable interrupts */
421 current_thread_info()->status |= TS_POLLING;
422 /* Compute time (ticks) that we were actually asleep */
424 ticks_elapsed(t1, t2) - cx->latency_ticks - C3_OVERHEAD;
432 if ((cx->type != ACPI_STATE_C1) && (sleep_ticks > 0))
433 cx->time += sleep_ticks;
435 next_state = pr->power.state;
437 #ifdef CONFIG_HOTPLUG_CPU
438 /* Don't do promotion/demotion */
439 if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) &&
440 !pr->flags.has_cst && !acpi_fadt.plvl2_up) {
449 * Track the number of longs (time asleep is greater than threshold)
450 * and promote when the count threshold is reached. Note that bus
451 * mastering activity may prevent promotions.
452 * Do not promote above max_cstate.
454 if (cx->promotion.state &&
455 ((cx->promotion.state - pr->power.states) <= max_cstate)) {
456 if (sleep_ticks > cx->promotion.threshold.ticks) {
457 cx->promotion.count++;
458 cx->demotion.count = 0;
459 if (cx->promotion.count >=
460 cx->promotion.threshold.count) {
461 if (pr->flags.bm_check) {
463 (pr->power.bm_activity & cx->
464 promotion.threshold.bm)) {
470 next_state = cx->promotion.state;
480 * Track the number of shorts (time asleep is less than time threshold)
481 * and demote when the usage threshold is reached.
483 if (cx->demotion.state) {
484 if (sleep_ticks < cx->demotion.threshold.ticks) {
485 cx->demotion.count++;
486 cx->promotion.count = 0;
487 if (cx->demotion.count >= cx->demotion.threshold.count) {
488 next_state = cx->demotion.state;
496 * Demote if current state exceeds max_cstate
498 if ((pr->power.state - pr->power.states) > max_cstate) {
499 if (cx->demotion.state)
500 next_state = cx->demotion.state;
506 * If we're going to start using a new Cx state we must clean up
507 * from the previous and prepare to use the new.
509 if (next_state != pr->power.state)
510 acpi_processor_power_activate(pr, next_state);
513 static int acpi_processor_set_power_policy(struct acpi_processor *pr)
516 unsigned int state_is_set = 0;
517 struct acpi_processor_cx *lower = NULL;
518 struct acpi_processor_cx *higher = NULL;
519 struct acpi_processor_cx *cx;
526 * This function sets the default Cx state policy (OS idle handler).
527 * Our scheme is to promote quickly to C2 but more conservatively
528 * to C3. We're favoring C2 for its characteristics of low latency
529 * (quick response), good power savings, and ability to allow bus
530 * mastering activity. Note that the Cx state policy is completely
531 * customizable and can be altered dynamically.
535 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
536 cx = &pr->power.states[i];
541 pr->power.state = cx;
550 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
551 cx = &pr->power.states[i];
556 cx->demotion.state = lower;
557 cx->demotion.threshold.ticks = cx->latency_ticks;
558 cx->demotion.threshold.count = 1;
559 if (cx->type == ACPI_STATE_C3)
560 cx->demotion.threshold.bm = bm_history;
567 for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) {
568 cx = &pr->power.states[i];
573 cx->promotion.state = higher;
574 cx->promotion.threshold.ticks = cx->latency_ticks;
575 if (cx->type >= ACPI_STATE_C2)
576 cx->promotion.threshold.count = 4;
578 cx->promotion.threshold.count = 10;
579 if (higher->type == ACPI_STATE_C3)
580 cx->promotion.threshold.bm = bm_history;
589 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
598 /* if info is obtained from pblk/fadt, type equals state */
599 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
600 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
602 #ifndef CONFIG_HOTPLUG_CPU
604 * Check for P_LVL2_UP flag before entering C2 and above on
607 if ((num_online_cpus() > 1) && !acpi_fadt.plvl2_up)
611 /* determine C2 and C3 address from pblk */
612 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
613 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
615 /* determine latencies from FADT */
616 pr->power.states[ACPI_STATE_C2].latency = acpi_fadt.plvl2_lat;
617 pr->power.states[ACPI_STATE_C3].latency = acpi_fadt.plvl3_lat;
619 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
620 "lvl2[0x%08x] lvl3[0x%08x]\n",
621 pr->power.states[ACPI_STATE_C2].address,
622 pr->power.states[ACPI_STATE_C3].address));
627 static int acpi_processor_get_power_info_default_c1(struct acpi_processor *pr)
630 /* Zero initialize all the C-states info. */
631 memset(pr->power.states, 0, sizeof(pr->power.states));
633 /* set the first C-State to C1 */
634 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
636 /* the C0 state only exists as a filler in our array,
637 * and all processors need to support C1 */
638 pr->power.states[ACPI_STATE_C0].valid = 1;
639 pr->power.states[ACPI_STATE_C1].valid = 1;
644 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
646 acpi_status status = 0;
650 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
651 union acpi_object *cst;
659 /* Zero initialize C2 onwards and prepare for fresh CST lookup */
660 for (i = 2; i < ACPI_PROCESSOR_MAX_POWER; i++)
661 memset(&(pr->power.states[i]), 0,
662 sizeof(struct acpi_processor_cx));
664 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
665 if (ACPI_FAILURE(status)) {
666 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
670 cst = (union acpi_object *)buffer.pointer;
672 /* There must be at least 2 elements */
673 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
674 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
679 count = cst->package.elements[0].integer.value;
681 /* Validate number of power states. */
682 if (count < 1 || count != cst->package.count - 1) {
683 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
688 /* Tell driver that at least _CST is supported. */
689 pr->flags.has_cst = 1;
691 for (i = 1; i <= count; i++) {
692 union acpi_object *element;
693 union acpi_object *obj;
694 struct acpi_power_register *reg;
695 struct acpi_processor_cx cx;
697 memset(&cx, 0, sizeof(cx));
699 element = (union acpi_object *)&(cst->package.elements[i]);
700 if (element->type != ACPI_TYPE_PACKAGE)
703 if (element->package.count != 4)
706 obj = (union acpi_object *)&(element->package.elements[0]);
708 if (obj->type != ACPI_TYPE_BUFFER)
711 reg = (struct acpi_power_register *)obj->buffer.pointer;
713 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
714 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
717 cx.address = (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) ?
720 /* There should be an easy way to extract an integer... */
721 obj = (union acpi_object *)&(element->package.elements[1]);
722 if (obj->type != ACPI_TYPE_INTEGER)
725 cx.type = obj->integer.value;
727 if ((cx.type != ACPI_STATE_C1) &&
728 (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO))
731 if ((cx.type < ACPI_STATE_C2) || (cx.type > ACPI_STATE_C3))
734 obj = (union acpi_object *)&(element->package.elements[2]);
735 if (obj->type != ACPI_TYPE_INTEGER)
738 cx.latency = obj->integer.value;
740 obj = (union acpi_object *)&(element->package.elements[3]);
741 if (obj->type != ACPI_TYPE_INTEGER)
744 cx.power = obj->integer.value;
747 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
750 * We support total ACPI_PROCESSOR_MAX_POWER - 1
751 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
753 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
755 "Limiting number of power states to max (%d)\n",
756 ACPI_PROCESSOR_MAX_POWER);
758 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
763 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
766 /* Validate number of power states discovered */
767 if (current_count < 2)
771 kfree(buffer.pointer);
776 static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
783 * C2 latency must be less than or equal to 100
786 else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
787 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
788 "latency too large [%d]\n", cx->latency));
793 * Otherwise we've met all of our C2 requirements.
794 * Normalize the C2 latency to expidite policy
797 cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
802 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
803 struct acpi_processor_cx *cx)
805 static int bm_check_flag;
812 * C3 latency must be less than or equal to 1000
815 else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
816 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
817 "latency too large [%d]\n", cx->latency));
822 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
823 * DMA transfers are used by any ISA device to avoid livelock.
824 * Note that we could disable Type-F DMA (as recommended by
825 * the erratum), but this is known to disrupt certain ISA
826 * devices thus we take the conservative approach.
828 else if (errata.piix4.fdma) {
829 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
830 "C3 not supported on PIIX4 with Type-F DMA\n"));
834 /* All the logic here assumes flags.bm_check is same across all CPUs */
835 if (!bm_check_flag) {
836 /* Determine whether bm_check is needed based on CPU */
837 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
838 bm_check_flag = pr->flags.bm_check;
840 pr->flags.bm_check = bm_check_flag;
843 if (pr->flags.bm_check) {
844 /* bus mastering control is necessary */
845 if (!pr->flags.bm_control) {
846 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
847 "C3 support requires bus mastering control\n"));
852 * WBINVD should be set in fadt, for C3 state to be
853 * supported on when bm_check is not required.
855 if (acpi_fadt.wb_invd != 1) {
856 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
857 "Cache invalidation should work properly"
858 " for C3 to be enabled on SMP systems\n"));
861 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD,
862 0, ACPI_MTX_DO_NOT_LOCK);
866 * Otherwise we've met all of our C3 requirements.
867 * Normalize the C3 latency to expidite policy. Enable
868 * checking of bus mastering status (bm_check) so we can
869 * use this in our C3 policy
872 cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
877 static int acpi_processor_power_verify(struct acpi_processor *pr)
880 unsigned int working = 0;
882 #ifdef ARCH_APICTIMER_STOPS_ON_C3
883 int timer_broadcast = 0;
884 cpumask_t mask = cpumask_of_cpu(pr->id);
885 on_each_cpu(switch_ipi_to_APIC_timer, &mask, 1, 1);
888 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
889 struct acpi_processor_cx *cx = &pr->power.states[i];
897 acpi_processor_power_verify_c2(cx);
898 #ifdef ARCH_APICTIMER_STOPS_ON_C3
899 /* Some AMD systems fake C3 as C2, but still
900 have timer troubles */
902 boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
908 acpi_processor_power_verify_c3(pr, cx);
909 #ifdef ARCH_APICTIMER_STOPS_ON_C3
920 #ifdef ARCH_APICTIMER_STOPS_ON_C3
922 on_each_cpu(switch_APIC_timer_to_ipi, &mask, 1, 1);
928 static int acpi_processor_get_power_info(struct acpi_processor *pr)
934 /* NOTE: the idle thread may not be running while calling
937 /* Adding C1 state */
938 acpi_processor_get_power_info_default_c1(pr);
939 result = acpi_processor_get_power_info_cst(pr);
940 if (result == -ENODEV)
941 acpi_processor_get_power_info_fadt(pr);
943 pr->power.count = acpi_processor_power_verify(pr);
948 * Now that we know which states are supported, set the default
949 * policy. Note that this policy can be changed dynamically
950 * (e.g. encourage deeper sleeps to conserve battery life when
953 result = acpi_processor_set_power_policy(pr);
958 * if one state of type C2 or C3 is available, mark this
959 * CPU as being "idle manageable"
961 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
962 if (pr->power.states[i].valid) {
964 if (pr->power.states[i].type >= ACPI_STATE_C2)
972 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
984 if (!pr->flags.power_setup_done)
987 /* Fall back to the default idle loop */
988 pm_idle = pm_idle_save;
989 synchronize_sched(); /* Relies on interrupts forcing exit from idle. */
992 result = acpi_processor_get_power_info(pr);
993 if ((pr->flags.power == 1) && (pr->flags.power_setup_done))
994 pm_idle = acpi_processor_idle;
1001 static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
1003 struct acpi_processor *pr = (struct acpi_processor *)seq->private;
1010 seq_printf(seq, "active state: C%zd\n"
1012 "bus master activity: %08x\n",
1013 pr->power.state ? pr->power.state - pr->power.states : 0,
1014 max_cstate, (unsigned)pr->power.bm_activity);
1016 seq_puts(seq, "states:\n");
1018 for (i = 1; i <= pr->power.count; i++) {
1019 seq_printf(seq, " %cC%d: ",
1020 (&pr->power.states[i] ==
1021 pr->power.state ? '*' : ' '), i);
1023 if (!pr->power.states[i].valid) {
1024 seq_puts(seq, "<not supported>\n");
1028 switch (pr->power.states[i].type) {
1030 seq_printf(seq, "type[C1] ");
1033 seq_printf(seq, "type[C2] ");
1036 seq_printf(seq, "type[C3] ");
1039 seq_printf(seq, "type[--] ");
1043 if (pr->power.states[i].promotion.state)
1044 seq_printf(seq, "promotion[C%zd] ",
1045 (pr->power.states[i].promotion.state -
1048 seq_puts(seq, "promotion[--] ");
1050 if (pr->power.states[i].demotion.state)
1051 seq_printf(seq, "demotion[C%zd] ",
1052 (pr->power.states[i].demotion.state -
1055 seq_puts(seq, "demotion[--] ");
1057 seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n",
1058 pr->power.states[i].latency,
1059 pr->power.states[i].usage,
1060 pr->power.states[i].time);
1067 static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
1069 return single_open(file, acpi_processor_power_seq_show,
1073 static struct file_operations acpi_processor_power_fops = {
1074 .open = acpi_processor_power_open_fs,
1076 .llseek = seq_lseek,
1077 .release = single_release,
1080 int acpi_processor_power_init(struct acpi_processor *pr,
1081 struct acpi_device *device)
1083 acpi_status status = 0;
1084 static int first_run;
1085 struct proc_dir_entry *entry = NULL;
1090 dmi_check_system(processor_power_dmi_table);
1091 if (max_cstate < ACPI_C_STATES_MAX)
1093 "ACPI: processor limited to max C-state %d\n",
1101 if (acpi_fadt.cst_cnt && !nocst) {
1103 acpi_os_write_port(acpi_fadt.smi_cmd, acpi_fadt.cst_cnt, 8);
1104 if (ACPI_FAILURE(status)) {
1105 ACPI_EXCEPTION((AE_INFO, status,
1106 "Notifying BIOS of _CST ability failed"));
1110 acpi_processor_get_power_info(pr);
1113 * Install the idle handler if processor power management is supported.
1114 * Note that we use previously set idle handler will be used on
1115 * platforms that only support C1.
1117 if ((pr->flags.power) && (!boot_option_idle_override)) {
1118 printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id);
1119 for (i = 1; i <= pr->power.count; i++)
1120 if (pr->power.states[i].valid)
1121 printk(" C%d[C%d]", i,
1122 pr->power.states[i].type);
1126 pm_idle_save = pm_idle;
1127 pm_idle = acpi_processor_idle;
1132 entry = create_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1133 S_IRUGO, acpi_device_dir(device));
1137 entry->proc_fops = &acpi_processor_power_fops;
1138 entry->data = acpi_driver_data(device);
1139 entry->owner = THIS_MODULE;
1142 pr->flags.power_setup_done = 1;
1147 int acpi_processor_power_exit(struct acpi_processor *pr,
1148 struct acpi_device *device)
1151 pr->flags.power_setup_done = 0;
1153 if (acpi_device_dir(device))
1154 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1155 acpi_device_dir(device));
1157 /* Unregister the idle handler when processor #0 is removed. */
1159 pm_idle = pm_idle_save;
1162 * We are about to unload the current idle thread pm callback
1163 * (pm_idle), Wait for all processors to update cached/local
1164 * copies of pm_idle before proceeding.