2 * arch/arm/mach-at91/at91rm9200_devices.c
4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5 * Copyright (C) 2005 David Brownell
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
13 #include <asm/mach/arch.h>
14 #include <asm/mach/map.h>
16 #include <linux/platform_device.h>
18 #include <asm/arch/board.h>
19 #include <asm/arch/gpio.h>
20 #include <asm/arch/at91rm9200.h>
21 #include <asm/arch/at91rm9200_mc.h>
26 /* --------------------------------------------------------------------
28 * -------------------------------------------------------------------- */
30 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
31 static u64 ohci_dmamask = 0xffffffffUL;
32 static struct at91_usbh_data usbh_data;
34 static struct resource usbh_resources[] = {
36 .start = AT91RM9200_UHP_BASE,
37 .end = AT91RM9200_UHP_BASE + SZ_1M - 1,
38 .flags = IORESOURCE_MEM,
41 .start = AT91RM9200_ID_UHP,
42 .end = AT91RM9200_ID_UHP,
43 .flags = IORESOURCE_IRQ,
47 static struct platform_device at91rm9200_usbh_device = {
51 .dma_mask = &ohci_dmamask,
52 .coherent_dma_mask = 0xffffffff,
53 .platform_data = &usbh_data,
55 .resource = usbh_resources,
56 .num_resources = ARRAY_SIZE(usbh_resources),
59 void __init at91_add_device_usbh(struct at91_usbh_data *data)
65 platform_device_register(&at91rm9200_usbh_device);
68 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
72 /* --------------------------------------------------------------------
74 * -------------------------------------------------------------------- */
76 #ifdef CONFIG_USB_GADGET_AT91
77 static struct at91_udc_data udc_data;
79 static struct resource udc_resources[] = {
81 .start = AT91RM9200_BASE_UDP,
82 .end = AT91RM9200_BASE_UDP + SZ_16K - 1,
83 .flags = IORESOURCE_MEM,
86 .start = AT91RM9200_ID_UDP,
87 .end = AT91RM9200_ID_UDP,
88 .flags = IORESOURCE_IRQ,
92 static struct platform_device at91rm9200_udc_device = {
96 .platform_data = &udc_data,
98 .resource = udc_resources,
99 .num_resources = ARRAY_SIZE(udc_resources),
102 void __init at91_add_device_udc(struct at91_udc_data *data)
107 if (data->vbus_pin) {
108 at91_set_gpio_input(data->vbus_pin, 0);
109 at91_set_deglitch(data->vbus_pin, 1);
111 if (data->pullup_pin)
112 at91_set_gpio_output(data->pullup_pin, 0);
115 platform_device_register(&at91rm9200_udc_device);
118 void __init at91_add_device_udc(struct at91_udc_data *data) {}
122 /* --------------------------------------------------------------------
124 * -------------------------------------------------------------------- */
126 #if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE)
127 static u64 eth_dmamask = 0xffffffffUL;
128 static struct at91_eth_data eth_data;
130 static struct resource eth_resources[] = {
132 .start = AT91_VA_BASE_EMAC,
133 .end = AT91_VA_BASE_EMAC + SZ_16K - 1,
134 .flags = IORESOURCE_MEM,
137 .start = AT91RM9200_ID_EMAC,
138 .end = AT91RM9200_ID_EMAC,
139 .flags = IORESOURCE_IRQ,
143 static struct platform_device at91rm9200_eth_device = {
144 .name = "at91_ether",
147 .dma_mask = ð_dmamask,
148 .coherent_dma_mask = 0xffffffff,
149 .platform_data = ð_data,
151 .resource = eth_resources,
152 .num_resources = ARRAY_SIZE(eth_resources),
155 void __init at91_add_device_eth(struct at91_eth_data *data)
160 if (data->phy_irq_pin) {
161 at91_set_gpio_input(data->phy_irq_pin, 0);
162 at91_set_deglitch(data->phy_irq_pin, 1);
165 /* Pins used for MII and RMII */
166 at91_set_A_periph(AT91_PIN_PA16, 0); /* EMDIO */
167 at91_set_A_periph(AT91_PIN_PA15, 0); /* EMDC */
168 at91_set_A_periph(AT91_PIN_PA14, 0); /* ERXER */
169 at91_set_A_periph(AT91_PIN_PA13, 0); /* ERX1 */
170 at91_set_A_periph(AT91_PIN_PA12, 0); /* ERX0 */
171 at91_set_A_periph(AT91_PIN_PA11, 0); /* ECRS_ECRSDV */
172 at91_set_A_periph(AT91_PIN_PA10, 0); /* ETX1 */
173 at91_set_A_periph(AT91_PIN_PA9, 0); /* ETX0 */
174 at91_set_A_periph(AT91_PIN_PA8, 0); /* ETXEN */
175 at91_set_A_periph(AT91_PIN_PA7, 0); /* ETXCK_EREFCK */
177 if (!data->is_rmii) {
178 at91_set_B_periph(AT91_PIN_PB19, 0); /* ERXCK */
179 at91_set_B_periph(AT91_PIN_PB18, 0); /* ECOL */
180 at91_set_B_periph(AT91_PIN_PB17, 0); /* ERXDV */
181 at91_set_B_periph(AT91_PIN_PB16, 0); /* ERX3 */
182 at91_set_B_periph(AT91_PIN_PB15, 0); /* ERX2 */
183 at91_set_B_periph(AT91_PIN_PB14, 0); /* ETXER */
184 at91_set_B_periph(AT91_PIN_PB13, 0); /* ETX3 */
185 at91_set_B_periph(AT91_PIN_PB12, 0); /* ETX2 */
189 platform_device_register(&at91rm9200_eth_device);
192 void __init at91_add_device_eth(struct at91_eth_data *data) {}
196 /* --------------------------------------------------------------------
197 * Compact Flash / PCMCIA
198 * -------------------------------------------------------------------- */
200 #if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
201 static struct at91_cf_data cf_data;
203 #define CF_BASE AT91_CHIPSELECT_4
205 static struct resource cf_resources[] = {
208 /* ties up CS4, CS5 and CS6 */
209 .end = CF_BASE + (0x30000000 - 1),
210 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
214 static struct platform_device at91rm9200_cf_device = {
218 .platform_data = &cf_data,
220 .resource = cf_resources,
221 .num_resources = ARRAY_SIZE(cf_resources),
224 void __init at91_add_device_cf(struct at91_cf_data *data)
231 data->chipselect = 4; /* can only use EBI ChipSelect 4 */
233 /* CF takes over CS4, CS5, CS6 */
234 csa = at91_sys_read(AT91_EBI_CSA);
235 at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH);
238 * Static memory controller timing adjustments.
239 * REVISIT: these timings are in terms of MCK cycles, so
240 * when MCK changes (cpufreq etc) so must these values...
242 at91_sys_write(AT91_SMC_CSR(4),
247 | AT91_SMC_NWS_(32) /* wait states */
248 | AT91_SMC_RWSETUP_(6) /* setup time */
249 | AT91_SMC_RWHOLD_(4) /* hold time */
254 at91_set_gpio_input(data->irq_pin, 1);
255 at91_set_deglitch(data->irq_pin, 1);
257 at91_set_gpio_input(data->det_pin, 1);
258 at91_set_deglitch(data->det_pin, 1);
260 /* outputs, initially off */
262 at91_set_gpio_output(data->vcc_pin, 0);
263 at91_set_gpio_output(data->rst_pin, 0);
265 /* force poweron defaults for these pins ... */
266 at91_set_A_periph(AT91_PIN_PC9, 0); /* A25/CFRNW */
267 at91_set_A_periph(AT91_PIN_PC10, 0); /* NCS4/CFCS */
268 at91_set_A_periph(AT91_PIN_PC11, 0); /* NCS5/CFCE1 */
269 at91_set_A_periph(AT91_PIN_PC12, 0); /* NCS6/CFCE2 */
271 /* nWAIT is _not_ a default setting */
272 at91_set_A_periph(AT91_PIN_PC6, 1); /* nWAIT */
275 platform_device_register(&at91rm9200_cf_device);
278 void __init at91_add_device_cf(struct at91_cf_data *data) {}
282 /* --------------------------------------------------------------------
284 * -------------------------------------------------------------------- */
286 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
287 static u64 mmc_dmamask = 0xffffffffUL;
288 static struct at91_mmc_data mmc_data;
290 static struct resource mmc_resources[] = {
292 .start = AT91RM9200_BASE_MCI,
293 .end = AT91RM9200_BASE_MCI + SZ_16K - 1,
294 .flags = IORESOURCE_MEM,
297 .start = AT91RM9200_ID_MCI,
298 .end = AT91RM9200_ID_MCI,
299 .flags = IORESOURCE_IRQ,
303 static struct platform_device at91rm9200_mmc_device = {
307 .dma_mask = &mmc_dmamask,
308 .coherent_dma_mask = 0xffffffff,
309 .platform_data = &mmc_data,
311 .resource = mmc_resources,
312 .num_resources = ARRAY_SIZE(mmc_resources),
315 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
322 at91_set_gpio_input(data->det_pin, 1);
323 at91_set_deglitch(data->det_pin, 1);
326 at91_set_gpio_input(data->wp_pin, 1);
328 at91_set_gpio_output(data->vcc_pin, 0);
331 at91_set_A_periph(AT91_PIN_PA27, 0);
335 at91_set_B_periph(AT91_PIN_PA8, 1);
337 /* DAT0, maybe DAT1..DAT3 */
338 at91_set_B_periph(AT91_PIN_PA9, 1);
340 at91_set_B_periph(AT91_PIN_PA10, 1);
341 at91_set_B_periph(AT91_PIN_PA11, 1);
342 at91_set_B_periph(AT91_PIN_PA12, 1);
346 at91_set_A_periph(AT91_PIN_PA28, 1);
348 /* DAT0, maybe DAT1..DAT3 */
349 at91_set_A_periph(AT91_PIN_PA29, 1);
351 at91_set_B_periph(AT91_PIN_PB3, 1);
352 at91_set_B_periph(AT91_PIN_PB4, 1);
353 at91_set_B_periph(AT91_PIN_PB5, 1);
358 platform_device_register(&at91rm9200_mmc_device);
361 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
365 /* --------------------------------------------------------------------
367 * -------------------------------------------------------------------- */
369 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
370 static struct at91_nand_data nand_data;
372 #define NAND_BASE AT91_CHIPSELECT_3
374 static struct resource nand_resources[] = {
377 .end = NAND_BASE + SZ_8M - 1,
378 .flags = IORESOURCE_MEM,
382 static struct platform_device at91rm9200_nand_device = {
386 .platform_data = &nand_data,
388 .resource = nand_resources,
389 .num_resources = ARRAY_SIZE(nand_resources),
392 void __init at91_add_device_nand(struct at91_nand_data *data)
399 /* enable the address range of CS3 */
400 csa = at91_sys_read(AT91_EBI_CSA);
401 at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA);
403 /* set the bus interface characteristics */
404 at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN
407 | AT91_SMC_RWSETUP_(0) /* tDS Data Set up Time 30 - ns */
408 | AT91_SMC_RWHOLD_(1) /* tDH Data Hold Time 20 - ns */
412 if (data->enable_pin)
413 at91_set_gpio_output(data->enable_pin, 1);
417 at91_set_gpio_input(data->rdy_pin, 1);
419 /* card detect pin */
421 at91_set_gpio_input(data->det_pin, 1);
423 at91_set_A_periph(AT91_PIN_PC1, 0); /* SMOE */
424 at91_set_A_periph(AT91_PIN_PC3, 0); /* SMWE */
427 platform_device_register(&at91rm9200_nand_device);
430 void __init at91_add_device_nand(struct at91_nand_data *data) {}
434 /* --------------------------------------------------------------------
436 * -------------------------------------------------------------------- */
438 #if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
440 static struct resource twi_resources[] = {
442 .start = AT91RM9200_BASE_TWI,
443 .end = AT91RM9200_BASE_TWI + SZ_16K - 1,
444 .flags = IORESOURCE_MEM,
447 .start = AT91RM9200_ID_TWI,
448 .end = AT91RM9200_ID_TWI,
449 .flags = IORESOURCE_IRQ,
453 static struct platform_device at91rm9200_twi_device = {
456 .resource = twi_resources,
457 .num_resources = ARRAY_SIZE(twi_resources),
460 void __init at91_add_device_i2c(void)
462 /* pins used for TWI interface */
463 at91_set_A_periph(AT91_PIN_PA25, 0); /* TWD */
464 at91_set_multi_drive(AT91_PIN_PA25, 1);
466 at91_set_A_periph(AT91_PIN_PA26, 0); /* TWCK */
467 at91_set_multi_drive(AT91_PIN_PA26, 1);
469 platform_device_register(&at91rm9200_twi_device);
472 void __init at91_add_device_i2c(void) {}
476 /* --------------------------------------------------------------------
478 * -------------------------------------------------------------------- */
480 #if defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) || defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE)
481 static u64 spi_dmamask = 0xffffffffUL;
483 static struct resource spi_resources[] = {
485 .start = AT91RM9200_BASE_SPI,
486 .end = AT91RM9200_BASE_SPI + SZ_16K - 1,
487 .flags = IORESOURCE_MEM,
490 .start = AT91RM9200_ID_SPI,
491 .end = AT91RM9200_ID_SPI,
492 .flags = IORESOURCE_IRQ,
496 static struct platform_device at91rm9200_spi_device = {
500 .dma_mask = &spi_dmamask,
501 .coherent_dma_mask = 0xffffffff,
503 .resource = spi_resources,
504 .num_resources = ARRAY_SIZE(spi_resources),
507 static const unsigned spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
509 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
512 unsigned long cs_pin;
514 at91_set_A_periph(AT91_PIN_PA0, 0); /* MISO */
515 at91_set_A_periph(AT91_PIN_PA1, 0); /* MOSI */
516 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPCK */
518 /* Enable SPI chip-selects */
519 for (i = 0; i < nr_devices; i++) {
520 if (devices[i].controller_data)
521 cs_pin = (unsigned long) devices[i].controller_data;
523 cs_pin = spi_standard_cs[devices[i].chip_select];
525 #ifdef CONFIG_SPI_AT91_MANUAL_CS
526 at91_set_gpio_output(cs_pin, 1);
528 at91_set_A_periph(cs_pin, 0);
531 /* pass chip-select pin to driver */
532 devices[i].controller_data = (void *) cs_pin;
535 spi_register_board_info(devices, nr_devices);
536 at91_clock_associate("spi_clk", &at91rm9200_spi_device.dev, "spi");
537 platform_device_register(&at91rm9200_spi_device);
540 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
544 /* --------------------------------------------------------------------
546 * -------------------------------------------------------------------- */
548 #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
549 static struct platform_device at91rm9200_rtc_device = {
555 static void __init at91_add_device_rtc(void)
557 platform_device_register(&at91rm9200_rtc_device);
560 static void __init at91_add_device_rtc(void) {}
564 /* --------------------------------------------------------------------
566 * -------------------------------------------------------------------- */
568 #if defined(CONFIG_AT91RM9200_WATCHDOG) || defined(CONFIG_AT91RM9200_WATCHDOG_MODULE)
569 static struct platform_device at91rm9200_wdt_device = {
575 static void __init at91_add_device_watchdog(void)
577 platform_device_register(&at91rm9200_wdt_device);
580 static void __init at91_add_device_watchdog(void) {}
584 /* --------------------------------------------------------------------
586 * -------------------------------------------------------------------- */
588 #if defined(CONFIG_LEDS)
592 void __init at91_init_leds(u8 cpu_led, u8 timer_led)
594 /* Enable GPIO to access the LEDs */
595 at91_set_gpio_output(cpu_led, 1);
596 at91_set_gpio_output(timer_led, 1);
598 at91_leds_cpu = cpu_led;
599 at91_leds_timer = timer_led;
602 void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
606 /* --------------------------------------------------------------------
608 * -------------------------------------------------------------------- */
610 #if defined(CONFIG_SERIAL_ATMEL)
611 static struct resource dbgu_resources[] = {
613 .start = AT91_VA_BASE_SYS + AT91_DBGU,
614 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
615 .flags = IORESOURCE_MEM,
618 .start = AT91_ID_SYS,
620 .flags = IORESOURCE_IRQ,
624 static struct atmel_uart_data dbgu_data = {
626 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
627 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
630 static struct platform_device at91rm9200_dbgu_device = {
631 .name = "atmel_usart",
634 .platform_data = &dbgu_data,
635 .coherent_dma_mask = 0xffffffff,
637 .resource = dbgu_resources,
638 .num_resources = ARRAY_SIZE(dbgu_resources),
641 static inline void configure_dbgu_pins(void)
643 at91_set_A_periph(AT91_PIN_PA30, 0); /* DRXD */
644 at91_set_A_periph(AT91_PIN_PA31, 1); /* DTXD */
647 static struct resource uart0_resources[] = {
649 .start = AT91RM9200_BASE_US0,
650 .end = AT91RM9200_BASE_US0 + SZ_16K - 1,
651 .flags = IORESOURCE_MEM,
654 .start = AT91RM9200_ID_US0,
655 .end = AT91RM9200_ID_US0,
656 .flags = IORESOURCE_IRQ,
660 static struct atmel_uart_data uart0_data = {
665 static struct platform_device at91rm9200_uart0_device = {
666 .name = "atmel_usart",
669 .platform_data = &uart0_data,
670 .coherent_dma_mask = 0xffffffff,
672 .resource = uart0_resources,
673 .num_resources = ARRAY_SIZE(uart0_resources),
676 static inline void configure_usart0_pins(void)
678 at91_set_A_periph(AT91_PIN_PA17, 1); /* TXD0 */
679 at91_set_A_periph(AT91_PIN_PA18, 0); /* RXD0 */
680 at91_set_A_periph(AT91_PIN_PA20, 0); /* CTS0 */
683 * AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21.
684 * We need to drive the pin manually. Default is off (RTS is active low).
686 at91_set_gpio_output(AT91_PIN_PA21, 1);
689 static struct resource uart1_resources[] = {
691 .start = AT91RM9200_BASE_US1,
692 .end = AT91RM9200_BASE_US1 + SZ_16K - 1,
693 .flags = IORESOURCE_MEM,
696 .start = AT91RM9200_ID_US1,
697 .end = AT91RM9200_ID_US1,
698 .flags = IORESOURCE_IRQ,
702 static struct atmel_uart_data uart1_data = {
707 static struct platform_device at91rm9200_uart1_device = {
708 .name = "atmel_usart",
711 .platform_data = &uart1_data,
712 .coherent_dma_mask = 0xffffffff,
714 .resource = uart1_resources,
715 .num_resources = ARRAY_SIZE(uart1_resources),
718 static inline void configure_usart1_pins(void)
720 at91_set_A_periph(AT91_PIN_PB18, 0); /* RI1 */
721 at91_set_A_periph(AT91_PIN_PB19, 0); /* DTR1 */
722 at91_set_A_periph(AT91_PIN_PB20, 1); /* TXD1 */
723 at91_set_A_periph(AT91_PIN_PB21, 0); /* RXD1 */
724 at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD1 */
725 at91_set_A_periph(AT91_PIN_PB24, 0); /* CTS1 */
726 at91_set_A_periph(AT91_PIN_PB25, 0); /* DSR1 */
727 at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS1 */
730 static struct resource uart2_resources[] = {
732 .start = AT91RM9200_BASE_US2,
733 .end = AT91RM9200_BASE_US2 + SZ_16K - 1,
734 .flags = IORESOURCE_MEM,
737 .start = AT91RM9200_ID_US2,
738 .end = AT91RM9200_ID_US2,
739 .flags = IORESOURCE_IRQ,
743 static struct atmel_uart_data uart2_data = {
748 static struct platform_device at91rm9200_uart2_device = {
749 .name = "atmel_usart",
752 .platform_data = &uart2_data,
753 .coherent_dma_mask = 0xffffffff,
755 .resource = uart2_resources,
756 .num_resources = ARRAY_SIZE(uart2_resources),
759 static inline void configure_usart2_pins(void)
761 at91_set_A_periph(AT91_PIN_PA22, 0); /* RXD2 */
762 at91_set_A_periph(AT91_PIN_PA23, 1); /* TXD2 */
765 static struct resource uart3_resources[] = {
767 .start = AT91RM9200_BASE_US3,
768 .end = AT91RM9200_BASE_US3 + SZ_16K - 1,
769 .flags = IORESOURCE_MEM,
772 .start = AT91RM9200_ID_US3,
773 .end = AT91RM9200_ID_US3,
774 .flags = IORESOURCE_IRQ,
778 static struct atmel_uart_data uart3_data = {
783 static struct platform_device at91rm9200_uart3_device = {
784 .name = "atmel_usart",
787 .platform_data = &uart3_data,
788 .coherent_dma_mask = 0xffffffff,
790 .resource = uart3_resources,
791 .num_resources = ARRAY_SIZE(uart3_resources),
794 static inline void configure_usart3_pins(void)
796 at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */
797 at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */
800 struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
801 struct platform_device *atmel_default_console_device; /* the serial console device */
803 void __init at91_init_serial(struct at91_uart_config *config)
807 /* Fill in list of supported UARTs */
808 for (i = 0; i < config->nr_tty; i++) {
809 switch (config->tty_map[i]) {
811 configure_usart0_pins();
812 at91_uarts[i] = &at91rm9200_uart0_device;
813 at91_clock_associate("usart0_clk", &at91rm9200_uart0_device.dev, "usart");
816 configure_usart1_pins();
817 at91_uarts[i] = &at91rm9200_uart1_device;
818 at91_clock_associate("usart1_clk", &at91rm9200_uart1_device.dev, "usart");
821 configure_usart2_pins();
822 at91_uarts[i] = &at91rm9200_uart2_device;
823 at91_clock_associate("usart2_clk", &at91rm9200_uart2_device.dev, "usart");
826 configure_usart3_pins();
827 at91_uarts[i] = &at91rm9200_uart3_device;
828 at91_clock_associate("usart3_clk", &at91rm9200_uart3_device.dev, "usart");
831 configure_dbgu_pins();
832 at91_uarts[i] = &at91rm9200_dbgu_device;
833 at91_clock_associate("mck", &at91rm9200_dbgu_device.dev, "usart");
838 at91_uarts[i]->id = i; /* update ID number to mapped ID */
841 /* Set serial console device */
842 if (config->console_tty < ATMEL_MAX_UART)
843 atmel_default_console_device = at91_uarts[config->console_tty];
844 if (!atmel_default_console_device)
845 printk(KERN_INFO "AT91: No default serial console defined.\n");
848 void __init at91_add_device_serial(void)
852 for (i = 0; i < ATMEL_MAX_UART; i++) {
854 platform_device_register(at91_uarts[i]);
858 void __init at91_init_serial(struct at91_uart_config *config) {}
859 void __init at91_add_device_serial(void) {}
863 /* -------------------------------------------------------------------- */
866 * These devices are always present and don't need any board-specific
869 static int __init at91_add_standard_devices(void)
871 at91_add_device_rtc();
872 at91_add_device_watchdog();
876 arch_initcall(at91_add_standard_devices);