Pull dock-bay into release branch
[linux-2.6] / arch / powerpc / boot / dts / mpc8272ads.dts
1 /*
2  * MPC8272 ADS Device Tree Source
3  *
4  * Copyright 2005 Freescale Semiconductor Inc.
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  */
11
12 / {
13        model = "MPC8272ADS";
14        compatible = "MPC8260ADS";
15        #address-cells = <1>;
16        #size-cells = <1>;
17
18        cpus {
19                #address-cells = <1>;
20                #size-cells = <0>;
21
22                PowerPC,8272@0 {
23                        device_type = "cpu";
24                        reg = <0>;
25                        d-cache-line-size = <20>;       // 32 bytes
26                        i-cache-line-size = <20>;       // 32 bytes
27                        d-cache-size = <4000>;          // L1, 16K
28                        i-cache-size = <4000>;          // L1, 16K
29                        timebase-frequency = <0>;
30                        bus-frequency = <0>;
31                        clock-frequency = <0>;
32                        32-bit;
33                };
34        };
35
36                 pci_pic: interrupt-controller@f8200000 {
37                #address-cells = <0>;
38                #interrupt-cells = <2>;
39                interrupt-controller;
40                reg = <f8200000 f8200004>;
41                built-in;
42                device_type = "pci-pic";
43        };
44        memory {
45                device_type = "memory";
46                reg = <00000000 4000000 f4500000 00000020>;
47        };
48
49        chosen {
50                name = "chosen";
51                linux,platform = <0>;
52                 interrupt-controller = <&Cpm_pic>;
53        };
54
55        soc8272@f0000000 {
56                #address-cells = <1>;
57                #size-cells = <1>;
58                #interrupt-cells = <2>;
59                device_type = "soc";
60                ranges = <00000000 f0000000 00053000>;
61                reg = <f0000000 10000>;
62
63                mdio@0 {
64                        device_type = "mdio";
65                        compatible = "fs_enet";
66                        reg = <0 0>;
67                        #address-cells = <1>;
68                        #size-cells = <0>;
69                         phy0:ethernet-phy@0 {
70                                 interrupt-parent = <&Cpm_pic>;
71                                interrupts = <17 4>;
72                                reg = <0>;
73                                bitbang = [ 12 12 13 02 02 01 ];
74                                device_type = "ethernet-phy";
75                        };
76                         phy1:ethernet-phy@1 {
77                                 interrupt-parent = <&Cpm_pic>;
78                                interrupts = <17 4>;
79                                bitbang = [ 12 12 13 02 02 01 ];
80                                reg = <3>;
81                                device_type = "ethernet-phy";
82                        };
83                };
84
85                ethernet@24000 {
86                        #address-cells = <1>;
87                        #size-cells = <0>;
88                        device_type = "network";
89                        device-id = <1>;
90                        compatible = "fs_enet";
91                        model = "FCC";
92                        reg = <11300 20 8400 100 11380 30>;
93                        mac-address = [ 00 11 2F 99 43 54 ];
94                        interrupts = <20 2>;
95                         interrupt-parent = <&Cpm_pic>;
96                         phy-handle = <&Phy0>;
97                        rx-clock = <13>;
98                        tx-clock = <12>;
99                };
100
101                ethernet@25000 {
102                        device_type = "network";
103                        device-id = <2>;
104                        compatible = "fs_enet";
105                        model = "FCC";
106                        reg = <11320 20 8500 100 113b0 30>;
107                        mac-address = [ 00 11 2F 99 44 54 ];
108                        interrupts = <21 2>;
109                         interrupt-parent = <&Cpm_pic>;
110                         phy-handle = <&Phy1>;
111                        rx-clock = <17>;
112                        tx-clock = <18>;
113                };
114
115                cpm@f0000000 {
116                        #address-cells = <1>;
117                        #size-cells = <1>;
118                        #interrupt-cells = <2>;
119                        device_type = "cpm";
120                        model = "CPM2";
121                        ranges = <00000000 00000000 20000>;
122                        reg = <0 20000>;
123                        command-proc = <119c0>;
124                        brg-frequency = <17D7840>;
125                        cpm_clk = <BEBC200>;
126
127                        scc@11a00 {
128                                device_type = "serial";
129                                compatible = "cpm_uart";
130                                model = "SCC";
131                                device-id = <1>;
132                                reg = <11a00 20 8000 100>;
133                                current-speed = <1c200>;
134                                interrupts = <28 2>;
135                                 interrupt-parent = <&Cpm_pic>;
136                                clock-setup = <0 00ffffff>;
137                                rx-clock = <1>;
138                                tx-clock = <1>;
139                        };
140
141                        scc@11a60 {
142                                device_type = "serial";
143                                compatible = "cpm_uart";
144                                model = "SCC";
145                                device-id = <4>;
146                                reg = <11a60 20 8300 100>;
147                                current-speed = <1c200>;
148                                interrupts = <2b 2>;
149                                 interrupt-parent = <&Cpm_pic>;
150                                clock-setup = <1b ffffff00>;
151                                rx-clock = <4>;
152                                tx-clock = <4>;
153                        };
154
155                };
156                         cpm_pic:interrupt-controller@10c00 {
157                        #address-cells = <0>;
158                        #interrupt-cells = <2>;
159                        interrupt-controller;
160                        reg = <10c00 80>;
161                        built-in;
162                        device_type = "cpm-pic";
163                        compatible = "CPM2";
164                };
165                pci@0500 {
166                        #interrupt-cells = <1>;
167                        #size-cells = <2>;
168                        #address-cells = <3>;
169                        compatible = "8272";
170                        device_type = "pci";
171                        reg = <10430 4dc>;
172                        clock-frequency = <3f940aa>;
173                        interrupt-map-mask = <f800 0 0 7>;
174                        interrupt-map = <
175
176                                        /* IDSEL 0x16 */
177                                         b000 0 0 1 f8200000 40 8
178                                         b000 0 0 2 f8200000 41 8
179                                         b000 0 0 3 f8200000 42 8
180                                         b000 0 0 4 f8200000 43 8
181
182                                        /* IDSEL 0x17 */
183                                         b800 0 0 1 f8200000 43 8
184                                         b800 0 0 2 f8200000 40 8
185                                         b800 0 0 3 f8200000 41 8
186                                         b800 0 0 4 f8200000 42 8
187
188                                        /* IDSEL 0x18 */
189                                         c000 0 0 1 f8200000 42 8
190                                         c000 0 0 2 f8200000 43 8
191                                         c000 0 0 3 f8200000 40 8
192                                         c000 0 0 4 f8200000 41 8>;
193                         interrupt-parent = <&Cpm_pic>;
194                        interrupts = <14 8>;
195                        bus-range = <0 0>;
196                        ranges = <02000000 0 80000000 80000000 0 40000000
197                                  01000000 0 00000000 f6000000 0 02000000>;
198                };
199
200 /* May need to remove if on a part without crypto engine */
201                crypto@30000 {
202                        device_type = "crypto";
203                        model = "SEC2";
204                        compatible = "talitos";
205                        reg = <30000 10000>;
206                        interrupts = <b 2>;
207                         interrupt-parent = <&Cpm_pic>;
208                        num-channels = <4>;
209                        channel-fifo-len = <18>;
210                        exec-units-mask = <0000007e>;
211 /* desc mask is for rev1.x, we need runtime fixup for >=2.x */
212                        descriptor-types-mask = <01010ebf>;
213                };
214
215        };
216 };