1 /******************************************************************************
2 * include/asm-ia64/native/inst.h
4 * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp>
5 * VA Linux Systems Japan K.K.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #ifdef CONFIG_PARAVIRT_GUEST_ASM_CLOBBER_CHECK
24 # define PARAVIRT_POISON 0xdeadbeefbaadf00d
25 # define CLOBBER(clob) \
27 movl clob = PARAVIRT_POISON; \
30 # define CLOBBER(clob) /* nothing */
33 #define MOV_FROM_IFA(reg) \
36 #define MOV_FROM_ITIR(reg) \
39 #define MOV_FROM_ISR(reg) \
42 #define MOV_FROM_IHA(reg) \
45 #define MOV_FROM_IPSR(pred, reg) \
46 (pred) mov reg = cr.ipsr
48 #define MOV_FROM_IIM(reg) \
51 #define MOV_FROM_IIP(reg) \
54 #define MOV_FROM_IVR(reg, clob) \
58 #define MOV_FROM_PSR(pred, reg, clob) \
59 (pred) mov reg = psr \
62 #define MOV_TO_IFA(reg, clob) \
66 #define MOV_TO_ITIR(pred, reg, clob) \
67 (pred) mov cr.itir = reg \
70 #define MOV_TO_IHA(pred, reg, clob) \
71 (pred) mov cr.iha = reg \
74 #define MOV_TO_IPSR(pred, reg, clob) \
75 (pred) mov cr.ipsr = reg \
78 #define MOV_TO_IFS(pred, reg, clob) \
79 (pred) mov cr.ifs = reg \
82 #define MOV_TO_IIP(reg, clob) \
86 #define MOV_TO_KR(kr, reg, clob0, clob1) \
87 mov IA64_KR(kr) = reg \
91 #define ITC_I(pred, reg, clob) \
95 #define ITC_D(pred, reg, clob) \
99 #define ITC_I_AND_D(pred_i, pred_d, reg, clob) \
100 (pred_i) itc.i reg; \
104 #define THASH(pred, reg0, reg1, clob) \
105 (pred) thash reg0 = reg1 \
108 #define SSM_PSR_IC_AND_DEFAULT_BITS_AND_SRLZ_I(clob0, clob1) \
109 ssm psr.ic | PSR_DEFAULT_BITS \
113 srlz.i /* guarantee that interruption collectin is on */ \
116 #define SSM_PSR_IC_AND_SRLZ_D(clob0, clob1) \
123 #define RSM_PSR_IC(clob) \
127 #define SSM_PSR_I(pred, pred_clob, clob) \
131 #define RSM_PSR_I(pred, clob0, clob1) \
136 #define RSM_PSR_I_IC(clob0, clob1, clob2) \
145 #define SSM_PSR_DT_AND_SRLZ_I \
150 #define BSW_0(clob0, clob1, clob2) \
156 #define BSW_1(clob0, clob1) \