Merge branch 'master' into upstream
[linux-2.6] / drivers / hwmon / w83781d.c
1 /*
2     w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
3                 monitoring
4     Copyright (c) 1998 - 2001  Frodo Looijaard <frodol@dds.nl>,
5     Philip Edelbrock <phil@netroedge.com>,
6     and Mark Studebaker <mdsxyz123@yahoo.com>
7
8     This program is free software; you can redistribute it and/or modify
9     it under the terms of the GNU General Public License as published by
10     the Free Software Foundation; either version 2 of the License, or
11     (at your option) any later version.
12
13     This program is distributed in the hope that it will be useful,
14     but WITHOUT ANY WARRANTY; without even the implied warranty of
15     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16     GNU General Public License for more details.
17
18     You should have received a copy of the GNU General Public License
19     along with this program; if not, write to the Free Software
20     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23 /*
24     Supports following chips:
25
26     Chip        #vin    #fanin  #pwm    #temp   wchipid vendid  i2c     ISA
27     as99127f    7       3       0       3       0x31    0x12c3  yes     no
28     as99127f rev.2 (type_name = as99127f)       0x31    0x5ca3  yes     no
29     w83781d     7       3       0       3       0x10-1  0x5ca3  yes     yes
30     w83627hf    9       3       2       3       0x21    0x5ca3  yes     yes(LPC)
31     w83782d     9       3       2-4     3       0x30    0x5ca3  yes     yes
32     w83783s     5-6     3       2       1-2     0x40    0x5ca3  yes     no
33
34 */
35
36 #include <linux/module.h>
37 #include <linux/init.h>
38 #include <linux/slab.h>
39 #include <linux/jiffies.h>
40 #include <linux/i2c.h>
41 #include <linux/i2c-isa.h>
42 #include <linux/hwmon.h>
43 #include <linux/hwmon-vid.h>
44 #include <linux/sysfs.h>
45 #include <linux/err.h>
46 #include <linux/mutex.h>
47 #include <asm/io.h>
48 #include "lm75.h"
49
50 /* Addresses to scan */
51 static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25,
52                                         0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b,
53                                         0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
54 static unsigned short isa_address = 0x290;
55
56 /* Insmod parameters */
57 I2C_CLIENT_INSMOD_5(w83781d, w83782d, w83783s, w83627hf, as99127f);
58 I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
59                     "{bus, clientaddr, subclientaddr1, subclientaddr2}");
60
61 static int reset;
62 module_param(reset, bool, 0);
63 MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
64
65 static int init = 1;
66 module_param(init, bool, 0);
67 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
68
69 /* Constants specified below */
70
71 /* Length of ISA address segment */
72 #define W83781D_EXTENT                  8
73
74 /* Where are the ISA address/data registers relative to the base address */
75 #define W83781D_ADDR_REG_OFFSET         5
76 #define W83781D_DATA_REG_OFFSET         6
77
78 /* The W83781D registers */
79 /* The W83782D registers for nr=7,8 are in bank 5 */
80 #define W83781D_REG_IN_MAX(nr)          ((nr < 7) ? (0x2b + (nr) * 2) : \
81                                                     (0x554 + (((nr) - 7) * 2)))
82 #define W83781D_REG_IN_MIN(nr)          ((nr < 7) ? (0x2c + (nr) * 2) : \
83                                                     (0x555 + (((nr) - 7) * 2)))
84 #define W83781D_REG_IN(nr)              ((nr < 7) ? (0x20 + (nr)) : \
85                                                     (0x550 + (nr) - 7))
86
87 #define W83781D_REG_FAN_MIN(nr)         (0x3a + (nr))
88 #define W83781D_REG_FAN(nr)             (0x27 + (nr))
89
90 #define W83781D_REG_BANK                0x4E
91 #define W83781D_REG_TEMP2_CONFIG        0x152
92 #define W83781D_REG_TEMP3_CONFIG        0x252
93 #define W83781D_REG_TEMP(nr)            ((nr == 3) ? (0x0250) : \
94                                         ((nr == 2) ? (0x0150) : \
95                                                      (0x27)))
96 #define W83781D_REG_TEMP_HYST(nr)       ((nr == 3) ? (0x253) : \
97                                         ((nr == 2) ? (0x153) : \
98                                                      (0x3A)))
99 #define W83781D_REG_TEMP_OVER(nr)       ((nr == 3) ? (0x255) : \
100                                         ((nr == 2) ? (0x155) : \
101                                                      (0x39)))
102
103 #define W83781D_REG_CONFIG              0x40
104
105 /* Interrupt status (W83781D, AS99127F) */
106 #define W83781D_REG_ALARM1              0x41
107 #define W83781D_REG_ALARM2              0x42
108
109 /* Real-time status (W83782D, W83783S, W83627HF) */
110 #define W83782D_REG_ALARM1              0x459
111 #define W83782D_REG_ALARM2              0x45A
112 #define W83782D_REG_ALARM3              0x45B
113
114 #define W83781D_REG_BEEP_CONFIG         0x4D
115 #define W83781D_REG_BEEP_INTS1          0x56
116 #define W83781D_REG_BEEP_INTS2          0x57
117 #define W83781D_REG_BEEP_INTS3          0x453   /* not on W83781D */
118
119 #define W83781D_REG_VID_FANDIV          0x47
120
121 #define W83781D_REG_CHIPID              0x49
122 #define W83781D_REG_WCHIPID             0x58
123 #define W83781D_REG_CHIPMAN             0x4F
124 #define W83781D_REG_PIN                 0x4B
125
126 /* 782D/783S only */
127 #define W83781D_REG_VBAT                0x5D
128
129 /* PWM 782D (1-4) and 783S (1-2) only */
130 #define W83781D_REG_PWM1                0x5B    /* 782d and 783s/627hf datasheets disagree */
131                                                 /* on which is which; */
132 #define W83781D_REG_PWM2                0x5A    /* We follow the 782d convention here, */
133                                                 /* However 782d is probably wrong. */
134 #define W83781D_REG_PWM3                0x5E
135 #define W83781D_REG_PWM4                0x5F
136 #define W83781D_REG_PWMCLK12            0x5C
137 #define W83781D_REG_PWMCLK34            0x45C
138 static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2,
139         W83781D_REG_PWM3, W83781D_REG_PWM4
140 };
141
142 #define W83781D_REG_PWM(nr)             (regpwm[(nr) - 1])
143
144 #define W83781D_REG_I2C_ADDR            0x48
145 #define W83781D_REG_I2C_SUBADDR         0x4A
146
147 /* The following are undocumented in the data sheets however we
148    received the information in an email from Winbond tech support */
149 /* Sensor selection - not on 781d */
150 #define W83781D_REG_SCFG1               0x5D
151 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
152
153 #define W83781D_REG_SCFG2               0x59
154 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
155
156 #define W83781D_DEFAULT_BETA            3435
157
158 /* RT Table registers */
159 #define W83781D_REG_RT_IDX              0x50
160 #define W83781D_REG_RT_VAL              0x51
161
162 /* Conversions. Rounding and limit checking is only done on the TO_REG
163    variants. Note that you should be a bit careful with which arguments
164    these macros are called: arguments may be evaluated more than once.
165    Fixing this is just not worth it. */
166 #define IN_TO_REG(val)                  (SENSORS_LIMIT((((val) * 10 + 8)/16),0,255))
167 #define IN_FROM_REG(val)                (((val) * 16) / 10)
168
169 static inline u8
170 FAN_TO_REG(long rpm, int div)
171 {
172         if (rpm == 0)
173                 return 255;
174         rpm = SENSORS_LIMIT(rpm, 1, 1000000);
175         return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
176 }
177
178 #define FAN_FROM_REG(val,div)           ((val) == 0   ? -1 : \
179                                         ((val) == 255 ? 0 : \
180                                                         1350000 / ((val) * (div))))
181
182 #define TEMP_TO_REG(val)                (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
183                                                 : (val)) / 1000, 0, 0xff))
184 #define TEMP_FROM_REG(val)              (((val) & 0x80 ? (val)-0x100 : (val)) * 1000)
185
186 #define PWM_FROM_REG(val)               (val)
187 #define PWM_TO_REG(val)                 (SENSORS_LIMIT((val),0,255))
188 #define BEEP_MASK_FROM_REG(val,type)    ((type) == as99127f ? \
189                                          (val) ^ 0x7fff : (val))
190 #define BEEP_MASK_TO_REG(val,type)      ((type) == as99127f ? \
191                                          (~(val)) & 0x7fff : (val) & 0xffffff)
192
193 #define BEEP_ENABLE_TO_REG(val)         ((val) ? 1 : 0)
194 #define BEEP_ENABLE_FROM_REG(val)       ((val) ? 1 : 0)
195
196 #define DIV_FROM_REG(val)               (1 << (val))
197
198 static inline u8
199 DIV_TO_REG(long val, enum chips type)
200 {
201         int i;
202         val = SENSORS_LIMIT(val, 1,
203                             ((type == w83781d
204                               || type == as99127f) ? 8 : 128)) >> 1;
205         for (i = 0; i < 7; i++) {
206                 if (val == 0)
207                         break;
208                 val >>= 1;
209         }
210         return ((u8) i);
211 }
212
213 /* There are some complications in a module like this. First off, W83781D chips
214    may be both present on the SMBus and the ISA bus, and we have to handle
215    those cases separately at some places. Second, there might be several
216    W83781D chips available (well, actually, that is probably never done; but
217    it is a clean illustration of how to handle a case like that). Finally,
218    a specific chip may be attached to *both* ISA and SMBus, and we would
219    not like to detect it double. Fortunately, in the case of the W83781D at
220    least, a register tells us what SMBus address we are on, so that helps
221    a bit - except if there could be more than one SMBus. Groan. No solution
222    for this yet. */
223
224 /* This module may seem overly long and complicated. In fact, it is not so
225    bad. Quite a lot of bookkeeping is done. A real driver can often cut
226    some corners. */
227
228 /* For each registered W83781D, we need to keep some data in memory. That
229    data is pointed to by w83781d_list[NR]->data. The structure itself is
230    dynamically allocated, at the same time when a new w83781d client is
231    allocated. */
232 struct w83781d_data {
233         struct i2c_client client;
234         struct class_device *class_dev;
235         struct mutex lock;
236         enum chips type;
237
238         struct mutex update_lock;
239         char valid;             /* !=0 if following fields are valid */
240         unsigned long last_updated;     /* In jiffies */
241
242         struct i2c_client *lm75[2];     /* for secondary I2C addresses */
243         /* array of 2 pointers to subclients */
244
245         u8 in[9];               /* Register value - 8 & 9 for 782D only */
246         u8 in_max[9];           /* Register value - 8 & 9 for 782D only */
247         u8 in_min[9];           /* Register value - 8 & 9 for 782D only */
248         u8 fan[3];              /* Register value */
249         u8 fan_min[3];          /* Register value */
250         u8 temp;
251         u8 temp_max;            /* Register value */
252         u8 temp_max_hyst;       /* Register value */
253         u16 temp_add[2];        /* Register value */
254         u16 temp_max_add[2];    /* Register value */
255         u16 temp_max_hyst_add[2];       /* Register value */
256         u8 fan_div[3];          /* Register encoding, shifted right */
257         u8 vid;                 /* Register encoding, combined */
258         u32 alarms;             /* Register encoding, combined */
259         u32 beep_mask;          /* Register encoding, combined */
260         u8 beep_enable;         /* Boolean */
261         u8 pwm[4];              /* Register value */
262         u8 pwmenable[4];        /* Boolean */
263         u16 sens[3];            /* 782D/783S only.
264                                    1 = pentium diode; 2 = 3904 diode;
265                                    3000-5000 = thermistor beta.
266                                    Default = 3435. 
267                                    Other Betas unimplemented */
268         u8 vrm;
269 };
270
271 static int w83781d_attach_adapter(struct i2c_adapter *adapter);
272 static int w83781d_isa_attach_adapter(struct i2c_adapter *adapter);
273 static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind);
274 static int w83781d_detach_client(struct i2c_client *client);
275
276 static int w83781d_read_value(struct i2c_client *client, u16 reg);
277 static int w83781d_write_value(struct i2c_client *client, u16 reg, u16 value);
278 static struct w83781d_data *w83781d_update_device(struct device *dev);
279 static void w83781d_init_client(struct i2c_client *client);
280
281 static struct i2c_driver w83781d_driver = {
282         .driver = {
283                 .name = "w83781d",
284         },
285         .id = I2C_DRIVERID_W83781D,
286         .attach_adapter = w83781d_attach_adapter,
287         .detach_client = w83781d_detach_client,
288 };
289
290 static struct i2c_driver w83781d_isa_driver = {
291         .driver = {
292                 .owner = THIS_MODULE,
293                 .name = "w83781d-isa",
294         },
295         .attach_adapter = w83781d_isa_attach_adapter,
296         .detach_client = w83781d_detach_client,
297 };
298
299
300 /* following are the sysfs callback functions */
301 #define show_in_reg(reg) \
302 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
303 { \
304         struct w83781d_data *data = w83781d_update_device(dev); \
305         return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr] * 10)); \
306 }
307 show_in_reg(in);
308 show_in_reg(in_min);
309 show_in_reg(in_max);
310
311 #define store_in_reg(REG, reg) \
312 static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
313 { \
314         struct i2c_client *client = to_i2c_client(dev); \
315         struct w83781d_data *data = i2c_get_clientdata(client); \
316         u32 val; \
317          \
318         val = simple_strtoul(buf, NULL, 10) / 10; \
319          \
320         mutex_lock(&data->update_lock); \
321         data->in_##reg[nr] = IN_TO_REG(val); \
322         w83781d_write_value(client, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
323          \
324         mutex_unlock(&data->update_lock); \
325         return count; \
326 }
327 store_in_reg(MIN, min);
328 store_in_reg(MAX, max);
329
330 #define sysfs_in_offset(offset) \
331 static ssize_t \
332 show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
333 { \
334         return show_in(dev, buf, offset); \
335 } \
336 static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
337
338 #define sysfs_in_reg_offset(reg, offset) \
339 static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
340 { \
341         return show_in_##reg (dev, buf, offset); \
342 } \
343 static ssize_t store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
344 { \
345         return store_in_##reg (dev, buf, count, offset); \
346 } \
347 static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_in_##reg##offset, store_regs_in_##reg##offset);
348
349 #define sysfs_in_offsets(offset) \
350 sysfs_in_offset(offset); \
351 sysfs_in_reg_offset(min, offset); \
352 sysfs_in_reg_offset(max, offset);
353
354 sysfs_in_offsets(0);
355 sysfs_in_offsets(1);
356 sysfs_in_offsets(2);
357 sysfs_in_offsets(3);
358 sysfs_in_offsets(4);
359 sysfs_in_offsets(5);
360 sysfs_in_offsets(6);
361 sysfs_in_offsets(7);
362 sysfs_in_offsets(8);
363
364 #define show_fan_reg(reg) \
365 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
366 { \
367         struct w83781d_data *data = w83781d_update_device(dev); \
368         return sprintf(buf,"%ld\n", \
369                 FAN_FROM_REG(data->reg[nr-1], (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
370 }
371 show_fan_reg(fan);
372 show_fan_reg(fan_min);
373
374 static ssize_t
375 store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
376 {
377         struct i2c_client *client = to_i2c_client(dev);
378         struct w83781d_data *data = i2c_get_clientdata(client);
379         u32 val;
380
381         val = simple_strtoul(buf, NULL, 10);
382
383         mutex_lock(&data->update_lock);
384         data->fan_min[nr - 1] =
385             FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
386         w83781d_write_value(client, W83781D_REG_FAN_MIN(nr),
387                             data->fan_min[nr - 1]);
388
389         mutex_unlock(&data->update_lock);
390         return count;
391 }
392
393 #define sysfs_fan_offset(offset) \
394 static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
395 { \
396         return show_fan(dev, buf, offset); \
397 } \
398 static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
399
400 #define sysfs_fan_min_offset(offset) \
401 static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
402 { \
403         return show_fan_min(dev, buf, offset); \
404 } \
405 static ssize_t store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
406 { \
407         return store_fan_min(dev, buf, count, offset); \
408 } \
409 static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, show_regs_fan_min##offset, store_regs_fan_min##offset);
410
411 sysfs_fan_offset(1);
412 sysfs_fan_min_offset(1);
413 sysfs_fan_offset(2);
414 sysfs_fan_min_offset(2);
415 sysfs_fan_offset(3);
416 sysfs_fan_min_offset(3);
417
418 #define show_temp_reg(reg) \
419 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
420 { \
421         struct w83781d_data *data = w83781d_update_device(dev); \
422         if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
423                 return sprintf(buf,"%d\n", \
424                         LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
425         } else {        /* TEMP1 */ \
426                 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
427         } \
428 }
429 show_temp_reg(temp);
430 show_temp_reg(temp_max);
431 show_temp_reg(temp_max_hyst);
432
433 #define store_temp_reg(REG, reg) \
434 static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
435 { \
436         struct i2c_client *client = to_i2c_client(dev); \
437         struct w83781d_data *data = i2c_get_clientdata(client); \
438         s32 val; \
439          \
440         val = simple_strtol(buf, NULL, 10); \
441          \
442         mutex_lock(&data->update_lock); \
443          \
444         if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
445                 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
446                 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
447                                 data->temp_##reg##_add[nr-2]); \
448         } else {        /* TEMP1 */ \
449                 data->temp_##reg = TEMP_TO_REG(val); \
450                 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
451                         data->temp_##reg); \
452         } \
453          \
454         mutex_unlock(&data->update_lock); \
455         return count; \
456 }
457 store_temp_reg(OVER, max);
458 store_temp_reg(HYST, max_hyst);
459
460 #define sysfs_temp_offset(offset) \
461 static ssize_t \
462 show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
463 { \
464         return show_temp(dev, buf, offset); \
465 } \
466 static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
467
468 #define sysfs_temp_reg_offset(reg, offset) \
469 static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
470 { \
471         return show_temp_##reg (dev, buf, offset); \
472 } \
473 static ssize_t store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
474 { \
475         return store_temp_##reg (dev, buf, count, offset); \
476 } \
477 static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
478
479 #define sysfs_temp_offsets(offset) \
480 sysfs_temp_offset(offset); \
481 sysfs_temp_reg_offset(max, offset); \
482 sysfs_temp_reg_offset(max_hyst, offset);
483
484 sysfs_temp_offsets(1);
485 sysfs_temp_offsets(2);
486 sysfs_temp_offsets(3);
487
488 static ssize_t
489 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
490 {
491         struct w83781d_data *data = w83781d_update_device(dev);
492         return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
493 }
494
495 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
496
497 static ssize_t
498 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
499 {
500         struct w83781d_data *data = w83781d_update_device(dev);
501         return sprintf(buf, "%ld\n", (long) data->vrm);
502 }
503
504 static ssize_t
505 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
506 {
507         struct i2c_client *client = to_i2c_client(dev);
508         struct w83781d_data *data = i2c_get_clientdata(client);
509         u32 val;
510
511         val = simple_strtoul(buf, NULL, 10);
512         data->vrm = val;
513
514         return count;
515 }
516
517 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
518
519 static ssize_t
520 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
521 {
522         struct w83781d_data *data = w83781d_update_device(dev);
523         return sprintf(buf, "%u\n", data->alarms);
524 }
525
526 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
527
528 static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
529 {
530         struct w83781d_data *data = w83781d_update_device(dev);
531         return sprintf(buf, "%ld\n",
532                        (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
533 }
534 static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf)
535 {
536         struct w83781d_data *data = w83781d_update_device(dev);
537         return sprintf(buf, "%ld\n",
538                        (long)BEEP_ENABLE_FROM_REG(data->beep_enable));
539 }
540
541 #define BEEP_ENABLE                     0       /* Store beep_enable */
542 #define BEEP_MASK                       1       /* Store beep_mask */
543
544 static ssize_t
545 store_beep_reg(struct device *dev, const char *buf, size_t count,
546                int update_mask)
547 {
548         struct i2c_client *client = to_i2c_client(dev);
549         struct w83781d_data *data = i2c_get_clientdata(client);
550         u32 val, val2;
551
552         val = simple_strtoul(buf, NULL, 10);
553
554         mutex_lock(&data->update_lock);
555
556         if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
557                 data->beep_mask = BEEP_MASK_TO_REG(val, data->type);
558                 w83781d_write_value(client, W83781D_REG_BEEP_INTS1,
559                                     data->beep_mask & 0xff);
560
561                 if ((data->type != w83781d) && (data->type != as99127f)) {
562                         w83781d_write_value(client, W83781D_REG_BEEP_INTS3,
563                                             ((data->beep_mask) >> 16) & 0xff);
564                 }
565
566                 val2 = (data->beep_mask >> 8) & 0x7f;
567         } else {                /* We are storing beep_enable */
568                 val2 = w83781d_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
569                 data->beep_enable = BEEP_ENABLE_TO_REG(val);
570         }
571
572         w83781d_write_value(client, W83781D_REG_BEEP_INTS2,
573                             val2 | data->beep_enable << 7);
574
575         mutex_unlock(&data->update_lock);
576         return count;
577 }
578
579 #define sysfs_beep(REG, reg) \
580 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
581 { \
582         return show_beep_##reg(dev, attr, buf); \
583 } \
584 static ssize_t store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
585 { \
586         return store_beep_reg(dev, buf, count, BEEP_##REG); \
587 } \
588 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, show_regs_beep_##reg, store_regs_beep_##reg);
589
590 sysfs_beep(ENABLE, enable);
591 sysfs_beep(MASK, mask);
592
593 static ssize_t
594 show_fan_div_reg(struct device *dev, char *buf, int nr)
595 {
596         struct w83781d_data *data = w83781d_update_device(dev);
597         return sprintf(buf, "%ld\n",
598                        (long) DIV_FROM_REG(data->fan_div[nr - 1]));
599 }
600
601 /* Note: we save and restore the fan minimum here, because its value is
602    determined in part by the fan divisor.  This follows the principle of
603    least surprise; the user doesn't expect the fan minimum to change just
604    because the divisor changed. */
605 static ssize_t
606 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
607 {
608         struct i2c_client *client = to_i2c_client(dev);
609         struct w83781d_data *data = i2c_get_clientdata(client);
610         unsigned long min;
611         u8 reg;
612         unsigned long val = simple_strtoul(buf, NULL, 10);
613
614         mutex_lock(&data->update_lock);
615         
616         /* Save fan_min */
617         min = FAN_FROM_REG(data->fan_min[nr],
618                            DIV_FROM_REG(data->fan_div[nr]));
619
620         data->fan_div[nr] = DIV_TO_REG(val, data->type);
621
622         reg = (w83781d_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
623                & (nr==0 ? 0xcf : 0x3f))
624             | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
625         w83781d_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
626
627         /* w83781d and as99127f don't have extended divisor bits */
628         if (data->type != w83781d && data->type != as99127f) {
629                 reg = (w83781d_read_value(client, W83781D_REG_VBAT)
630                        & ~(1 << (5 + nr)))
631                     | ((data->fan_div[nr] & 0x04) << (3 + nr));
632                 w83781d_write_value(client, W83781D_REG_VBAT, reg);
633         }
634
635         /* Restore fan_min */
636         data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
637         w83781d_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
638
639         mutex_unlock(&data->update_lock);
640         return count;
641 }
642
643 #define sysfs_fan_div(offset) \
644 static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
645 { \
646         return show_fan_div_reg(dev, buf, offset); \
647 } \
648 static ssize_t store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
649 { \
650         return store_fan_div_reg(dev, buf, count, offset - 1); \
651 } \
652 static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, show_regs_fan_div_##offset, store_regs_fan_div_##offset);
653
654 sysfs_fan_div(1);
655 sysfs_fan_div(2);
656 sysfs_fan_div(3);
657
658 static ssize_t
659 show_pwm_reg(struct device *dev, char *buf, int nr)
660 {
661         struct w83781d_data *data = w83781d_update_device(dev);
662         return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr - 1]));
663 }
664
665 static ssize_t
666 show_pwmenable_reg(struct device *dev, char *buf, int nr)
667 {
668         struct w83781d_data *data = w83781d_update_device(dev);
669         return sprintf(buf, "%ld\n", (long) data->pwmenable[nr - 1]);
670 }
671
672 static ssize_t
673 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
674 {
675         struct i2c_client *client = to_i2c_client(dev);
676         struct w83781d_data *data = i2c_get_clientdata(client);
677         u32 val;
678
679         val = simple_strtoul(buf, NULL, 10);
680
681         mutex_lock(&data->update_lock);
682         data->pwm[nr - 1] = PWM_TO_REG(val);
683         w83781d_write_value(client, W83781D_REG_PWM(nr), data->pwm[nr - 1]);
684         mutex_unlock(&data->update_lock);
685         return count;
686 }
687
688 static ssize_t
689 store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr)
690 {
691         struct i2c_client *client = to_i2c_client(dev);
692         struct w83781d_data *data = i2c_get_clientdata(client);
693         u32 val, reg;
694
695         val = simple_strtoul(buf, NULL, 10);
696
697         mutex_lock(&data->update_lock);
698
699         switch (val) {
700         case 0:
701         case 1:
702                 reg = w83781d_read_value(client, W83781D_REG_PWMCLK12);
703                 w83781d_write_value(client, W83781D_REG_PWMCLK12,
704                                     (reg & 0xf7) | (val << 3));
705
706                 reg = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
707                 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG,
708                                     (reg & 0xef) | (!val << 4));
709
710                 data->pwmenable[nr - 1] = val;
711                 break;
712
713         default:
714                 mutex_unlock(&data->update_lock);
715                 return -EINVAL;
716         }
717
718         mutex_unlock(&data->update_lock);
719         return count;
720 }
721
722 #define sysfs_pwm(offset) \
723 static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
724 { \
725         return show_pwm_reg(dev, buf, offset); \
726 } \
727 static ssize_t store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, \
728                 const char *buf, size_t count) \
729 { \
730         return store_pwm_reg(dev, buf, count, offset); \
731 } \
732 static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
733                 show_regs_pwm_##offset, store_regs_pwm_##offset);
734
735 #define sysfs_pwmenable(offset) \
736 static ssize_t show_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
737 { \
738         return show_pwmenable_reg(dev, buf, offset); \
739 } \
740 static ssize_t store_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, \
741                 const char *buf, size_t count) \
742 { \
743         return store_pwmenable_reg(dev, buf, count, offset); \
744 } \
745 static DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
746                 show_regs_pwmenable_##offset, store_regs_pwmenable_##offset);
747
748 sysfs_pwm(1);
749 sysfs_pwm(2);
750 sysfs_pwmenable(2);             /* only PWM2 can be enabled/disabled */
751 sysfs_pwm(3);
752 sysfs_pwm(4);
753
754 static ssize_t
755 show_sensor_reg(struct device *dev, char *buf, int nr)
756 {
757         struct w83781d_data *data = w83781d_update_device(dev);
758         return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
759 }
760
761 static ssize_t
762 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
763 {
764         struct i2c_client *client = to_i2c_client(dev);
765         struct w83781d_data *data = i2c_get_clientdata(client);
766         u32 val, tmp;
767
768         val = simple_strtoul(buf, NULL, 10);
769
770         mutex_lock(&data->update_lock);
771
772         switch (val) {
773         case 1:         /* PII/Celeron diode */
774                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
775                 w83781d_write_value(client, W83781D_REG_SCFG1,
776                                     tmp | BIT_SCFG1[nr - 1]);
777                 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
778                 w83781d_write_value(client, W83781D_REG_SCFG2,
779                                     tmp | BIT_SCFG2[nr - 1]);
780                 data->sens[nr - 1] = val;
781                 break;
782         case 2:         /* 3904 */
783                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
784                 w83781d_write_value(client, W83781D_REG_SCFG1,
785                                     tmp | BIT_SCFG1[nr - 1]);
786                 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
787                 w83781d_write_value(client, W83781D_REG_SCFG2,
788                                     tmp & ~BIT_SCFG2[nr - 1]);
789                 data->sens[nr - 1] = val;
790                 break;
791         case W83781D_DEFAULT_BETA:      /* thermistor */
792                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
793                 w83781d_write_value(client, W83781D_REG_SCFG1,
794                                     tmp & ~BIT_SCFG1[nr - 1]);
795                 data->sens[nr - 1] = val;
796                 break;
797         default:
798                 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or %d\n",
799                        (long) val, W83781D_DEFAULT_BETA);
800                 break;
801         }
802
803         mutex_unlock(&data->update_lock);
804         return count;
805 }
806
807 #define sysfs_sensor(offset) \
808 static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
809 { \
810     return show_sensor_reg(dev, buf, offset); \
811 } \
812 static ssize_t store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
813 { \
814     return store_sensor_reg(dev, buf, count, offset); \
815 } \
816 static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, show_regs_sensor_##offset, store_regs_sensor_##offset);
817
818 sysfs_sensor(1);
819 sysfs_sensor(2);
820 sysfs_sensor(3);
821
822 /* This function is called when:
823      * w83781d_driver is inserted (when this module is loaded), for each
824        available adapter
825      * when a new adapter is inserted (and w83781d_driver is still present) */
826 static int
827 w83781d_attach_adapter(struct i2c_adapter *adapter)
828 {
829         if (!(adapter->class & I2C_CLASS_HWMON))
830                 return 0;
831         return i2c_probe(adapter, &addr_data, w83781d_detect);
832 }
833
834 static int
835 w83781d_isa_attach_adapter(struct i2c_adapter *adapter)
836 {
837         return w83781d_detect(adapter, isa_address, -1);
838 }
839
840 /* Assumes that adapter is of I2C, not ISA variety.
841  * OTHERWISE DON'T CALL THIS
842  */
843 static int
844 w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
845                 struct i2c_client *new_client)
846 {
847         int i, val1 = 0, id;
848         int err;
849         const char *client_name = "";
850         struct w83781d_data *data = i2c_get_clientdata(new_client);
851
852         data->lm75[0] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
853         if (!(data->lm75[0])) {
854                 err = -ENOMEM;
855                 goto ERROR_SC_0;
856         }
857
858         id = i2c_adapter_id(adapter);
859
860         if (force_subclients[0] == id && force_subclients[1] == address) {
861                 for (i = 2; i <= 3; i++) {
862                         if (force_subclients[i] < 0x48 ||
863                             force_subclients[i] > 0x4f) {
864                                 dev_err(&new_client->dev, "Invalid subclient "
865                                         "address %d; must be 0x48-0x4f\n",
866                                         force_subclients[i]);
867                                 err = -EINVAL;
868                                 goto ERROR_SC_1;
869                         }
870                 }
871                 w83781d_write_value(new_client, W83781D_REG_I2C_SUBADDR,
872                                 (force_subclients[2] & 0x07) |
873                                 ((force_subclients[3] & 0x07) << 4));
874                 data->lm75[0]->addr = force_subclients[2];
875         } else {
876                 val1 = w83781d_read_value(new_client, W83781D_REG_I2C_SUBADDR);
877                 data->lm75[0]->addr = 0x48 + (val1 & 0x07);
878         }
879
880         if (kind != w83783s) {
881                 data->lm75[1] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
882                 if (!(data->lm75[1])) {
883                         err = -ENOMEM;
884                         goto ERROR_SC_1;
885                 }
886
887                 if (force_subclients[0] == id &&
888                     force_subclients[1] == address) {
889                         data->lm75[1]->addr = force_subclients[3];
890                 } else {
891                         data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07);
892                 }
893                 if (data->lm75[0]->addr == data->lm75[1]->addr) {
894                         dev_err(&new_client->dev,
895                                "Duplicate addresses 0x%x for subclients.\n",
896                                data->lm75[0]->addr);
897                         err = -EBUSY;
898                         goto ERROR_SC_2;
899                 }
900         }
901
902         if (kind == w83781d)
903                 client_name = "w83781d subclient";
904         else if (kind == w83782d)
905                 client_name = "w83782d subclient";
906         else if (kind == w83783s)
907                 client_name = "w83783s subclient";
908         else if (kind == w83627hf)
909                 client_name = "w83627hf subclient";
910         else if (kind == as99127f)
911                 client_name = "as99127f subclient";
912
913         for (i = 0; i <= 1; i++) {
914                 /* store all data in w83781d */
915                 i2c_set_clientdata(data->lm75[i], NULL);
916                 data->lm75[i]->adapter = adapter;
917                 data->lm75[i]->driver = &w83781d_driver;
918                 data->lm75[i]->flags = 0;
919                 strlcpy(data->lm75[i]->name, client_name,
920                         I2C_NAME_SIZE);
921                 if ((err = i2c_attach_client(data->lm75[i]))) {
922                         dev_err(&new_client->dev, "Subclient %d "
923                                 "registration at address 0x%x "
924                                 "failed.\n", i, data->lm75[i]->addr);
925                         if (i == 1)
926                                 goto ERROR_SC_3;
927                         goto ERROR_SC_2;
928                 }
929                 if (kind == w83783s)
930                         break;
931         }
932
933         return 0;
934
935 /* Undo inits in case of errors */
936 ERROR_SC_3:
937         i2c_detach_client(data->lm75[0]);
938 ERROR_SC_2:
939         kfree(data->lm75[1]);
940 ERROR_SC_1:
941         kfree(data->lm75[0]);
942 ERROR_SC_0:
943         return err;
944 }
945
946 #define IN_UNIT_ATTRS(X)                        \
947         &dev_attr_in##X##_input.attr,           \
948         &dev_attr_in##X##_min.attr,             \
949         &dev_attr_in##X##_max.attr
950
951 #define FAN_UNIT_ATTRS(X)                       \
952         &dev_attr_fan##X##_input.attr,          \
953         &dev_attr_fan##X##_min.attr,            \
954         &dev_attr_fan##X##_div.attr
955
956 #define TEMP_UNIT_ATTRS(X)                      \
957         &dev_attr_temp##X##_input.attr,         \
958         &dev_attr_temp##X##_max.attr,           \
959         &dev_attr_temp##X##_max_hyst.attr
960
961 static struct attribute* w83781d_attributes[] = {
962         IN_UNIT_ATTRS(0),
963         IN_UNIT_ATTRS(2),
964         IN_UNIT_ATTRS(3),
965         IN_UNIT_ATTRS(4),
966         IN_UNIT_ATTRS(5),
967         IN_UNIT_ATTRS(6),
968         FAN_UNIT_ATTRS(1),
969         FAN_UNIT_ATTRS(2),
970         FAN_UNIT_ATTRS(3),
971         TEMP_UNIT_ATTRS(1),
972         TEMP_UNIT_ATTRS(2),
973         &dev_attr_cpu0_vid.attr,
974         &dev_attr_vrm.attr,
975         &dev_attr_alarms.attr,
976         &dev_attr_beep_mask.attr,
977         &dev_attr_beep_enable.attr,
978         NULL
979 };
980 static const struct attribute_group w83781d_group = {
981         .attrs = w83781d_attributes,
982 };
983
984 static struct attribute *w83781d_attributes_opt[] = {
985         IN_UNIT_ATTRS(1),
986         IN_UNIT_ATTRS(7),
987         IN_UNIT_ATTRS(8),
988         TEMP_UNIT_ATTRS(3),
989         &dev_attr_pwm1.attr,
990         &dev_attr_pwm2.attr,
991         &dev_attr_pwm2_enable.attr,
992         &dev_attr_pwm3.attr,
993         &dev_attr_pwm4.attr,
994         &dev_attr_temp1_type.attr,
995         &dev_attr_temp2_type.attr,
996         &dev_attr_temp3_type.attr,
997         NULL
998 };
999 static const struct attribute_group w83781d_group_opt = {
1000         .attrs = w83781d_attributes_opt,
1001 };
1002
1003 static int
1004 w83781d_detect(struct i2c_adapter *adapter, int address, int kind)
1005 {
1006         int i = 0, val1 = 0, val2;
1007         struct i2c_client *client;
1008         struct device *dev;
1009         struct w83781d_data *data;
1010         int err;
1011         const char *client_name = "";
1012         int is_isa = i2c_is_isa_adapter(adapter);
1013         enum vendor { winbond, asus } vendid;
1014
1015         if (!is_isa
1016             && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1017                 err = -EINVAL;
1018                 goto ERROR0;
1019         }
1020
1021         /* Prevent users from forcing a kind for a bus it isn't supposed
1022            to possibly be on */
1023         if (is_isa && (kind == as99127f || kind == w83783s)) {
1024                 dev_err(&adapter->dev,
1025                         "Cannot force I2C-only chip for ISA address 0x%02x.\n",
1026                         address);
1027                 err = -EINVAL;
1028                 goto ERROR0;
1029         }
1030         
1031         if (is_isa)
1032                 if (!request_region(address, W83781D_EXTENT,
1033                                     w83781d_isa_driver.driver.name)) {
1034                         dev_dbg(&adapter->dev, "Request of region "
1035                                 "0x%x-0x%x for w83781d failed\n", address,
1036                                 address + W83781D_EXTENT - 1);
1037                         err = -EBUSY;
1038                         goto ERROR0;
1039                 }
1040
1041         /* Probe whether there is anything available on this address. Already
1042            done for SMBus clients */
1043         if (kind < 0) {
1044                 if (is_isa) {
1045
1046 #define REALLY_SLOW_IO
1047                         /* We need the timeouts for at least some LM78-like
1048                            chips. But only if we read 'undefined' registers. */
1049                         i = inb_p(address + 1);
1050                         if (inb_p(address + 2) != i
1051                          || inb_p(address + 3) != i
1052                          || inb_p(address + 7) != i) {
1053                                 dev_dbg(&adapter->dev, "Detection of w83781d "
1054                                         "chip failed at step 1\n");
1055                                 err = -ENODEV;
1056                                 goto ERROR1;
1057                         }
1058 #undef REALLY_SLOW_IO
1059
1060                         /* Let's just hope nothing breaks here */
1061                         i = inb_p(address + 5) & 0x7f;
1062                         outb_p(~i & 0x7f, address + 5);
1063                         val2 = inb_p(address + 5) & 0x7f;
1064                         if (val2 != (~i & 0x7f)) {
1065                                 outb_p(i, address + 5);
1066                                 dev_dbg(&adapter->dev, "Detection of w83781d "
1067                                         "chip failed at step 2 (0x%x != "
1068                                         "0x%x at 0x%x)\n", val2, ~i & 0x7f,
1069                                         address + 5);
1070                                 err = -ENODEV;
1071                                 goto ERROR1;
1072                         }
1073                 }
1074         }
1075
1076         /* OK. For now, we presume we have a valid client. We now create the
1077            client structure, even though we cannot fill it completely yet.
1078            But it allows us to access w83781d_{read,write}_value. */
1079
1080         if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1081                 err = -ENOMEM;
1082                 goto ERROR1;
1083         }
1084
1085         client = &data->client;
1086         i2c_set_clientdata(client, data);
1087         client->addr = address;
1088         mutex_init(&data->lock);
1089         client->adapter = adapter;
1090         client->driver = is_isa ? &w83781d_isa_driver : &w83781d_driver;
1091         client->flags = 0;
1092         dev = &client->dev;
1093
1094         /* Now, we do the remaining detection. */
1095
1096         /* The w8378?d may be stuck in some other bank than bank 0. This may
1097            make reading other information impossible. Specify a force=... or
1098            force_*=... parameter, and the Winbond will be reset to the right
1099            bank. */
1100         if (kind < 0) {
1101                 if (w83781d_read_value(client, W83781D_REG_CONFIG) & 0x80) {
1102                         dev_dbg(dev, "Detection failed at step 3\n");
1103                         err = -ENODEV;
1104                         goto ERROR2;
1105                 }
1106                 val1 = w83781d_read_value(client, W83781D_REG_BANK);
1107                 val2 = w83781d_read_value(client, W83781D_REG_CHIPMAN);
1108                 /* Check for Winbond or Asus ID if in bank 0 */
1109                 if ((!(val1 & 0x07)) &&
1110                     (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
1111                      || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) {
1112                         dev_dbg(dev, "Detection failed at step 4\n");
1113                         err = -ENODEV;
1114                         goto ERROR2;
1115                 }
1116                 /* If Winbond SMBus, check address at 0x48.
1117                    Asus doesn't support, except for as99127f rev.2 */
1118                 if ((!is_isa) && (((!(val1 & 0x80)) && (val2 == 0xa3)) ||
1119                                   ((val1 & 0x80) && (val2 == 0x5c)))) {
1120                         if (w83781d_read_value
1121                             (client, W83781D_REG_I2C_ADDR) != address) {
1122                                 dev_dbg(dev, "Detection failed at step 5\n");
1123                                 err = -ENODEV;
1124                                 goto ERROR2;
1125                         }
1126                 }
1127         }
1128
1129         /* We have either had a force parameter, or we have already detected the
1130            Winbond. Put it now into bank 0 and Vendor ID High Byte */
1131         w83781d_write_value(client, W83781D_REG_BANK,
1132                             (w83781d_read_value(client, W83781D_REG_BANK)
1133                              & 0x78) | 0x80);
1134
1135         /* Determine the chip type. */
1136         if (kind <= 0) {
1137                 /* get vendor ID */
1138                 val2 = w83781d_read_value(client, W83781D_REG_CHIPMAN);
1139                 if (val2 == 0x5c)
1140                         vendid = winbond;
1141                 else if (val2 == 0x12)
1142                         vendid = asus;
1143                 else {
1144                         dev_dbg(dev, "Chip was made by neither "
1145                                 "Winbond nor Asus?\n");
1146                         err = -ENODEV;
1147                         goto ERROR2;
1148                 }
1149
1150                 val1 = w83781d_read_value(client, W83781D_REG_WCHIPID);
1151                 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1152                         kind = w83781d;
1153                 else if (val1 == 0x30 && vendid == winbond)
1154                         kind = w83782d;
1155                 else if (val1 == 0x40 && vendid == winbond && !is_isa
1156                                 && address == 0x2d)
1157                         kind = w83783s;
1158                 else if (val1 == 0x21 && vendid == winbond)
1159                         kind = w83627hf;
1160                 else if (val1 == 0x31 && !is_isa && address >= 0x28)
1161                         kind = as99127f;
1162                 else {
1163                         if (kind == 0)
1164                                 dev_warn(dev, "Ignoring 'force' "
1165                                          "parameter for unknown chip at "
1166                                          "adapter %d, address 0x%02x\n",
1167                                          i2c_adapter_id(adapter), address);
1168                         err = -EINVAL;
1169                         goto ERROR2;
1170                 }
1171         }
1172
1173         if (kind == w83781d) {
1174                 client_name = "w83781d";
1175         } else if (kind == w83782d) {
1176                 client_name = "w83782d";
1177         } else if (kind == w83783s) {
1178                 client_name = "w83783s";
1179         } else if (kind == w83627hf) {
1180                 client_name = "w83627hf";
1181         } else if (kind == as99127f) {
1182                 client_name = "as99127f";
1183         }
1184
1185         /* Fill in the remaining client fields and put into the global list */
1186         strlcpy(client->name, client_name, I2C_NAME_SIZE);
1187         data->type = kind;
1188
1189         data->valid = 0;
1190         mutex_init(&data->update_lock);
1191
1192         /* Tell the I2C layer a new client has arrived */
1193         if ((err = i2c_attach_client(client)))
1194                 goto ERROR2;
1195
1196         /* attach secondary i2c lm75-like clients */
1197         if (!is_isa) {
1198                 if ((err = w83781d_detect_subclients(adapter, address,
1199                                 kind, client)))
1200                         goto ERROR3;
1201         } else {
1202                 data->lm75[0] = NULL;
1203                 data->lm75[1] = NULL;
1204         }
1205
1206         /* Initialize the chip */
1207         w83781d_init_client(client);
1208
1209         /* A few vars need to be filled upon startup */
1210         for (i = 1; i <= 3; i++) {
1211                 data->fan_min[i - 1] = w83781d_read_value(client,
1212                                         W83781D_REG_FAN_MIN(i));
1213         }
1214         if (kind != w83781d && kind != as99127f)
1215                 for (i = 0; i < 4; i++)
1216                         data->pwmenable[i] = 1;
1217
1218         /* Register sysfs hooks */
1219         if ((err = sysfs_create_group(&dev->kobj, &w83781d_group)))
1220                 goto ERROR4;
1221
1222         if (kind != w83783s) {
1223                 if ((err = device_create_file(dev, &dev_attr_in1_input))
1224                     || (err = device_create_file(dev, &dev_attr_in1_min))
1225                     || (err = device_create_file(dev, &dev_attr_in1_max)))
1226                         goto ERROR4;
1227         }
1228         if (kind != as99127f && kind != w83781d && kind != w83783s) {
1229                 if ((err = device_create_file(dev, &dev_attr_in7_input))
1230                     || (err = device_create_file(dev, &dev_attr_in7_min))
1231                     || (err = device_create_file(dev, &dev_attr_in7_max))
1232                     || (err = device_create_file(dev, &dev_attr_in8_input))
1233                     || (err = device_create_file(dev, &dev_attr_in8_min))
1234                     || (err = device_create_file(dev, &dev_attr_in8_max)))
1235                         goto ERROR4;
1236         }
1237         if (kind != w83783s) {
1238                 if ((err = device_create_file(dev, &dev_attr_temp3_input))
1239                     || (err = device_create_file(dev, &dev_attr_temp3_max))
1240                     || (err = device_create_file(dev,
1241                                                  &dev_attr_temp3_max_hyst)))
1242                         goto ERROR4;
1243         }
1244
1245         if (kind != w83781d && kind != as99127f) {
1246                 if ((err = device_create_file(dev, &dev_attr_pwm1))
1247                     || (err = device_create_file(dev, &dev_attr_pwm2))
1248                     || (err = device_create_file(dev, &dev_attr_pwm2_enable)))
1249                         goto ERROR4;
1250         }
1251         if (kind == w83782d && !is_isa) {
1252                 if ((err = device_create_file(dev, &dev_attr_pwm3))
1253                     || (err = device_create_file(dev, &dev_attr_pwm4)))
1254                         goto ERROR4;
1255         }
1256
1257         if (kind != as99127f && kind != w83781d) {
1258                 if ((err = device_create_file(dev, &dev_attr_temp1_type))
1259                     || (err = device_create_file(dev,
1260                                                  &dev_attr_temp2_type)))
1261                         goto ERROR4;
1262                 if (kind != w83783s) {
1263                         if ((err = device_create_file(dev,
1264                                                       &dev_attr_temp3_type)))
1265                                 goto ERROR4;
1266                 }
1267         }
1268
1269         data->class_dev = hwmon_device_register(dev);
1270         if (IS_ERR(data->class_dev)) {
1271                 err = PTR_ERR(data->class_dev);
1272                 goto ERROR4;
1273         }
1274
1275         return 0;
1276
1277 ERROR4:
1278         sysfs_remove_group(&dev->kobj, &w83781d_group);
1279         sysfs_remove_group(&dev->kobj, &w83781d_group_opt);
1280
1281         if (data->lm75[1]) {
1282                 i2c_detach_client(data->lm75[1]);
1283                 kfree(data->lm75[1]);
1284         }
1285         if (data->lm75[0]) {
1286                 i2c_detach_client(data->lm75[0]);
1287                 kfree(data->lm75[0]);
1288         }
1289 ERROR3:
1290         i2c_detach_client(client);
1291 ERROR2:
1292         kfree(data);
1293 ERROR1:
1294         if (is_isa)
1295                 release_region(address, W83781D_EXTENT);
1296 ERROR0:
1297         return err;
1298 }
1299
1300 static int
1301 w83781d_detach_client(struct i2c_client *client)
1302 {
1303         struct w83781d_data *data = i2c_get_clientdata(client);
1304         int err;
1305
1306         /* main client */
1307         if (data) {
1308                 hwmon_device_unregister(data->class_dev);
1309                 sysfs_remove_group(&client->dev.kobj, &w83781d_group);
1310                 sysfs_remove_group(&client->dev.kobj, &w83781d_group_opt);
1311         }
1312         if (i2c_is_isa_client(client))
1313                 release_region(client->addr, W83781D_EXTENT);
1314
1315         if ((err = i2c_detach_client(client)))
1316                 return err;
1317
1318         /* main client */
1319         if (data)
1320                 kfree(data);
1321
1322         /* subclient */
1323         else
1324                 kfree(client);
1325
1326         return 0;
1327 }
1328
1329 /* The SMBus locks itself, usually, but nothing may access the Winbond between
1330    bank switches. ISA access must always be locked explicitly! 
1331    We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1332    would slow down the W83781D access and should not be necessary. 
1333    There are some ugly typecasts here, but the good news is - they should
1334    nowhere else be necessary! */
1335 static int
1336 w83781d_read_value(struct i2c_client *client, u16 reg)
1337 {
1338         struct w83781d_data *data = i2c_get_clientdata(client);
1339         int res, word_sized, bank;
1340         struct i2c_client *cl;
1341
1342         mutex_lock(&data->lock);
1343         if (i2c_is_isa_client(client)) {
1344                 word_sized = (((reg & 0xff00) == 0x100)
1345                               || ((reg & 0xff00) == 0x200))
1346                     && (((reg & 0x00ff) == 0x50)
1347                         || ((reg & 0x00ff) == 0x53)
1348                         || ((reg & 0x00ff) == 0x55));
1349                 if (reg & 0xff00) {
1350                         outb_p(W83781D_REG_BANK,
1351                                client->addr + W83781D_ADDR_REG_OFFSET);
1352                         outb_p(reg >> 8,
1353                                client->addr + W83781D_DATA_REG_OFFSET);
1354                 }
1355                 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1356                 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1357                 if (word_sized) {
1358                         outb_p((reg & 0xff) + 1,
1359                                client->addr + W83781D_ADDR_REG_OFFSET);
1360                         res =
1361                             (res << 8) + inb_p(client->addr +
1362                                                W83781D_DATA_REG_OFFSET);
1363                 }
1364                 if (reg & 0xff00) {
1365                         outb_p(W83781D_REG_BANK,
1366                                client->addr + W83781D_ADDR_REG_OFFSET);
1367                         outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1368                 }
1369         } else {
1370                 bank = (reg >> 8) & 0x0f;
1371                 if (bank > 2)
1372                         /* switch banks */
1373                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1374                                                   bank);
1375                 if (bank == 0 || bank > 2) {
1376                         res = i2c_smbus_read_byte_data(client, reg & 0xff);
1377                 } else {
1378                         /* switch to subclient */
1379                         cl = data->lm75[bank - 1];
1380                         /* convert from ISA to LM75 I2C addresses */
1381                         switch (reg & 0xff) {
1382                         case 0x50:      /* TEMP */
1383                                 res = swab16(i2c_smbus_read_word_data(cl, 0));
1384                                 break;
1385                         case 0x52:      /* CONFIG */
1386                                 res = i2c_smbus_read_byte_data(cl, 1);
1387                                 break;
1388                         case 0x53:      /* HYST */
1389                                 res = swab16(i2c_smbus_read_word_data(cl, 2));
1390                                 break;
1391                         case 0x55:      /* OVER */
1392                         default:
1393                                 res = swab16(i2c_smbus_read_word_data(cl, 3));
1394                                 break;
1395                         }
1396                 }
1397                 if (bank > 2)
1398                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1399         }
1400         mutex_unlock(&data->lock);
1401         return res;
1402 }
1403
1404 static int
1405 w83781d_write_value(struct i2c_client *client, u16 reg, u16 value)
1406 {
1407         struct w83781d_data *data = i2c_get_clientdata(client);
1408         int word_sized, bank;
1409         struct i2c_client *cl;
1410
1411         mutex_lock(&data->lock);
1412         if (i2c_is_isa_client(client)) {
1413                 word_sized = (((reg & 0xff00) == 0x100)
1414                               || ((reg & 0xff00) == 0x200))
1415                     && (((reg & 0x00ff) == 0x53)
1416                         || ((reg & 0x00ff) == 0x55));
1417                 if (reg & 0xff00) {
1418                         outb_p(W83781D_REG_BANK,
1419                                client->addr + W83781D_ADDR_REG_OFFSET);
1420                         outb_p(reg >> 8,
1421                                client->addr + W83781D_DATA_REG_OFFSET);
1422                 }
1423                 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1424                 if (word_sized) {
1425                         outb_p(value >> 8,
1426                                client->addr + W83781D_DATA_REG_OFFSET);
1427                         outb_p((reg & 0xff) + 1,
1428                                client->addr + W83781D_ADDR_REG_OFFSET);
1429                 }
1430                 outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET);
1431                 if (reg & 0xff00) {
1432                         outb_p(W83781D_REG_BANK,
1433                                client->addr + W83781D_ADDR_REG_OFFSET);
1434                         outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1435                 }
1436         } else {
1437                 bank = (reg >> 8) & 0x0f;
1438                 if (bank > 2)
1439                         /* switch banks */
1440                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1441                                                   bank);
1442                 if (bank == 0 || bank > 2) {
1443                         i2c_smbus_write_byte_data(client, reg & 0xff,
1444                                                   value & 0xff);
1445                 } else {
1446                         /* switch to subclient */
1447                         cl = data->lm75[bank - 1];
1448                         /* convert from ISA to LM75 I2C addresses */
1449                         switch (reg & 0xff) {
1450                         case 0x52:      /* CONFIG */
1451                                 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1452                                 break;
1453                         case 0x53:      /* HYST */
1454                                 i2c_smbus_write_word_data(cl, 2, swab16(value));
1455                                 break;
1456                         case 0x55:      /* OVER */
1457                                 i2c_smbus_write_word_data(cl, 3, swab16(value));
1458                                 break;
1459                         }
1460                 }
1461                 if (bank > 2)
1462                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1463         }
1464         mutex_unlock(&data->lock);
1465         return 0;
1466 }
1467
1468 static void
1469 w83781d_init_client(struct i2c_client *client)
1470 {
1471         struct w83781d_data *data = i2c_get_clientdata(client);
1472         int i, p;
1473         int type = data->type;
1474         u8 tmp;
1475
1476         if (reset && type != as99127f) { /* this resets registers we don't have
1477                                            documentation for on the as99127f */
1478                 /* Resetting the chip has been the default for a long time,
1479                    but it causes the BIOS initializations (fan clock dividers,
1480                    thermal sensor types...) to be lost, so it is now optional.
1481                    It might even go away if nobody reports it as being useful,
1482                    as I see very little reason why this would be needed at
1483                    all. */
1484                 dev_info(&client->dev, "If reset=1 solved a problem you were "
1485                          "having, please report!\n");
1486
1487                 /* save these registers */
1488                 i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
1489                 p = w83781d_read_value(client, W83781D_REG_PWMCLK12);
1490                 /* Reset all except Watchdog values and last conversion values
1491                    This sets fan-divs to 2, among others */
1492                 w83781d_write_value(client, W83781D_REG_CONFIG, 0x80);
1493                 /* Restore the registers and disable power-on abnormal beep.
1494                    This saves FAN 1/2/3 input/output values set by BIOS. */
1495                 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1496                 w83781d_write_value(client, W83781D_REG_PWMCLK12, p);
1497                 /* Disable master beep-enable (reset turns it on).
1498                    Individual beep_mask should be reset to off but for some reason
1499                    disabling this bit helps some people not get beeped */
1500                 w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1501         }
1502
1503         /* Disable power-on abnormal beep, as advised by the datasheet.
1504            Already done if reset=1. */
1505         if (init && !reset && type != as99127f) {
1506                 i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
1507                 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1508         }
1509
1510         data->vrm = vid_which_vrm();
1511
1512         if ((type != w83781d) && (type != as99127f)) {
1513                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
1514                 for (i = 1; i <= 3; i++) {
1515                         if (!(tmp & BIT_SCFG1[i - 1])) {
1516                                 data->sens[i - 1] = W83781D_DEFAULT_BETA;
1517                         } else {
1518                                 if (w83781d_read_value
1519                                     (client,
1520                                      W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1521                                         data->sens[i - 1] = 1;
1522                                 else
1523                                         data->sens[i - 1] = 2;
1524                         }
1525                         if (type == w83783s && i == 2)
1526                                 break;
1527                 }
1528         }
1529
1530         if (init && type != as99127f) {
1531                 /* Enable temp2 */
1532                 tmp = w83781d_read_value(client, W83781D_REG_TEMP2_CONFIG);
1533                 if (tmp & 0x01) {
1534                         dev_warn(&client->dev, "Enabling temp2, readings "
1535                                  "might not make sense\n");
1536                         w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG,
1537                                 tmp & 0xfe);
1538                 }
1539
1540                 /* Enable temp3 */
1541                 if (type != w83783s) {
1542                         tmp = w83781d_read_value(client,
1543                                 W83781D_REG_TEMP3_CONFIG);
1544                         if (tmp & 0x01) {
1545                                 dev_warn(&client->dev, "Enabling temp3, "
1546                                          "readings might not make sense\n");
1547                                 w83781d_write_value(client,
1548                                         W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1549                         }
1550                 }
1551         }
1552
1553         /* Start monitoring */
1554         w83781d_write_value(client, W83781D_REG_CONFIG,
1555                             (w83781d_read_value(client,
1556                                                 W83781D_REG_CONFIG) & 0xf7)
1557                             | 0x01);
1558 }
1559
1560 static struct w83781d_data *w83781d_update_device(struct device *dev)
1561 {
1562         struct i2c_client *client = to_i2c_client(dev);
1563         struct w83781d_data *data = i2c_get_clientdata(client);
1564         int i;
1565
1566         mutex_lock(&data->update_lock);
1567
1568         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1569             || !data->valid) {
1570                 dev_dbg(dev, "Starting device update\n");
1571
1572                 for (i = 0; i <= 8; i++) {
1573                         if (data->type == w83783s && i == 1)
1574                                 continue;       /* 783S has no in1 */
1575                         data->in[i] =
1576                             w83781d_read_value(client, W83781D_REG_IN(i));
1577                         data->in_min[i] =
1578                             w83781d_read_value(client, W83781D_REG_IN_MIN(i));
1579                         data->in_max[i] =
1580                             w83781d_read_value(client, W83781D_REG_IN_MAX(i));
1581                         if ((data->type != w83782d)
1582                             && (data->type != w83627hf) && (i == 6))
1583                                 break;
1584                 }
1585                 for (i = 1; i <= 3; i++) {
1586                         data->fan[i - 1] =
1587                             w83781d_read_value(client, W83781D_REG_FAN(i));
1588                         data->fan_min[i - 1] =
1589                             w83781d_read_value(client, W83781D_REG_FAN_MIN(i));
1590                 }
1591                 if (data->type != w83781d && data->type != as99127f) {
1592                         for (i = 1; i <= 4; i++) {
1593                                 data->pwm[i - 1] =
1594                                     w83781d_read_value(client,
1595                                                        W83781D_REG_PWM(i));
1596                                 if ((data->type != w83782d
1597                                      || i2c_is_isa_client(client))
1598                                     && i == 2)
1599                                         break;
1600                         }
1601                         /* Only PWM2 can be disabled */
1602                         data->pwmenable[1] = (w83781d_read_value(client,
1603                                               W83781D_REG_PWMCLK12) & 0x08) >> 3;
1604                 }
1605
1606                 data->temp = w83781d_read_value(client, W83781D_REG_TEMP(1));
1607                 data->temp_max =
1608                     w83781d_read_value(client, W83781D_REG_TEMP_OVER(1));
1609                 data->temp_max_hyst =
1610                     w83781d_read_value(client, W83781D_REG_TEMP_HYST(1));
1611                 data->temp_add[0] =
1612                     w83781d_read_value(client, W83781D_REG_TEMP(2));
1613                 data->temp_max_add[0] =
1614                     w83781d_read_value(client, W83781D_REG_TEMP_OVER(2));
1615                 data->temp_max_hyst_add[0] =
1616                     w83781d_read_value(client, W83781D_REG_TEMP_HYST(2));
1617                 if (data->type != w83783s) {
1618                         data->temp_add[1] =
1619                             w83781d_read_value(client, W83781D_REG_TEMP(3));
1620                         data->temp_max_add[1] =
1621                             w83781d_read_value(client,
1622                                                W83781D_REG_TEMP_OVER(3));
1623                         data->temp_max_hyst_add[1] =
1624                             w83781d_read_value(client,
1625                                                W83781D_REG_TEMP_HYST(3));
1626                 }
1627                 i = w83781d_read_value(client, W83781D_REG_VID_FANDIV);
1628                 data->vid = i & 0x0f;
1629                 data->vid |= (w83781d_read_value(client,
1630                                         W83781D_REG_CHIPID) & 0x01) << 4;
1631                 data->fan_div[0] = (i >> 4) & 0x03;
1632                 data->fan_div[1] = (i >> 6) & 0x03;
1633                 data->fan_div[2] = (w83781d_read_value(client,
1634                                         W83781D_REG_PIN) >> 6) & 0x03;
1635                 if ((data->type != w83781d) && (data->type != as99127f)) {
1636                         i = w83781d_read_value(client, W83781D_REG_VBAT);
1637                         data->fan_div[0] |= (i >> 3) & 0x04;
1638                         data->fan_div[1] |= (i >> 4) & 0x04;
1639                         data->fan_div[2] |= (i >> 5) & 0x04;
1640                 }
1641                 if ((data->type == w83782d) || (data->type == w83627hf)) {
1642                         data->alarms = w83781d_read_value(client,
1643                                                 W83782D_REG_ALARM1)
1644                                      | (w83781d_read_value(client,
1645                                                 W83782D_REG_ALARM2) << 8)
1646                                      | (w83781d_read_value(client,
1647                                                 W83782D_REG_ALARM3) << 16);
1648                 } else if (data->type == w83783s) {
1649                         data->alarms = w83781d_read_value(client,
1650                                                 W83782D_REG_ALARM1)
1651                                      | (w83781d_read_value(client,
1652                                                 W83782D_REG_ALARM2) << 8);
1653                 } else {
1654                         /* No real-time status registers, fall back to
1655                            interrupt status registers */
1656                         data->alarms = w83781d_read_value(client,
1657                                                 W83781D_REG_ALARM1)
1658                                      | (w83781d_read_value(client,
1659                                                 W83781D_REG_ALARM2) << 8);
1660                 }
1661                 i = w83781d_read_value(client, W83781D_REG_BEEP_INTS2);
1662                 data->beep_enable = i >> 7;
1663                 data->beep_mask = ((i & 0x7f) << 8) +
1664                     w83781d_read_value(client, W83781D_REG_BEEP_INTS1);
1665                 if ((data->type != w83781d) && (data->type != as99127f)) {
1666                         data->beep_mask |=
1667                             w83781d_read_value(client,
1668                                                W83781D_REG_BEEP_INTS3) << 16;
1669                 }
1670                 data->last_updated = jiffies;
1671                 data->valid = 1;
1672         }
1673
1674         mutex_unlock(&data->update_lock);
1675
1676         return data;
1677 }
1678
1679 static int __init
1680 sensors_w83781d_init(void)
1681 {
1682         int res;
1683
1684         res = i2c_add_driver(&w83781d_driver);
1685         if (res)
1686                 return res;
1687
1688         res = i2c_isa_add_driver(&w83781d_isa_driver);
1689         if (res) {
1690                 i2c_del_driver(&w83781d_driver);
1691                 return res;
1692         }
1693
1694         return 0;
1695 }
1696
1697 static void __exit
1698 sensors_w83781d_exit(void)
1699 {
1700         i2c_isa_del_driver(&w83781d_isa_driver);
1701         i2c_del_driver(&w83781d_driver);
1702 }
1703
1704 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1705               "Philip Edelbrock <phil@netroedge.com>, "
1706               "and Mark Studebaker <mdsxyz123@yahoo.com>");
1707 MODULE_DESCRIPTION("W83781D driver");
1708 MODULE_LICENSE("GPL");
1709
1710 module_init(sensors_w83781d_init);
1711 module_exit(sensors_w83781d_exit);