2 * arch/arm/mach-at91/at91sam9260_devices.c
4 * Copyright (C) 2006 Atmel
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include <asm/mach/arch.h>
13 #include <asm/mach/map.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/platform_device.h>
17 #include <linux/i2c-gpio.h>
19 #include <asm/arch/board.h>
20 #include <asm/arch/gpio.h>
21 #include <asm/arch/at91sam9260.h>
22 #include <asm/arch/at91sam9260_matrix.h>
23 #include <asm/arch/at91sam9_smc.h>
28 /* --------------------------------------------------------------------
30 * -------------------------------------------------------------------- */
32 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
33 static u64 ohci_dmamask = DMA_BIT_MASK(32);
34 static struct at91_usbh_data usbh_data;
36 static struct resource usbh_resources[] = {
38 .start = AT91SAM9260_UHP_BASE,
39 .end = AT91SAM9260_UHP_BASE + SZ_1M - 1,
40 .flags = IORESOURCE_MEM,
43 .start = AT91SAM9260_ID_UHP,
44 .end = AT91SAM9260_ID_UHP,
45 .flags = IORESOURCE_IRQ,
49 static struct platform_device at91_usbh_device = {
53 .dma_mask = &ohci_dmamask,
54 .coherent_dma_mask = DMA_BIT_MASK(32),
55 .platform_data = &usbh_data,
57 .resource = usbh_resources,
58 .num_resources = ARRAY_SIZE(usbh_resources),
61 void __init at91_add_device_usbh(struct at91_usbh_data *data)
67 platform_device_register(&at91_usbh_device);
70 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
74 /* --------------------------------------------------------------------
76 * -------------------------------------------------------------------- */
78 #ifdef CONFIG_USB_GADGET_AT91
79 static struct at91_udc_data udc_data;
81 static struct resource udc_resources[] = {
83 .start = AT91SAM9260_BASE_UDP,
84 .end = AT91SAM9260_BASE_UDP + SZ_16K - 1,
85 .flags = IORESOURCE_MEM,
88 .start = AT91SAM9260_ID_UDP,
89 .end = AT91SAM9260_ID_UDP,
90 .flags = IORESOURCE_IRQ,
94 static struct platform_device at91_udc_device = {
98 .platform_data = &udc_data,
100 .resource = udc_resources,
101 .num_resources = ARRAY_SIZE(udc_resources),
104 void __init at91_add_device_udc(struct at91_udc_data *data)
109 if (data->vbus_pin) {
110 at91_set_gpio_input(data->vbus_pin, 0);
111 at91_set_deglitch(data->vbus_pin, 1);
114 /* Pullup pin is handled internally by USB device peripheral */
117 platform_device_register(&at91_udc_device);
120 void __init at91_add_device_udc(struct at91_udc_data *data) {}
124 /* --------------------------------------------------------------------
126 * -------------------------------------------------------------------- */
128 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
129 static u64 eth_dmamask = DMA_BIT_MASK(32);
130 static struct at91_eth_data eth_data;
132 static struct resource eth_resources[] = {
134 .start = AT91SAM9260_BASE_EMAC,
135 .end = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
136 .flags = IORESOURCE_MEM,
139 .start = AT91SAM9260_ID_EMAC,
140 .end = AT91SAM9260_ID_EMAC,
141 .flags = IORESOURCE_IRQ,
145 static struct platform_device at91sam9260_eth_device = {
149 .dma_mask = ð_dmamask,
150 .coherent_dma_mask = DMA_BIT_MASK(32),
151 .platform_data = ð_data,
153 .resource = eth_resources,
154 .num_resources = ARRAY_SIZE(eth_resources),
157 void __init at91_add_device_eth(struct at91_eth_data *data)
162 if (data->phy_irq_pin) {
163 at91_set_gpio_input(data->phy_irq_pin, 0);
164 at91_set_deglitch(data->phy_irq_pin, 1);
167 /* Pins used for MII and RMII */
168 at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */
169 at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */
170 at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */
171 at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */
172 at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */
173 at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */
174 at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */
175 at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */
176 at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */
177 at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */
179 if (!data->is_rmii) {
180 at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */
181 at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */
182 at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */
183 at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */
184 at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */
185 at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */
186 at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */
187 at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */
191 platform_device_register(&at91sam9260_eth_device);
194 void __init at91_add_device_eth(struct at91_eth_data *data) {}
198 /* --------------------------------------------------------------------
200 * -------------------------------------------------------------------- */
202 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
203 static u64 mmc_dmamask = DMA_BIT_MASK(32);
204 static struct at91_mmc_data mmc_data;
206 static struct resource mmc_resources[] = {
208 .start = AT91SAM9260_BASE_MCI,
209 .end = AT91SAM9260_BASE_MCI + SZ_16K - 1,
210 .flags = IORESOURCE_MEM,
213 .start = AT91SAM9260_ID_MCI,
214 .end = AT91SAM9260_ID_MCI,
215 .flags = IORESOURCE_IRQ,
219 static struct platform_device at91sam9260_mmc_device = {
223 .dma_mask = &mmc_dmamask,
224 .coherent_dma_mask = DMA_BIT_MASK(32),
225 .platform_data = &mmc_data,
227 .resource = mmc_resources,
228 .num_resources = ARRAY_SIZE(mmc_resources),
231 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
238 at91_set_gpio_input(data->det_pin, 1);
239 at91_set_deglitch(data->det_pin, 1);
242 at91_set_gpio_input(data->wp_pin, 1);
244 at91_set_gpio_output(data->vcc_pin, 0);
247 at91_set_A_periph(AT91_PIN_PA8, 0);
251 at91_set_B_periph(AT91_PIN_PA1, 1);
253 /* DAT0, maybe DAT1..DAT3 */
254 at91_set_B_periph(AT91_PIN_PA0, 1);
256 at91_set_B_periph(AT91_PIN_PA5, 1);
257 at91_set_B_periph(AT91_PIN_PA4, 1);
258 at91_set_B_periph(AT91_PIN_PA3, 1);
262 at91_set_A_periph(AT91_PIN_PA7, 1);
264 /* DAT0, maybe DAT1..DAT3 */
265 at91_set_A_periph(AT91_PIN_PA6, 1);
267 at91_set_A_periph(AT91_PIN_PA9, 1);
268 at91_set_A_periph(AT91_PIN_PA10, 1);
269 at91_set_A_periph(AT91_PIN_PA11, 1);
274 platform_device_register(&at91sam9260_mmc_device);
277 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
281 /* --------------------------------------------------------------------
283 * -------------------------------------------------------------------- */
285 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
286 static struct at91_nand_data nand_data;
288 #define NAND_BASE AT91_CHIPSELECT_3
290 static struct resource nand_resources[] = {
293 .end = NAND_BASE + SZ_256M - 1,
294 .flags = IORESOURCE_MEM,
297 .start = AT91_BASE_SYS + AT91_ECC,
298 .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
299 .flags = IORESOURCE_MEM,
303 static struct platform_device at91sam9260_nand_device = {
307 .platform_data = &nand_data,
309 .resource = nand_resources,
310 .num_resources = ARRAY_SIZE(nand_resources),
313 void __init at91_add_device_nand(struct at91_nand_data *data)
315 unsigned long csa, mode;
320 csa = at91_sys_read(AT91_MATRIX_EBICSA);
321 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
323 /* set the bus interface characteristics */
324 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
325 | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
327 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
328 | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
330 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
332 if (data->bus_width_16)
333 mode = AT91_SMC_DBW_16;
335 mode = AT91_SMC_DBW_8;
336 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
339 if (data->enable_pin)
340 at91_set_gpio_output(data->enable_pin, 1);
344 at91_set_gpio_input(data->rdy_pin, 1);
346 /* card detect pin */
348 at91_set_gpio_input(data->det_pin, 1);
351 platform_device_register(&at91sam9260_nand_device);
354 void __init at91_add_device_nand(struct at91_nand_data *data) {}
358 /* --------------------------------------------------------------------
360 * -------------------------------------------------------------------- */
363 * Prefer the GPIO code since the TWI controller isn't robust
364 * (gets overruns and underruns under load) and can only issue
365 * repeated STARTs in one scenario (the driver doesn't yet handle them).
368 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
370 static struct i2c_gpio_platform_data pdata = {
371 .sda_pin = AT91_PIN_PA23,
372 .sda_is_open_drain = 1,
373 .scl_pin = AT91_PIN_PA24,
374 .scl_is_open_drain = 1,
375 .udelay = 2, /* ~100 kHz */
378 static struct platform_device at91sam9260_twi_device = {
381 .dev.platform_data = &pdata,
384 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
386 at91_set_GPIO_periph(AT91_PIN_PA23, 1); /* TWD (SDA) */
387 at91_set_multi_drive(AT91_PIN_PA23, 1);
389 at91_set_GPIO_periph(AT91_PIN_PA24, 1); /* TWCK (SCL) */
390 at91_set_multi_drive(AT91_PIN_PA24, 1);
392 i2c_register_board_info(0, devices, nr_devices);
393 platform_device_register(&at91sam9260_twi_device);
396 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
398 static struct resource twi_resources[] = {
400 .start = AT91SAM9260_BASE_TWI,
401 .end = AT91SAM9260_BASE_TWI + SZ_16K - 1,
402 .flags = IORESOURCE_MEM,
405 .start = AT91SAM9260_ID_TWI,
406 .end = AT91SAM9260_ID_TWI,
407 .flags = IORESOURCE_IRQ,
411 static struct platform_device at91sam9260_twi_device = {
414 .resource = twi_resources,
415 .num_resources = ARRAY_SIZE(twi_resources),
418 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
420 /* pins used for TWI interface */
421 at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */
422 at91_set_multi_drive(AT91_PIN_PA23, 1);
424 at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */
425 at91_set_multi_drive(AT91_PIN_PA24, 1);
427 i2c_register_board_info(0, devices, nr_devices);
428 platform_device_register(&at91sam9260_twi_device);
431 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
435 /* --------------------------------------------------------------------
437 * -------------------------------------------------------------------- */
439 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
440 static u64 spi_dmamask = DMA_BIT_MASK(32);
442 static struct resource spi0_resources[] = {
444 .start = AT91SAM9260_BASE_SPI0,
445 .end = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
446 .flags = IORESOURCE_MEM,
449 .start = AT91SAM9260_ID_SPI0,
450 .end = AT91SAM9260_ID_SPI0,
451 .flags = IORESOURCE_IRQ,
455 static struct platform_device at91sam9260_spi0_device = {
459 .dma_mask = &spi_dmamask,
460 .coherent_dma_mask = DMA_BIT_MASK(32),
462 .resource = spi0_resources,
463 .num_resources = ARRAY_SIZE(spi0_resources),
466 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
468 static struct resource spi1_resources[] = {
470 .start = AT91SAM9260_BASE_SPI1,
471 .end = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
472 .flags = IORESOURCE_MEM,
475 .start = AT91SAM9260_ID_SPI1,
476 .end = AT91SAM9260_ID_SPI1,
477 .flags = IORESOURCE_IRQ,
481 static struct platform_device at91sam9260_spi1_device = {
485 .dma_mask = &spi_dmamask,
486 .coherent_dma_mask = DMA_BIT_MASK(32),
488 .resource = spi1_resources,
489 .num_resources = ARRAY_SIZE(spi1_resources),
492 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
494 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
497 unsigned long cs_pin;
498 short enable_spi0 = 0;
499 short enable_spi1 = 0;
501 /* Choose SPI chip-selects */
502 for (i = 0; i < nr_devices; i++) {
503 if (devices[i].controller_data)
504 cs_pin = (unsigned long) devices[i].controller_data;
505 else if (devices[i].bus_num == 0)
506 cs_pin = spi0_standard_cs[devices[i].chip_select];
508 cs_pin = spi1_standard_cs[devices[i].chip_select];
510 if (devices[i].bus_num == 0)
515 /* enable chip-select pin */
516 at91_set_gpio_output(cs_pin, 1);
518 /* pass chip-select pin to driver */
519 devices[i].controller_data = (void *) cs_pin;
522 spi_register_board_info(devices, nr_devices);
524 /* Configure SPI bus(es) */
526 at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
527 at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
528 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI1_SPCK */
530 at91_clock_associate("spi0_clk", &at91sam9260_spi0_device.dev, "spi_clk");
531 platform_device_register(&at91sam9260_spi0_device);
534 at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI1_MISO */
535 at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */
536 at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */
538 at91_clock_associate("spi1_clk", &at91sam9260_spi1_device.dev, "spi_clk");
539 platform_device_register(&at91sam9260_spi1_device);
543 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
547 /* --------------------------------------------------------------------
548 * Timer/Counter blocks
549 * -------------------------------------------------------------------- */
551 #ifdef CONFIG_ATMEL_TCLIB
553 static struct resource tcb0_resources[] = {
555 .start = AT91SAM9260_BASE_TCB0,
556 .end = AT91SAM9260_BASE_TCB0 + SZ_16K - 1,
557 .flags = IORESOURCE_MEM,
560 .start = AT91SAM9260_ID_TC0,
561 .end = AT91SAM9260_ID_TC0,
562 .flags = IORESOURCE_IRQ,
565 .start = AT91SAM9260_ID_TC1,
566 .end = AT91SAM9260_ID_TC1,
567 .flags = IORESOURCE_IRQ,
570 .start = AT91SAM9260_ID_TC2,
571 .end = AT91SAM9260_ID_TC2,
572 .flags = IORESOURCE_IRQ,
576 static struct platform_device at91sam9260_tcb0_device = {
579 .resource = tcb0_resources,
580 .num_resources = ARRAY_SIZE(tcb0_resources),
583 static struct resource tcb1_resources[] = {
585 .start = AT91SAM9260_BASE_TCB1,
586 .end = AT91SAM9260_BASE_TCB1 + SZ_16K - 1,
587 .flags = IORESOURCE_MEM,
590 .start = AT91SAM9260_ID_TC3,
591 .end = AT91SAM9260_ID_TC3,
592 .flags = IORESOURCE_IRQ,
595 .start = AT91SAM9260_ID_TC4,
596 .end = AT91SAM9260_ID_TC4,
597 .flags = IORESOURCE_IRQ,
600 .start = AT91SAM9260_ID_TC5,
601 .end = AT91SAM9260_ID_TC5,
602 .flags = IORESOURCE_IRQ,
606 static struct platform_device at91sam9260_tcb1_device = {
609 .resource = tcb1_resources,
610 .num_resources = ARRAY_SIZE(tcb1_resources),
613 static void __init at91_add_device_tc(void)
615 /* this chip has a separate clock and irq for each TC channel */
616 at91_clock_associate("tc0_clk", &at91sam9260_tcb0_device.dev, "t0_clk");
617 at91_clock_associate("tc1_clk", &at91sam9260_tcb0_device.dev, "t1_clk");
618 at91_clock_associate("tc2_clk", &at91sam9260_tcb0_device.dev, "t2_clk");
619 platform_device_register(&at91sam9260_tcb0_device);
621 at91_clock_associate("tc3_clk", &at91sam9260_tcb1_device.dev, "t0_clk");
622 at91_clock_associate("tc4_clk", &at91sam9260_tcb1_device.dev, "t1_clk");
623 at91_clock_associate("tc5_clk", &at91sam9260_tcb1_device.dev, "t2_clk");
624 platform_device_register(&at91sam9260_tcb1_device);
627 static void __init at91_add_device_tc(void) { }
631 /* --------------------------------------------------------------------
633 * -------------------------------------------------------------------- */
635 static struct resource rtt_resources[] = {
637 .start = AT91_BASE_SYS + AT91_RTT,
638 .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
639 .flags = IORESOURCE_MEM,
643 static struct platform_device at91sam9260_rtt_device = {
646 .resource = rtt_resources,
647 .num_resources = ARRAY_SIZE(rtt_resources),
650 static void __init at91_add_device_rtt(void)
652 platform_device_register(&at91sam9260_rtt_device);
656 /* --------------------------------------------------------------------
658 * -------------------------------------------------------------------- */
660 #if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE)
661 static struct platform_device at91sam9260_wdt_device = {
667 static void __init at91_add_device_watchdog(void)
669 platform_device_register(&at91sam9260_wdt_device);
672 static void __init at91_add_device_watchdog(void) {}
676 /* --------------------------------------------------------------------
677 * SSC -- Synchronous Serial Controller
678 * -------------------------------------------------------------------- */
680 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
681 static u64 ssc_dmamask = DMA_BIT_MASK(32);
683 static struct resource ssc_resources[] = {
685 .start = AT91SAM9260_BASE_SSC,
686 .end = AT91SAM9260_BASE_SSC + SZ_16K - 1,
687 .flags = IORESOURCE_MEM,
690 .start = AT91SAM9260_ID_SSC,
691 .end = AT91SAM9260_ID_SSC,
692 .flags = IORESOURCE_IRQ,
696 static struct platform_device at91sam9260_ssc_device = {
700 .dma_mask = &ssc_dmamask,
701 .coherent_dma_mask = DMA_BIT_MASK(32),
703 .resource = ssc_resources,
704 .num_resources = ARRAY_SIZE(ssc_resources),
707 static inline void configure_ssc_pins(unsigned pins)
709 if (pins & ATMEL_SSC_TF)
710 at91_set_A_periph(AT91_PIN_PB17, 1);
711 if (pins & ATMEL_SSC_TK)
712 at91_set_A_periph(AT91_PIN_PB16, 1);
713 if (pins & ATMEL_SSC_TD)
714 at91_set_A_periph(AT91_PIN_PB18, 1);
715 if (pins & ATMEL_SSC_RD)
716 at91_set_A_periph(AT91_PIN_PB19, 1);
717 if (pins & ATMEL_SSC_RK)
718 at91_set_A_periph(AT91_PIN_PB20, 1);
719 if (pins & ATMEL_SSC_RF)
720 at91_set_A_periph(AT91_PIN_PB21, 1);
724 * SSC controllers are accessed through library code, instead of any
725 * kind of all-singing/all-dancing driver. For example one could be
726 * used by a particular I2S audio codec's driver, while another one
727 * on the same system might be used by a custom data capture driver.
729 void __init at91_add_device_ssc(unsigned id, unsigned pins)
731 struct platform_device *pdev;
734 * NOTE: caller is responsible for passing information matching
735 * "pins" to whatever will be using each particular controller.
738 case AT91SAM9260_ID_SSC:
739 pdev = &at91sam9260_ssc_device;
740 configure_ssc_pins(pins);
741 at91_clock_associate("ssc_clk", &pdev->dev, "pclk");
747 platform_device_register(pdev);
751 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
755 /* --------------------------------------------------------------------
757 * -------------------------------------------------------------------- */
758 #if defined(CONFIG_SERIAL_ATMEL)
759 static struct resource dbgu_resources[] = {
761 .start = AT91_VA_BASE_SYS + AT91_DBGU,
762 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
763 .flags = IORESOURCE_MEM,
766 .start = AT91_ID_SYS,
768 .flags = IORESOURCE_IRQ,
772 static struct atmel_uart_data dbgu_data = {
774 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
775 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
778 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
780 static struct platform_device at91sam9260_dbgu_device = {
781 .name = "atmel_usart",
784 .dma_mask = &dbgu_dmamask,
785 .coherent_dma_mask = DMA_BIT_MASK(32),
786 .platform_data = &dbgu_data,
788 .resource = dbgu_resources,
789 .num_resources = ARRAY_SIZE(dbgu_resources),
792 static inline void configure_dbgu_pins(void)
794 at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */
795 at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */
798 static struct resource uart0_resources[] = {
800 .start = AT91SAM9260_BASE_US0,
801 .end = AT91SAM9260_BASE_US0 + SZ_16K - 1,
802 .flags = IORESOURCE_MEM,
805 .start = AT91SAM9260_ID_US0,
806 .end = AT91SAM9260_ID_US0,
807 .flags = IORESOURCE_IRQ,
811 static struct atmel_uart_data uart0_data = {
816 static u64 uart0_dmamask = DMA_BIT_MASK(32);
818 static struct platform_device at91sam9260_uart0_device = {
819 .name = "atmel_usart",
822 .dma_mask = &uart0_dmamask,
823 .coherent_dma_mask = DMA_BIT_MASK(32),
824 .platform_data = &uart0_data,
826 .resource = uart0_resources,
827 .num_resources = ARRAY_SIZE(uart0_resources),
830 static inline void configure_usart0_pins(unsigned pins)
832 at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */
833 at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */
835 if (pins & ATMEL_UART_RTS)
836 at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS0 */
837 if (pins & ATMEL_UART_CTS)
838 at91_set_A_periph(AT91_PIN_PB27, 0); /* CTS0 */
839 if (pins & ATMEL_UART_DTR)
840 at91_set_A_periph(AT91_PIN_PB24, 0); /* DTR0 */
841 if (pins & ATMEL_UART_DSR)
842 at91_set_A_periph(AT91_PIN_PB22, 0); /* DSR0 */
843 if (pins & ATMEL_UART_DCD)
844 at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD0 */
845 if (pins & ATMEL_UART_RI)
846 at91_set_A_periph(AT91_PIN_PB25, 0); /* RI0 */
849 static struct resource uart1_resources[] = {
851 .start = AT91SAM9260_BASE_US1,
852 .end = AT91SAM9260_BASE_US1 + SZ_16K - 1,
853 .flags = IORESOURCE_MEM,
856 .start = AT91SAM9260_ID_US1,
857 .end = AT91SAM9260_ID_US1,
858 .flags = IORESOURCE_IRQ,
862 static struct atmel_uart_data uart1_data = {
867 static u64 uart1_dmamask = DMA_BIT_MASK(32);
869 static struct platform_device at91sam9260_uart1_device = {
870 .name = "atmel_usart",
873 .dma_mask = &uart1_dmamask,
874 .coherent_dma_mask = DMA_BIT_MASK(32),
875 .platform_data = &uart1_data,
877 .resource = uart1_resources,
878 .num_resources = ARRAY_SIZE(uart1_resources),
881 static inline void configure_usart1_pins(unsigned pins)
883 at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */
884 at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */
886 if (pins & ATMEL_UART_RTS)
887 at91_set_A_periph(AT91_PIN_PB28, 0); /* RTS1 */
888 if (pins & ATMEL_UART_CTS)
889 at91_set_A_periph(AT91_PIN_PB29, 0); /* CTS1 */
892 static struct resource uart2_resources[] = {
894 .start = AT91SAM9260_BASE_US2,
895 .end = AT91SAM9260_BASE_US2 + SZ_16K - 1,
896 .flags = IORESOURCE_MEM,
899 .start = AT91SAM9260_ID_US2,
900 .end = AT91SAM9260_ID_US2,
901 .flags = IORESOURCE_IRQ,
905 static struct atmel_uart_data uart2_data = {
910 static u64 uart2_dmamask = DMA_BIT_MASK(32);
912 static struct platform_device at91sam9260_uart2_device = {
913 .name = "atmel_usart",
916 .dma_mask = &uart2_dmamask,
917 .coherent_dma_mask = DMA_BIT_MASK(32),
918 .platform_data = &uart2_data,
920 .resource = uart2_resources,
921 .num_resources = ARRAY_SIZE(uart2_resources),
924 static inline void configure_usart2_pins(unsigned pins)
926 at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */
927 at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */
929 if (pins & ATMEL_UART_RTS)
930 at91_set_A_periph(AT91_PIN_PA4, 0); /* RTS2 */
931 if (pins & ATMEL_UART_CTS)
932 at91_set_A_periph(AT91_PIN_PA5, 0); /* CTS2 */
935 static struct resource uart3_resources[] = {
937 .start = AT91SAM9260_BASE_US3,
938 .end = AT91SAM9260_BASE_US3 + SZ_16K - 1,
939 .flags = IORESOURCE_MEM,
942 .start = AT91SAM9260_ID_US3,
943 .end = AT91SAM9260_ID_US3,
944 .flags = IORESOURCE_IRQ,
948 static struct atmel_uart_data uart3_data = {
953 static u64 uart3_dmamask = DMA_BIT_MASK(32);
955 static struct platform_device at91sam9260_uart3_device = {
956 .name = "atmel_usart",
959 .dma_mask = &uart3_dmamask,
960 .coherent_dma_mask = DMA_BIT_MASK(32),
961 .platform_data = &uart3_data,
963 .resource = uart3_resources,
964 .num_resources = ARRAY_SIZE(uart3_resources),
967 static inline void configure_usart3_pins(unsigned pins)
969 at91_set_A_periph(AT91_PIN_PB10, 1); /* TXD3 */
970 at91_set_A_periph(AT91_PIN_PB11, 0); /* RXD3 */
972 if (pins & ATMEL_UART_RTS)
973 at91_set_B_periph(AT91_PIN_PC8, 0); /* RTS3 */
974 if (pins & ATMEL_UART_CTS)
975 at91_set_B_periph(AT91_PIN_PC10, 0); /* CTS3 */
978 static struct resource uart4_resources[] = {
980 .start = AT91SAM9260_BASE_US4,
981 .end = AT91SAM9260_BASE_US4 + SZ_16K - 1,
982 .flags = IORESOURCE_MEM,
985 .start = AT91SAM9260_ID_US4,
986 .end = AT91SAM9260_ID_US4,
987 .flags = IORESOURCE_IRQ,
991 static struct atmel_uart_data uart4_data = {
996 static u64 uart4_dmamask = DMA_BIT_MASK(32);
998 static struct platform_device at91sam9260_uart4_device = {
999 .name = "atmel_usart",
1002 .dma_mask = &uart4_dmamask,
1003 .coherent_dma_mask = DMA_BIT_MASK(32),
1004 .platform_data = &uart4_data,
1006 .resource = uart4_resources,
1007 .num_resources = ARRAY_SIZE(uart4_resources),
1010 static inline void configure_usart4_pins(void)
1012 at91_set_B_periph(AT91_PIN_PA31, 1); /* TXD4 */
1013 at91_set_B_periph(AT91_PIN_PA30, 0); /* RXD4 */
1016 static struct resource uart5_resources[] = {
1018 .start = AT91SAM9260_BASE_US5,
1019 .end = AT91SAM9260_BASE_US5 + SZ_16K - 1,
1020 .flags = IORESOURCE_MEM,
1023 .start = AT91SAM9260_ID_US5,
1024 .end = AT91SAM9260_ID_US5,
1025 .flags = IORESOURCE_IRQ,
1029 static struct atmel_uart_data uart5_data = {
1034 static u64 uart5_dmamask = DMA_BIT_MASK(32);
1036 static struct platform_device at91sam9260_uart5_device = {
1037 .name = "atmel_usart",
1040 .dma_mask = &uart5_dmamask,
1041 .coherent_dma_mask = DMA_BIT_MASK(32),
1042 .platform_data = &uart5_data,
1044 .resource = uart5_resources,
1045 .num_resources = ARRAY_SIZE(uart5_resources),
1048 static inline void configure_usart5_pins(void)
1050 at91_set_A_periph(AT91_PIN_PB12, 1); /* TXD5 */
1051 at91_set_A_periph(AT91_PIN_PB13, 0); /* RXD5 */
1054 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1055 struct platform_device *atmel_default_console_device; /* the serial console device */
1057 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1059 struct platform_device *pdev;
1063 pdev = &at91sam9260_dbgu_device;
1064 configure_dbgu_pins();
1065 at91_clock_associate("mck", &pdev->dev, "usart");
1067 case AT91SAM9260_ID_US0:
1068 pdev = &at91sam9260_uart0_device;
1069 configure_usart0_pins(pins);
1070 at91_clock_associate("usart0_clk", &pdev->dev, "usart");
1072 case AT91SAM9260_ID_US1:
1073 pdev = &at91sam9260_uart1_device;
1074 configure_usart1_pins(pins);
1075 at91_clock_associate("usart1_clk", &pdev->dev, "usart");
1077 case AT91SAM9260_ID_US2:
1078 pdev = &at91sam9260_uart2_device;
1079 configure_usart2_pins(pins);
1080 at91_clock_associate("usart2_clk", &pdev->dev, "usart");
1082 case AT91SAM9260_ID_US3:
1083 pdev = &at91sam9260_uart3_device;
1084 configure_usart3_pins(pins);
1085 at91_clock_associate("usart3_clk", &pdev->dev, "usart");
1087 case AT91SAM9260_ID_US4:
1088 pdev = &at91sam9260_uart4_device;
1089 configure_usart4_pins();
1090 at91_clock_associate("usart4_clk", &pdev->dev, "usart");
1092 case AT91SAM9260_ID_US5:
1093 pdev = &at91sam9260_uart5_device;
1094 configure_usart5_pins();
1095 at91_clock_associate("usart5_clk", &pdev->dev, "usart");
1100 pdev->id = portnr; /* update to mapped ID */
1102 if (portnr < ATMEL_MAX_UART)
1103 at91_uarts[portnr] = pdev;
1106 void __init at91_set_serial_console(unsigned portnr)
1108 if (portnr < ATMEL_MAX_UART)
1109 atmel_default_console_device = at91_uarts[portnr];
1112 void __init at91_add_device_serial(void)
1116 for (i = 0; i < ATMEL_MAX_UART; i++) {
1118 platform_device_register(at91_uarts[i]);
1121 if (!atmel_default_console_device)
1122 printk(KERN_INFO "AT91: No default serial console defined.\n");
1125 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1126 void __init at91_set_serial_console(unsigned portnr) {}
1127 void __init at91_add_device_serial(void) {}
1131 /* -------------------------------------------------------------------- */
1133 * These devices are always present and don't need any board-specific
1136 static int __init at91_add_standard_devices(void)
1138 at91_add_device_rtt();
1139 at91_add_device_watchdog();
1140 at91_add_device_tc();
1144 arch_initcall(at91_add_standard_devices);