2 * MPC8349E MDS Device Tree Source
4 * Copyright 2005, 2006 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
13 model = "MPC8349EMDS";
14 compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
34 d-cache-line-size = <20>; // 32 bytes
35 i-cache-line-size = <20>; // 32 bytes
36 d-cache-size = <8000>; // L1, 32K
37 i-cache-size = <8000>; // L1, 32K
38 timebase-frequency = <0>; // from bootloader
39 bus-frequency = <0>; // from bootloader
40 clock-frequency = <0>; // from bootloader
45 device_type = "memory";
46 reg = <00000000 10000000>; // 256MB at 0
50 device_type = "board-control";
51 reg = <e2400000 8000>;
58 ranges = <0 e0000000 00100000>;
59 reg = <e0000000 00000200>;
63 device_type = "watchdog";
64 compatible = "mpc83xx_wdt";
72 compatible = "fsl-i2c";
75 interrupt-parent = < &ipic >;
79 compatible = "dallas,ds1374";
88 compatible = "fsl-i2c";
91 interrupt-parent = < &ipic >;
97 compatible = "fsl_spi";
100 interrupt-parent = < &ipic >;
104 /* phy type (ULPI or SERIAL) are only types supportted for MPH */
108 compatible = "fsl-usb2-mph";
110 #address-cells = <1>;
112 interrupt-parent = < &ipic >;
117 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
120 compatible = "fsl-usb2-dr";
122 #address-cells = <1>;
124 interrupt-parent = < &ipic >;
131 #address-cells = <1>;
133 compatible = "fsl,gianfar-mdio";
136 phy0: ethernet-phy@0 {
137 interrupt-parent = < &ipic >;
140 device_type = "ethernet-phy";
142 phy1: ethernet-phy@1 {
143 interrupt-parent = < &ipic >;
146 device_type = "ethernet-phy";
150 enet0: ethernet@24000 {
152 device_type = "network";
154 compatible = "gianfar";
156 local-mac-address = [ 00 00 00 00 00 00 ];
157 interrupts = <20 8 21 8 22 8>;
158 interrupt-parent = < &ipic >;
159 phy-handle = < &phy0 >;
160 linux,network-index = <0>;
163 enet1: ethernet@25000 {
165 device_type = "network";
167 compatible = "gianfar";
169 local-mac-address = [ 00 00 00 00 00 00 ];
170 interrupts = <23 8 24 8 25 8>;
171 interrupt-parent = < &ipic >;
172 phy-handle = < &phy1 >;
173 linux,network-index = <1>;
176 serial0: serial@4500 {
178 device_type = "serial";
179 compatible = "ns16550";
181 clock-frequency = <0>;
183 interrupt-parent = < &ipic >;
186 serial1: serial@4600 {
188 device_type = "serial";
189 compatible = "ns16550";
191 clock-frequency = <0>;
193 interrupt-parent = < &ipic >;
196 /* May need to remove if on a part without crypto engine */
198 device_type = "crypto";
200 compatible = "talitos";
203 interrupt-parent = < &ipic >;
205 channel-fifo-len = <18>;
206 exec-units-mask = <0000007e>;
207 /* desc mask is for rev2.0,
208 * we need runtime fixup for >2.0 */
209 descriptor-types-mask = <01010ebf>;
213 * interrupts cell = <intr #, sense>
214 * sense values match linux IORESOURCE_IRQ_* defines:
215 * sense == 8: Level, low assertion
216 * sense == 2: Edge, high-to-low change
219 interrupt-controller;
220 #address-cells = <0>;
221 #interrupt-cells = <2>;
223 device_type = "ipic";
229 interrupt-map-mask = <f800 0 0 7>;
233 8800 0 0 1 &ipic 14 8
234 8800 0 0 2 &ipic 15 8
235 8800 0 0 3 &ipic 16 8
236 8800 0 0 4 &ipic 17 8
239 9000 0 0 1 &ipic 16 8
240 9000 0 0 2 &ipic 17 8
241 9000 0 0 3 &ipic 14 8
242 9000 0 0 4 &ipic 15 8
245 9800 0 0 1 &ipic 17 8
246 9800 0 0 2 &ipic 14 8
247 9800 0 0 3 &ipic 15 8
248 9800 0 0 4 &ipic 16 8
251 a800 0 0 1 &ipic 14 8
252 a800 0 0 2 &ipic 15 8
253 a800 0 0 3 &ipic 16 8
254 a800 0 0 4 &ipic 17 8
257 b000 0 0 1 &ipic 17 8
258 b000 0 0 2 &ipic 14 8
259 b000 0 0 3 &ipic 15 8
260 b000 0 0 4 &ipic 16 8
263 b800 0 0 1 &ipic 16 8
264 b800 0 0 2 &ipic 17 8
265 b800 0 0 3 &ipic 14 8
266 b800 0 0 4 &ipic 15 8
269 c000 0 0 1 &ipic 15 8
270 c000 0 0 2 &ipic 16 8
271 c000 0 0 3 &ipic 17 8
272 c000 0 0 4 &ipic 14 8>;
273 interrupt-parent = < &ipic >;
276 ranges = <02000000 0 90000000 90000000 0 10000000
277 42000000 0 80000000 80000000 0 10000000
278 01000000 0 00000000 e2000000 0 00100000>;
279 clock-frequency = <3f940aa>;
280 #interrupt-cells = <1>;
282 #address-cells = <3>;
283 reg = <e0008500 100>;
284 compatible = "fsl,mpc8349-pci";
290 interrupt-map-mask = <f800 0 0 7>;
294 8800 0 0 1 &ipic 14 8
295 8800 0 0 2 &ipic 15 8
296 8800 0 0 3 &ipic 16 8
297 8800 0 0 4 &ipic 17 8
300 9000 0 0 1 &ipic 16 8
301 9000 0 0 2 &ipic 17 8
302 9000 0 0 3 &ipic 14 8
303 9000 0 0 4 &ipic 15 8
306 9800 0 0 1 &ipic 17 8
307 9800 0 0 2 &ipic 14 8
308 9800 0 0 3 &ipic 15 8
309 9800 0 0 4 &ipic 16 8
312 a800 0 0 1 &ipic 14 8
313 a800 0 0 2 &ipic 15 8
314 a800 0 0 3 &ipic 16 8
315 a800 0 0 4 &ipic 17 8
318 b000 0 0 1 &ipic 17 8
319 b000 0 0 2 &ipic 14 8
320 b000 0 0 3 &ipic 15 8
321 b000 0 0 4 &ipic 16 8
324 b800 0 0 1 &ipic 16 8
325 b800 0 0 2 &ipic 17 8
326 b800 0 0 3 &ipic 14 8
327 b800 0 0 4 &ipic 15 8
330 c000 0 0 1 &ipic 15 8
331 c000 0 0 2 &ipic 16 8
332 c000 0 0 3 &ipic 17 8
333 c000 0 0 4 &ipic 14 8>;
334 interrupt-parent = < &ipic >;
337 ranges = <02000000 0 b0000000 b0000000 0 10000000
338 42000000 0 a0000000 a0000000 0 10000000
339 01000000 0 00000000 e2100000 0 00100000>;
340 clock-frequency = <3f940aa>;
341 #interrupt-cells = <1>;
343 #address-cells = <3>;
344 reg = <e0008600 100>;
345 compatible = "fsl,mpc8349-pci";