Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
[linux-2.6] / arch / powerpc / platforms / powermac / cpufreq_32.c
1 /*
2  *  Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
3  *  Copyright (C) 2004        John Steele Scott <toojays@toojays.net>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  *
9  * TODO: Need a big cleanup here. Basically, we need to have different
10  * cpufreq_driver structures for the different type of HW instead of the
11  * current mess. We also need to better deal with the detection of the
12  * type of machine.
13  *
14  */
15
16 #include <linux/module.h>
17 #include <linux/types.h>
18 #include <linux/errno.h>
19 #include <linux/kernel.h>
20 #include <linux/delay.h>
21 #include <linux/sched.h>
22 #include <linux/adb.h>
23 #include <linux/pmu.h>
24 #include <linux/slab.h>
25 #include <linux/cpufreq.h>
26 #include <linux/init.h>
27 #include <linux/sysdev.h>
28 #include <linux/i2c.h>
29 #include <linux/hardirq.h>
30 #include <asm/prom.h>
31 #include <asm/machdep.h>
32 #include <asm/irq.h>
33 #include <asm/pmac_feature.h>
34 #include <asm/mmu_context.h>
35 #include <asm/sections.h>
36 #include <asm/cputable.h>
37 #include <asm/time.h>
38 #include <asm/system.h>
39 #include <asm/mpic.h>
40 #include <asm/keylargo.h>
41
42 /* WARNING !!! This will cause calibrate_delay() to be called,
43  * but this is an __init function ! So you MUST go edit
44  * init/main.c to make it non-init before enabling DEBUG_FREQ
45  */
46 #undef DEBUG_FREQ
47
48 /*
49  * There is a problem with the core cpufreq code on SMP kernels,
50  * it won't recalculate the Bogomips properly
51  */
52 #ifdef CONFIG_SMP
53 #warning "WARNING, CPUFREQ not recommended on SMP kernels"
54 #endif
55
56 extern void low_choose_7447a_dfs(int dfs);
57 extern void low_choose_750fx_pll(int pll);
58 extern void low_sleep_handler(void);
59
60 /*
61  * Currently, PowerMac cpufreq supports only high & low frequencies
62  * that are set by the firmware
63  */
64 static unsigned int low_freq;
65 static unsigned int hi_freq;
66 static unsigned int cur_freq;
67 static unsigned int sleep_freq;
68
69 /*
70  * Different models uses different mechanisms to switch the frequency
71  */
72 static int (*set_speed_proc)(int low_speed);
73 static unsigned int (*get_speed_proc)(void);
74
75 /*
76  * Some definitions used by the various speedprocs
77  */
78 static u32 voltage_gpio;
79 static u32 frequency_gpio;
80 static u32 slew_done_gpio;
81 static int no_schedule;
82 static int has_cpu_l2lve;
83 static int is_pmu_based;
84
85 /* There are only two frequency states for each processor. Values
86  * are in kHz for the time being.
87  */
88 #define CPUFREQ_HIGH                  0
89 #define CPUFREQ_LOW                   1
90
91 static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
92         {CPUFREQ_HIGH,          0},
93         {CPUFREQ_LOW,           0},
94         {0,                     CPUFREQ_TABLE_END},
95 };
96
97 static struct freq_attr* pmac_cpu_freqs_attr[] = {
98         &cpufreq_freq_attr_scaling_available_freqs,
99         NULL,
100 };
101
102 static inline void local_delay(unsigned long ms)
103 {
104         if (no_schedule)
105                 mdelay(ms);
106         else
107                 msleep(ms);
108 }
109
110 #ifdef DEBUG_FREQ
111 static inline void debug_calc_bogomips(void)
112 {
113         /* This will cause a recalc of bogomips and display the
114          * result. We backup/restore the value to avoid affecting the
115          * core cpufreq framework's own calculation.
116          */
117         extern void calibrate_delay(void);
118
119         unsigned long save_lpj = loops_per_jiffy;
120         calibrate_delay();
121         loops_per_jiffy = save_lpj;
122 }
123 #endif /* DEBUG_FREQ */
124
125 /* Switch CPU speed under 750FX CPU control
126  */
127 static int cpu_750fx_cpu_speed(int low_speed)
128 {
129         u32 hid2;
130
131         if (low_speed == 0) {
132                 /* ramping up, set voltage first */
133                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
134                 /* Make sure we sleep for at least 1ms */
135                 local_delay(10);
136
137                 /* tweak L2 for high voltage */
138                 if (has_cpu_l2lve) {
139                         hid2 = mfspr(SPRN_HID2);
140                         hid2 &= ~0x2000;
141                         mtspr(SPRN_HID2, hid2);
142                 }
143         }
144 #ifdef CONFIG_6xx
145         low_choose_750fx_pll(low_speed);
146 #endif
147         if (low_speed == 1) {
148                 /* tweak L2 for low voltage */
149                 if (has_cpu_l2lve) {
150                         hid2 = mfspr(SPRN_HID2);
151                         hid2 |= 0x2000;
152                         mtspr(SPRN_HID2, hid2);
153                 }
154
155                 /* ramping down, set voltage last */
156                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
157                 local_delay(10);
158         }
159
160         return 0;
161 }
162
163 static unsigned int cpu_750fx_get_cpu_speed(void)
164 {
165         if (mfspr(SPRN_HID1) & HID1_PS)
166                 return low_freq;
167         else
168                 return hi_freq;
169 }
170
171 /* Switch CPU speed using DFS */
172 static int dfs_set_cpu_speed(int low_speed)
173 {
174         if (low_speed == 0) {
175                 /* ramping up, set voltage first */
176                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
177                 /* Make sure we sleep for at least 1ms */
178                 local_delay(1);
179         }
180
181         /* set frequency */
182 #ifdef CONFIG_6xx
183         low_choose_7447a_dfs(low_speed);
184 #endif
185         udelay(100);
186
187         if (low_speed == 1) {
188                 /* ramping down, set voltage last */
189                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
190                 local_delay(1);
191         }
192
193         return 0;
194 }
195
196 static unsigned int dfs_get_cpu_speed(void)
197 {
198         if (mfspr(SPRN_HID1) & HID1_DFS)
199                 return low_freq;
200         else
201                 return hi_freq;
202 }
203
204
205 /* Switch CPU speed using slewing GPIOs
206  */
207 static int gpios_set_cpu_speed(int low_speed)
208 {
209         int gpio, timeout = 0;
210
211         /* If ramping up, set voltage first */
212         if (low_speed == 0) {
213                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
214                 /* Delay is way too big but it's ok, we schedule */
215                 local_delay(10);
216         }
217
218         /* Set frequency */
219         gpio =  pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
220         if (low_speed == ((gpio & 0x01) == 0))
221                 goto skip;
222
223         pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
224                           low_speed ? 0x04 : 0x05);
225         udelay(200);
226         do {
227                 if (++timeout > 100)
228                         break;
229                 local_delay(1);
230                 gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
231         } while((gpio & 0x02) == 0);
232  skip:
233         /* If ramping down, set voltage last */
234         if (low_speed == 1) {
235                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
236                 /* Delay is way too big but it's ok, we schedule */
237                 local_delay(10);
238         }
239
240 #ifdef DEBUG_FREQ
241         debug_calc_bogomips();
242 #endif
243
244         return 0;
245 }
246
247 /* Switch CPU speed under PMU control
248  */
249 static int pmu_set_cpu_speed(int low_speed)
250 {
251         struct adb_request req;
252         unsigned long save_l2cr;
253         unsigned long save_l3cr;
254         unsigned int pic_prio;
255         unsigned long flags;
256
257         preempt_disable();
258
259 #ifdef DEBUG_FREQ
260         printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
261 #endif
262         pmu_suspend();
263
264         /* Disable all interrupt sources on openpic */
265         pic_prio = mpic_cpu_get_priority();
266         mpic_cpu_set_priority(0xf);
267
268         /* Make sure the decrementer won't interrupt us */
269         asm volatile("mtdec %0" : : "r" (0x7fffffff));
270         /* Make sure any pending DEC interrupt occurring while we did
271          * the above didn't re-enable the DEC */
272         mb();
273         asm volatile("mtdec %0" : : "r" (0x7fffffff));
274
275         /* We can now disable MSR_EE */
276         local_irq_save(flags);
277
278         /* Giveup the FPU & vec */
279         enable_kernel_fp();
280
281 #ifdef CONFIG_ALTIVEC
282         if (cpu_has_feature(CPU_FTR_ALTIVEC))
283                 enable_kernel_altivec();
284 #endif /* CONFIG_ALTIVEC */
285
286         /* Save & disable L2 and L3 caches */
287         save_l3cr = _get_L3CR();        /* (returns -1 if not available) */
288         save_l2cr = _get_L2CR();        /* (returns -1 if not available) */
289
290         /* Send the new speed command. My assumption is that this command
291          * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
292          */
293         pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
294         while (!req.complete)
295                 pmu_poll();
296
297         /* Prepare the northbridge for the speed transition */
298         pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
299
300         /* Call low level code to backup CPU state and recover from
301          * hardware reset
302          */
303         low_sleep_handler();
304
305         /* Restore the northbridge */
306         pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
307
308         /* Restore L2 cache */
309         if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
310                 _set_L2CR(save_l2cr);
311         /* Restore L3 cache */
312         if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
313                 _set_L3CR(save_l3cr);
314
315         /* Restore userland MMU context */
316         set_context(current->active_mm->context.id, current->active_mm->pgd);
317
318 #ifdef DEBUG_FREQ
319         printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
320 #endif
321
322         /* Restore low level PMU operations */
323         pmu_unlock();
324
325         /* Restore decrementer */
326         wakeup_decrementer();
327
328         /* Restore interrupts */
329         mpic_cpu_set_priority(pic_prio);
330
331         /* Let interrupts flow again ... */
332         local_irq_restore(flags);
333
334 #ifdef DEBUG_FREQ
335         debug_calc_bogomips();
336 #endif
337
338         pmu_resume();
339
340         preempt_enable();
341
342         return 0;
343 }
344
345 static int do_set_cpu_speed(int speed_mode, int notify)
346 {
347         struct cpufreq_freqs freqs;
348         unsigned long l3cr;
349         static unsigned long prev_l3cr;
350
351         freqs.old = cur_freq;
352         freqs.new = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
353         freqs.cpu = smp_processor_id();
354
355         if (freqs.old == freqs.new)
356                 return 0;
357
358         if (notify)
359                 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
360         if (speed_mode == CPUFREQ_LOW &&
361             cpu_has_feature(CPU_FTR_L3CR)) {
362                 l3cr = _get_L3CR();
363                 if (l3cr & L3CR_L3E) {
364                         prev_l3cr = l3cr;
365                         _set_L3CR(0);
366                 }
367         }
368         set_speed_proc(speed_mode == CPUFREQ_LOW);
369         if (speed_mode == CPUFREQ_HIGH &&
370             cpu_has_feature(CPU_FTR_L3CR)) {
371                 l3cr = _get_L3CR();
372                 if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
373                         _set_L3CR(prev_l3cr);
374         }
375         if (notify)
376                 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
377         cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
378
379         return 0;
380 }
381
382 static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
383 {
384         return cur_freq;
385 }
386
387 static int pmac_cpufreq_verify(struct cpufreq_policy *policy)
388 {
389         return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs);
390 }
391
392 static int pmac_cpufreq_target( struct cpufreq_policy *policy,
393                                         unsigned int target_freq,
394                                         unsigned int relation)
395 {
396         unsigned int    newstate = 0;
397         int             rc;
398
399         if (cpufreq_frequency_table_target(policy, pmac_cpu_freqs,
400                         target_freq, relation, &newstate))
401                 return -EINVAL;
402
403         rc = do_set_cpu_speed(newstate, 1);
404
405         ppc_proc_freq = cur_freq * 1000ul;
406         return rc;
407 }
408
409 static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
410 {
411         if (policy->cpu != 0)
412                 return -ENODEV;
413
414         policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
415         policy->cpuinfo.transition_latency      = CPUFREQ_ETERNAL;
416         policy->cur = cur_freq;
417
418         cpufreq_frequency_table_get_attr(pmac_cpu_freqs, policy->cpu);
419         return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs);
420 }
421
422 static u32 read_gpio(struct device_node *np)
423 {
424         const u32 *reg = get_property(np, "reg", NULL);
425         u32 offset;
426
427         if (reg == NULL)
428                 return 0;
429         /* That works for all keylargos but shall be fixed properly
430          * some day... The problem is that it seems we can't rely
431          * on the "reg" property of the GPIO nodes, they are either
432          * relative to the base of KeyLargo or to the base of the
433          * GPIO space, and the device-tree doesn't help.
434          */
435         offset = *reg;
436         if (offset < KEYLARGO_GPIO_LEVELS0)
437                 offset += KEYLARGO_GPIO_LEVELS0;
438         return offset;
439 }
440
441 static int pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg)
442 {
443         /* Ok, this could be made a bit smarter, but let's be robust for now. We
444          * always force a speed change to high speed before sleep, to make sure
445          * we have appropriate voltage and/or bus speed for the wakeup process,
446          * and to make sure our loops_per_jiffies are "good enough", that is will
447          * not cause too short delays if we sleep in low speed and wake in high
448          * speed..
449          */
450         no_schedule = 1;
451         sleep_freq = cur_freq;
452         if (cur_freq == low_freq && !is_pmu_based)
453                 do_set_cpu_speed(CPUFREQ_HIGH, 0);
454         return 0;
455 }
456
457 static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
458 {
459         /* If we resume, first check if we have a get() function */
460         if (get_speed_proc)
461                 cur_freq = get_speed_proc();
462         else
463                 cur_freq = 0;
464
465         /* We don't, hrm... we don't really know our speed here, best
466          * is that we force a switch to whatever it was, which is
467          * probably high speed due to our suspend() routine
468          */
469         do_set_cpu_speed(sleep_freq == low_freq ?
470                          CPUFREQ_LOW : CPUFREQ_HIGH, 0);
471
472         ppc_proc_freq = cur_freq * 1000ul;
473
474         no_schedule = 0;
475         return 0;
476 }
477
478 static struct cpufreq_driver pmac_cpufreq_driver = {
479         .verify         = pmac_cpufreq_verify,
480         .target         = pmac_cpufreq_target,
481         .get            = pmac_cpufreq_get_speed,
482         .init           = pmac_cpufreq_cpu_init,
483         .suspend        = pmac_cpufreq_suspend,
484         .resume         = pmac_cpufreq_resume,
485         .flags          = CPUFREQ_PM_NO_WARN,
486         .attr           = pmac_cpu_freqs_attr,
487         .name           = "powermac",
488         .owner          = THIS_MODULE,
489 };
490
491
492 static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
493 {
494         struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
495                                                                 "voltage-gpio");
496         struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
497                                                                 "frequency-gpio");
498         struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
499                                                                      "slewing-done");
500         const u32 *value;
501
502         /*
503          * Check to see if it's GPIO driven or PMU only
504          *
505          * The way we extract the GPIO address is slightly hackish, but it
506          * works well enough for now. We need to abstract the whole GPIO
507          * stuff sooner or later anyway
508          */
509
510         if (volt_gpio_np)
511                 voltage_gpio = read_gpio(volt_gpio_np);
512         if (freq_gpio_np)
513                 frequency_gpio = read_gpio(freq_gpio_np);
514         if (slew_done_gpio_np)
515                 slew_done_gpio = read_gpio(slew_done_gpio_np);
516
517         /* If we use the frequency GPIOs, calculate the min/max speeds based
518          * on the bus frequencies
519          */
520         if (frequency_gpio && slew_done_gpio) {
521                 int lenp, rc;
522                 const u32 *freqs, *ratio;
523
524                 freqs = get_property(cpunode, "bus-frequencies", &lenp);
525                 lenp /= sizeof(u32);
526                 if (freqs == NULL || lenp != 2) {
527                         printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n");
528                         return 1;
529                 }
530                 ratio = get_property(cpunode, "processor-to-bus-ratio*2", NULL);
531                 if (ratio == NULL) {
532                         printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n");
533                         return 1;
534                 }
535
536                 /* Get the min/max bus frequencies */
537                 low_freq = min(freqs[0], freqs[1]);
538                 hi_freq = max(freqs[0], freqs[1]);
539
540                 /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
541                  * frequency, it claims it to be around 84Mhz on some models while
542                  * it appears to be approx. 101Mhz on all. Let's hack around here...
543                  * fortunately, we don't need to be too precise
544                  */
545                 if (low_freq < 98000000)
546                         low_freq = 101000000;
547
548                 /* Convert those to CPU core clocks */
549                 low_freq = (low_freq * (*ratio)) / 2000;
550                 hi_freq = (hi_freq * (*ratio)) / 2000;
551
552                 /* Now we get the frequencies, we read the GPIO to see what is out current
553                  * speed
554                  */
555                 rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
556                 cur_freq = (rc & 0x01) ? hi_freq : low_freq;
557
558                 set_speed_proc = gpios_set_cpu_speed;
559                 return 1;
560         }
561
562         /* If we use the PMU, look for the min & max frequencies in the
563          * device-tree
564          */
565         value = get_property(cpunode, "min-clock-frequency", NULL);
566         if (!value)
567                 return 1;
568         low_freq = (*value) / 1000;
569         /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
570          * here */
571         if (low_freq < 100000)
572                 low_freq *= 10;
573
574         value = get_property(cpunode, "max-clock-frequency", NULL);
575         if (!value)
576                 return 1;
577         hi_freq = (*value) / 1000;
578         set_speed_proc = pmu_set_cpu_speed;
579         is_pmu_based = 1;
580
581         return 0;
582 }
583
584 static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
585 {
586         struct device_node *volt_gpio_np;
587
588         if (get_property(cpunode, "dynamic-power-step", NULL) == NULL)
589                 return 1;
590
591         volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
592         if (volt_gpio_np)
593                 voltage_gpio = read_gpio(volt_gpio_np);
594         if (!voltage_gpio){
595                 printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n");
596                 return 1;
597         }
598
599         /* OF only reports the high frequency */
600         hi_freq = cur_freq;
601         low_freq = cur_freq/2;
602
603         /* Read actual frequency from CPU */
604         cur_freq = dfs_get_cpu_speed();
605         set_speed_proc = dfs_set_cpu_speed;
606         get_speed_proc = dfs_get_cpu_speed;
607
608         return 0;
609 }
610
611 static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
612 {
613         struct device_node *volt_gpio_np;
614         u32 pvr;
615         const u32 *value;
616
617         if (get_property(cpunode, "dynamic-power-step", NULL) == NULL)
618                 return 1;
619
620         hi_freq = cur_freq;
621         value = get_property(cpunode, "reduced-clock-frequency", NULL);
622         if (!value)
623                 return 1;
624         low_freq = (*value) / 1000;
625
626         volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
627         if (volt_gpio_np)
628                 voltage_gpio = read_gpio(volt_gpio_np);
629
630         pvr = mfspr(SPRN_PVR);
631         has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
632
633         set_speed_proc = cpu_750fx_cpu_speed;
634         get_speed_proc = cpu_750fx_get_cpu_speed;
635         cur_freq = cpu_750fx_get_cpu_speed();
636
637         return 0;
638 }
639
640 /* Currently, we support the following machines:
641  *
642  *  - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
643  *  - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
644  *  - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
645  *  - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
646  *  - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
647  *  - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
648  *  - Recent MacRISC3 laptops
649  *  - All new machines with 7447A CPUs
650  */
651 static int __init pmac_cpufreq_setup(void)
652 {
653         struct device_node      *cpunode;
654         const u32               *value;
655
656         if (strstr(cmd_line, "nocpufreq"))
657                 return 0;
658
659         /* Assume only one CPU */
660         cpunode = find_type_devices("cpu");
661         if (!cpunode)
662                 goto out;
663
664         /* Get current cpu clock freq */
665         value = get_property(cpunode, "clock-frequency", NULL);
666         if (!value)
667                 goto out;
668         cur_freq = (*value) / 1000;
669
670         /*  Check for 7447A based MacRISC3 */
671         if (machine_is_compatible("MacRISC3") &&
672             get_property(cpunode, "dynamic-power-step", NULL) &&
673             PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
674                 pmac_cpufreq_init_7447A(cpunode);
675         /* Check for other MacRISC3 machines */
676         } else if (machine_is_compatible("PowerBook3,4") ||
677                    machine_is_compatible("PowerBook3,5") ||
678                    machine_is_compatible("MacRISC3")) {
679                 pmac_cpufreq_init_MacRISC3(cpunode);
680         /* Else check for iBook2 500/600 */
681         } else if (machine_is_compatible("PowerBook4,1")) {
682                 hi_freq = cur_freq;
683                 low_freq = 400000;
684                 set_speed_proc = pmu_set_cpu_speed;
685                 is_pmu_based = 1;
686         }
687         /* Else check for TiPb 550 */
688         else if (machine_is_compatible("PowerBook3,3") && cur_freq == 550000) {
689                 hi_freq = cur_freq;
690                 low_freq = 500000;
691                 set_speed_proc = pmu_set_cpu_speed;
692                 is_pmu_based = 1;
693         }
694         /* Else check for TiPb 400 & 500 */
695         else if (machine_is_compatible("PowerBook3,2")) {
696                 /* We only know about the 400 MHz and the 500Mhz model
697                  * they both have 300 MHz as low frequency
698                  */
699                 if (cur_freq < 350000 || cur_freq > 550000)
700                         goto out;
701                 hi_freq = cur_freq;
702                 low_freq = 300000;
703                 set_speed_proc = pmu_set_cpu_speed;
704                 is_pmu_based = 1;
705         }
706         /* Else check for 750FX */
707         else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
708                 pmac_cpufreq_init_750FX(cpunode);
709 out:
710         if (set_speed_proc == NULL)
711                 return -ENODEV;
712
713         pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
714         pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
715         ppc_proc_freq = cur_freq * 1000ul;
716
717         printk(KERN_INFO "Registering PowerMac CPU frequency driver\n");
718         printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
719                low_freq/1000, hi_freq/1000, cur_freq/1000);
720
721         return cpufreq_register_driver(&pmac_cpufreq_driver);
722 }
723
724 module_init(pmac_cpufreq_setup);
725