2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/acpi.h>
38 #include <linux/dmi.h>
39 #include <linux/moduleparam.h>
40 #include <linux/sched.h> /* need_resched() */
41 #include <linux/latency.h>
44 #include <asm/uaccess.h>
46 #include <acpi/acpi_bus.h>
47 #include <acpi/processor.h>
49 #define ACPI_PROCESSOR_COMPONENT 0x01000000
50 #define ACPI_PROCESSOR_CLASS "processor"
51 #define ACPI_PROCESSOR_DRIVER_NAME "ACPI Processor Driver"
52 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
53 ACPI_MODULE_NAME("acpi_processor")
54 #define ACPI_PROCESSOR_FILE_POWER "power"
55 #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
56 #define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */
57 #define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */
58 static void (*pm_idle_save) (void) __read_mostly;
59 module_param(max_cstate, uint, 0644);
61 static unsigned int nocst __read_mostly;
62 module_param(nocst, uint, 0000);
65 * bm_history -- bit-mask with a bit per jiffy of bus-master activity
66 * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms
67 * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms
68 * 100 HZ: 0x0000000F: 4 jiffies = 40ms
69 * reduce history for more aggressive entry into C3
71 static unsigned int bm_history __read_mostly =
72 (HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1));
73 module_param(bm_history, uint, 0644);
74 /* --------------------------------------------------------------------------
76 -------------------------------------------------------------------------- */
79 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
80 * For now disable this. Probably a bug somewhere else.
82 * To skip this limit, boot/load with a large max_cstate limit.
84 static int set_max_cstate(struct dmi_system_id *id)
86 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
89 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
90 " Override with \"processor.max_cstate=%d\"\n", id->ident,
91 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
93 max_cstate = (long)id->driver_data;
98 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
99 callers to only run once -AK */
100 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
101 { set_max_cstate, "IBM ThinkPad R40e", {
102 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
103 DMI_MATCH(DMI_BIOS_VERSION,"1SET70WW")}, (void *)1},
104 { set_max_cstate, "IBM ThinkPad R40e", {
105 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
106 DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1},
107 { set_max_cstate, "IBM ThinkPad R40e", {
108 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
109 DMI_MATCH(DMI_BIOS_VERSION,"1SET43WW") }, (void*)1},
110 { set_max_cstate, "IBM ThinkPad R40e", {
111 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
112 DMI_MATCH(DMI_BIOS_VERSION,"1SET45WW") }, (void*)1},
113 { set_max_cstate, "IBM ThinkPad R40e", {
114 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
115 DMI_MATCH(DMI_BIOS_VERSION,"1SET47WW") }, (void*)1},
116 { set_max_cstate, "IBM ThinkPad R40e", {
117 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
118 DMI_MATCH(DMI_BIOS_VERSION,"1SET50WW") }, (void*)1},
119 { set_max_cstate, "IBM ThinkPad R40e", {
120 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
121 DMI_MATCH(DMI_BIOS_VERSION,"1SET52WW") }, (void*)1},
122 { set_max_cstate, "IBM ThinkPad R40e", {
123 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
124 DMI_MATCH(DMI_BIOS_VERSION,"1SET55WW") }, (void*)1},
125 { set_max_cstate, "IBM ThinkPad R40e", {
126 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
127 DMI_MATCH(DMI_BIOS_VERSION,"1SET56WW") }, (void*)1},
128 { set_max_cstate, "IBM ThinkPad R40e", {
129 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
130 DMI_MATCH(DMI_BIOS_VERSION,"1SET59WW") }, (void*)1},
131 { set_max_cstate, "IBM ThinkPad R40e", {
132 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
133 DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }, (void*)1},
134 { set_max_cstate, "IBM ThinkPad R40e", {
135 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
136 DMI_MATCH(DMI_BIOS_VERSION,"1SET61WW") }, (void*)1},
137 { set_max_cstate, "IBM ThinkPad R40e", {
138 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
139 DMI_MATCH(DMI_BIOS_VERSION,"1SET62WW") }, (void*)1},
140 { set_max_cstate, "IBM ThinkPad R40e", {
141 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
142 DMI_MATCH(DMI_BIOS_VERSION,"1SET64WW") }, (void*)1},
143 { set_max_cstate, "IBM ThinkPad R40e", {
144 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
145 DMI_MATCH(DMI_BIOS_VERSION,"1SET65WW") }, (void*)1},
146 { set_max_cstate, "IBM ThinkPad R40e", {
147 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
148 DMI_MATCH(DMI_BIOS_VERSION,"1SET68WW") }, (void*)1},
149 { set_max_cstate, "Medion 41700", {
150 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
151 DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1},
152 { set_max_cstate, "Clevo 5600D", {
153 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
154 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
159 static inline u32 ticks_elapsed(u32 t1, u32 t2)
163 else if (!(acpi_fadt.flags & ACPI_FADT_32BIT_TIMER))
164 return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
166 return ((0xFFFFFFFF - t1) + t2);
170 acpi_processor_power_activate(struct acpi_processor *pr,
171 struct acpi_processor_cx *new)
173 struct acpi_processor_cx *old;
178 old = pr->power.state;
181 old->promotion.count = 0;
182 new->demotion.count = 0;
184 /* Cleanup from old state. */
188 /* Disable bus master reload */
189 if (new->type != ACPI_STATE_C3 && pr->flags.bm_check)
190 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0,
191 ACPI_MTX_DO_NOT_LOCK);
196 /* Prepare to use new state. */
199 /* Enable bus master reload */
200 if (old->type != ACPI_STATE_C3 && pr->flags.bm_check)
201 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1,
202 ACPI_MTX_DO_NOT_LOCK);
206 pr->power.state = new;
211 static void acpi_safe_halt(void)
213 current_thread_info()->status &= ~TS_POLLING;
215 * TS_POLLING-cleared state must be visible before we
221 current_thread_info()->status |= TS_POLLING;
224 static atomic_t c3_cpu_count;
226 /* Common C-state entry for C2, C3, .. */
227 static void acpi_cstate_enter(struct acpi_processor_cx *cstate)
229 if (cstate->space_id == ACPI_CSTATE_FFH) {
230 /* Call into architectural FFH based C-state */
231 acpi_processor_ffh_cstate_enter(cstate);
234 /* IO port based C-state */
235 inb(cstate->address);
236 /* Dummy wait op - must do something useless after P_LVL2 read
237 because chipsets cannot guarantee that STPCLK# signal
238 gets asserted in time to freeze execution properly. */
239 unused = inl(acpi_fadt.xpm_timer_block.address);
243 static void acpi_processor_idle(void)
245 struct acpi_processor *pr = NULL;
246 struct acpi_processor_cx *cx = NULL;
247 struct acpi_processor_cx *next_state = NULL;
251 pr = processors[smp_processor_id()];
256 * Interrupts must be disabled during bus mastering calculations and
257 * for C2/C3 transitions.
262 * Check whether we truly need to go idle, or should
265 if (unlikely(need_resched())) {
270 cx = pr->power.state;
282 * Check for bus mastering activity (if required), record, and check
285 if (pr->flags.bm_check) {
287 unsigned long diff = jiffies - pr->power.bm_check_timestamp;
292 pr->power.bm_activity <<= diff;
294 acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS,
295 &bm_status, ACPI_MTX_DO_NOT_LOCK);
297 pr->power.bm_activity |= 0x1;
298 acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS,
299 1, ACPI_MTX_DO_NOT_LOCK);
302 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
303 * the true state of bus mastering activity; forcing us to
304 * manually check the BMIDEA bit of each IDE channel.
306 else if (errata.piix4.bmisx) {
307 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
308 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
309 pr->power.bm_activity |= 0x1;
312 pr->power.bm_check_timestamp = jiffies;
315 * If bus mastering is or was active this jiffy, demote
316 * to avoid a faulty transition. Note that the processor
317 * won't enter a low-power state during this call (to this
318 * function) but should upon the next.
320 * TBD: A better policy might be to fallback to the demotion
321 * state (use it for this quantum only) istead of
322 * demoting -- and rely on duration as our sole demotion
323 * qualification. This may, however, introduce DMA
324 * issues (e.g. floppy DMA transfer overrun/underrun).
326 if ((pr->power.bm_activity & 0x1) &&
327 cx->demotion.threshold.bm) {
329 next_state = cx->demotion.state;
334 #ifdef CONFIG_HOTPLUG_CPU
336 * Check for P_LVL2_UP flag before entering C2 and above on
337 * an SMP system. We do it here instead of doing it at _CST/P_LVL
338 * detection phase, to work cleanly with logical CPU hotplug.
340 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
341 !pr->flags.has_cst && !(acpi_fadt.flags & ACPI_FADT_C2_MP_SUPPORTED))
342 cx = &pr->power.states[ACPI_STATE_C1];
348 * Invoke the current Cx state to put the processor to sleep.
350 if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) {
351 current_thread_info()->status &= ~TS_POLLING;
353 * TS_POLLING-cleared state must be visible before we
357 if (need_resched()) {
358 current_thread_info()->status |= TS_POLLING;
369 * Use the appropriate idle routine, the one that would
370 * be used without acpi C-states.
378 * TBD: Can't get time duration while in C1, as resumes
379 * go to an ISR rather than here. Need to instrument
380 * base interrupt handler.
382 sleep_ticks = 0xFFFFFFFF;
386 /* Get start time (ticks) */
387 t1 = inl(acpi_fadt.xpm_timer_block.address);
389 acpi_cstate_enter(cx);
390 /* Get end time (ticks) */
391 t2 = inl(acpi_fadt.xpm_timer_block.address);
393 #ifdef CONFIG_GENERIC_TIME
394 /* TSC halts in C2, so notify users */
397 /* Re-enable interrupts */
399 current_thread_info()->status |= TS_POLLING;
400 /* Compute time (ticks) that we were actually asleep */
402 ticks_elapsed(t1, t2) - cx->latency_ticks - C2_OVERHEAD;
407 if (pr->flags.bm_check) {
408 if (atomic_inc_return(&c3_cpu_count) ==
411 * All CPUs are trying to go to C3
412 * Disable bus master arbitration
414 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1,
415 ACPI_MTX_DO_NOT_LOCK);
418 /* SMP with no shared cache... Invalidate cache */
419 ACPI_FLUSH_CPU_CACHE();
422 /* Get start time (ticks) */
423 t1 = inl(acpi_fadt.xpm_timer_block.address);
425 acpi_cstate_enter(cx);
426 /* Get end time (ticks) */
427 t2 = inl(acpi_fadt.xpm_timer_block.address);
428 if (pr->flags.bm_check) {
429 /* Enable bus master arbitration */
430 atomic_dec(&c3_cpu_count);
431 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0,
432 ACPI_MTX_DO_NOT_LOCK);
435 #ifdef CONFIG_GENERIC_TIME
436 /* TSC halts in C3, so notify users */
439 /* Re-enable interrupts */
441 current_thread_info()->status |= TS_POLLING;
442 /* Compute time (ticks) that we were actually asleep */
444 ticks_elapsed(t1, t2) - cx->latency_ticks - C3_OVERHEAD;
452 if ((cx->type != ACPI_STATE_C1) && (sleep_ticks > 0))
453 cx->time += sleep_ticks;
455 next_state = pr->power.state;
457 #ifdef CONFIG_HOTPLUG_CPU
458 /* Don't do promotion/demotion */
459 if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) &&
460 !pr->flags.has_cst && !(acpi_fadt.flags & ACPI_FADT_C2_MP_SUPPORTED)) {
469 * Track the number of longs (time asleep is greater than threshold)
470 * and promote when the count threshold is reached. Note that bus
471 * mastering activity may prevent promotions.
472 * Do not promote above max_cstate.
474 if (cx->promotion.state &&
475 ((cx->promotion.state - pr->power.states) <= max_cstate)) {
476 if (sleep_ticks > cx->promotion.threshold.ticks &&
477 cx->promotion.state->latency <= system_latency_constraint()) {
478 cx->promotion.count++;
479 cx->demotion.count = 0;
480 if (cx->promotion.count >=
481 cx->promotion.threshold.count) {
482 if (pr->flags.bm_check) {
484 (pr->power.bm_activity & cx->
485 promotion.threshold.bm)) {
491 next_state = cx->promotion.state;
501 * Track the number of shorts (time asleep is less than time threshold)
502 * and demote when the usage threshold is reached.
504 if (cx->demotion.state) {
505 if (sleep_ticks < cx->demotion.threshold.ticks) {
506 cx->demotion.count++;
507 cx->promotion.count = 0;
508 if (cx->demotion.count >= cx->demotion.threshold.count) {
509 next_state = cx->demotion.state;
517 * Demote if current state exceeds max_cstate
518 * or if the latency of the current state is unacceptable
520 if ((pr->power.state - pr->power.states) > max_cstate ||
521 pr->power.state->latency > system_latency_constraint()) {
522 if (cx->demotion.state)
523 next_state = cx->demotion.state;
529 * If we're going to start using a new Cx state we must clean up
530 * from the previous and prepare to use the new.
532 if (next_state != pr->power.state)
533 acpi_processor_power_activate(pr, next_state);
536 static int acpi_processor_set_power_policy(struct acpi_processor *pr)
539 unsigned int state_is_set = 0;
540 struct acpi_processor_cx *lower = NULL;
541 struct acpi_processor_cx *higher = NULL;
542 struct acpi_processor_cx *cx;
549 * This function sets the default Cx state policy (OS idle handler).
550 * Our scheme is to promote quickly to C2 but more conservatively
551 * to C3. We're favoring C2 for its characteristics of low latency
552 * (quick response), good power savings, and ability to allow bus
553 * mastering activity. Note that the Cx state policy is completely
554 * customizable and can be altered dynamically.
558 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
559 cx = &pr->power.states[i];
564 pr->power.state = cx;
573 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
574 cx = &pr->power.states[i];
579 cx->demotion.state = lower;
580 cx->demotion.threshold.ticks = cx->latency_ticks;
581 cx->demotion.threshold.count = 1;
582 if (cx->type == ACPI_STATE_C3)
583 cx->demotion.threshold.bm = bm_history;
590 for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) {
591 cx = &pr->power.states[i];
596 cx->promotion.state = higher;
597 cx->promotion.threshold.ticks = cx->latency_ticks;
598 if (cx->type >= ACPI_STATE_C2)
599 cx->promotion.threshold.count = 4;
601 cx->promotion.threshold.count = 10;
602 if (higher->type == ACPI_STATE_C3)
603 cx->promotion.threshold.bm = bm_history;
612 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
621 /* if info is obtained from pblk/fadt, type equals state */
622 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
623 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
625 #ifndef CONFIG_HOTPLUG_CPU
627 * Check for P_LVL2_UP flag before entering C2 and above on
630 if ((num_online_cpus() > 1) &&
631 !(acpi_fadt.flags & ACPI_FADT_C2_MP_SUPPORTED))
635 /* determine C2 and C3 address from pblk */
636 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
637 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
639 /* determine latencies from FADT */
640 pr->power.states[ACPI_STATE_C2].latency = acpi_fadt.C2latency;
641 pr->power.states[ACPI_STATE_C3].latency = acpi_fadt.C3latency;
643 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
644 "lvl2[0x%08x] lvl3[0x%08x]\n",
645 pr->power.states[ACPI_STATE_C2].address,
646 pr->power.states[ACPI_STATE_C3].address));
651 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
653 if (!pr->power.states[ACPI_STATE_C1].valid) {
654 /* set the first C-State to C1 */
655 /* all processors need to support C1 */
656 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
657 pr->power.states[ACPI_STATE_C1].valid = 1;
659 /* the C0 state only exists as a filler in our array */
660 pr->power.states[ACPI_STATE_C0].valid = 1;
664 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
666 acpi_status status = 0;
670 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
671 union acpi_object *cst;
679 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
680 if (ACPI_FAILURE(status)) {
681 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
685 cst = buffer.pointer;
687 /* There must be at least 2 elements */
688 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
689 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
694 count = cst->package.elements[0].integer.value;
696 /* Validate number of power states. */
697 if (count < 1 || count != cst->package.count - 1) {
698 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
703 /* Tell driver that at least _CST is supported. */
704 pr->flags.has_cst = 1;
706 for (i = 1; i <= count; i++) {
707 union acpi_object *element;
708 union acpi_object *obj;
709 struct acpi_power_register *reg;
710 struct acpi_processor_cx cx;
712 memset(&cx, 0, sizeof(cx));
714 element = &(cst->package.elements[i]);
715 if (element->type != ACPI_TYPE_PACKAGE)
718 if (element->package.count != 4)
721 obj = &(element->package.elements[0]);
723 if (obj->type != ACPI_TYPE_BUFFER)
726 reg = (struct acpi_power_register *)obj->buffer.pointer;
728 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
729 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
732 /* There should be an easy way to extract an integer... */
733 obj = &(element->package.elements[1]);
734 if (obj->type != ACPI_TYPE_INTEGER)
737 cx.type = obj->integer.value;
739 * Some buggy BIOSes won't list C1 in _CST -
740 * Let acpi_processor_get_power_info_default() handle them later
742 if (i == 1 && cx.type != ACPI_STATE_C1)
745 cx.address = reg->address;
746 cx.index = current_count + 1;
748 cx.space_id = ACPI_CSTATE_SYSTEMIO;
749 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
750 if (acpi_processor_ffh_cstate_probe
751 (pr->id, &cx, reg) == 0) {
752 cx.space_id = ACPI_CSTATE_FFH;
753 } else if (cx.type != ACPI_STATE_C1) {
755 * C1 is a special case where FIXED_HARDWARE
756 * can be handled in non-MWAIT way as well.
757 * In that case, save this _CST entry info.
758 * That is, we retain space_id of SYSTEM_IO for
760 * Otherwise, ignore this info and continue.
766 obj = &(element->package.elements[2]);
767 if (obj->type != ACPI_TYPE_INTEGER)
770 cx.latency = obj->integer.value;
772 obj = &(element->package.elements[3]);
773 if (obj->type != ACPI_TYPE_INTEGER)
776 cx.power = obj->integer.value;
779 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
782 * We support total ACPI_PROCESSOR_MAX_POWER - 1
783 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
785 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
787 "Limiting number of power states to max (%d)\n",
788 ACPI_PROCESSOR_MAX_POWER);
790 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
795 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
798 /* Validate number of power states discovered */
799 if (current_count < 2)
803 kfree(buffer.pointer);
808 static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
815 * C2 latency must be less than or equal to 100
818 else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
819 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
820 "latency too large [%d]\n", cx->latency));
825 * Otherwise we've met all of our C2 requirements.
826 * Normalize the C2 latency to expidite policy
829 cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
834 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
835 struct acpi_processor_cx *cx)
837 static int bm_check_flag;
844 * C3 latency must be less than or equal to 1000
847 else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
848 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
849 "latency too large [%d]\n", cx->latency));
854 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
855 * DMA transfers are used by any ISA device to avoid livelock.
856 * Note that we could disable Type-F DMA (as recommended by
857 * the erratum), but this is known to disrupt certain ISA
858 * devices thus we take the conservative approach.
860 else if (errata.piix4.fdma) {
861 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
862 "C3 not supported on PIIX4 with Type-F DMA\n"));
866 /* All the logic here assumes flags.bm_check is same across all CPUs */
867 if (!bm_check_flag) {
868 /* Determine whether bm_check is needed based on CPU */
869 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
870 bm_check_flag = pr->flags.bm_check;
872 pr->flags.bm_check = bm_check_flag;
875 if (pr->flags.bm_check) {
876 /* bus mastering control is necessary */
877 if (!pr->flags.bm_control) {
878 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
879 "C3 support requires bus mastering control\n"));
884 * WBINVD should be set in fadt, for C3 state to be
885 * supported on when bm_check is not required.
887 if (!(acpi_fadt.flags & ACPI_FADT_WBINVD)) {
888 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
889 "Cache invalidation should work properly"
890 " for C3 to be enabled on SMP systems\n"));
893 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD,
894 0, ACPI_MTX_DO_NOT_LOCK);
898 * Otherwise we've met all of our C3 requirements.
899 * Normalize the C3 latency to expidite policy. Enable
900 * checking of bus mastering status (bm_check) so we can
901 * use this in our C3 policy
904 cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
909 static int acpi_processor_power_verify(struct acpi_processor *pr)
912 unsigned int working = 0;
914 #ifdef ARCH_APICTIMER_STOPS_ON_C3
915 int timer_broadcast = 0;
916 cpumask_t mask = cpumask_of_cpu(pr->id);
917 on_each_cpu(switch_ipi_to_APIC_timer, &mask, 1, 1);
920 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
921 struct acpi_processor_cx *cx = &pr->power.states[i];
929 acpi_processor_power_verify_c2(cx);
930 #ifdef ARCH_APICTIMER_STOPS_ON_C3
931 /* Some AMD systems fake C3 as C2, but still
932 have timer troubles */
934 boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
940 acpi_processor_power_verify_c3(pr, cx);
941 #ifdef ARCH_APICTIMER_STOPS_ON_C3
952 #ifdef ARCH_APICTIMER_STOPS_ON_C3
954 on_each_cpu(switch_APIC_timer_to_ipi, &mask, 1, 1);
960 static int acpi_processor_get_power_info(struct acpi_processor *pr)
966 /* NOTE: the idle thread may not be running while calling
969 /* Zero initialize all the C-states info. */
970 memset(pr->power.states, 0, sizeof(pr->power.states));
972 result = acpi_processor_get_power_info_cst(pr);
973 if (result == -ENODEV)
974 result = acpi_processor_get_power_info_fadt(pr);
979 acpi_processor_get_power_info_default(pr);
981 pr->power.count = acpi_processor_power_verify(pr);
986 * Now that we know which states are supported, set the default
987 * policy. Note that this policy can be changed dynamically
988 * (e.g. encourage deeper sleeps to conserve battery life when
991 result = acpi_processor_set_power_policy(pr);
996 * if one state of type C2 or C3 is available, mark this
997 * CPU as being "idle manageable"
999 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
1000 if (pr->power.states[i].valid) {
1001 pr->power.count = i;
1002 if (pr->power.states[i].type >= ACPI_STATE_C2)
1003 pr->flags.power = 1;
1010 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1022 if (!pr->flags.power_setup_done)
1025 /* Fall back to the default idle loop */
1026 pm_idle = pm_idle_save;
1027 synchronize_sched(); /* Relies on interrupts forcing exit from idle. */
1029 pr->flags.power = 0;
1030 result = acpi_processor_get_power_info(pr);
1031 if ((pr->flags.power == 1) && (pr->flags.power_setup_done))
1032 pm_idle = acpi_processor_idle;
1037 /* proc interface */
1039 static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
1041 struct acpi_processor *pr = seq->private;
1048 seq_printf(seq, "active state: C%zd\n"
1050 "bus master activity: %08x\n"
1051 "maximum allowed latency: %d usec\n",
1052 pr->power.state ? pr->power.state - pr->power.states : 0,
1053 max_cstate, (unsigned)pr->power.bm_activity,
1054 system_latency_constraint());
1056 seq_puts(seq, "states:\n");
1058 for (i = 1; i <= pr->power.count; i++) {
1059 seq_printf(seq, " %cC%d: ",
1060 (&pr->power.states[i] ==
1061 pr->power.state ? '*' : ' '), i);
1063 if (!pr->power.states[i].valid) {
1064 seq_puts(seq, "<not supported>\n");
1068 switch (pr->power.states[i].type) {
1070 seq_printf(seq, "type[C1] ");
1073 seq_printf(seq, "type[C2] ");
1076 seq_printf(seq, "type[C3] ");
1079 seq_printf(seq, "type[--] ");
1083 if (pr->power.states[i].promotion.state)
1084 seq_printf(seq, "promotion[C%zd] ",
1085 (pr->power.states[i].promotion.state -
1088 seq_puts(seq, "promotion[--] ");
1090 if (pr->power.states[i].demotion.state)
1091 seq_printf(seq, "demotion[C%zd] ",
1092 (pr->power.states[i].demotion.state -
1095 seq_puts(seq, "demotion[--] ");
1097 seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n",
1098 pr->power.states[i].latency,
1099 pr->power.states[i].usage,
1100 pr->power.states[i].time);
1107 static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
1109 return single_open(file, acpi_processor_power_seq_show,
1113 static const struct file_operations acpi_processor_power_fops = {
1114 .open = acpi_processor_power_open_fs,
1116 .llseek = seq_lseek,
1117 .release = single_release,
1121 static void smp_callback(void *v)
1123 /* we already woke the CPU up, nothing more to do */
1127 * This function gets called when a part of the kernel has a new latency
1128 * requirement. This means we need to get all processors out of their C-state,
1129 * and then recalculate a new suitable C-state. Just do a cross-cpu IPI; that
1130 * wakes them all right up.
1132 static int acpi_processor_latency_notify(struct notifier_block *b,
1133 unsigned long l, void *v)
1135 smp_call_function(smp_callback, NULL, 0, 1);
1139 static struct notifier_block acpi_processor_latency_notifier = {
1140 .notifier_call = acpi_processor_latency_notify,
1144 int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1145 struct acpi_device *device)
1147 acpi_status status = 0;
1148 static int first_run;
1149 struct proc_dir_entry *entry = NULL;
1154 dmi_check_system(processor_power_dmi_table);
1155 if (max_cstate < ACPI_C_STATES_MAX)
1157 "ACPI: processor limited to max C-state %d\n",
1161 register_latency_notifier(&acpi_processor_latency_notifier);
1168 if (acpi_fadt.cst_control && !nocst) {
1170 acpi_os_write_port(acpi_fadt.smi_command, acpi_fadt.cst_control, 8);
1171 if (ACPI_FAILURE(status)) {
1172 ACPI_EXCEPTION((AE_INFO, status,
1173 "Notifying BIOS of _CST ability failed"));
1177 acpi_processor_get_power_info(pr);
1180 * Install the idle handler if processor power management is supported.
1181 * Note that we use previously set idle handler will be used on
1182 * platforms that only support C1.
1184 if ((pr->flags.power) && (!boot_option_idle_override)) {
1185 printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id);
1186 for (i = 1; i <= pr->power.count; i++)
1187 if (pr->power.states[i].valid)
1188 printk(" C%d[C%d]", i,
1189 pr->power.states[i].type);
1193 pm_idle_save = pm_idle;
1194 pm_idle = acpi_processor_idle;
1199 entry = create_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1200 S_IRUGO, acpi_device_dir(device));
1204 entry->proc_fops = &acpi_processor_power_fops;
1205 entry->data = acpi_driver_data(device);
1206 entry->owner = THIS_MODULE;
1209 pr->flags.power_setup_done = 1;
1214 int acpi_processor_power_exit(struct acpi_processor *pr,
1215 struct acpi_device *device)
1218 pr->flags.power_setup_done = 0;
1220 if (acpi_device_dir(device))
1221 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1222 acpi_device_dir(device));
1224 /* Unregister the idle handler when processor #0 is removed. */
1226 pm_idle = pm_idle_save;
1229 * We are about to unload the current idle thread pm callback
1230 * (pm_idle), Wait for all processors to update cached/local
1231 * copies of pm_idle before proceeding.
1235 unregister_latency_notifier(&acpi_processor_latency_notifier);