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   1 /*
   2  * include/asm-arm/arch-imx/entry-macro.S
   3  *
   4  * Low-level IRQ helper macros for iMX-based platforms
   5  *
   6  * This file is licensed under  the terms of the GNU General Public
   7  * License version 2. This program is licensed "as is" without any
   8  * warranty of any kind, whether express or implied.
   9  */
  10 #include <asm/hardware.h>
  11
  12                 .macro  disable_fiq
  13                 .endm
  14 #define AITC_NIVECSR   0x40
  15                 .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
  16                 ldr     \irqstat, =IO_ADDRESS(IMX_AITC_BASE)
  17                 @ Load offset & priority of the highest priority
  18                 @ interrupt pending.
  19                 ldr     \irqnr, [\irqstat, #AITC_NIVECSR]
  20                 @ Shift off the priority leaving the offset or
  21                 @ "interrupt number"
  22                 mov     \irqnr, \irqnr, lsr #16
  23                 ldr     \irqstat, =1    @ dummy compare
  24                 ldr     \base, =0xFFFF          // invalid interrupt
  25                 cmp     \irqnr, \base
  26                 bne     1001f
  27                 ldr     \irqstat, =0
  28 1001:
  29                 tst     \irqstat, #1    @ to make the condition code = TRUE
  30                 .endm
  31