git.oblomov.eu Git - linux-2.6/blob - sound/oss/sonicvibes.c

   1 /*****************************************************************************/
   2
   3 /*
   4  *      sonicvibes.c  --  S3 Sonic Vibes audio driver.
   5  *
   6  *      Copyright (C) 1998-2001, 2003  Thomas Sailer (t.sailer@alumni.ethz.ch)
   7  *
   8  *      This program is free software; you can redistribute it and/or modify
   9  *      it under the terms of the GNU General Public License as published by
  10  *      the Free Software Foundation; either version 2 of the License, or
  11  *      (at your option) any later version.
  12  *
  13  *      This program is distributed in the hope that it will be useful,
  14  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *      GNU General Public License for more details.
  17  *
  18  *      You should have received a copy of the GNU General Public License
  19  *      along with this program; if not, write to the Free Software
  20  *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22  * Special thanks to David C. Niemi
  23  *
  24  *
  25  * Module command line parameters:
  26  *   none so far
  27  *
  28  *
  29  *  Supported devices:
  30  *  /dev/dsp    standard /dev/dsp device, (mostly) OSS compatible
  31  *  /dev/mixer  standard /dev/mixer device, (mostly) OSS compatible
  32  *  /dev/midi   simple MIDI UART interface, no ioctl
  33  *
  34  *  The card has both an FM and a Wavetable synth, but I have to figure
  35  *  out first how to drive them...
  36  *
  37  *  Revision history
  38  *    06.05.1998   0.1   Initial release
  39  *    10.05.1998   0.2   Fixed many bugs, esp. ADC rate calculation
  40  *                       First stab at a simple midi interface (no bells&whistles)
  41  *    13.05.1998   0.3   Fix stupid cut&paste error: set_adc_rate was called instead of
  42  *                       set_dac_rate in the FMODE_WRITE case in sv_open
  43  *                       Fix hwptr out of bounds (now mpg123 works)
  44  *    14.05.1998   0.4   Don't allow excessive interrupt rates
  45  *    08.06.1998   0.5   First release using Alan Cox' soundcore instead of miscdevice
  46  *    03.08.1998   0.6   Do not include modversions.h
  47  *                       Now mixer behaviour can basically be selected between
  48  *                       "OSS documented" and "OSS actual" behaviour
  49  *    31.08.1998   0.7   Fix realplayer problems - dac.count issues
  50  *    10.12.1998   0.8   Fix drain_dac trying to wait on not yet initialized DMA
  51  *    16.12.1998   0.9   Fix a few f_file & FMODE_ bugs
  52  *    06.01.1999   0.10  remove the silly SA_INTERRUPT flag.
  53  *                       hopefully killed the egcs section type conflict
  54  *    12.03.1999   0.11  cinfo.blocks should be reset after GETxPTR ioctl.
  55  *                       reported by Johan Maes <joma@telindus.be>
  56  *    22.03.1999   0.12  return EAGAIN instead of EBUSY when O_NONBLOCK
  57  *                       read/write cannot be executed
  58  *    05.04.1999   0.13  added code to sv_read and sv_write which should detect
  59  *                       lockups of the sound chip and revive it. This is basically
  60  *                       an ugly hack, but at least applications using this driver
  61  *                       won't hang forever. I don't know why these lockups happen,
  62  *                       it might well be the motherboard chipset (an early 486 PCI
  63  *                       board with ALI chipset), since every busmastering 100MB
  64  *                       ethernet card I've tried (Realtek 8139 and Macronix tulip clone)
  65  *                       exhibit similar behaviour (they work for a couple of packets
  66  *                       and then lock up and can be revived by ifconfig down/up).
  67  *    07.04.1999   0.14  implemented the following ioctl's: SOUND_PCM_READ_RATE,
  68  *                       SOUND_PCM_READ_CHANNELS, SOUND_PCM_READ_BITS;
  69  *                       Alpha fixes reported by Peter Jones <pjones@redhat.com>
  70  *                       Note: dmaio hack might still be wrong on archs other than i386
  71  *    15.06.1999   0.15  Fix bad allocation bug.
  72  *                       Thanks to Deti Fliegl <fliegl@in.tum.de>
  73  *    28.06.1999   0.16  Add pci_set_master
  74  *    03.08.1999   0.17  adapt to Linus' new __setup/__initcall
  75  *                       added kernel command line options "sonicvibes=reverb" and "sonicvibesdmaio=dmaioaddr"
  76  *    12.08.1999   0.18  module_init/__setup fixes
  77  *    24.08.1999   0.19  get rid of the dmaio kludge, replace with allocate_resource
  78  *    31.08.1999   0.20  add spin_lock_init
  79  *                       use new resource allocation to allocate DDMA IO space
  80  *                       replaced current->state = x with set_current_state(x)
  81  *    03.09.1999   0.21  change read semantics for MIDI to match
  82  *                       OSS more closely; remove possible wakeup race
  83  *    28.10.1999   0.22  More waitqueue races fixed
  84  *    01.12.1999   0.23  New argument to allocate_resource
  85  *    07.12.1999   0.24  More allocate_resource semantics change
  86  *    08.01.2000   0.25  Prevent some ioctl's from returning bad count values on underrun/overrun;
  87  *                       Tim Janik's BSE (Bedevilled Sound Engine) found this
  88  *                       use Martin Mares' pci_assign_resource
  89  *    07.02.2000   0.26  Use pci_alloc_consistent and pci_register_driver
  90  *    21.11.2000   0.27  Initialize dma buffers in poll, otherwise poll may return a bogus mask
  91  *    12.12.2000   0.28  More dma buffer initializations, patch from
  92  *                       Tjeerd Mulder <tjeerd.mulder@fujitsu-siemens.com>
  93  *    31.01.2001   0.29  Register/Unregister gameport
  94  *                       Fix SETTRIGGER non OSS API conformity
  95  *    18.05.2001   0.30  PCI probing and error values cleaned up by Marcus
  96  *                       Meissner <mm@caldera.de>
  97  *    03.01.2003   0.31  open_mode fixes from Georg Acher <acher@in.tum.de>
  98  *
  99  */
 100
 101 /*****************************************************************************/
 102
 103 #include <linux/module.h>
 104 #include <linux/string.h>
 105 #include <linux/ioport.h>
 106 #include <linux/interrupt.h>
 107 #include <linux/wait.h>
 108 #include <linux/mm.h>
 109 #include <linux/delay.h>
 110 #include <linux/sound.h>
 111 #include <linux/slab.h>
 112 #include <linux/soundcard.h>
 113 #include <linux/pci.h>
 114 #include <linux/init.h>
 115 #include <linux/poll.h>
 116 #include <linux/spinlock.h>
 117 #include <linux/smp_lock.h>
 118 #include <linux/gameport.h>
 119
 120 #include <asm/io.h>
 121 #include <asm/uaccess.h>
 122
 123 #include "dm.h"
 124
 125 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
 126 #define SUPPORT_JOYSTICK 1
 127 #endif
 128
 129 /* --------------------------------------------------------------------- */
 130
 131 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
 132
 133 /* --------------------------------------------------------------------- */
 134
 135 #ifndef PCI_VENDOR_ID_S3
 136 #define PCI_VENDOR_ID_S3             0x5333
 137 #endif
 138 #ifndef PCI_DEVICE_ID_S3_SONICVIBES
 139 #define PCI_DEVICE_ID_S3_SONICVIBES  0xca00
 140 #endif
 141
 142 #define SV_MAGIC  ((PCI_VENDOR_ID_S3<<16)|PCI_DEVICE_ID_S3_SONICVIBES)
 143
 144 #define SV_EXTENT_SB      0x10
 145 #define SV_EXTENT_ENH     0x10
 146 #define SV_EXTENT_SYNTH   0x4
 147 #define SV_EXTENT_MIDI    0x4
 148 #define SV_EXTENT_GAME    0x8
 149 #define SV_EXTENT_DMA     0x10
 150
 151 /*
 152  * we are not a bridge and thus use a resource for DDMA that is used for bridges but
 153  * left empty for normal devices
 154  */
 155 #define RESOURCE_SB       0
 156 #define RESOURCE_ENH      1
 157 #define RESOURCE_SYNTH    2
 158 #define RESOURCE_MIDI     3
 159 #define RESOURCE_GAME     4
 160 #define RESOURCE_DDMA     7
 161
 162 #define SV_MIDI_DATA      0
 163 #define SV_MIDI_COMMAND   1
 164 #define SV_MIDI_STATUS    1
 165
 166 #define SV_DMA_ADDR0      0
 167 #define SV_DMA_ADDR1      1
 168 #define SV_DMA_ADDR2      2
 169 #define SV_DMA_ADDR3      3
 170 #define SV_DMA_COUNT0     4
 171 #define SV_DMA_COUNT1     5
 172 #define SV_DMA_COUNT2     6
 173 #define SV_DMA_MODE       0xb
 174 #define SV_DMA_RESET      0xd
 175 #define SV_DMA_MASK       0xf
 176
 177 /*
 178  * DONT reset the DMA controllers unless you understand
 179  * the reset semantics. Assuming reset semantics as in
 180  * the 8237 does not work.
 181  */
 182
 183 #define DMA_MODE_AUTOINIT 0x10
 184 #define DMA_MODE_READ     0x44    /* I/O to memory, no autoinit, increment, single mode */
 185 #define DMA_MODE_WRITE    0x48    /* memory to I/O, no autoinit, increment, single mode */
 186
 187 #define SV_CODEC_CONTROL  0
 188 #define SV_CODEC_INTMASK  1
 189 #define SV_CODEC_STATUS   2
 190 #define SV_CODEC_IADDR    4
 191 #define SV_CODEC_IDATA    5
 192
 193 #define SV_CCTRL_RESET      0x80
 194 #define SV_CCTRL_INTADRIVE  0x20
 195 #define SV_CCTRL_WAVETABLE  0x08
 196 #define SV_CCTRL_REVERB     0x04
 197 #define SV_CCTRL_ENHANCED   0x01
 198
 199 #define SV_CINTMASK_DMAA    0x01
 200 #define SV_CINTMASK_DMAC    0x04
 201 #define SV_CINTMASK_SPECIAL 0x08
 202 #define SV_CINTMASK_UPDOWN  0x40
 203 #define SV_CINTMASK_MIDI    0x80
 204
 205 #define SV_CSTAT_DMAA       0x01
 206 #define SV_CSTAT_DMAC       0x04
 207 #define SV_CSTAT_SPECIAL    0x08
 208 #define SV_CSTAT_UPDOWN     0x40
 209 #define SV_CSTAT_MIDI       0x80
 210
 211 #define SV_CIADDR_TRD       0x80
 212 #define SV_CIADDR_MCE       0x40
 213
 214 /* codec indirect registers */
 215 #define SV_CIMIX_ADCINL     0x00
 216 #define SV_CIMIX_ADCINR     0x01
 217 #define SV_CIMIX_AUX1INL    0x02
 218 #define SV_CIMIX_AUX1INR    0x03
 219 #define SV_CIMIX_CDINL      0x04
 220 #define SV_CIMIX_CDINR      0x05
 221 #define SV_CIMIX_LINEINL    0x06
 222 #define SV_CIMIX_LINEINR    0x07
 223 #define SV_CIMIX_MICIN      0x08
 224 #define SV_CIMIX_SYNTHINL   0x0A
 225 #define SV_CIMIX_SYNTHINR   0x0B
 226 #define SV_CIMIX_AUX2INL    0x0C
 227 #define SV_CIMIX_AUX2INR    0x0D
 228 #define SV_CIMIX_ANALOGINL  0x0E
 229 #define SV_CIMIX_ANALOGINR  0x0F
 230 #define SV_CIMIX_PCMINL     0x10
 231 #define SV_CIMIX_PCMINR     0x11
 232
 233 #define SV_CIGAMECONTROL    0x09
 234 #define SV_CIDATAFMT        0x12
 235 #define SV_CIENABLE         0x13
 236 #define SV_CIUPDOWN         0x14
 237 #define SV_CIREVISION       0x15
 238 #define SV_CIADCOUTPUT      0x16
 239 #define SV_CIDMAABASECOUNT1 0x18
 240 #define SV_CIDMAABASECOUNT0 0x19
 241 #define SV_CIDMACBASECOUNT1 0x1c
 242 #define SV_CIDMACBASECOUNT0 0x1d
 243 #define SV_CIPCMSR0         0x1e
 244 #define SV_CIPCMSR1         0x1f
 245 #define SV_CISYNTHSR0       0x20
 246 #define SV_CISYNTHSR1       0x21
 247 #define SV_CIADCCLKSOURCE   0x22
 248 #define SV_CIADCALTSR       0x23
 249 #define SV_CIADCPLLM        0x24
 250 #define SV_CIADCPLLN        0x25
 251 #define SV_CISYNTHPLLM      0x26
 252 #define SV_CISYNTHPLLN      0x27
 253 #define SV_CIUARTCONTROL    0x2a
 254 #define SV_CIDRIVECONTROL   0x2b
 255 #define SV_CISRSSPACE       0x2c
 256 #define SV_CISRSCENTER      0x2d
 257 #define SV_CIWAVETABLESRC   0x2e
 258 #define SV_CIANALOGPWRDOWN  0x30
 259 #define SV_CIDIGITALPWRDOWN 0x31
 260
 261
 262 #define SV_CIMIX_ADCSRC_CD     0x20
 263 #define SV_CIMIX_ADCSRC_DAC    0x40
 264 #define SV_CIMIX_ADCSRC_AUX2   0x60
 265 #define SV_CIMIX_ADCSRC_LINE   0x80
 266 #define SV_CIMIX_ADCSRC_AUX1   0xa0
 267 #define SV_CIMIX_ADCSRC_MIC    0xc0
 268 #define SV_CIMIX_ADCSRC_MIXOUT 0xe0
 269 #define SV_CIMIX_ADCSRC_MASK   0xe0
 270
 271 #define SV_CFMT_STEREO     0x01
 272 #define SV_CFMT_16BIT      0x02
 273 #define SV_CFMT_MASK       0x03
 274 #define SV_CFMT_ASHIFT     0
 275 #define SV_CFMT_CSHIFT     4
 276
 277 static const unsigned sample_size[] = { 1, 2, 2, 4 };
 278 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
 279
 280 #define SV_CENABLE_PPE     0x4
 281 #define SV_CENABLE_RE      0x2
 282 #define SV_CENABLE_PE      0x1
 283
 284
 285 /* MIDI buffer sizes */
 286
 287 #define MIDIINBUF  256
 288 #define MIDIOUTBUF 256
 289
 290 #define FMODE_MIDI_SHIFT 2
 291 #define FMODE_MIDI_READ  (FMODE_READ << FMODE_MIDI_SHIFT)
 292 #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
 293
 294 #define FMODE_DMFM 0x10
 295
 296 /* --------------------------------------------------------------------- */
 297
 298 struct sv_state {
 299         /* magic */
 300         unsigned int magic;
 301
 302         /* list of sonicvibes devices */
 303         struct list_head devs;
 304
 305         /* the corresponding pci_dev structure */
 306         struct pci_dev *dev;
 307
 308         /* soundcore stuff */
 309         int dev_audio;
 310         int dev_mixer;
 311         int dev_midi;
 312         int dev_dmfm;
 313
 314         /* hardware resources */
 315         unsigned long iosb, ioenh, iosynth, iomidi;  /* long for SPARC */
 316         unsigned int iodmaa, iodmac, irq;
 317
 318         /* mixer stuff */
 319         struct {
 320                 unsigned int modcnt;
 321 #ifndef OSS_DOCUMENTED_MIXER_SEMANTICS
 322                 unsigned short vol[13];
 323 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
 324         } mix;
 325
 326         /* wave stuff */
 327         unsigned int rateadc, ratedac;
 328         unsigned char fmt, enable;
 329
 330         spinlock_t lock;
 331         struct semaphore open_sem;
 332         mode_t open_mode;
 333         wait_queue_head_t open_wait;
 334
 335         struct dmabuf {
 336                 void *rawbuf;
 337                 dma_addr_t dmaaddr;
 338                 unsigned buforder;
 339                 unsigned numfrag;
 340                 unsigned fragshift;
 341                 unsigned hwptr, swptr;
 342                 unsigned total_bytes;
 343                 int count;
 344                 unsigned error; /* over/underrun */
 345                 wait_queue_head_t wait;
 346                 /* redundant, but makes calculations easier */
 347                 unsigned fragsize;
 348                 unsigned dmasize;
 349                 unsigned fragsamples;
 350                 /* OSS stuff */
 351                 unsigned mapped:1;
 352                 unsigned ready:1;
 353                 unsigned endcleared:1;
 354                 unsigned enabled:1;
 355                 unsigned ossfragshift;
 356                 int ossmaxfrags;
 357                 unsigned subdivision;
 358         } dma_dac, dma_adc;
 359
 360         /* midi stuff */
 361         struct {
 362                 unsigned ird, iwr, icnt;
 363                 unsigned ord, owr, ocnt;
 364                 wait_queue_head_t iwait;
 365                 wait_queue_head_t owait;
 366                 struct timer_list timer;
 367                 unsigned char ibuf[MIDIINBUF];
 368                 unsigned char obuf[MIDIOUTBUF];
 369         } midi;
 370
 371 #if SUPPORT_JOYSTICK
 372         struct gameport *gameport;
 373 #endif
 374 };
 375
 376 /* --------------------------------------------------------------------- */
 377
 378 static LIST_HEAD(devs);
 379 static unsigned long wavetable_mem;
 380
 381 /* --------------------------------------------------------------------- */
 382
 383 static inline unsigned ld2(unsigned int x)
 384 {
 385         unsigned r = 0;
 386
 387         if (x >= 0x10000) {
 388                 x >>= 16;
 389                 r += 16;
 390         }
 391         if (x >= 0x100) {
 392                 x >>= 8;
 393                 r += 8;
 394         }
 395         if (x >= 0x10) {
 396                 x >>= 4;
 397                 r += 4;
 398         }
 399         if (x >= 4) {
 400                 x >>= 2;
 401                 r += 2;
 402         }
 403         if (x >= 2)
 404                 r++;
 405         return r;
 406 }
 407
 408 /*
 409  * hweightN: returns the hamming weight (i.e. the number
 410  * of bits set) of a N-bit word
 411  */
 412
 413 #ifdef hweight32
 414 #undef hweight32
 415 #endif
 416
 417 static inline unsigned int hweight32(unsigned int w)
 418 {
 419         unsigned int res = (w & 0x55555555) + ((w >> 1) & 0x55555555);
 420         res = (res & 0x33333333) + ((res >> 2) & 0x33333333);
 421         res = (res & 0x0F0F0F0F) + ((res >> 4) & 0x0F0F0F0F);
 422         res = (res & 0x00FF00FF) + ((res >> 8) & 0x00FF00FF);
 423         return (res & 0x0000FFFF) + ((res >> 16) & 0x0000FFFF);
 424 }
 425
 426 /* --------------------------------------------------------------------- */
 427
 428 /*
 429  * Why use byte IO? Nobody knows, but S3 does it also in their Windows driver.
 430  */
 431
 432 #undef DMABYTEIO
 433
 434 static void set_dmaa(struct sv_state *s, unsigned int addr, unsigned int count)
 435 {
 436 #ifdef DMABYTEIO
 437         unsigned io = s->iodmaa, u;
 438
 439         count--;
 440         for (u = 4; u > 0; u--, addr >>= 8, io++)
 441                 outb(addr & 0xff, io);
 442         for (u = 3; u > 0; u--, count >>= 8, io++)
 443                 outb(count & 0xff, io);
 444 #else /* DMABYTEIO */
 445         count--;
 446         outl(addr, s->iodmaa + SV_DMA_ADDR0);
 447         outl(count, s->iodmaa + SV_DMA_COUNT0);
 448 #endif /* DMABYTEIO */
 449         outb(0x18, s->iodmaa + SV_DMA_MODE);
 450 }
 451
 452 static void set_dmac(struct sv_state *s, unsigned int addr, unsigned int count)
 453 {
 454 #ifdef DMABYTEIO
 455         unsigned io = s->iodmac, u;
 456
 457         count >>= 1;
 458         count--;
 459         for (u = 4; u > 0; u--, addr >>= 8, io++)
 460                 outb(addr & 0xff, io);
 461         for (u = 3; u > 0; u--, count >>= 8, io++)
 462                 outb(count & 0xff, io);
 463 #else /* DMABYTEIO */
 464         count >>= 1;
 465         count--;
 466         outl(addr, s->iodmac + SV_DMA_ADDR0);
 467         outl(count, s->iodmac + SV_DMA_COUNT0);
 468 #endif /* DMABYTEIO */
 469         outb(0x14, s->iodmac + SV_DMA_MODE);
 470 }
 471
 472 static inline unsigned get_dmaa(struct sv_state *s)
 473 {
 474 #ifdef DMABYTEIO
 475         unsigned io = s->iodmaa+6, v = 0, u;
 476
 477         for (u = 3; u > 0; u--, io--) {
 478                 v <<= 8;
 479                 v |= inb(io);
 480         }
 481         return v + 1;
 482 #else /* DMABYTEIO */
 483         return (inl(s->iodmaa + SV_DMA_COUNT0) & 0xffffff) + 1;
 484 #endif /* DMABYTEIO */
 485 }
 486
 487 static inline unsigned get_dmac(struct sv_state *s)
 488 {
 489 #ifdef DMABYTEIO
 490         unsigned io = s->iodmac+6, v = 0, u;
 491
 492         for (u = 3; u > 0; u--, io--) {
 493                 v <<= 8;
 494                 v |= inb(io);
 495         }
 496         return (v + 1) << 1;
 497 #else /* DMABYTEIO */
 498         return ((inl(s->iodmac + SV_DMA_COUNT0) & 0xffffff) + 1) << 1;
 499 #endif /* DMABYTEIO */
 500 }
 501
 502 static void wrindir(struct sv_state *s, unsigned char idx, unsigned char data)
 503 {
 504         outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
 505         udelay(10);
 506         outb(data, s->ioenh + SV_CODEC_IDATA);
 507         udelay(10);
 508 }
 509
 510 static unsigned char rdindir(struct sv_state *s, unsigned char idx)
 511 {
 512         unsigned char v;
 513
 514         outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
 515         udelay(10);
 516         v = inb(s->ioenh + SV_CODEC_IDATA);
 517         udelay(10);
 518         return v;
 519 }
 520
 521 static void set_fmt(struct sv_state *s, unsigned char mask, unsigned char data)
 522 {
 523         unsigned long flags;
 524
 525         spin_lock_irqsave(&s->lock, flags);
 526         outb(SV_CIDATAFMT | SV_CIADDR_MCE, s->ioenh + SV_CODEC_IADDR);
 527         if (mask) {
 528                 s->fmt = inb(s->ioenh + SV_CODEC_IDATA);
 529                 udelay(10);
 530         }
 531         s->fmt = (s->fmt & mask) | data;
 532         outb(s->fmt, s->ioenh + SV_CODEC_IDATA);
 533         udelay(10);
 534         outb(0, s->ioenh + SV_CODEC_IADDR);
 535         spin_unlock_irqrestore(&s->lock, flags);
 536         udelay(10);
 537 }
 538
 539 static void frobindir(struct sv_state *s, unsigned char idx, unsigned char mask, unsigned char data)
 540 {
 541         outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
 542         udelay(10);
 543         outb((inb(s->ioenh + SV_CODEC_IDATA) & mask) ^ data, s->ioenh + SV_CODEC_IDATA);
 544         udelay(10);
 545 }
 546
 547 #define REFFREQUENCY  24576000
 548 #define ADCMULT 512
 549 #define FULLRATE 48000
 550
 551 static unsigned setpll(struct sv_state *s, unsigned char reg, unsigned rate)
 552 {
 553         unsigned long flags;
 554         unsigned char r, m=0, n=0;
 555         unsigned xm, xn, xr, xd, metric = ~0U;
 556         /* the warnings about m and n used uninitialized are bogus and may safely be ignored */
 557
 558         if (rate < 625000/ADCMULT)
 559                 rate = 625000/ADCMULT;
 560         if (rate > 150000000/ADCMULT)
 561                 rate = 150000000/ADCMULT;
 562         /* slight violation of specs, needed for continuous sampling rates */
 563         for (r = 0; rate < 75000000/ADCMULT; r += 0x20, rate <<= 1);
 564         for (xn = 3; xn < 35; xn++)
 565                 for (xm = 3; xm < 130; xm++) {
 566                         xr = REFFREQUENCY/ADCMULT * xm / xn;
 567                         xd = abs((signed)(xr - rate));
 568                         if (xd < metric) {
 569                                 metric = xd;
 570                                 m = xm - 2;
 571                                 n = xn - 2;
 572                         }
 573                 }
 574         reg &= 0x3f;
 575         spin_lock_irqsave(&s->lock, flags);
 576         outb(reg, s->ioenh + SV_CODEC_IADDR);
 577         udelay(10);
 578         outb(m, s->ioenh + SV_CODEC_IDATA);
 579         udelay(10);
 580         outb(reg+1, s->ioenh + SV_CODEC_IADDR);
 581         udelay(10);
 582         outb(r | n, s->ioenh + SV_CODEC_IDATA);
 583         spin_unlock_irqrestore(&s->lock, flags);
 584         udelay(10);
 585         return (REFFREQUENCY/ADCMULT * (m + 2) / (n + 2)) >> ((r >> 5) & 7);
 586 }
 587
 588 #if 0
 589
 590 static unsigned getpll(struct sv_state *s, unsigned char reg)
 591 {
 592         unsigned long flags;
 593         unsigned char m, n;
 594
 595         reg &= 0x3f;
 596         spin_lock_irqsave(&s->lock, flags);
 597         outb(reg, s->ioenh + SV_CODEC_IADDR);
 598         udelay(10);
 599         m = inb(s->ioenh + SV_CODEC_IDATA);
 600         udelay(10);
 601         outb(reg+1, s->ioenh + SV_CODEC_IADDR);
 602         udelay(10);
 603         n = inb(s->ioenh + SV_CODEC_IDATA);
 604         spin_unlock_irqrestore(&s->lock, flags);
 605         udelay(10);
 606         return (REFFREQUENCY/ADCMULT * (m + 2) / ((n & 0x1f) + 2)) >> ((n >> 5) & 7);
 607 }
 608
 609 #endif
 610
 611 static void set_dac_rate(struct sv_state *s, unsigned rate)
 612 {
 613         unsigned div;
 614         unsigned long flags;
 615
 616         if (rate > 48000)
 617                 rate = 48000;
 618         if (rate < 4000)
 619                 rate = 4000;
 620         div = (rate * 65536 + FULLRATE/2) / FULLRATE;
 621         if (div > 65535)
 622                 div = 65535;
 623         spin_lock_irqsave(&s->lock, flags);
 624         wrindir(s, SV_CIPCMSR1, div >> 8);
 625         wrindir(s, SV_CIPCMSR0, div);
 626         spin_unlock_irqrestore(&s->lock, flags);
 627         s->ratedac = (div * FULLRATE + 32768) / 65536;
 628 }
 629
 630 static void set_adc_rate(struct sv_state *s, unsigned rate)
 631 {
 632         unsigned long flags;
 633         unsigned rate1, rate2, div;
 634
 635         if (rate > 48000)
 636                 rate = 48000;
 637         if (rate < 4000)
 638                 rate = 4000;
 639         rate1 = setpll(s, SV_CIADCPLLM, rate);
 640         div = (48000 + rate/2) / rate;
 641         if (div > 8)
 642                 div = 8;
 643         rate2 = (48000 + div/2) / div;
 644         spin_lock_irqsave(&s->lock, flags);
 645         wrindir(s, SV_CIADCALTSR, (div-1) << 4);
 646         if (abs((signed)(rate-rate2)) <= abs((signed)(rate-rate1))) {
 647                 wrindir(s, SV_CIADCCLKSOURCE, 0x10);
 648                 s->rateadc = rate2;
 649         } else {
 650                 wrindir(s, SV_CIADCCLKSOURCE, 0x00);
 651                 s->rateadc = rate1;
 652         }
 653         spin_unlock_irqrestore(&s->lock, flags);
 654 }
 655
 656 /* --------------------------------------------------------------------- */
 657
 658 static inline void stop_adc(struct sv_state *s)
 659 {
 660         unsigned long flags;
 661
 662         spin_lock_irqsave(&s->lock, flags);
 663         s->enable &= ~SV_CENABLE_RE;
 664         wrindir(s, SV_CIENABLE, s->enable);
 665         spin_unlock_irqrestore(&s->lock, flags);
 666 }
 667
 668 static inline void stop_dac(struct sv_state *s)
 669 {
 670         unsigned long flags;
 671
 672         spin_lock_irqsave(&s->lock, flags);
 673         s->enable &= ~(SV_CENABLE_PPE | SV_CENABLE_PE);
 674         wrindir(s, SV_CIENABLE, s->enable);
 675         spin_unlock_irqrestore(&s->lock, flags);
 676 }
 677
 678 static void start_dac(struct sv_state *s)
 679 {
 680         unsigned long flags;
 681
 682         spin_lock_irqsave(&s->lock, flags);
 683         if ((s->dma_dac.mapped || s->dma_dac.count > 0) && s->dma_dac.ready) {
 684                 s->enable = (s->enable & ~SV_CENABLE_PPE) | SV_CENABLE_PE;
 685                 wrindir(s, SV_CIENABLE, s->enable);
 686         }
 687         spin_unlock_irqrestore(&s->lock, flags);
 688 }
 689
 690 static void start_adc(struct sv_state *s)
 691 {
 692         unsigned long flags;
 693
 694         spin_lock_irqsave(&s->lock, flags);
 695         if ((s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
 696             && s->dma_adc.ready) {
 697                 s->enable |= SV_CENABLE_RE;
 698                 wrindir(s, SV_CIENABLE, s->enable);
 699         }
 700         spin_unlock_irqrestore(&s->lock, flags);
 701 }
 702
 703 /* --------------------------------------------------------------------- */
 704
 705 #define DMABUF_DEFAULTORDER (17-PAGE_SHIFT)
 706 #define DMABUF_MINORDER 1
 707
 708 static void dealloc_dmabuf(struct sv_state *s, struct dmabuf *db)
 709 {
 710         struct page *page, *pend;
 711
 712         if (db->rawbuf) {
 713                 /* undo marking the pages as reserved */
 714                 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
 715                 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
 716                         ClearPageReserved(page);
 717                 pci_free_consistent(s->dev, PAGE_SIZE << db->buforder, db->rawbuf, db->dmaaddr);
 718         }
 719         db->rawbuf = NULL;
 720         db->mapped = db->ready = 0;
 721 }
 722
 723
 724 /* DMAA is used for playback, DMAC is used for recording */
 725
 726 static int prog_dmabuf(struct sv_state *s, unsigned rec)
 727 {
 728         struct dmabuf *db = rec ? &s->dma_adc : &s->dma_dac;
 729         unsigned rate = rec ? s->rateadc : s->ratedac;
 730         int order;
 731         unsigned bytepersec;
 732         unsigned bufs;
 733         struct page *page, *pend;
 734         unsigned char fmt;
 735         unsigned long flags;
 736
 737         spin_lock_irqsave(&s->lock, flags);
 738         fmt = s->fmt;
 739         if (rec) {
 740                 s->enable &= ~SV_CENABLE_RE;
 741                 fmt >>= SV_CFMT_CSHIFT;
 742         } else {
 743                 s->enable &= ~SV_CENABLE_PE;
 744                 fmt >>= SV_CFMT_ASHIFT;
 745         }
 746         wrindir(s, SV_CIENABLE, s->enable);
 747         spin_unlock_irqrestore(&s->lock, flags);
 748         fmt &= SV_CFMT_MASK;
 749         db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
 750         if (!db->rawbuf) {
 751                 db->ready = db->mapped = 0;
 752                 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
 753                         if ((db->rawbuf = pci_alloc_consistent(s->dev, PAGE_SIZE << order, &db->dmaaddr)))
 754                                 break;
 755                 if (!db->rawbuf)
 756                         return -ENOMEM;
 757                 db->buforder = order;
 758                 if ((virt_to_bus(db->rawbuf) ^ (virt_to_bus(db->rawbuf) + (PAGE_SIZE << db->buforder) - 1)) & ~0xffff)
 759                         printk(KERN_DEBUG "sv: DMA buffer crosses 64k boundary: busaddr 0x%lx  size %ld\n",
 760                                virt_to_bus(db->rawbuf), PAGE_SIZE << db->buforder);
 761                 if ((virt_to_bus(db->rawbuf) + (PAGE_SIZE << db->buforder) - 1) & ~0xffffff)
 762                         printk(KERN_DEBUG "sv: DMA buffer beyond 16MB: busaddr 0x%lx  size %ld\n",
 763                                virt_to_bus(db->rawbuf), PAGE_SIZE << db->buforder);
 764                 /* now mark the pages as reserved; otherwise remap_pfn_range doesn't do what we want */
 765                 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
 766                 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
 767                         SetPageReserved(page);
 768         }
 769         bytepersec = rate << sample_shift[fmt];
 770         bufs = PAGE_SIZE << db->buforder;
 771         if (db->ossfragshift) {
 772                 if ((1000 << db->ossfragshift) < bytepersec)
 773                         db->fragshift = ld2(bytepersec/1000);
 774                 else
 775                         db->fragshift = db->ossfragshift;
 776         } else {
 777                 db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
 778                 if (db->fragshift < 3)
 779                         db->fragshift = 3;
 780         }
 781         db->numfrag = bufs >> db->fragshift;
 782         while (db->numfrag < 4 && db->fragshift > 3) {
 783                 db->fragshift--;
 784                 db->numfrag = bufs >> db->fragshift;
 785         }
 786         db->fragsize = 1 << db->fragshift;
 787         if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
 788                 db->numfrag = db->ossmaxfrags;
 789         db->fragsamples = db->fragsize >> sample_shift[fmt];
 790         db->dmasize = db->numfrag << db->fragshift;
 791         memset(db->rawbuf, (fmt & SV_CFMT_16BIT) ? 0 : 0x80, db->dmasize);
 792         spin_lock_irqsave(&s->lock, flags);
 793         if (rec) {
 794                 set_dmac(s, db->dmaaddr, db->numfrag << db->fragshift);
 795                 /* program enhanced mode registers */
 796                 wrindir(s, SV_CIDMACBASECOUNT1, (db->fragsamples-1) >> 8);
 797                 wrindir(s, SV_CIDMACBASECOUNT0, db->fragsamples-1);
 798         } else {
 799                 set_dmaa(s, db->dmaaddr, db->numfrag << db->fragshift);
 800                 /* program enhanced mode registers */
 801                 wrindir(s, SV_CIDMAABASECOUNT1, (db->fragsamples-1) >> 8);
 802                 wrindir(s, SV_CIDMAABASECOUNT0, db->fragsamples-1);
 803         }
 804         spin_unlock_irqrestore(&s->lock, flags);
 805         db->enabled = 1;
 806         db->ready = 1;
 807         return 0;
 808 }
 809
 810 static inline void clear_advance(struct sv_state *s)
 811 {
 812         unsigned char c = (s->fmt & (SV_CFMT_16BIT << SV_CFMT_ASHIFT)) ? 0 : 0x80;
 813         unsigned char *buf = s->dma_dac.rawbuf;
 814         unsigned bsize = s->dma_dac.dmasize;
 815         unsigned bptr = s->dma_dac.swptr;
 816         unsigned len = s->dma_dac.fragsize;
 817
 818         if (bptr + len > bsize) {
 819                 unsigned x = bsize - bptr;
 820                 memset(buf + bptr, c, x);
 821                 bptr = 0;
 822                 len -= x;
 823         }
 824         memset(buf + bptr, c, len);
 825 }
 826
 827 /* call with spinlock held! */
 828 static void sv_update_ptr(struct sv_state *s)
 829 {
 830         unsigned hwptr;
 831         int diff;
 832
 833         /* update ADC pointer */
 834         if (s->dma_adc.ready) {
 835                 hwptr = (s->dma_adc.dmasize - get_dmac(s)) % s->dma_adc.dmasize;
 836                 diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
 837                 s->dma_adc.hwptr = hwptr;
 838                 s->dma_adc.total_bytes += diff;
 839                 s->dma_adc.count += diff;
 840                 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
 841                         wake_up(&s->dma_adc.wait);
 842                 if (!s->dma_adc.mapped) {
 843                         if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
 844                                 s->enable &= ~SV_CENABLE_RE;
 845                                 wrindir(s, SV_CIENABLE, s->enable);
 846                                 s->dma_adc.error++;
 847                         }
 848                 }
 849         }
 850         /* update DAC pointer */
 851         if (s->dma_dac.ready) {
 852                 hwptr = (s->dma_dac.dmasize - get_dmaa(s)) % s->dma_dac.dmasize;
 853                 diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize;
 854                 s->dma_dac.hwptr = hwptr;
 855                 s->dma_dac.total_bytes += diff;
 856                 if (s->dma_dac.mapped) {
 857                         s->dma_dac.count += diff;
 858                         if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
 859                                 wake_up(&s->dma_dac.wait);
 860                 } else {
 861                         s->dma_dac.count -= diff;
 862                         if (s->dma_dac.count <= 0) {
 863                                 s->enable &= ~SV_CENABLE_PE;
 864                                 wrindir(s, SV_CIENABLE, s->enable);
 865                                 s->dma_dac.error++;
 866                         } else if (s->dma_dac.count <= (signed)s->dma_dac.fragsize && !s->dma_dac.endcleared) {
 867                                 clear_advance(s);
 868                                 s->dma_dac.endcleared = 1;
 869                         }
 870                         if (s->dma_dac.count + (signed)s->dma_dac.fragsize <= (signed)s->dma_dac.dmasize)
 871                                 wake_up(&s->dma_dac.wait);
 872                 }
 873         }
 874 }
 875
 876 /* hold spinlock for the following! */
 877 static void sv_handle_midi(struct sv_state *s)
 878 {
 879         unsigned char ch;
 880         int wake;
 881
 882         wake = 0;
 883         while (!(inb(s->iomidi+1) & 0x80)) {
 884                 ch = inb(s->iomidi);
 885                 if (s->midi.icnt < MIDIINBUF) {
 886                         s->midi.ibuf[s->midi.iwr] = ch;
 887                         s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
 888                         s->midi.icnt++;
 889                 }
 890                 wake = 1;
 891         }
 892         if (wake)
 893                 wake_up(&s->midi.iwait);
 894         wake = 0;
 895         while (!(inb(s->iomidi+1) & 0x40) && s->midi.ocnt > 0) {
 896                 outb(s->midi.obuf[s->midi.ord], s->iomidi);
 897                 s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
 898                 s->midi.ocnt--;
 899                 if (s->midi.ocnt < MIDIOUTBUF-16)
 900                         wake = 1;
 901         }
 902         if (wake)
 903                 wake_up(&s->midi.owait);
 904 }
 905
 906 static irqreturn_t sv_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 907 {
 908         struct sv_state *s = (struct sv_state *)dev_id;
 909         unsigned int intsrc;
 910
 911         /* fastpath out, to ease interrupt sharing */
 912         intsrc = inb(s->ioenh + SV_CODEC_STATUS);
 913         if (!(intsrc & (SV_CSTAT_DMAA | SV_CSTAT_DMAC | SV_CSTAT_MIDI)))
 914                 return IRQ_NONE;
 915         spin_lock(&s->lock);
 916         sv_update_ptr(s);
 917         sv_handle_midi(s);
 918         spin_unlock(&s->lock);
 919         return IRQ_HANDLED;
 920 }
 921
 922 static void sv_midi_timer(unsigned long data)
 923 {
 924         struct sv_state *s = (struct sv_state *)data;
 925         unsigned long flags;
 926
 927         spin_lock_irqsave(&s->lock, flags);
 928         sv_handle_midi(s);
 929         spin_unlock_irqrestore(&s->lock, flags);
 930         s->midi.timer.expires = jiffies+1;
 931         add_timer(&s->midi.timer);
 932 }
 933
 934 /* --------------------------------------------------------------------- */
 935
 936 static const char invalid_magic[] = KERN_CRIT "sv: invalid magic value\n";
 937
 938 #define VALIDATE_STATE(s)                         \
 939 ({                                                \
 940         if (!(s) || (s)->magic != SV_MAGIC) { \
 941                 printk(invalid_magic);            \
 942                 return -ENXIO;                    \
 943         }                                         \
 944 })
 945
 946 /* --------------------------------------------------------------------- */
 947
 948 #define MT_4          1
 949 #define MT_5MUTE      2
 950 #define MT_4MUTEMONO  3
 951 #define MT_6MUTE      4
 952
 953 static const struct {
 954         unsigned left:5;
 955         unsigned right:5;
 956         unsigned type:3;
 957         unsigned rec:3;
 958 } mixtable[SOUND_MIXER_NRDEVICES] = {
 959         [SOUND_MIXER_RECLEV] = { SV_CIMIX_ADCINL,    SV_CIMIX_ADCINR,    MT_4,         0 },
 960         [SOUND_MIXER_LINE1]  = { SV_CIMIX_AUX1INL,   SV_CIMIX_AUX1INR,   MT_5MUTE,     5 },
 961         [SOUND_MIXER_CD]     = { SV_CIMIX_CDINL,     SV_CIMIX_CDINR,     MT_5MUTE,     1 },
 962         [SOUND_MIXER_LINE]   = { SV_CIMIX_LINEINL,   SV_CIMIX_LINEINR,   MT_5MUTE,     4 },
 963         [SOUND_MIXER_MIC]    = { SV_CIMIX_MICIN,     SV_CIMIX_ADCINL,    MT_4MUTEMONO, 6 },
 964         [SOUND_MIXER_SYNTH]  = { SV_CIMIX_SYNTHINL,  SV_CIMIX_SYNTHINR,  MT_5MUTE,     2 },
 965         [SOUND_MIXER_LINE2]  = { SV_CIMIX_AUX2INL,   SV_CIMIX_AUX2INR,   MT_5MUTE,     3 },
 966         [SOUND_MIXER_VOLUME] = { SV_CIMIX_ANALOGINL, SV_CIMIX_ANALOGINR, MT_5MUTE,     7 },
 967         [SOUND_MIXER_PCM]    = { SV_CIMIX_PCMINL,    SV_CIMIX_PCMINR,    MT_6MUTE,     0 }
 968 };
 969
 970 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
 971
 972 static int return_mixval(struct sv_state *s, unsigned i, int *arg)
 973 {
 974         unsigned long flags;
 975         unsigned char l, r, rl, rr;
 976
 977         spin_lock_irqsave(&s->lock, flags);
 978         l = rdindir(s, mixtable[i].left);
 979         r = rdindir(s, mixtable[i].right);
 980         spin_unlock_irqrestore(&s->lock, flags);
 981         switch (mixtable[i].type) {
 982         case MT_4:
 983                 r &= 0xf;
 984                 l &= 0xf;
 985                 rl = 10 + 6 * (l & 15);
 986                 rr = 10 + 6 * (r & 15);
 987                 break;
 988
 989         case MT_4MUTEMONO:
 990                 rl = 55 - 3 * (l & 15);
 991                 if (r & 0x10)
 992                         rl += 45;
 993                 rr = rl;
 994                 r = l;
 995                 break;
 996
 997         case MT_5MUTE:
 998         default:
 999                 rl = 100 - 3 * (l & 31);
1000                 rr = 100 - 3 * (r & 31);
1001                 break;
1002
1003         case MT_6MUTE:
1004                 rl = 100 - 3 * (l & 63) / 2;
1005                 rr = 100 - 3 * (r & 63) / 2;
1006                 break;
1007         }
1008         if (l & 0x80)
1009                 rl = 0;
1010         if (r & 0x80)
1011                 rr = 0;
1012         return put_user((rr << 8) | rl, arg);
1013 }
1014
1015 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1016
1017 static const unsigned char volidx[SOUND_MIXER_NRDEVICES] =
1018 {
1019         [SOUND_MIXER_RECLEV] = 1,
1020         [SOUND_MIXER_LINE1]  = 2,
1021         [SOUND_MIXER_CD]     = 3,
1022         [SOUND_MIXER_LINE]   = 4,
1023         [SOUND_MIXER_MIC]    = 5,
1024         [SOUND_MIXER_SYNTH]  = 6,
1025         [SOUND_MIXER_LINE2]  = 7,
1026         [SOUND_MIXER_VOLUME] = 8,
1027         [SOUND_MIXER_PCM]    = 9
1028 };
1029
1030 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1031
1032 static unsigned mixer_recmask(struct sv_state *s)
1033 {
1034         unsigned long flags;
1035         int i, j;
1036
1037         spin_lock_irqsave(&s->lock, flags);
1038         j = rdindir(s, SV_CIMIX_ADCINL) >> 5;
1039         spin_unlock_irqrestore(&s->lock, flags);
1040         j &= 7;
1041         for (i = 0; i < SOUND_MIXER_NRDEVICES && mixtable[i].rec != j; i++);
1042         return 1 << i;
1043 }
1044
1045 static int mixer_ioctl(struct sv_state *s, unsigned int cmd, unsigned long arg)
1046 {
1047         unsigned long flags;
1048         int i, val;
1049         unsigned char l, r, rl, rr;
1050         int __user *p = (int __user *)arg;
1051
1052         VALIDATE_STATE(s);
1053         if (cmd == SOUND_MIXER_INFO) {
1054                 mixer_info info;
1055                 memset(&info, 0, sizeof(info));
1056                 strlcpy(info.id, "SonicVibes", sizeof(info.id));
1057                 strlcpy(info.name, "S3 SonicVibes", sizeof(info.name));
1058                 info.modify_counter = s->mix.modcnt;
1059                 if (copy_to_user((void __user *)arg, &info, sizeof(info)))
1060                         return -EFAULT;
1061                 return 0;
1062         }
1063         if (cmd == SOUND_OLD_MIXER_INFO) {
1064                 _old_mixer_info info;
1065                 memset(&info, 0, sizeof(info));
1066                 strlcpy(info.id, "SonicVibes", sizeof(info.id));
1067                 strlcpy(info.name, "S3 SonicVibes", sizeof(info.name));
1068                 if (copy_to_user((void __user *)arg, &info, sizeof(info)))
1069                         return -EFAULT;
1070                 return 0;
1071         }
1072         if (cmd == OSS_GETVERSION)
1073                 return put_user(SOUND_VERSION, p);
1074         if (cmd == SOUND_MIXER_PRIVATE1) {  /* SRS settings */
1075                 if (get_user(val, p))
1076                         return -EFAULT;
1077                 spin_lock_irqsave(&s->lock, flags);
1078                 if (val & 1) {
1079                         if (val & 2) {
1080                                 l = 4 - ((val >> 2) & 7);
1081                                 if (l & ~3)
1082                                         l = 4;
1083                                 r = 4 - ((val >> 5) & 7);
1084                                 if (r & ~3)
1085                                         r = 4;
1086                                 wrindir(s, SV_CISRSSPACE, l);
1087                                 wrindir(s, SV_CISRSCENTER, r);
1088                         } else
1089                                 wrindir(s, SV_CISRSSPACE, 0x80);
1090                 }
1091                 l = rdindir(s, SV_CISRSSPACE);
1092                 r = rdindir(s, SV_CISRSCENTER);
1093                 spin_unlock_irqrestore(&s->lock, flags);
1094                 if (l & 0x80)
1095                         return put_user(0, p);
1096                 return put_user(((4 - (l & 7)) << 2) | ((4 - (r & 7)) << 5) | 2, p);
1097         }
1098         if (_IOC_TYPE(cmd) != 'M' || _SIOC_SIZE(cmd) != sizeof(int))
1099                 return -EINVAL;
1100         if (_SIOC_DIR(cmd) == _SIOC_READ) {
1101                 switch (_IOC_NR(cmd)) {
1102                 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
1103                         return put_user(mixer_recmask(s), p);
1104
1105                 case SOUND_MIXER_DEVMASK: /* Arg contains a bit for each supported device */
1106                         for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1107                                 if (mixtable[i].type)
1108                                         val |= 1 << i;
1109                         return put_user(val, p);
1110
1111                 case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
1112                         for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1113                                 if (mixtable[i].rec)
1114                                         val |= 1 << i;
1115                         return put_user(val, p);
1116
1117                 case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
1118                         for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1119                                 if (mixtable[i].type && mixtable[i].type != MT_4MUTEMONO)
1120                                         val |= 1 << i;
1121                         return put_user(val, p);
1122
1123                 case SOUND_MIXER_CAPS:
1124                         return put_user(SOUND_CAP_EXCL_INPUT, p);
1125
1126                 default:
1127                         i = _IOC_NR(cmd);
1128                         if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].type)
1129                                 return -EINVAL;
1130 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
1131                         return return_mixval(s, i, p);
1132 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1133                         if (!volidx[i])
1134                                 return -EINVAL;
1135                         return put_user(s->mix.vol[volidx[i]-1], p);
1136 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1137                 }
1138         }
1139         if (_SIOC_DIR(cmd) != (_SIOC_READ|_SIOC_WRITE))
1140                 return -EINVAL;
1141         s->mix.modcnt++;
1142         switch (_IOC_NR(cmd)) {
1143         case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
1144                 if (get_user(val, p))
1145                         return -EFAULT;
1146                 i = hweight32(val);
1147                 if (i == 0)
1148                         return 0; /*val = mixer_recmask(s);*/
1149                 else if (i > 1)
1150                         val &= ~mixer_recmask(s);
1151                 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
1152                         if (!(val & (1 << i)))
1153                                 continue;
1154                         if (mixtable[i].rec)
1155                                 break;
1156                 }
1157                 if (i == SOUND_MIXER_NRDEVICES)
1158                         return 0;
1159                 spin_lock_irqsave(&s->lock, flags);
1160                 frobindir(s, SV_CIMIX_ADCINL, 0x1f, mixtable[i].rec << 5);
1161                 frobindir(s, SV_CIMIX_ADCINR, 0x1f, mixtable[i].rec << 5);
1162                 spin_unlock_irqrestore(&s->lock, flags);
1163                 return 0;
1164
1165         default:
1166                 i = _IOC_NR(cmd);
1167                 if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].type)
1168                         return -EINVAL;
1169                 if (get_user(val, p))
1170                         return -EFAULT;
1171                 l = val & 0xff;
1172                 r = (val >> 8) & 0xff;
1173                 if (mixtable[i].type == MT_4MUTEMONO)
1174                         l = (r + l) / 2;
1175                 if (l > 100)
1176                         l = 100;
1177                 if (r > 100)
1178                         r = 100;
1179                 spin_lock_irqsave(&s->lock, flags);
1180                 switch (mixtable[i].type) {
1181                 case MT_4:
1182                         if (l >= 10)
1183                                 l -= 10;
1184                         if (r >= 10)
1185                                 r -= 10;
1186                         frobindir(s, mixtable[i].left, 0xf0, l / 6);
1187                         frobindir(s, mixtable[i].right, 0xf0, l / 6);
1188                         break;
1189
1190                 case MT_4MUTEMONO:
1191                         rr = 0;
1192                         if (l < 10)
1193                                 rl = 0x80;
1194                         else {
1195                                 if (l >= 55) {
1196                                         rr = 0x10;
1197                                         l -= 45;
1198                                 }
1199                                 rl = (55 - l) / 3;
1200                         }
1201                         wrindir(s, mixtable[i].left, rl);
1202                         frobindir(s, mixtable[i].right, ~0x10, rr);
1203                         break;
1204
1205                 case MT_5MUTE:
1206                         if (l < 7)
1207                                 rl = 0x80;
1208                         else
1209                                 rl = (100 - l) / 3;
1210                         if (r < 7)
1211                                 rr = 0x80;
1212                         else
1213                                 rr = (100 - r) / 3;
1214                         wrindir(s, mixtable[i].left, rl);
1215                         wrindir(s, mixtable[i].right, rr);
1216                         break;
1217
1218                 case MT_6MUTE:
1219                         if (l < 6)
1220                                 rl = 0x80;
1221                         else
1222                                 rl = (100 - l) * 2 / 3;
1223                         if (r < 6)
1224                                 rr = 0x80;
1225                         else
1226                                 rr = (100 - r) * 2 / 3;
1227                         wrindir(s, mixtable[i].left, rl);
1228                         wrindir(s, mixtable[i].right, rr);
1229                         break;
1230                 }
1231                 spin_unlock_irqrestore(&s->lock, flags);
1232 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
1233                 return return_mixval(s, i, p);
1234 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1235                 if (!volidx[i])
1236                         return -EINVAL;
1237                 s->mix.vol[volidx[i]-1] = val;
1238                 return put_user(s->mix.vol[volidx[i]-1], p);
1239 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1240         }
1241 }
1242
1243 /* --------------------------------------------------------------------- */
1244
1245 static int sv_open_mixdev(struct inode *inode, struct file *file)
1246 {
1247         int minor = iminor(inode);
1248         struct list_head *list;
1249         struct sv_state *s;
1250
1251         for (list = devs.next; ; list = list->next) {
1252                 if (list == &devs)
1253                         return -ENODEV;
1254                 s = list_entry(list, struct sv_state, devs);
1255                 if (s->dev_mixer == minor)
1256                         break;
1257         }
1258         VALIDATE_STATE(s);
1259         file->private_data = s;
1260         return nonseekable_open(inode, file);
1261 }
1262
1263 static int sv_release_mixdev(struct inode *inode, struct file *file)
1264 {
1265         struct sv_state *s = (struct sv_state *)file->private_data;
1266
1267         VALIDATE_STATE(s);
1268         return 0;
1269 }
1270
1271 static int sv_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1272 {
1273         return mixer_ioctl((struct sv_state *)file->private_data, cmd, arg);
1274 }
1275
1276 static /*const*/ struct file_operations sv_mixer_fops = {
1277         .owner          = THIS_MODULE,
1278         .llseek         = no_llseek,
1279         .ioctl          = sv_ioctl_mixdev,
1280         .open           = sv_open_mixdev,
1281         .release        = sv_release_mixdev,
1282 };
1283
1284 /* --------------------------------------------------------------------- */
1285
1286 static int drain_dac(struct sv_state *s, int nonblock)
1287 {
1288         DECLARE_WAITQUEUE(wait, current);
1289         unsigned long flags;
1290         int count, tmo;
1291
1292         if (s->dma_dac.mapped || !s->dma_dac.ready)
1293                 return 0;
1294         add_wait_queue(&s->dma_dac.wait, &wait);
1295         for (;;) {
1296                 __set_current_state(TASK_INTERRUPTIBLE);
1297                 spin_lock_irqsave(&s->lock, flags);
1298                 count = s->dma_dac.count;
1299                 spin_unlock_irqrestore(&s->lock, flags);
1300                 if (count <= 0)
1301                         break;
1302                 if (signal_pending(current))
1303                         break;
1304                 if (nonblock) {
1305                         remove_wait_queue(&s->dma_dac.wait, &wait);
1306                         set_current_state(TASK_RUNNING);
1307                         return -EBUSY;
1308                 }
1309                 tmo = 3 * HZ * (count + s->dma_dac.fragsize) / 2 / s->ratedac;
1310                 tmo >>= sample_shift[(s->fmt >> SV_CFMT_ASHIFT) & SV_CFMT_MASK];
1311                 if (!schedule_timeout(tmo + 1))
1312                         printk(KERN_DEBUG "sv: dma timed out??\n");
1313         }
1314         remove_wait_queue(&s->dma_dac.wait, &wait);
1315         set_current_state(TASK_RUNNING);
1316         if (signal_pending(current))
1317                 return -ERESTARTSYS;
1318         return 0;
1319 }
1320
1321 /* --------------------------------------------------------------------- */
1322
1323 static ssize_t sv_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
1324 {
1325         struct sv_state *s = (struct sv_state *)file->private_data;
1326         DECLARE_WAITQUEUE(wait, current);
1327         ssize_t ret;
1328         unsigned long flags;
1329         unsigned swptr;
1330         int cnt;
1331
1332         VALIDATE_STATE(s);
1333         if (s->dma_adc.mapped)
1334                 return -ENXIO;
1335         if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
1336                 return ret;
1337         if (!access_ok(VERIFY_WRITE, buffer, count))
1338                 return -EFAULT;
1339         ret = 0;
1340 #if 0
1341         spin_lock_irqsave(&s->lock, flags);
1342         sv_update_ptr(s);
1343         spin_unlock_irqrestore(&s->lock, flags);
1344 #endif
1345         add_wait_queue(&s->dma_adc.wait, &wait);
1346         while (count > 0) {
1347                 spin_lock_irqsave(&s->lock, flags);
1348                 swptr = s->dma_adc.swptr;
1349                 cnt = s->dma_adc.dmasize-swptr;
1350                 if (s->dma_adc.count < cnt)
1351                         cnt = s->dma_adc.count;
1352                 if (cnt <= 0)
1353                         __set_current_state(TASK_INTERRUPTIBLE);
1354                 spin_unlock_irqrestore(&s->lock, flags);
1355                 if (cnt > count)
1356                         cnt = count;
1357                 if (cnt <= 0) {
1358                         if (s->dma_adc.enabled)
1359                                 start_adc(s);
1360                         if (file->f_flags & O_NONBLOCK) {
1361                                 if (!ret)
1362                                         ret = -EAGAIN;
1363                                 break;
1364                         }
1365                         if (!schedule_timeout(HZ)) {
1366                                 printk(KERN_DEBUG "sv: read: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1367                                        s->dma_adc.dmasize, s->dma_adc.fragsize, s->dma_adc.count,
1368                                        s->dma_adc.hwptr, s->dma_adc.swptr);
1369                                 stop_adc(s);
1370                                 spin_lock_irqsave(&s->lock, flags);
1371                                 set_dmac(s, virt_to_bus(s->dma_adc.rawbuf), s->dma_adc.numfrag << s->dma_adc.fragshift);
1372                                 /* program enhanced mode registers */
1373                                 wrindir(s, SV_CIDMACBASECOUNT1, (s->dma_adc.fragsamples-1) >> 8);
1374                                 wrindir(s, SV_CIDMACBASECOUNT0, s->dma_adc.fragsamples-1);
1375                                 s->dma_adc.count = s->dma_adc.hwptr = s->dma_adc.swptr = 0;
1376                                 spin_unlock_irqrestore(&s->lock, flags);
1377                         }
1378                         if (signal_pending(current)) {
1379                                 if (!ret)
1380                                         ret = -ERESTARTSYS;
1381                                 break;
1382                         }
1383                         continue;
1384                 }
1385                 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt)) {
1386                         if (!ret)
1387                                 ret = -EFAULT;
1388                         break;
1389                 }
1390                 swptr = (swptr + cnt) % s->dma_adc.dmasize;
1391                 spin_lock_irqsave(&s->lock, flags);
1392                 s->dma_adc.swptr = swptr;
1393                 s->dma_adc.count -= cnt;
1394                 spin_unlock_irqrestore(&s->lock, flags);
1395                 count -= cnt;
1396                 buffer += cnt;
1397                 ret += cnt;
1398                 if (s->dma_adc.enabled)
1399                         start_adc(s);
1400         }
1401         remove_wait_queue(&s->dma_adc.wait, &wait);
1402         set_current_state(TASK_RUNNING);
1403         return ret;
1404 }
1405
1406 static ssize_t sv_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1407 {
1408         struct sv_state *s = (struct sv_state *)file->private_data;
1409         DECLARE_WAITQUEUE(wait, current);
1410         ssize_t ret;
1411         unsigned long flags;
1412         unsigned swptr;
1413         int cnt;
1414
1415         VALIDATE_STATE(s);
1416         if (s->dma_dac.mapped)
1417                 return -ENXIO;
1418         if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
1419                 return ret;
1420         if (!access_ok(VERIFY_READ, buffer, count))
1421                 return -EFAULT;
1422         ret = 0;
1423 #if 0
1424         spin_lock_irqsave(&s->lock, flags);
1425         sv_update_ptr(s);
1426         spin_unlock_irqrestore(&s->lock, flags);
1427 #endif
1428         add_wait_queue(&s->dma_dac.wait, &wait);
1429         while (count > 0) {
1430                 spin_lock_irqsave(&s->lock, flags);
1431                 if (s->dma_dac.count < 0) {
1432                         s->dma_dac.count = 0;
1433                         s->dma_dac.swptr = s->dma_dac.hwptr;
1434                 }
1435                 swptr = s->dma_dac.swptr;
1436                 cnt = s->dma_dac.dmasize-swptr;
1437                 if (s->dma_dac.count + cnt > s->dma_dac.dmasize)
1438                         cnt = s->dma_dac.dmasize - s->dma_dac.count;
1439                 if (cnt <= 0)
1440                         __set_current_state(TASK_INTERRUPTIBLE);
1441                 spin_unlock_irqrestore(&s->lock, flags);
1442                 if (cnt > count)
1443                         cnt = count;
1444                 if (cnt <= 0) {
1445                         if (s->dma_dac.enabled)
1446                                 start_dac(s);
1447                         if (file->f_flags & O_NONBLOCK) {
1448                                 if (!ret)
1449                                         ret = -EAGAIN;
1450                                 break;
1451                         }
1452                         if (!schedule_timeout(HZ)) {
1453                                 printk(KERN_DEBUG "sv: write: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1454                                        s->dma_dac.dmasize, s->dma_dac.fragsize, s->dma_dac.count,
1455                                        s->dma_dac.hwptr, s->dma_dac.swptr);
1456                                 stop_dac(s);
1457                                 spin_lock_irqsave(&s->lock, flags);
1458                                 set_dmaa(s, virt_to_bus(s->dma_dac.rawbuf), s->dma_dac.numfrag << s->dma_dac.fragshift);
1459                                 /* program enhanced mode registers */
1460                                 wrindir(s, SV_CIDMAABASECOUNT1, (s->dma_dac.fragsamples-1) >> 8);
1461                                 wrindir(s, SV_CIDMAABASECOUNT0, s->dma_dac.fragsamples-1);
1462                                 s->dma_dac.count = s->dma_dac.hwptr = s->dma_dac.swptr = 0;
1463                                 spin_unlock_irqrestore(&s->lock, flags);
1464                         }
1465                         if (signal_pending(current)) {
1466                                 if (!ret)
1467                                         ret = -ERESTARTSYS;
1468                                 break;
1469                         }
1470                         continue;
1471                 }
1472                 if (copy_from_user(s->dma_dac.rawbuf + swptr, buffer, cnt)) {
1473                         if (!ret)
1474                                 ret = -EFAULT;
1475                         break;
1476                 }
1477                 swptr = (swptr + cnt) % s->dma_dac.dmasize;
1478                 spin_lock_irqsave(&s->lock, flags);
1479                 s->dma_dac.swptr = swptr;
1480                 s->dma_dac.count += cnt;
1481                 s->dma_dac.endcleared = 0;
1482                 spin_unlock_irqrestore(&s->lock, flags);
1483                 count -= cnt;
1484                 buffer += cnt;
1485                 ret += cnt;
1486                 if (s->dma_dac.enabled)
1487                         start_dac(s);
1488         }
1489         remove_wait_queue(&s->dma_dac.wait, &wait);
1490         set_current_state(TASK_RUNNING);
1491         return ret;
1492 }
1493
1494 /* No kernel lock - we have our own spinlock */
1495 static unsigned int sv_poll(struct file *file, struct poll_table_struct *wait)
1496 {
1497         struct sv_state *s = (struct sv_state *)file->private_data;
1498         unsigned long flags;
1499         unsigned int mask = 0;
1500
1501         VALIDATE_STATE(s);
1502         if (file->f_mode & FMODE_WRITE) {
1503                 if (!s->dma_dac.ready && prog_dmabuf(s, 1))
1504                         return 0;
1505                 poll_wait(file, &s->dma_dac.wait, wait);
1506         }
1507         if (file->f_mode & FMODE_READ) {
1508                 if (!s->dma_adc.ready && prog_dmabuf(s, 0))
1509                         return 0;
1510                 poll_wait(file, &s->dma_adc.wait, wait);
1511         }
1512         spin_lock_irqsave(&s->lock, flags);
1513         sv_update_ptr(s);
1514         if (file->f_mode & FMODE_READ) {
1515                 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1516                         mask |= POLLIN | POLLRDNORM;
1517         }
1518         if (file->f_mode & FMODE_WRITE) {
1519                 if (s->dma_dac.mapped) {
1520                         if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
1521                                 mask |= POLLOUT | POLLWRNORM;
1522                 } else {
1523                         if ((signed)s->dma_dac.dmasize >= s->dma_dac.count + (signed)s->dma_dac.fragsize)
1524                                 mask |= POLLOUT | POLLWRNORM;
1525                 }
1526         }
1527         spin_unlock_irqrestore(&s->lock, flags);
1528         return mask;
1529 }
1530
1531 static int sv_mmap(struct file *file, struct vm_area_struct *vma)
1532 {
1533         struct sv_state *s = (struct sv_state *)file->private_data;
1534         struct dmabuf *db;
1535         int ret = -EINVAL;
1536         unsigned long size;
1537
1538         VALIDATE_STATE(s);
1539         lock_kernel();
1540         if (vma->vm_flags & VM_WRITE) {
1541                 if ((ret = prog_dmabuf(s, 1)) != 0)
1542                         goto out;
1543                 db = &s->dma_dac;
1544         } else if (vma->vm_flags & VM_READ) {
1545                 if ((ret = prog_dmabuf(s, 0)) != 0)
1546                         goto out;
1547                 db = &s->dma_adc;
1548         } else
1549                 goto out;
1550         ret = -EINVAL;
1551         if (vma->vm_pgoff != 0)
1552                 goto out;
1553         size = vma->vm_end - vma->vm_start;
1554         if (size > (PAGE_SIZE << db->buforder))
1555                 goto out;
1556         ret = -EAGAIN;
1557         if (remap_pfn_range(vma, vma->vm_start,
1558                                 virt_to_phys(db->rawbuf) >> PAGE_SHIFT,
1559                                 size, vma->vm_page_prot))
1560                 goto out;
1561         db->mapped = 1;
1562         ret = 0;
1563 out:
1564         unlock_kernel();
1565         return ret;
1566 }
1567
1568 static int sv_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1569 {
1570         struct sv_state *s = (struct sv_state *)file->private_data;
1571         unsigned long flags;
1572         audio_buf_info abinfo;
1573         count_info cinfo;
1574         int count;
1575         int val, mapped, ret;
1576         unsigned char fmtm, fmtd;
1577         void __user *argp = (void __user *)arg;
1578         int __user *p = argp;
1579
1580         VALIDATE_STATE(s);
1581         mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
1582                 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1583         switch (cmd) {
1584         case OSS_GETVERSION:
1585                 return put_user(SOUND_VERSION, p);
1586
1587         case SNDCTL_DSP_SYNC:
1588                 if (file->f_mode & FMODE_WRITE)
1589                         return drain_dac(s, 0/*file->f_flags & O_NONBLOCK*/);
1590                 return 0;
1591
1592         case SNDCTL_DSP_SETDUPLEX:
1593                 return 0;
1594
1595         case SNDCTL_DSP_GETCAPS:
1596                 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, p);
1597
1598         case SNDCTL_DSP_RESET:
1599                 if (file->f_mode & FMODE_WRITE) {
1600                         stop_dac(s);
1601                         synchronize_irq(s->irq);
1602                         s->dma_dac.swptr = s->dma_dac.hwptr = s->dma_dac.count = s->dma_dac.total_bytes = 0;
1603                 }
1604                 if (file->f_mode & FMODE_READ) {
1605                         stop_adc(s);
1606                         synchronize_irq(s->irq);
1607                         s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1608                 }
1609                 return 0;
1610
1611         case SNDCTL_DSP_SPEED:
1612                 if (get_user(val, p))
1613                         return -EFAULT;
1614                 if (val >= 0) {
1615                         if (file->f_mode & FMODE_READ) {
1616                                 stop_adc(s);
1617                                 s->dma_adc.ready = 0;
1618                                 set_adc_rate(s, val);
1619                         }
1620                         if (file->f_mode & FMODE_WRITE) {
1621                                 stop_dac(s);
1622                                 s->dma_dac.ready = 0;
1623                                 set_dac_rate(s, val);
1624                         }
1625                 }
1626                 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, p);
1627
1628         case SNDCTL_DSP_STEREO:
1629                 if (get_user(val, p))
1630                         return -EFAULT;
1631                 fmtd = 0;
1632                 fmtm = ~0;
1633                 if (file->f_mode & FMODE_READ) {
1634                         stop_adc(s);
1635                         s->dma_adc.ready = 0;
1636                         if (val)
1637                                 fmtd |= SV_CFMT_STEREO << SV_CFMT_CSHIFT;
1638                         else
1639                                 fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_CSHIFT);
1640                 }
1641                 if (file->f_mode & FMODE_WRITE) {
1642                         stop_dac(s);
1643                         s->dma_dac.ready = 0;
1644                         if (val)
1645                                 fmtd |= SV_CFMT_STEREO << SV_CFMT_ASHIFT;
1646                         else
1647                                 fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_ASHIFT);
1648                 }
1649                 set_fmt(s, fmtm, fmtd);
1650                 return 0;
1651
1652         case SNDCTL_DSP_CHANNELS:
1653                 if (get_user(val, p))
1654                         return -EFAULT;
1655                 if (val != 0) {
1656                         fmtd = 0;
1657                         fmtm = ~0;
1658                         if (file->f_mode & FMODE_READ) {
1659                                 stop_adc(s);
1660                                 s->dma_adc.ready = 0;
1661                                 if (val >= 2)
1662                                         fmtd |= SV_CFMT_STEREO << SV_CFMT_CSHIFT;
1663                                 else
1664                                         fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_CSHIFT);
1665                         }
1666                         if (file->f_mode & FMODE_WRITE) {
1667                                 stop_dac(s);
1668                                 s->dma_dac.ready = 0;
1669                                 if (val >= 2)
1670                                         fmtd |= SV_CFMT_STEREO << SV_CFMT_ASHIFT;
1671                                 else
1672                                         fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_ASHIFT);
1673                         }
1674                         set_fmt(s, fmtm, fmtd);
1675                 }
1676                 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_STEREO << SV_CFMT_CSHIFT)
1677                                            : (SV_CFMT_STEREO << SV_CFMT_ASHIFT))) ? 2 : 1, p);
1678
1679         case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1680                 return put_user(AFMT_S16_LE|AFMT_U8, p);
1681
1682         case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1683                 if (get_user(val, p))
1684                         return -EFAULT;
1685                 if (val != AFMT_QUERY) {
1686                         fmtd = 0;
1687                         fmtm = ~0;
1688                         if (file->f_mode & FMODE_READ) {
1689                                 stop_adc(s);
1690                                 s->dma_adc.ready = 0;
1691                                 if (val == AFMT_S16_LE)
1692                                         fmtd |= SV_CFMT_16BIT << SV_CFMT_CSHIFT;
1693                                 else
1694                                         fmtm &= ~(SV_CFMT_16BIT << SV_CFMT_CSHIFT);
1695                         }
1696                         if (file->f_mode & FMODE_WRITE) {
1697                                 stop_dac(s);
1698                                 s->dma_dac.ready = 0;
1699                                 if (val == AFMT_S16_LE)
1700                                         fmtd |= SV_CFMT_16BIT << SV_CFMT_ASHIFT;
1701                                 else
1702                                         fmtm &= ~(SV_CFMT_16BIT << SV_CFMT_ASHIFT);
1703                         }
1704                         set_fmt(s, fmtm, fmtd);
1705                 }
1706                 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_16BIT << SV_CFMT_CSHIFT)
1707                                            : (SV_CFMT_16BIT << SV_CFMT_ASHIFT))) ? AFMT_S16_LE : AFMT_U8, p);
1708
1709         case SNDCTL_DSP_POST:
1710                 return 0;
1711
1712         case SNDCTL_DSP_GETTRIGGER:
1713                 val = 0;
1714                 if (file->f_mode & FMODE_READ && s->enable & SV_CENABLE_RE)
1715                         val |= PCM_ENABLE_INPUT;
1716                 if (file->f_mode & FMODE_WRITE && s->enable & SV_CENABLE_PE)
1717                         val |= PCM_ENABLE_OUTPUT;
1718                 return put_user(val, p);
1719
1720         case SNDCTL_DSP_SETTRIGGER:
1721                 if (get_user(val, p))
1722                         return -EFAULT;
1723                 if (file->f_mode & FMODE_READ) {
1724                         if (val & PCM_ENABLE_INPUT) {
1725                                 if (!s->dma_adc.ready && (ret =  prog_dmabuf(s, 1)))
1726                                         return ret;
1727                                 s->dma_adc.enabled = 1;
1728                                 start_adc(s);
1729                         } else {
1730                                 s->dma_adc.enabled = 0;
1731                                 stop_adc(s);
1732                         }
1733                 }
1734                 if (file->f_mode & FMODE_WRITE) {
1735                         if (val & PCM_ENABLE_OUTPUT) {
1736                                 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
1737                                         return ret;
1738                                 s->dma_dac.enabled = 1;
1739                                 start_dac(s);
1740                         } else {
1741                                 s->dma_dac.enabled = 0;
1742                                 stop_dac(s);
1743                         }
1744                 }
1745                 return 0;
1746
1747         case SNDCTL_DSP_GETOSPACE:
1748                 if (!(file->f_mode & FMODE_WRITE))
1749                         return -EINVAL;
1750                 if (!s->dma_dac.ready && (val = prog_dmabuf(s, 0)) != 0)
1751                         return val;
1752                 spin_lock_irqsave(&s->lock, flags);
1753                 sv_update_ptr(s);
1754                 abinfo.fragsize = s->dma_dac.fragsize;
1755                 count = s->dma_dac.count;
1756                 if (count < 0)
1757                         count = 0;
1758                 abinfo.bytes = s->dma_dac.dmasize - count;
1759                 abinfo.fragstotal = s->dma_dac.numfrag;
1760                 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
1761                 spin_unlock_irqrestore(&s->lock, flags);
1762                 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1763
1764         case SNDCTL_DSP_GETISPACE:
1765                 if (!(file->f_mode & FMODE_READ))
1766                         return -EINVAL;
1767                 if (!s->dma_adc.ready && (val = prog_dmabuf(s, 1)) != 0)
1768                         return val;
1769                 spin_lock_irqsave(&s->lock, flags);
1770                 sv_update_ptr(s);
1771                 abinfo.fragsize = s->dma_adc.fragsize;
1772                 count = s->dma_adc.count;
1773                 if (count < 0)
1774                         count = 0;
1775                 abinfo.bytes = count;
1776                 abinfo.fragstotal = s->dma_adc.numfrag;
1777                 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1778                 spin_unlock_irqrestore(&s->lock, flags);
1779                 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1780
1781         case SNDCTL_DSP_NONBLOCK:
1782                 file->f_flags |= O_NONBLOCK;
1783                 return 0;
1784
1785         case SNDCTL_DSP_GETODELAY:
1786                 if (!(file->f_mode & FMODE_WRITE))
1787                         return -EINVAL;
1788                 if (!s->dma_dac.ready && (val = prog_dmabuf(s, 0)) != 0)
1789                         return val;
1790                 spin_lock_irqsave(&s->lock, flags);
1791                 sv_update_ptr(s);
1792                 count = s->dma_dac.count;
1793                 spin_unlock_irqrestore(&s->lock, flags);
1794                 if (count < 0)
1795                         count = 0;
1796                 return put_user(count, p);
1797
1798         case SNDCTL_DSP_GETIPTR:
1799                 if (!(file->f_mode & FMODE_READ))
1800                         return -EINVAL;
1801                 if (!s->dma_adc.ready && (val = prog_dmabuf(s, 1)) != 0)
1802                         return val;
1803                 spin_lock_irqsave(&s->lock, flags);
1804                 sv_update_ptr(s);
1805                 cinfo.bytes = s->dma_adc.total_bytes;
1806                 count = s->dma_adc.count;
1807                 if (count < 0)
1808                         count = 0;
1809                 cinfo.blocks = count >> s->dma_adc.fragshift;
1810                 cinfo.ptr = s->dma_adc.hwptr;
1811                 if (s->dma_adc.mapped)
1812                         s->dma_adc.count &= s->dma_adc.fragsize-1;
1813                 spin_unlock_irqrestore(&s->lock, flags);
1814                 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1815                         return -EFAULT;
1816                 return 0;
1817
1818         case SNDCTL_DSP_GETOPTR:
1819                 if (!(file->f_mode & FMODE_WRITE))
1820                         return -EINVAL;
1821                 if (!s->dma_dac.ready && (val = prog_dmabuf(s, 0)) != 0)
1822                         return val;
1823                 spin_lock_irqsave(&s->lock, flags);
1824                 sv_update_ptr(s);
1825                 cinfo.bytes = s->dma_dac.total_bytes;
1826                 count = s->dma_dac.count;
1827                 if (count < 0)
1828                         count = 0;
1829                 cinfo.blocks = count >> s->dma_dac.fragshift;
1830                 cinfo.ptr = s->dma_dac.hwptr;
1831                 if (s->dma_dac.mapped)
1832                         s->dma_dac.count &= s->dma_dac.fragsize-1;
1833                 spin_unlock_irqrestore(&s->lock, flags);
1834                 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1835                         return -EFAULT;
1836                 return 0;
1837
1838         case SNDCTL_DSP_GETBLKSIZE:
1839                 if (file->f_mode & FMODE_WRITE) {
1840                         if ((val = prog_dmabuf(s, 0)))
1841                                 return val;
1842                         return put_user(s->dma_dac.fragsize, p);
1843                 }
1844                 if ((val = prog_dmabuf(s, 1)))
1845                         return val;
1846                 return put_user(s->dma_adc.fragsize, p);
1847
1848         case SNDCTL_DSP_SETFRAGMENT:
1849                 if (get_user(val, p))
1850                         return -EFAULT;
1851                 if (file->f_mode & FMODE_READ) {
1852                         s->dma_adc.ossfragshift = val & 0xffff;
1853                         s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1854                         if (s->dma_adc.ossfragshift < 4)
1855                                 s->dma_adc.ossfragshift = 4;
1856                         if (s->dma_adc.ossfragshift > 15)
1857                                 s->dma_adc.ossfragshift = 15;
1858                         if (s->dma_adc.ossmaxfrags < 4)
1859                                 s->dma_adc.ossmaxfrags = 4;
1860                 }
1861                 if (file->f_mode & FMODE_WRITE) {
1862                         s->dma_dac.ossfragshift = val & 0xffff;
1863                         s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
1864                         if (s->dma_dac.ossfragshift < 4)
1865                                 s->dma_dac.ossfragshift = 4;
1866                         if (s->dma_dac.ossfragshift > 15)
1867                                 s->dma_dac.ossfragshift = 15;
1868                         if (s->dma_dac.ossmaxfrags < 4)
1869                                 s->dma_dac.ossmaxfrags = 4;
1870                 }
1871                 return 0;
1872
1873         case SNDCTL_DSP_SUBDIVIDE:
1874                 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1875                     (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
1876                         return -EINVAL;
1877                 if (get_user(val, p))
1878                         return -EFAULT;
1879                 if (val != 1 && val != 2 && val != 4)
1880                         return -EINVAL;
1881                 if (file->f_mode & FMODE_READ)
1882                         s->dma_adc.subdivision = val;
1883                 if (file->f_mode & FMODE_WRITE)
1884                         s->dma_dac.subdivision = val;
1885                 return 0;
1886
1887         case SOUND_PCM_READ_RATE:
1888                 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, p);
1889
1890         case SOUND_PCM_READ_CHANNELS:
1891                 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_STEREO << SV_CFMT_CSHIFT)
1892                                            : (SV_CFMT_STEREO << SV_CFMT_ASHIFT))) ? 2 : 1, p);
1893
1894         case SOUND_PCM_READ_BITS:
1895                 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_16BIT << SV_CFMT_CSHIFT)
1896                                            : (SV_CFMT_16BIT << SV_CFMT_ASHIFT))) ? 16 : 8, p);
1897
1898         case SOUND_PCM_WRITE_FILTER:
1899         case SNDCTL_DSP_SETSYNCRO:
1900         case SOUND_PCM_READ_FILTER:
1901                 return -EINVAL;
1902
1903         }
1904         return mixer_ioctl(s, cmd, arg);
1905 }
1906
1907 static int sv_open(struct inode *inode, struct file *file)
1908 {
1909         int minor = iminor(inode);
1910         DECLARE_WAITQUEUE(wait, current);
1911         unsigned char fmtm = ~0, fmts = 0;
1912         struct list_head *list;
1913         struct sv_state *s;
1914
1915         for (list = devs.next; ; list = list->next) {
1916                 if (list == &devs)
1917                         return -ENODEV;
1918                 s = list_entry(list, struct sv_state, devs);
1919                 if (!((s->dev_audio ^ minor) & ~0xf))
1920                         break;
1921         }
1922         VALIDATE_STATE(s);
1923         file->private_data = s;
1924         /* wait for device to become free */
1925         down(&s->open_sem);
1926         while (s->open_mode & file->f_mode) {
1927                 if (file->f_flags & O_NONBLOCK) {
1928                         up(&s->open_sem);
1929                         return -EBUSY;
1930                 }
1931                 add_wait_queue(&s->open_wait, &wait);
1932                 __set_current_state(TASK_INTERRUPTIBLE);
1933                 up(&s->open_sem);
1934                 schedule();
1935                 remove_wait_queue(&s->open_wait, &wait);
1936                 set_current_state(TASK_RUNNING);
1937                 if (signal_pending(current))
1938                         return -ERESTARTSYS;
1939                 down(&s->open_sem);
1940         }
1941         if (file->f_mode & FMODE_READ) {
1942                 fmtm &= ~((SV_CFMT_STEREO | SV_CFMT_16BIT) << SV_CFMT_CSHIFT);
1943                 if ((minor & 0xf) == SND_DEV_DSP16)
1944                         fmts |= SV_CFMT_16BIT << SV_CFMT_CSHIFT;
1945                 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
1946                 s->dma_adc.enabled = 1;
1947                 set_adc_rate(s, 8000);
1948         }
1949         if (file->f_mode & FMODE_WRITE) {
1950                 fmtm &= ~((SV_CFMT_STEREO | SV_CFMT_16BIT) << SV_CFMT_ASHIFT);
1951                 if ((minor & 0xf) == SND_DEV_DSP16)
1952                         fmts |= SV_CFMT_16BIT << SV_CFMT_ASHIFT;
1953                 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision = 0;
1954                 s->dma_dac.enabled = 1;
1955                 set_dac_rate(s, 8000);
1956         }
1957         set_fmt(s, fmtm, fmts);
1958         s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1959         up(&s->open_sem);
1960         return nonseekable_open(inode, file);
1961 }
1962
1963 static int sv_release(struct inode *inode, struct file *file)
1964 {
1965         struct sv_state *s = (struct sv_state *)file->private_data;
1966
1967         VALIDATE_STATE(s);
1968         lock_kernel();
1969         if (file->f_mode & FMODE_WRITE)
1970                 drain_dac(s, file->f_flags & O_NONBLOCK);
1971         down(&s->open_sem);
1972         if (file->f_mode & FMODE_WRITE) {
1973                 stop_dac(s);
1974                 dealloc_dmabuf(s, &s->dma_dac);
1975         }
1976         if (file->f_mode & FMODE_READ) {
1977                 stop_adc(s);
1978                 dealloc_dmabuf(s, &s->dma_adc);
1979         }
1980         s->open_mode &= ~(file->f_mode & (FMODE_READ|FMODE_WRITE));
1981         wake_up(&s->open_wait);
1982         up(&s->open_sem);
1983         unlock_kernel();
1984         return 0;
1985 }
1986
1987 static /*const*/ struct file_operations sv_audio_fops = {
1988         .owner          = THIS_MODULE,
1989         .llseek         = no_llseek,
1990         .read           = sv_read,
1991         .write          = sv_write,
1992         .poll           = sv_poll,
1993         .ioctl          = sv_ioctl,
1994         .mmap           = sv_mmap,
1995         .open           = sv_open,
1996         .release        = sv_release,
1997 };
1998
1999 /* --------------------------------------------------------------------- */
2000
2001 static ssize_t sv_midi_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
2002 {
2003         struct sv_state *s = (struct sv_state *)file->private_data;
2004         DECLARE_WAITQUEUE(wait, current);
2005         ssize_t ret;
2006         unsigned long flags;
2007         unsigned ptr;
2008         int cnt;
2009
2010         VALIDATE_STATE(s);
2011         if (!access_ok(VERIFY_WRITE, buffer, count))
2012                 return -EFAULT;
2013         if (count == 0)
2014                 return 0;
2015         ret = 0;
2016         add_wait_queue(&s->midi.iwait, &wait);
2017         while (count > 0) {
2018                 spin_lock_irqsave(&s->lock, flags);
2019                 ptr = s->midi.ird;
2020                 cnt = MIDIINBUF - ptr;
2021                 if (s->midi.icnt < cnt)
2022                         cnt = s->midi.icnt;
2023                 if (cnt <= 0)
2024                       __set_current_state(TASK_INTERRUPTIBLE);
2025                 spin_unlock_irqrestore(&s->lock, flags);
2026                 if (cnt > count)
2027                         cnt = count;
2028                 if (cnt <= 0) {
2029                       if (file->f_flags & O_NONBLOCK) {
2030                               if (!ret)
2031                                       ret = -EAGAIN;
2032                               break;
2033                       }
2034                       schedule();
2035                       if (signal_pending(current)) {
2036                               if (!ret)
2037                                       ret = -ERESTARTSYS;
2038                               break;
2039                       }
2040                         continue;
2041                 }
2042                 if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt)) {
2043                         if (!ret)
2044                                 ret = -EFAULT;
2045                         break;
2046                 }
2047                 ptr = (ptr + cnt) % MIDIINBUF;
2048                 spin_lock_irqsave(&s->lock, flags);
2049                 s->midi.ird = ptr;
2050                 s->midi.icnt -= cnt;
2051                 spin_unlock_irqrestore(&s->lock, flags);
2052                 count -= cnt;
2053                 buffer += cnt;
2054                 ret += cnt;
2055                 break;
2056         }
2057         __set_current_state(TASK_RUNNING);
2058         remove_wait_queue(&s->midi.iwait, &wait);
2059         return ret;
2060 }
2061
2062 static ssize_t sv_midi_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
2063 {
2064         struct sv_state *s = (struct sv_state *)file->private_data;
2065         DECLARE_WAITQUEUE(wait, current);
2066         ssize_t ret;
2067         unsigned long flags;
2068         unsigned ptr;
2069         int cnt;
2070
2071         VALIDATE_STATE(s);
2072         if (!access_ok(VERIFY_READ, buffer, count))
2073                 return -EFAULT;
2074         if (count == 0)
2075                 return 0;
2076         ret = 0;
2077         add_wait_queue(&s->midi.owait, &wait);
2078         while (count > 0) {
2079                 spin_lock_irqsave(&s->lock, flags);
2080                 ptr = s->midi.owr;
2081                 cnt = MIDIOUTBUF - ptr;
2082                 if (s->midi.ocnt + cnt > MIDIOUTBUF)
2083                         cnt = MIDIOUTBUF - s->midi.ocnt;
2084                 if (cnt <= 0) {
2085                         __set_current_state(TASK_INTERRUPTIBLE);
2086                         sv_handle_midi(s);
2087                 }
2088                 spin_unlock_irqrestore(&s->lock, flags);
2089                 if (cnt > count)
2090                         cnt = count;
2091                 if (cnt <= 0) {
2092                         if (file->f_flags & O_NONBLOCK) {
2093                                 if (!ret)
2094                                         ret = -EAGAIN;
2095                                 break;
2096                         }
2097                         schedule();
2098                         if (signal_pending(current)) {
2099                                 if (!ret)
2100                                         ret = -ERESTARTSYS;
2101                                 break;
2102                         }
2103                         continue;
2104                 }
2105                 if (copy_from_user(s->midi.obuf + ptr, buffer, cnt)) {
2106                         if (!ret)
2107                                 ret = -EFAULT;
2108                         break;
2109                 }
2110                 ptr = (ptr + cnt) % MIDIOUTBUF;
2111                 spin_lock_irqsave(&s->lock, flags);
2112                 s->midi.owr = ptr;
2113                 s->midi.ocnt += cnt;
2114                 spin_unlock_irqrestore(&s->lock, flags);
2115                 count -= cnt;
2116                 buffer += cnt;
2117                 ret += cnt;
2118                 spin_lock_irqsave(&s->lock, flags);
2119                 sv_handle_midi(s);
2120                 spin_unlock_irqrestore(&s->lock, flags);
2121         }
2122         __set_current_state(TASK_RUNNING);
2123         remove_wait_queue(&s->midi.owait, &wait);
2124         return ret;
2125 }
2126
2127 /* No kernel lock - we have our own spinlock */
2128 static unsigned int sv_midi_poll(struct file *file, struct poll_table_struct *wait)
2129 {
2130         struct sv_state *s = (struct sv_state *)file->private_data;
2131         unsigned long flags;
2132         unsigned int mask = 0;
2133
2134         VALIDATE_STATE(s);
2135         if (file->f_mode & FMODE_WRITE)
2136                 poll_wait(file, &s->midi.owait, wait);
2137         if (file->f_mode & FMODE_READ)
2138                 poll_wait(file, &s->midi.iwait, wait);
2139         spin_lock_irqsave(&s->lock, flags);
2140         if (file->f_mode & FMODE_READ) {
2141                 if (s->midi.icnt > 0)
2142                         mask |= POLLIN | POLLRDNORM;
2143         }
2144         if (file->f_mode & FMODE_WRITE) {
2145                 if (s->midi.ocnt < MIDIOUTBUF)
2146                         mask |= POLLOUT | POLLWRNORM;
2147         }
2148         spin_unlock_irqrestore(&s->lock, flags);
2149         return mask;
2150 }
2151
2152 static int sv_midi_open(struct inode *inode, struct file *file)
2153 {
2154         int minor = iminor(inode);
2155         DECLARE_WAITQUEUE(wait, current);
2156         unsigned long flags;
2157         struct list_head *list;
2158         struct sv_state *s;
2159
2160         for (list = devs.next; ; list = list->next) {
2161                 if (list == &devs)
2162                         return -ENODEV;
2163                 s = list_entry(list, struct sv_state, devs);
2164                 if (s->dev_midi == minor)
2165                         break;
2166         }
2167         VALIDATE_STATE(s);
2168         file->private_data = s;
2169         /* wait for device to become free */
2170         down(&s->open_sem);
2171         while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
2172                 if (file->f_flags & O_NONBLOCK) {
2173                         up(&s->open_sem);
2174                         return -EBUSY;
2175                 }
2176                 add_wait_queue(&s->open_wait, &wait);
2177                 __set_current_state(TASK_INTERRUPTIBLE);
2178                 up(&s->open_sem);
2179                 schedule();
2180                 remove_wait_queue(&s->open_wait, &wait);
2181                 set_current_state(TASK_RUNNING);
2182                 if (signal_pending(current))
2183                         return -ERESTARTSYS;
2184                 down(&s->open_sem);
2185         }
2186         spin_lock_irqsave(&s->lock, flags);
2187         if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2188                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2189                 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2190                 //outb(inb(s->ioenh + SV_CODEC_CONTROL) | SV_CCTRL_WAVETABLE, s->ioenh + SV_CODEC_CONTROL);
2191                 outb(inb(s->ioenh + SV_CODEC_INTMASK) | SV_CINTMASK_MIDI, s->ioenh + SV_CODEC_INTMASK);
2192                 wrindir(s, SV_CIUARTCONTROL, 5); /* output MIDI data to external and internal synth */
2193                 wrindir(s, SV_CIWAVETABLESRC, 1); /* Wavetable in PC RAM */
2194                 outb(0xff, s->iomidi+1); /* reset command */
2195                 outb(0x3f, s->iomidi+1); /* uart command */
2196                 if (!(inb(s->iomidi+1) & 0x80))
2197                         inb(s->iomidi);
2198                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2199                 init_timer(&s->midi.timer);
2200                 s->midi.timer.expires = jiffies+1;
2201                 s->midi.timer.data = (unsigned long)s;
2202                 s->midi.timer.function = sv_midi_timer;
2203                 add_timer(&s->midi.timer);
2204         }
2205         if (file->f_mode & FMODE_READ) {
2206                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2207         }
2208         if (file->f_mode & FMODE_WRITE) {
2209                 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2210         }
2211         spin_unlock_irqrestore(&s->lock, flags);
2212         s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
2213         up(&s->open_sem);
2214         return nonseekable_open(inode, file);
2215 }
2216
2217 static int sv_midi_release(struct inode *inode, struct file *file)
2218 {
2219         struct sv_state *s = (struct sv_state *)file->private_data;
2220         DECLARE_WAITQUEUE(wait, current);
2221         unsigned long flags;
2222         unsigned count, tmo;
2223
2224         VALIDATE_STATE(s);
2225
2226         lock_kernel();
2227         if (file->f_mode & FMODE_WRITE) {
2228                 add_wait_queue(&s->midi.owait, &wait);
2229                 for (;;) {
2230                         __set_current_state(TASK_INTERRUPTIBLE);
2231                         spin_lock_irqsave(&s->lock, flags);
2232                         count = s->midi.ocnt;
2233                         spin_unlock_irqrestore(&s->lock, flags);
2234                         if (count <= 0)
2235                                 break;
2236                         if (signal_pending(current))
2237                                 break;
2238                         if (file->f_flags & O_NONBLOCK) {
2239                                 remove_wait_queue(&s->midi.owait, &wait);
2240                                 set_current_state(TASK_RUNNING);
2241                                 unlock_kernel();
2242                                 return -EBUSY;
2243                         }
2244                         tmo = (count * HZ) / 3100;
2245                         if (!schedule_timeout(tmo ? : 1) && tmo)
2246                                 printk(KERN_DEBUG "sv: midi timed out??\n");
2247                 }
2248                 remove_wait_queue(&s->midi.owait, &wait);
2249                 set_current_state(TASK_RUNNING);
2250         }
2251         down(&s->open_sem);
2252         s->open_mode &= ~((file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE));
2253         spin_lock_irqsave(&s->lock, flags);
2254         if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2255                 outb(inb(s->ioenh + SV_CODEC_INTMASK) & ~SV_CINTMASK_MIDI, s->ioenh + SV_CODEC_INTMASK);
2256                 del_timer(&s->midi.timer);
2257         }
2258         spin_unlock_irqrestore(&s->lock, flags);
2259         wake_up(&s->open_wait);
2260         up(&s->open_sem);
2261         unlock_kernel();
2262         return 0;
2263 }
2264
2265 static /*const*/ struct file_operations sv_midi_fops = {
2266         .owner          = THIS_MODULE,
2267         .llseek         = no_llseek,
2268         .read           = sv_midi_read,
2269         .write          = sv_midi_write,
2270         .poll           = sv_midi_poll,
2271         .open           = sv_midi_open,
2272         .release        = sv_midi_release,
2273 };
2274
2275 /* --------------------------------------------------------------------- */
2276
2277 static int sv_dmfm_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2278 {
2279         static const unsigned char op_offset[18] = {
2280                 0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
2281                 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D,
2282                 0x10, 0x11, 0x12, 0x13, 0x14, 0x15
2283         };
2284         struct sv_state *s = (struct sv_state *)file->private_data;
2285         struct dm_fm_voice v;
2286         struct dm_fm_note n;
2287         struct dm_fm_params p;
2288         unsigned int io;
2289         unsigned int regb;
2290
2291         switch (cmd) {
2292         case FM_IOCTL_RESET:
2293                 for (regb = 0xb0; regb < 0xb9; regb++) {
2294                         outb(regb, s->iosynth);
2295                         outb(0, s->iosynth+1);
2296                         outb(regb, s->iosynth+2);
2297                         outb(0, s->iosynth+3);
2298                 }
2299                 return 0;
2300
2301         case FM_IOCTL_PLAY_NOTE:
2302                 if (copy_from_user(&n, (void __user *)arg, sizeof(n)))
2303                         return -EFAULT;
2304                 if (n.voice >= 18)
2305                         return -EINVAL;
2306                 if (n.voice >= 9) {
2307                         regb = n.voice - 9;
2308                         io = s->iosynth+2;
2309                 } else {
2310                         regb = n.voice;
2311                         io = s->iosynth;
2312                 }
2313                 outb(0xa0 + regb, io);
2314                 outb(n.fnum & 0xff, io+1);
2315                 outb(0xb0 + regb, io);
2316                 outb(((n.fnum >> 8) & 3) | ((n.octave & 7) << 2) | ((n.key_on & 1) << 5), io+1);
2317                 return 0;
2318
2319         case FM_IOCTL_SET_VOICE:
2320                 if (copy_from_user(&v, (void __user *)arg, sizeof(v)))
2321                         return -EFAULT;
2322                 if (v.voice >= 18)
2323                         return -EINVAL;
2324                 regb = op_offset[v.voice];
2325                 io = s->iosynth + ((v.op & 1) << 1);
2326                 outb(0x20 + regb, io);
2327                 outb(((v.am & 1) << 7) | ((v.vibrato & 1) << 6) | ((v.do_sustain & 1) << 5) |
2328                      ((v.kbd_scale & 1) << 4) | (v.harmonic & 0xf), io+1);
2329                 outb(0x40 + regb, io);
2330                 outb(((v.scale_level & 0x3) << 6) | (v.volume & 0x3f), io+1);
2331                 outb(0x60 + regb, io);
2332                 outb(((v.attack & 0xf) << 4) | (v.decay & 0xf), io+1);
2333                 outb(0x80 + regb, io);
2334                 outb(((v.sustain & 0xf) << 4) | (v.release & 0xf), io+1);
2335                 outb(0xe0 + regb, io);
2336                 outb(v.waveform & 0x7, io+1);
2337                 if (n.voice >= 9) {
2338                         regb = n.voice - 9;
2339                         io = s->iosynth+2;
2340                 } else {
2341                         regb = n.voice;
2342                         io = s->iosynth;
2343                 }
2344                 outb(0xc0 + regb, io);
2345                 outb(((v.right & 1) << 5) | ((v.left & 1) << 4) | ((v.feedback & 7) << 1) |
2346                      (v.connection & 1), io+1);
2347                 return 0;
2348
2349         case FM_IOCTL_SET_PARAMS:
2350                 if (copy_from_user(&p, (void *__user )arg, sizeof(p)))
2351                         return -EFAULT;
2352                 outb(0x08, s->iosynth);
2353                 outb((p.kbd_split & 1) << 6, s->iosynth+1);
2354                 outb(0xbd, s->iosynth);
2355                 outb(((p.am_depth & 1) << 7) | ((p.vib_depth & 1) << 6) | ((p.rhythm & 1) << 5) | ((p.bass & 1) << 4) |
2356                      ((p.snare & 1) << 3) | ((p.tomtom & 1) << 2) | ((p.cymbal & 1) << 1) | (p.hihat & 1), s->iosynth+1);
2357                 return 0;
2358
2359         case FM_IOCTL_SET_OPL:
2360                 outb(4, s->iosynth+2);
2361                 outb(arg, s->iosynth+3);
2362                 return 0;
2363
2364         case FM_IOCTL_SET_MODE:
2365                 outb(5, s->iosynth+2);
2366                 outb(arg & 1, s->iosynth+3);
2367                 return 0;
2368
2369         default:
2370                 return -EINVAL;
2371         }
2372 }
2373
2374 static int sv_dmfm_open(struct inode *inode, struct file *file)
2375 {
2376         int minor = iminor(inode);
2377         DECLARE_WAITQUEUE(wait, current);
2378         struct list_head *list;
2379         struct sv_state *s;
2380
2381         for (list = devs.next; ; list = list->next) {
2382                 if (list == &devs)
2383                         return -ENODEV;
2384                 s = list_entry(list, struct sv_state, devs);
2385                 if (s->dev_dmfm == minor)
2386                         break;
2387         }
2388         VALIDATE_STATE(s);
2389         file->private_data = s;
2390         /* wait for device to become free */
2391         down(&s->open_sem);
2392         while (s->open_mode & FMODE_DMFM) {
2393                 if (file->f_flags & O_NONBLOCK) {
2394                         up(&s->open_sem);
2395                         return -EBUSY;
2396                 }
2397                 add_wait_queue(&s->open_wait, &wait);
2398                 __set_current_state(TASK_INTERRUPTIBLE);
2399                 up(&s->open_sem);
2400                 schedule();
2401                 remove_wait_queue(&s->open_wait, &wait);
2402                 set_current_state(TASK_RUNNING);
2403                 if (signal_pending(current))
2404                         return -ERESTARTSYS;
2405                 down(&s->open_sem);
2406         }
2407         /* init the stuff */
2408         outb(1, s->iosynth);
2409         outb(0x20, s->iosynth+1); /* enable waveforms */
2410         outb(4, s->iosynth+2);
2411         outb(0, s->iosynth+3);  /* no 4op enabled */
2412         outb(5, s->iosynth+2);
2413         outb(1, s->iosynth+3);  /* enable OPL3 */
2414         s->open_mode |= FMODE_DMFM;
2415         up(&s->open_sem);
2416         return nonseekable_open(inode, file);
2417 }
2418
2419 static int sv_dmfm_release(struct inode *inode, struct file *file)
2420 {
2421         struct sv_state *s = (struct sv_state *)file->private_data;
2422         unsigned int regb;
2423
2424         VALIDATE_STATE(s);
2425         lock_kernel();
2426         down(&s->open_sem);
2427         s->open_mode &= ~FMODE_DMFM;
2428         for (regb = 0xb0; regb < 0xb9; regb++) {
2429                 outb(regb, s->iosynth);
2430                 outb(0, s->iosynth+1);
2431                 outb(regb, s->iosynth+2);
2432                 outb(0, s->iosynth+3);
2433         }
2434         wake_up(&s->open_wait);
2435         up(&s->open_sem);
2436         unlock_kernel();
2437         return 0;
2438 }
2439
2440 static /*const*/ struct file_operations sv_dmfm_fops = {
2441         .owner          = THIS_MODULE,
2442         .llseek         = no_llseek,
2443         .ioctl          = sv_dmfm_ioctl,
2444         .open           = sv_dmfm_open,
2445         .release        = sv_dmfm_release,
2446 };
2447
2448 /* --------------------------------------------------------------------- */
2449
2450 /* maximum number of devices; only used for command line params */
2451 #define NR_DEVICE 5
2452
2453 static int reverb[NR_DEVICE];
2454
2455 #if 0
2456 static int wavetable[NR_DEVICE];
2457 #endif
2458
2459 static unsigned int devindex;
2460
2461 module_param_array(reverb, bool, NULL, 0);
2462 MODULE_PARM_DESC(reverb, "if 1 enables the reverb circuitry. NOTE: your card must have the reverb RAM");
2463 #if 0
2464 MODULE_PARM(wavetable, "1-" __MODULE_STRING(NR_DEVICE) "i");
2465 MODULE_PARM_DESC(wavetable, "if 1 the wavetable synth is enabled");
2466 #endif
2467
2468 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
2469 MODULE_DESCRIPTION("S3 SonicVibes Driver");
2470 MODULE_LICENSE("GPL");
2471
2472
2473 /* --------------------------------------------------------------------- */
2474
2475 static struct initvol {
2476         int mixch;
2477         int vol;
2478 } initvol[] __devinitdata = {
2479         { SOUND_MIXER_WRITE_RECLEV, 0x4040 },
2480         { SOUND_MIXER_WRITE_LINE1, 0x4040 },
2481         { SOUND_MIXER_WRITE_CD, 0x4040 },
2482         { SOUND_MIXER_WRITE_LINE, 0x4040 },
2483         { SOUND_MIXER_WRITE_MIC, 0x4040 },
2484         { SOUND_MIXER_WRITE_SYNTH, 0x4040 },
2485         { SOUND_MIXER_WRITE_LINE2, 0x4040 },
2486         { SOUND_MIXER_WRITE_VOLUME, 0x4040 },
2487         { SOUND_MIXER_WRITE_PCM, 0x4040 }
2488 };
2489
2490 #define RSRCISIOREGION(dev,num) (pci_resource_start((dev), (num)) != 0 && \
2491                                  (pci_resource_flags((dev), (num)) & IORESOURCE_IO))
2492
2493 #ifdef SUPPORT_JOYSTICK
2494 static int __devinit sv_register_gameport(struct sv_state *s, int io_port)
2495 {
2496         struct gameport *gp;
2497
2498         if (!request_region(io_port, SV_EXTENT_GAME, "S3 SonicVibes Gameport")) {
2499                 printk(KERN_ERR "sv: gameport io ports are in use\n");
2500                 return -EBUSY;
2501         }
2502
2503         s->gameport = gp = gameport_allocate_port();
2504         if (!gp) {
2505                 printk(KERN_ERR "sv: can not allocate memory for gameport\n");
2506                 release_region(io_port, SV_EXTENT_GAME);
2507                 return -ENOMEM;
2508         }
2509
2510         gameport_set_name(gp, "S3 SonicVibes Gameport");
2511         gameport_set_phys(gp, "isa%04x/gameport0", io_port);
2512         gp->dev.parent = &s->dev->dev;
2513         gp->io = io_port;
2514
2515         gameport_register_port(gp);
2516
2517         return 0;
2518 }
2519
2520 static inline void sv_unregister_gameport(struct sv_state *s)
2521 {
2522         if (s->gameport) {
2523                 int gpio = s->gameport->io;
2524                 gameport_unregister_port(s->gameport);
2525                 release_region(gpio, SV_EXTENT_GAME);
2526         }
2527 }
2528 #else
2529 static inline int sv_register_gameport(struct sv_state *s, int io_port) { return -ENOSYS; }
2530 static inline void sv_unregister_gameport(struct sv_state *s) { }
2531 #endif /* SUPPORT_JOYSTICK */
2532
2533 static int __devinit sv_probe(struct pci_dev *pcidev, const struct pci_device_id *pciid)
2534 {
2535         static char __devinitdata sv_ddma_name[] = "S3 Inc. SonicVibes DDMA Controller";
2536         struct sv_state *s;
2537         mm_segment_t fs;
2538         int i, val, ret;
2539         int gpio;
2540         char *ddmaname;
2541         unsigned ddmanamelen;
2542
2543         if ((ret=pci_enable_device(pcidev)))
2544                 return ret;
2545
2546         if (!RSRCISIOREGION(pcidev, RESOURCE_SB) ||
2547             !RSRCISIOREGION(pcidev, RESOURCE_ENH) ||
2548             !RSRCISIOREGION(pcidev, RESOURCE_SYNTH) ||
2549             !RSRCISIOREGION(pcidev, RESOURCE_MIDI) ||
2550             !RSRCISIOREGION(pcidev, RESOURCE_GAME))
2551                 return -ENODEV;
2552         if (pcidev->irq == 0)
2553                 return -ENODEV;
2554         if (pci_set_dma_mask(pcidev, 0x00ffffff)) {
2555                 printk(KERN_WARNING "sonicvibes: architecture does not support 24bit PCI busmaster DMA\n");
2556                 return -ENODEV;
2557         }
2558         /* try to allocate a DDMA resource if not already available */
2559         if (!RSRCISIOREGION(pcidev, RESOURCE_DDMA)) {
2560                 pcidev->resource[RESOURCE_DDMA].start = 0;
2561                 pcidev->resource[RESOURCE_DDMA].end = 2*SV_EXTENT_DMA-1;
2562                 pcidev->resource[RESOURCE_DDMA].flags = PCI_BASE_ADDRESS_SPACE_IO | IORESOURCE_IO;
2563                 ddmanamelen = strlen(sv_ddma_name)+1;
2564                 if (!(ddmaname = kmalloc(ddmanamelen, GFP_KERNEL)))
2565                         return -1;
2566                 memcpy(ddmaname, sv_ddma_name, ddmanamelen);
2567                 pcidev->resource[RESOURCE_DDMA].name = ddmaname;
2568                 if (pci_assign_resource(pcidev, RESOURCE_DDMA)) {
2569                         pcidev->resource[RESOURCE_DDMA].name = NULL;
2570                         kfree(ddmaname);
2571                         printk(KERN_ERR "sv: cannot allocate DDMA controller io ports\n");
2572                         return -EBUSY;
2573                 }
2574         }
2575         if (!(s = kmalloc(sizeof(struct sv_state), GFP_KERNEL))) {
2576                 printk(KERN_WARNING "sv: out of memory\n");
2577                 return -ENOMEM;
2578         }
2579         memset(s, 0, sizeof(struct sv_state));
2580         init_waitqueue_head(&s->dma_adc.wait);
2581         init_waitqueue_head(&s->dma_dac.wait);
2582         init_waitqueue_head(&s->open_wait);
2583         init_waitqueue_head(&s->midi.iwait);
2584         init_waitqueue_head(&s->midi.owait);
2585         init_MUTEX(&s->open_sem);
2586         spin_lock_init(&s->lock);
2587         s->magic = SV_MAGIC;
2588         s->dev = pcidev;
2589         s->iosb = pci_resource_start(pcidev, RESOURCE_SB);
2590         s->ioenh = pci_resource_start(pcidev, RESOURCE_ENH);
2591         s->iosynth = pci_resource_start(pcidev, RESOURCE_SYNTH);
2592         s->iomidi = pci_resource_start(pcidev, RESOURCE_MIDI);
2593         s->iodmaa = pci_resource_start(pcidev, RESOURCE_DDMA);
2594         s->iodmac = pci_resource_start(pcidev, RESOURCE_DDMA) + SV_EXTENT_DMA;
2595         gpio = pci_resource_start(pcidev, RESOURCE_GAME);
2596         pci_write_config_dword(pcidev, 0x40, s->iodmaa | 9);  /* enable and use extended mode */
2597         pci_write_config_dword(pcidev, 0x48, s->iodmac | 9);  /* enable */
2598         printk(KERN_DEBUG "sv: io ports: %#lx %#lx %#lx %#lx %#x %#x %#x\n",
2599                s->iosb, s->ioenh, s->iosynth, s->iomidi, gpio, s->iodmaa, s->iodmac);
2600         s->irq = pcidev->irq;
2601
2602         /* hack */
2603         pci_write_config_dword(pcidev, 0x60, wavetable_mem >> 12);  /* wavetable base address */
2604
2605         ret = -EBUSY;
2606         if (!request_region(s->ioenh, SV_EXTENT_ENH, "S3 SonicVibes PCM")) {
2607                 printk(KERN_ERR "sv: io ports %#lx-%#lx in use\n", s->ioenh, s->ioenh+SV_EXTENT_ENH-1);
2608                 goto err_region5;
2609         }
2610         if (!request_region(s->iodmaa, SV_EXTENT_DMA, "S3 SonicVibes DMAA")) {
2611                 printk(KERN_ERR "sv: io ports %#x-%#x in use\n", s->iodmaa, s->iodmaa+SV_EXTENT_DMA-1);
2612                 goto err_region4;
2613         }
2614         if (!request_region(s->iodmac, SV_EXTENT_DMA, "S3 SonicVibes DMAC")) {
2615                 printk(KERN_ERR "sv: io ports %#x-%#x in use\n", s->iodmac, s->iodmac+SV_EXTENT_DMA-1);
2616                 goto err_region3;
2617         }
2618         if (!request_region(s->iomidi, SV_EXTENT_MIDI, "S3 SonicVibes Midi")) {
2619                 printk(KERN_ERR "sv: io ports %#lx-%#lx in use\n", s->iomidi, s->iomidi+SV_EXTENT_MIDI-1);
2620                 goto err_region2;
2621         }
2622         if (!request_region(s->iosynth, SV_EXTENT_SYNTH, "S3 SonicVibes Synth")) {
2623                 printk(KERN_ERR "sv: io ports %#lx-%#lx in use\n", s->iosynth, s->iosynth+SV_EXTENT_SYNTH-1);
2624                 goto err_region1;
2625         }
2626
2627         /* initialize codec registers */
2628         outb(0x80, s->ioenh + SV_CODEC_CONTROL); /* assert reset */
2629         udelay(50);
2630         outb(0x00, s->ioenh + SV_CODEC_CONTROL); /* deassert reset */
2631         udelay(50);
2632         outb(SV_CCTRL_INTADRIVE | SV_CCTRL_ENHANCED /*| SV_CCTRL_WAVETABLE */
2633              | (reverb[devindex] ? SV_CCTRL_REVERB : 0), s->ioenh + SV_CODEC_CONTROL);
2634         inb(s->ioenh + SV_CODEC_STATUS); /* clear ints */
2635         wrindir(s, SV_CIDRIVECONTROL, 0);  /* drive current 16mA */
2636         wrindir(s, SV_CIENABLE, s->enable = 0);  /* disable DMAA and DMAC */
2637         outb(~(SV_CINTMASK_DMAA | SV_CINTMASK_DMAC), s->ioenh + SV_CODEC_INTMASK);
2638         /* outb(0xff, s->iodmaa + SV_DMA_RESET); */
2639         /* outb(0xff, s->iodmac + SV_DMA_RESET); */
2640         inb(s->ioenh + SV_CODEC_STATUS); /* ack interrupts */
2641         wrindir(s, SV_CIADCCLKSOURCE, 0); /* use pll as ADC clock source */
2642         wrindir(s, SV_CIANALOGPWRDOWN, 0); /* power up the analog parts of the device */
2643         wrindir(s, SV_CIDIGITALPWRDOWN, 0); /* power up the digital parts of the device */
2644         setpll(s, SV_CIADCPLLM, 8000);
2645         wrindir(s, SV_CISRSSPACE, 0x80); /* SRS off */
2646         wrindir(s, SV_CIPCMSR0, (8000 * 65536 / FULLRATE) & 0xff);
2647         wrindir(s, SV_CIPCMSR1, ((8000 * 65536 / FULLRATE) >> 8) & 0xff);
2648         wrindir(s, SV_CIADCOUTPUT, 0);
2649         /* request irq */
2650         if ((ret=request_irq(s->irq,sv_interrupt,SA_SHIRQ,"S3 SonicVibes",s))) {
2651                 printk(KERN_ERR "sv: irq %u in use\n", s->irq);
2652                 goto err_irq;
2653         }
2654         printk(KERN_INFO "sv: found adapter at io %#lx irq %u dmaa %#06x dmac %#06x revision %u\n",
2655                s->ioenh, s->irq, s->iodmaa, s->iodmac, rdindir(s, SV_CIREVISION));
2656         /* register devices */
2657         if ((s->dev_audio = register_sound_dsp(&sv_audio_fops, -1)) < 0) {
2658                 ret = s->dev_audio;
2659                 goto err_dev1;
2660         }
2661         if ((s->dev_mixer = register_sound_mixer(&sv_mixer_fops, -1)) < 0) {
2662                 ret = s->dev_mixer;
2663                 goto err_dev2;
2664         }
2665         if ((s->dev_midi = register_sound_midi(&sv_midi_fops, -1)) < 0) {
2666                 ret = s->dev_midi;
2667                 goto err_dev3;
2668         }
2669         if ((s->dev_dmfm = register_sound_special(&sv_dmfm_fops, 15 /* ?? */)) < 0) {
2670                 ret = s->dev_dmfm;
2671                 goto err_dev4;
2672         }
2673         pci_set_master(pcidev);  /* enable bus mastering */
2674         /* initialize the chips */
2675         fs = get_fs();
2676         set_fs(KERNEL_DS);
2677         val = SOUND_MASK_LINE|SOUND_MASK_SYNTH;
2678         mixer_ioctl(s, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
2679         for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
2680                 val = initvol[i].vol;
2681                 mixer_ioctl(s, initvol[i].mixch, (unsigned long)&val);
2682         }
2683         set_fs(fs);
2684         /* register gameport */
2685         sv_register_gameport(s, gpio);
2686         /* store it in the driver field */
2687         pci_set_drvdata(pcidev, s);
2688         /* put it into driver list */
2689         list_add_tail(&s->devs, &devs);
2690         /* increment devindex */
2691         if (devindex < NR_DEVICE-1)
2692                 devindex++;
2693         return 0;
2694
2695  err_dev4:
2696         unregister_sound_midi(s->dev_midi);
2697  err_dev3:
2698         unregister_sound_mixer(s->dev_mixer);
2699  err_dev2:
2700         unregister_sound_dsp(s->dev_audio);
2701  err_dev1:
2702         printk(KERN_ERR "sv: cannot register misc device\n");
2703         free_irq(s->irq, s);
2704  err_irq:
2705         release_region(s->iosynth, SV_EXTENT_SYNTH);
2706  err_region1:
2707         release_region(s->iomidi, SV_EXTENT_MIDI);
2708  err_region2:
2709         release_region(s->iodmac, SV_EXTENT_DMA);
2710  err_region3:
2711         release_region(s->iodmaa, SV_EXTENT_DMA);
2712  err_region4:
2713         release_region(s->ioenh, SV_EXTENT_ENH);
2714  err_region5:
2715         kfree(s);
2716         return ret;
2717 }
2718
2719 static void __devexit sv_remove(struct pci_dev *dev)
2720 {
2721         struct sv_state *s = pci_get_drvdata(dev);
2722
2723         if (!s)
2724                 return;
2725         list_del(&s->devs);
2726         outb(~0, s->ioenh + SV_CODEC_INTMASK);  /* disable ints */
2727         synchronize_irq(s->irq);
2728         inb(s->ioenh + SV_CODEC_STATUS); /* ack interrupts */
2729         wrindir(s, SV_CIENABLE, 0);     /* disable DMAA and DMAC */
2730         /*outb(0, s->iodmaa + SV_DMA_RESET);*/
2731         /*outb(0, s->iodmac + SV_DMA_RESET);*/
2732         free_irq(s->irq, s);
2733         sv_unregister_gameport(s);
2734         release_region(s->iodmac, SV_EXTENT_DMA);
2735         release_region(s->iodmaa, SV_EXTENT_DMA);
2736         release_region(s->ioenh, SV_EXTENT_ENH);
2737         release_region(s->iomidi, SV_EXTENT_MIDI);
2738         release_region(s->iosynth, SV_EXTENT_SYNTH);
2739         unregister_sound_dsp(s->dev_audio);
2740         unregister_sound_mixer(s->dev_mixer);
2741         unregister_sound_midi(s->dev_midi);
2742         unregister_sound_special(s->dev_dmfm);
2743         kfree(s);
2744         pci_set_drvdata(dev, NULL);
2745 }
2746
2747 static struct pci_device_id id_table[] = {
2748        { PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_SONICVIBES, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
2749        { 0, }
2750 };
2751
2752 MODULE_DEVICE_TABLE(pci, id_table);
2753
2754 static struct pci_driver sv_driver = {
2755        .name            = "sonicvibes",
2756        .id_table        = id_table,
2757        .probe           = sv_probe,
2758        .remove          = __devexit_p(sv_remove),
2759 };
2760
2761 static int __init init_sonicvibes(void)
2762 {
2763         printk(KERN_INFO "sv: version v0.31 time " __TIME__ " " __DATE__ "\n");
2764 #if 0
2765         if (!(wavetable_mem = __get_free_pages(GFP_KERNEL, 20-PAGE_SHIFT)))
2766                 printk(KERN_INFO "sv: cannot allocate 1MB of contiguous nonpageable memory for wavetable data\n");
2767 #endif
2768         return pci_register_driver(&sv_driver);
2769 }
2770
2771 static void __exit cleanup_sonicvibes(void)
2772 {
2773         printk(KERN_INFO "sv: unloading\n");
2774         pci_unregister_driver(&sv_driver);
2775         if (wavetable_mem)
2776                 free_pages(wavetable_mem, 20-PAGE_SHIFT);
2777 }
2778
2779 module_init(init_sonicvibes);
2780 module_exit(cleanup_sonicvibes);
2781
2782 /* --------------------------------------------------------------------- */
2783
2784 #ifndef MODULE
2785
2786 /* format is: sonicvibes=[reverb] sonicvibesdmaio=dmaioaddr */
2787
2788 static int __init sonicvibes_setup(char *str)
2789 {
2790         static unsigned __initdata nr_dev = 0;
2791
2792         if (nr_dev >= NR_DEVICE)
2793                 return 0;
2794 #if 0
2795         if (get_option(&str, &reverb[nr_dev]) == 2)
2796                 (void)get_option(&str, &wavetable[nr_dev]);
2797 #else
2798         (void)get_option(&str, &reverb[nr_dev]);
2799 #endif
2800
2801         nr_dev++;
2802         return 1;
2803 }
2804
2805 __setup("sonicvibes=", sonicvibes_setup);
2806
2807 #endif /* MODULE */