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   1 /*
   2  * arch/arm/mach-at91/at91sam9263.c
   3  *
   4  *  Copyright (C) 2007 Atmel Corporation.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  */
  12
  13 #include <linux/module.h>
  14 #include <linux/pm.h>
  15
  16 #include <asm/mach/arch.h>
  17 #include <asm/mach/map.h>
  18 #include <mach/at91sam9263.h>
  19 #include <mach/at91_pmc.h>
  20 #include <mach/at91_rstc.h>
  21 #include <mach/at91_shdwc.h>
  22
  23 #include "generic.h"
  24 #include "clock.h"
  25
  26 static struct map_desc at91sam9263_io_desc[] __initdata = {
  27         {
  28                 .virtual        = AT91_VA_BASE_SYS,
  29                 .pfn            = __phys_to_pfn(AT91_BASE_SYS),
  30                 .length         = SZ_16K,
  31                 .type           = MT_DEVICE,
  32         }, {
  33                 .virtual        = AT91_IO_VIRT_BASE - AT91SAM9263_SRAM0_SIZE,
  34                 .pfn            = __phys_to_pfn(AT91SAM9263_SRAM0_BASE),
  35                 .length         = AT91SAM9263_SRAM0_SIZE,
  36                 .type           = MT_DEVICE,
  37         }, {
  38                 .virtual        = AT91_IO_VIRT_BASE - AT91SAM9263_SRAM0_SIZE - AT91SAM9263_SRAM1_SIZE,
  39                 .pfn            = __phys_to_pfn(AT91SAM9263_SRAM1_BASE),
  40                 .length         = AT91SAM9263_SRAM1_SIZE,
  41                 .type           = MT_DEVICE,
  42         },
  43 };
  44
  45 /* --------------------------------------------------------------------
  46  *  Clocks
  47  * -------------------------------------------------------------------- */
  48
  49 /*
  50  * The peripheral clocks.
  51  */
  52 static struct clk pioA_clk = {
  53         .name           = "pioA_clk",
  54         .pmc_mask       = 1 << AT91SAM9263_ID_PIOA,
  55         .type           = CLK_TYPE_PERIPHERAL,
  56 };
  57 static struct clk pioB_clk = {
  58         .name           = "pioB_clk",
  59         .pmc_mask       = 1 << AT91SAM9263_ID_PIOB,
  60         .type           = CLK_TYPE_PERIPHERAL,
  61 };
  62 static struct clk pioCDE_clk = {
  63         .name           = "pioCDE_clk",
  64         .pmc_mask       = 1 << AT91SAM9263_ID_PIOCDE,
  65         .type           = CLK_TYPE_PERIPHERAL,
  66 };
  67 static struct clk usart0_clk = {
  68         .name           = "usart0_clk",
  69         .pmc_mask       = 1 << AT91SAM9263_ID_US0,
  70         .type           = CLK_TYPE_PERIPHERAL,
  71 };
  72 static struct clk usart1_clk = {
  73         .name           = "usart1_clk",
  74         .pmc_mask       = 1 << AT91SAM9263_ID_US1,
  75         .type           = CLK_TYPE_PERIPHERAL,
  76 };
  77 static struct clk usart2_clk = {
  78         .name           = "usart2_clk",
  79         .pmc_mask       = 1 << AT91SAM9263_ID_US2,
  80         .type           = CLK_TYPE_PERIPHERAL,
  81 };
  82 static struct clk mmc0_clk = {
  83         .name           = "mci0_clk",
  84         .pmc_mask       = 1 << AT91SAM9263_ID_MCI0,
  85         .type           = CLK_TYPE_PERIPHERAL,
  86 };
  87 static struct clk mmc1_clk = {
  88         .name           = "mci1_clk",
  89         .pmc_mask       = 1 << AT91SAM9263_ID_MCI1,
  90         .type           = CLK_TYPE_PERIPHERAL,
  91 };
  92 static struct clk can_clk = {
  93         .name           = "can_clk",
  94         .pmc_mask       = 1 << AT91SAM9263_ID_CAN,
  95         .type           = CLK_TYPE_PERIPHERAL,
  96 };
  97 static struct clk twi_clk = {
  98         .name           = "twi_clk",
  99         .pmc_mask       = 1 << AT91SAM9263_ID_TWI,
 100         .type           = CLK_TYPE_PERIPHERAL,
 101 };
 102 static struct clk spi0_clk = {
 103         .name           = "spi0_clk",
 104         .pmc_mask       = 1 << AT91SAM9263_ID_SPI0,
 105         .type           = CLK_TYPE_PERIPHERAL,
 106 };
 107 static struct clk spi1_clk = {
 108         .name           = "spi1_clk",
 109         .pmc_mask       = 1 << AT91SAM9263_ID_SPI1,
 110         .type           = CLK_TYPE_PERIPHERAL,
 111 };
 112 static struct clk ssc0_clk = {
 113         .name           = "ssc0_clk",
 114         .pmc_mask       = 1 << AT91SAM9263_ID_SSC0,
 115         .type           = CLK_TYPE_PERIPHERAL,
 116 };
 117 static struct clk ssc1_clk = {
 118         .name           = "ssc1_clk",
 119         .pmc_mask       = 1 << AT91SAM9263_ID_SSC1,
 120         .type           = CLK_TYPE_PERIPHERAL,
 121 };
 122 static struct clk ac97_clk = {
 123         .name           = "ac97_clk",
 124         .pmc_mask       = 1 << AT91SAM9263_ID_AC97C,
 125         .type           = CLK_TYPE_PERIPHERAL,
 126 };
 127 static struct clk tcb_clk = {
 128         .name           = "tcb_clk",
 129         .pmc_mask       = 1 << AT91SAM9263_ID_TCB,
 130         .type           = CLK_TYPE_PERIPHERAL,
 131 };
 132 static struct clk pwm_clk = {
 133         .name           = "pwm_clk",
 134         .pmc_mask       = 1 << AT91SAM9263_ID_PWMC,
 135         .type           = CLK_TYPE_PERIPHERAL,
 136 };
 137 static struct clk macb_clk = {
 138         .name           = "macb_clk",
 139         .pmc_mask       = 1 << AT91SAM9263_ID_EMAC,
 140         .type           = CLK_TYPE_PERIPHERAL,
 141 };
 142 static struct clk dma_clk = {
 143         .name           = "dma_clk",
 144         .pmc_mask       = 1 << AT91SAM9263_ID_DMA,
 145         .type           = CLK_TYPE_PERIPHERAL,
 146 };
 147 static struct clk twodge_clk = {
 148         .name           = "2dge_clk",
 149         .pmc_mask       = 1 << AT91SAM9263_ID_2DGE,
 150         .type           = CLK_TYPE_PERIPHERAL,
 151 };
 152 static struct clk udc_clk = {
 153         .name           = "udc_clk",
 154         .pmc_mask       = 1 << AT91SAM9263_ID_UDP,
 155         .type           = CLK_TYPE_PERIPHERAL,
 156 };
 157 static struct clk isi_clk = {
 158         .name           = "isi_clk",
 159         .pmc_mask       = 1 << AT91SAM9263_ID_ISI,
 160         .type           = CLK_TYPE_PERIPHERAL,
 161 };
 162 static struct clk lcdc_clk = {
 163         .name           = "lcdc_clk",
 164         .pmc_mask       = 1 << AT91SAM9263_ID_LCDC,
 165         .type           = CLK_TYPE_PERIPHERAL,
 166 };
 167 static struct clk ohci_clk = {
 168         .name           = "ohci_clk",
 169         .pmc_mask       = 1 << AT91SAM9263_ID_UHP,
 170         .type           = CLK_TYPE_PERIPHERAL,
 171 };
 172
 173 static struct clk *periph_clocks[] __initdata = {
 174         &pioA_clk,
 175         &pioB_clk,
 176         &pioCDE_clk,
 177         &usart0_clk,
 178         &usart1_clk,
 179         &usart2_clk,
 180         &mmc0_clk,
 181         &mmc1_clk,
 182         &can_clk,
 183         &twi_clk,
 184         &spi0_clk,
 185         &spi1_clk,
 186         &ssc0_clk,
 187         &ssc1_clk,
 188         &ac97_clk,
 189         &tcb_clk,
 190         &pwm_clk,
 191         &macb_clk,
 192         &twodge_clk,
 193         &udc_clk,
 194         &isi_clk,
 195         &lcdc_clk,
 196         &dma_clk,
 197         &ohci_clk,
 198         // irq0 .. irq1
 199 };
 200
 201 /*
 202  * The four programmable clocks.
 203  * You must configure pin multiplexing to bring these signals out.
 204  */
 205 static struct clk pck0 = {
 206         .name           = "pck0",
 207         .pmc_mask       = AT91_PMC_PCK0,
 208         .type           = CLK_TYPE_PROGRAMMABLE,
 209         .id             = 0,
 210 };
 211 static struct clk pck1 = {
 212         .name           = "pck1",
 213         .pmc_mask       = AT91_PMC_PCK1,
 214         .type           = CLK_TYPE_PROGRAMMABLE,
 215         .id             = 1,
 216 };
 217 static struct clk pck2 = {
 218         .name           = "pck2",
 219         .pmc_mask       = AT91_PMC_PCK2,
 220         .type           = CLK_TYPE_PROGRAMMABLE,
 221         .id             = 2,
 222 };
 223 static struct clk pck3 = {
 224         .name           = "pck3",
 225         .pmc_mask       = AT91_PMC_PCK3,
 226         .type           = CLK_TYPE_PROGRAMMABLE,
 227         .id             = 3,
 228 };
 229
 230 static void __init at91sam9263_register_clocks(void)
 231 {
 232         int i;
 233
 234         for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
 235                 clk_register(periph_clocks[i]);
 236
 237         clk_register(&pck0);
 238         clk_register(&pck1);
 239         clk_register(&pck2);
 240         clk_register(&pck3);
 241 }
 242
 243 /* --------------------------------------------------------------------
 244  *  GPIO
 245  * -------------------------------------------------------------------- */
 246
 247 static struct at91_gpio_bank at91sam9263_gpio[] = {
 248         {
 249                 .id             = AT91SAM9263_ID_PIOA,
 250                 .offset         = AT91_PIOA,
 251                 .clock          = &pioA_clk,
 252         }, {
 253                 .id             = AT91SAM9263_ID_PIOB,
 254                 .offset         = AT91_PIOB,
 255                 .clock          = &pioB_clk,
 256         }, {
 257                 .id             = AT91SAM9263_ID_PIOCDE,
 258                 .offset         = AT91_PIOC,
 259                 .clock          = &pioCDE_clk,
 260         }, {
 261                 .id             = AT91SAM9263_ID_PIOCDE,
 262                 .offset         = AT91_PIOD,
 263                 .clock          = &pioCDE_clk,
 264         }, {
 265                 .id             = AT91SAM9263_ID_PIOCDE,
 266                 .offset         = AT91_PIOE,
 267                 .clock          = &pioCDE_clk,
 268         }
 269 };
 270
 271 static void at91sam9263_reset(void)
 272 {
 273         at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
 274 }
 275
 276 static void at91sam9263_poweroff(void)
 277 {
 278         at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
 279 }
 280
 281
 282 /* --------------------------------------------------------------------
 283  *  AT91SAM9263 processor initialization
 284  * -------------------------------------------------------------------- */
 285
 286 void __init at91sam9263_initialize(unsigned long main_clock)
 287 {
 288         /* Map peripherals */
 289         iotable_init(at91sam9263_io_desc, ARRAY_SIZE(at91sam9263_io_desc));
 290
 291         at91_arch_reset = at91sam9263_reset;
 292         pm_power_off = at91sam9263_poweroff;
 293         at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
 294
 295         /* Init clock subsystem */
 296         at91_clock_init(main_clock);
 297
 298         /* Register the processor-specific clocks */
 299         at91sam9263_register_clocks();
 300
 301         /* Register GPIO subsystem */
 302         at91_gpio_init(at91sam9263_gpio, 5);
 303 }
 304
 305 /* --------------------------------------------------------------------
 306  *  Interrupt initialization
 307  * -------------------------------------------------------------------- */
 308
 309 /*
 310  * The default interrupt priority levels (0 = lowest, 7 = highest).
 311  */
 312 static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
 313         7,      /* Advanced Interrupt Controller (FIQ) */
 314         7,      /* System Peripherals */
 315         1,      /* Parallel IO Controller A */
 316         1,      /* Parallel IO Controller B */
 317         1,      /* Parallel IO Controller C, D and E */
 318         0,
 319         0,
 320         5,      /* USART 0 */
 321         5,      /* USART 1 */
 322         5,      /* USART 2 */
 323         0,      /* Multimedia Card Interface 0 */
 324         0,      /* Multimedia Card Interface 1 */
 325         3,      /* CAN */
 326         6,      /* Two-Wire Interface */
 327         5,      /* Serial Peripheral Interface 0 */
 328         5,      /* Serial Peripheral Interface 1 */
 329         4,      /* Serial Synchronous Controller 0 */
 330         4,      /* Serial Synchronous Controller 1 */
 331         5,      /* AC97 Controller */
 332         0,      /* Timer Counter 0, 1 and 2 */
 333         0,      /* Pulse Width Modulation Controller */
 334         3,      /* Ethernet */
 335         0,
 336         0,      /* 2D Graphic Engine */
 337         2,      /* USB Device Port */
 338         0,      /* Image Sensor Interface */
 339         3,      /* LDC Controller */
 340         0,      /* DMA Controller */
 341         0,
 342         2,      /* USB Host port */
 343         0,      /* Advanced Interrupt Controller (IRQ0) */
 344         0,      /* Advanced Interrupt Controller (IRQ1) */
 345 };
 346
 347 void __init at91sam9263_init_interrupts(unsigned int priority[NR_AIC_IRQS])
 348 {
 349         if (!priority)
 350                 priority = at91sam9263_default_irq_priority;
 351
 352         /* Initialize the AIC interrupt controller */
 353         at91_aic_init(priority);
 354
 355         /* Enable GPIO interrupts */
 356         at91_gpio_irq_setup();
 357 }