2 * Mips Jazz DMA controller support
3 * Copyright (C) 1995, 1996 by Andreas Busse
5 * NOTE: Some of the argument checking could be removed when
6 * things have settled down. Also, instead of returning 0xffffffff
7 * on failure of vdma_alloc() one could leave page #0 unused
8 * and return the more usual NULL pointer as logical address.
10 #include <linux/kernel.h>
11 #include <linux/init.h>
12 #include <linux/module.h>
13 #include <linux/errno.h>
15 #include <linux/bootmem.h>
16 #include <linux/spinlock.h>
17 #include <asm/mipsregs.h>
20 #include <asm/uaccess.h>
22 #include <asm/jazzdma.h>
23 #include <asm/pgtable.h>
26 * Set this to one to enable additional vdma debug code.
28 #define CONF_DEBUG_VDMA 0
30 static unsigned long vdma_pagetable_start;
32 static DEFINE_SPINLOCK(vdma_lock);
37 #define vdma_debug ((CONF_DEBUG_VDMA) ? debuglvl : 0)
39 static int debuglvl = 3;
42 * Initialize the pagetable with a one-to-one mapping of
43 * the first 16 Mbytes of main memory and declare all
44 * entries to be unused. Using this method will at least
45 * allow some early device driver operations to work.
47 static inline void vdma_pgtbl_init(void)
49 VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
50 unsigned long paddr = 0;
53 for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
54 pgtbl[i].frame = paddr;
55 pgtbl[i].owner = VDMA_PAGE_EMPTY;
56 paddr += VDMA_PAGESIZE;
61 * Initialize the Jazz R4030 dma controller
63 void __init vdma_init(void)
66 * Allocate 32k of memory for DMA page tables. This needs to be page
67 * aligned and should be uncached to avoid cache flushing after every
70 vdma_pagetable_start =
71 (unsigned long) alloc_bootmem_low_pages(VDMA_PGTBL_SIZE);
72 if (!vdma_pagetable_start)
74 dma_cache_wback_inv(vdma_pagetable_start, VDMA_PGTBL_SIZE);
75 vdma_pagetable_start = KSEG1ADDR(vdma_pagetable_start);
78 * Clear the R4030 translation table
82 r4030_write_reg32(JAZZ_R4030_TRSTBL_BASE,
83 CPHYSADDR(vdma_pagetable_start));
84 r4030_write_reg32(JAZZ_R4030_TRSTBL_LIM, VDMA_PGTBL_SIZE);
85 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
87 printk("VDMA: R4030 DMA pagetables initialized.\n");
91 * Allocate DMA pagetables using a simple first-fit algorithm
93 unsigned long vdma_alloc(unsigned long paddr, unsigned long size)
95 VDMA_PGTBL_ENTRY *entry = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
96 int first, last, pages, frame, i;
97 unsigned long laddr, flags;
101 if (paddr > 0x1fffffff) {
103 printk("vdma_alloc: Invalid physical address: %08lx\n",
105 return VDMA_ERROR; /* invalid physical address */
107 if (size > 0x400000 || size == 0) {
109 printk("vdma_alloc: Invalid size: %08lx\n", size);
110 return VDMA_ERROR; /* invalid physical address */
113 spin_lock_irqsave(&vdma_lock, flags);
117 pages = (size + 4095) >> 12; /* no. of pages to allocate */
120 while (entry[first].owner != VDMA_PAGE_EMPTY &&
121 first < VDMA_PGTBL_ENTRIES) first++;
122 if (first + pages > VDMA_PGTBL_ENTRIES) { /* nothing free */
123 spin_unlock_irqrestore(&vdma_lock, flags);
128 while (entry[last].owner == VDMA_PAGE_EMPTY
129 && last - first < pages)
132 if (last - first == pages)
137 * Mark pages as allocated
139 laddr = (first << 12) + (paddr & (VDMA_PAGESIZE - 1));
140 frame = paddr & ~(VDMA_PAGESIZE - 1);
142 for (i = first; i < last; i++) {
143 entry[i].frame = frame;
144 entry[i].owner = laddr;
145 frame += VDMA_PAGESIZE;
149 * Update translation table and return logical start address
151 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
154 printk("vdma_alloc: Allocated %d pages starting from %08lx\n",
157 if (vdma_debug > 2) {
159 for (i = first; i < last; i++)
160 printk("%08x ", i << 12);
162 for (i = first; i < last; i++)
163 printk("%08x ", entry[i].frame);
165 for (i = first; i < last; i++)
166 printk("%08x ", entry[i].owner);
170 spin_unlock_irqrestore(&vdma_lock, flags);
175 EXPORT_SYMBOL(vdma_alloc);
178 * Free previously allocated dma translation pages
179 * Note that this does NOT change the translation table,
180 * it just marks the free'd pages as unused!
182 int vdma_free(unsigned long laddr)
184 VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
189 if (pgtbl[i].owner != laddr) {
191 ("vdma_free: trying to free other's dma pages, laddr=%8lx\n",
196 while (pgtbl[i].owner == laddr && i < VDMA_PGTBL_ENTRIES) {
197 pgtbl[i].owner = VDMA_PAGE_EMPTY;
202 printk("vdma_free: freed %ld pages starting from %08lx\n",
203 i - (laddr >> 12), laddr);
208 EXPORT_SYMBOL(vdma_free);
211 * Map certain page(s) to another physical address.
212 * Caller must have allocated the page(s) before.
214 int vdma_remap(unsigned long laddr, unsigned long paddr, unsigned long size)
216 VDMA_PGTBL_ENTRY *pgtbl =
217 (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
218 int first, pages, npages;
220 if (laddr > 0xffffff) {
223 ("vdma_map: Invalid logical address: %08lx\n",
225 return -EINVAL; /* invalid logical address */
227 if (paddr > 0x1fffffff) {
230 ("vdma_map: Invalid physical address: %08lx\n",
232 return -EINVAL; /* invalid physical address */
236 (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
239 printk("vdma_remap: first=%x, pages=%x\n", first, pages);
240 if (first + pages > VDMA_PGTBL_ENTRIES) {
242 printk("vdma_alloc: Invalid size: %08lx\n", size);
246 paddr &= ~(VDMA_PAGESIZE - 1);
247 while (pages > 0 && first < VDMA_PGTBL_ENTRIES) {
248 if (pgtbl[first].owner != laddr) {
250 printk("Trying to remap other's pages.\n");
251 return -EPERM; /* not owner */
253 pgtbl[first].frame = paddr;
254 paddr += VDMA_PAGESIZE;
260 * Update translation table
262 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
264 if (vdma_debug > 2) {
266 pages = (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
269 for (i = first; i < first + pages; i++)
270 printk("%08x ", i << 12);
272 for (i = first; i < first + pages; i++)
273 printk("%08x ", pgtbl[i].frame);
275 for (i = first; i < first + pages; i++)
276 printk("%08x ", pgtbl[i].owner);
284 * Translate a physical address to a logical address.
285 * This will return the logical address of the first
288 unsigned long vdma_phys2log(unsigned long paddr)
292 VDMA_PGTBL_ENTRY *pgtbl =
293 (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
295 frame = paddr & ~(VDMA_PAGESIZE - 1);
297 for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
298 if (pgtbl[i].frame == frame)
302 if (i == VDMA_PGTBL_ENTRIES)
305 return (i << 12) + (paddr & (VDMA_PAGESIZE - 1));
308 EXPORT_SYMBOL(vdma_phys2log);
311 * Translate a logical DMA address to a physical address
313 unsigned long vdma_log2phys(unsigned long laddr)
315 VDMA_PGTBL_ENTRY *pgtbl =
316 (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
318 return pgtbl[laddr >> 12].frame + (laddr & (VDMA_PAGESIZE - 1));
321 EXPORT_SYMBOL(vdma_log2phys);
324 * Print DMA statistics
326 void vdma_stats(void)
330 printk("vdma_stats: CONFIG: %08x\n",
331 r4030_read_reg32(JAZZ_R4030_CONFIG));
332 printk("R4030 translation table base: %08x\n",
333 r4030_read_reg32(JAZZ_R4030_TRSTBL_BASE));
334 printk("R4030 translation table limit: %08x\n",
335 r4030_read_reg32(JAZZ_R4030_TRSTBL_LIM));
336 printk("vdma_stats: INV_ADDR: %08x\n",
337 r4030_read_reg32(JAZZ_R4030_INV_ADDR));
338 printk("vdma_stats: R_FAIL_ADDR: %08x\n",
339 r4030_read_reg32(JAZZ_R4030_R_FAIL_ADDR));
340 printk("vdma_stats: M_FAIL_ADDR: %08x\n",
341 r4030_read_reg32(JAZZ_R4030_M_FAIL_ADDR));
342 printk("vdma_stats: IRQ_SOURCE: %08x\n",
343 r4030_read_reg32(JAZZ_R4030_IRQ_SOURCE));
344 printk("vdma_stats: I386_ERROR: %08x\n",
345 r4030_read_reg32(JAZZ_R4030_I386_ERROR));
346 printk("vdma_chnl_modes: ");
347 for (i = 0; i < 8; i++)
349 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
352 printk("vdma_chnl_enables: ");
353 for (i = 0; i < 8; i++)
355 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
361 * DMA transfer functions
365 * Enable a DMA channel. Also clear any error conditions.
367 void vdma_enable(int channel)
372 printk("vdma_enable: channel %d\n", channel);
375 * Check error conditions first
377 status = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
379 printk("VDMA: Channel %d: Address error!\n", channel);
381 printk("VDMA: Channel %d: Memory error!\n", channel);
384 * Clear all interrupt flags
386 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
387 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
388 (channel << 5)) | R4030_TC_INTR
389 | R4030_MEM_INTR | R4030_ADDR_INTR);
392 * Enable the desired channel
394 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
395 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
400 EXPORT_SYMBOL(vdma_enable);
403 * Disable a DMA channel
405 void vdma_disable(int channel)
409 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
412 printk("vdma_disable: channel %d\n", channel);
413 printk("VDMA: channel %d status: %04x (%s) mode: "
414 "%02x addr: %06x count: %06x\n",
416 ((status & 0x600) ? "ERROR" : "OK"),
417 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
419 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ADDR +
421 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_COUNT +
425 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
426 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
431 * After disabling a DMA channel a remote bus register should be
432 * read to ensure that the current DMA acknowledge cycle is completed.
434 *((volatile unsigned int *) JAZZ_DUMMY_DEVICE);
437 EXPORT_SYMBOL(vdma_disable);
440 * Set DMA mode. This function accepts the mode values used
441 * to set a PC-style DMA controller. For the SCSI and FDC
442 * channels, we also set the default modes each time we're
444 * NOTE: The FAST and BURST dma modes are supported by the
445 * R4030 Rev. 2 and PICA chipsets only. I leave them disabled
448 void vdma_set_mode(int channel, int mode)
451 printk("vdma_set_mode: channel %d, mode 0x%x\n", channel,
455 case JAZZ_SCSI_DMA: /* scsi */
456 r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
457 /* R4030_MODE_FAST | */
458 /* R4030_MODE_BURST | */
460 R4030_MODE_WIDTH_16 |
461 R4030_MODE_ATIME_80);
464 case JAZZ_FLOPPY_DMA: /* floppy */
465 r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
466 /* R4030_MODE_FAST | */
467 /* R4030_MODE_BURST | */
470 R4030_MODE_ATIME_120);
473 case JAZZ_AUDIOL_DMA:
474 case JAZZ_AUDIOR_DMA:
475 printk("VDMA: Audio DMA not supported yet.\n");
480 ("VDMA: vdma_set_mode() called with unsupported channel %d!\n",
486 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
487 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
493 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
494 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
501 ("VDMA: vdma_set_mode() called with unknown dma mode 0x%x\n",
506 EXPORT_SYMBOL(vdma_set_mode);
509 * Set Transfer Address
511 void vdma_set_addr(int channel, long addr)
514 printk("vdma_set_addr: channel %d, addr %lx\n", channel,
517 r4030_write_reg32(JAZZ_R4030_CHNL_ADDR + (channel << 5), addr);
520 EXPORT_SYMBOL(vdma_set_addr);
525 void vdma_set_count(int channel, int count)
528 printk("vdma_set_count: channel %d, count %08x\n", channel,
531 r4030_write_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5), count);
534 EXPORT_SYMBOL(vdma_set_count);
539 int vdma_get_residue(int channel)
543 residual = r4030_read_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5));
546 printk("vdma_get_residual: channel %d: residual=%d\n",
553 * Get DMA channel enable register
555 int vdma_get_enable(int channel)
559 enable = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
562 printk("vdma_get_enable: channel %d: enable=%d\n", channel,