Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6
[linux-2.6] / arch / sh / kernel / cpu / irq / pint.c
1 /*
2  * arch/sh/kernel/cpu/irq/pint.c - Interrupt handling for PINT-based IRQs.
3  *
4  * Copyright (C) 1999  Niibe Yutaka & Takeshi Yaegashi
5  * Copyright (C) 2000  Kazumoto Kojima
6  * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
7  *
8  * This file is subject to the terms and conditions of the GNU General Public
9  * License.  See the file "COPYING" in the main directory of this archive
10  * for more details.
11  */
12
13 #include <linux/init.h>
14 #include <linux/irq.h>
15 #include <linux/module.h>
16
17 #include <asm/system.h>
18 #include <asm/io.h>
19 #include <asm/machvec.h>
20
21 static unsigned char pint_map[256];
22 static unsigned long portcr_mask;
23
24 static void enable_pint_irq(unsigned int irq);
25 static void disable_pint_irq(unsigned int irq);
26
27 /* shutdown is same as "disable" */
28 #define shutdown_pint_irq disable_pint_irq
29
30 static void mask_and_ack_pint(unsigned int);
31 static void end_pint_irq(unsigned int irq);
32
33 static unsigned int startup_pint_irq(unsigned int irq)
34 {
35         enable_pint_irq(irq);
36         return 0; /* never anything pending */
37 }
38
39 static struct hw_interrupt_type pint_irq_type = {
40         .typename = "PINT-IRQ",
41         .startup = startup_pint_irq,
42         .shutdown = shutdown_pint_irq,
43         .enable = enable_pint_irq,
44         .disable = disable_pint_irq,
45         .ack = mask_and_ack_pint,
46         .end = end_pint_irq
47 };
48
49 static void disable_pint_irq(unsigned int irq)
50 {
51         unsigned long val;
52
53         val = ctrl_inw(INTC_INTER);
54         val &= ~(1 << (irq - PINT_IRQ_BASE));
55         ctrl_outw(val, INTC_INTER);     /* disable PINTn */
56         portcr_mask &= ~(3 << (irq - PINT_IRQ_BASE)*2);
57 }
58
59 static void enable_pint_irq(unsigned int irq)
60 {
61         unsigned long val;
62
63         val = ctrl_inw(INTC_INTER);
64         val |= 1 << (irq - PINT_IRQ_BASE);
65         ctrl_outw(val, INTC_INTER);     /* enable PINTn */
66         portcr_mask |= 3 << (irq - PINT_IRQ_BASE)*2;
67 }
68
69 static void mask_and_ack_pint(unsigned int irq)
70 {
71         disable_pint_irq(irq);
72 }
73
74 static void end_pint_irq(unsigned int irq)
75 {
76         if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
77                 enable_pint_irq(irq);
78 }
79
80 void make_pint_irq(unsigned int irq)
81 {
82         disable_irq_nosync(irq);
83         irq_desc[irq].chip = &pint_irq_type;
84         disable_pint_irq(irq);
85 }
86
87 static struct ipr_data pint_ipr_map[] = {
88         { PINT0_IRQ, PINT0_IPR_ADDR, PINT0_IPR_POS, PINT0_PRIORITY },
89         { PINT8_IRQ, PINT8_IPR_ADDR, PINT8_IPR_POS, PINT8_PRIORITY },
90 };
91
92 void __init init_IRQ_pint(void)
93 {
94         int i;
95
96         make_ipr_irq(pint_ipr_map, ARRAY_SIZE(pint_ipr_map));
97
98         enable_irq(PINT0_IRQ);
99         enable_irq(PINT8_IRQ);
100
101         for(i = 0; i < 16; i++)
102                 make_pint_irq(PINT_IRQ_BASE + i);
103
104         for(i = 0; i < 256; i++) {
105                 if (i & 1)
106                         pint_map[i] = 0;
107                 else if (i & 2)
108                         pint_map[i] = 1;
109                 else if (i & 4)
110                         pint_map[i] = 2;
111                 else if (i & 8)
112                         pint_map[i] = 3;
113                 else if (i & 0x10)
114                         pint_map[i] = 4;
115                 else if (i & 0x20)
116                         pint_map[i] = 5;
117                 else if (i & 0x40)
118                         pint_map[i] = 6;
119                 else if (i & 0x80)
120                         pint_map[i] = 7;
121         }
122 }
123
124 int ipr_irq_demux(int irq)
125 {
126         unsigned long creg, dreg, d, sav;
127
128         if (irq == PINT0_IRQ) {
129 #if defined(CONFIG_CPU_SUBTYPE_SH7707)
130                 creg = PORT_PACR;
131                 dreg = PORT_PADR;
132 #else
133                 creg = PORT_PCCR;
134                 dreg = PORT_PCDR;
135 #endif
136                 sav = ctrl_inw(creg);
137                 ctrl_outw(sav | portcr_mask, creg);
138                 d = (~ctrl_inb(dreg) ^ ctrl_inw(INTC_ICR2)) &
139                         ctrl_inw(INTC_INTER) & 0xff;
140                 ctrl_outw(sav, creg);
141
142                 if (d == 0)
143                         return irq;
144
145                 return PINT_IRQ_BASE + pint_map[d];
146         } else if (irq == PINT8_IRQ) {
147 #if defined(CONFIG_CPU_SUBTYPE_SH7707)
148                 creg = PORT_PBCR;
149                 dreg = PORT_PBDR;
150 #else
151                 creg = PORT_PFCR;
152                 dreg = PORT_PFDR;
153 #endif
154                 sav = ctrl_inw(creg);
155                 ctrl_outw(sav | (portcr_mask >> 16), creg);
156                 d = (~ctrl_inb(dreg) ^ (ctrl_inw(INTC_ICR2) >> 8)) &
157                         (ctrl_inw(INTC_INTER) >> 8) & 0xff;
158                 ctrl_outw(sav, creg);
159
160                 if (d == 0)
161                         return irq;
162
163                 return PINT_IRQ_BASE + 8 + pint_map[d];
164         }
165
166         return irq;
167 }
168