Merge master.kernel.org:/home/rmk/linux-2.6-arm
[linux-2.6] / include / asm-arm / arch-lh7a40x / entry-macro.S
1 /*
2  * include/asm-arm/arch-lh7a40x/entry-macro.S
3  *
4  * Low-level IRQ helper macros for LH7A40x platforms
5  *
6  * This file is licensed under  the terms of the GNU General Public
7  * License version 2. This program is licensed "as is" without any
8  * warranty of any kind, whether express or implied.
9  */
10
11 # if defined (CONFIG_ARCH_LH7A400) && defined (CONFIG_ARCH_LH7A404)
12 #  error "LH7A400 and LH7A404 are mutually exclusive"
13 # endif
14
15 # if defined (CONFIG_ARCH_LH7A400)
16                 .macro  disable_fiq
17                 .endm
18
19                 .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
20                 mov     \irqnr, #0
21                 mov     \base, #io_p2v(0x80000000)      @ APB registers
22                 ldr     \irqstat, [\base, #0x500]       @ PIC INTSR
23
24 1001:           movs    \irqstat, \irqstat, lsr #1      @ Shift into carry
25                 bcs     1008f                           @ Bit set; irq found
26                 add     \irqnr, \irqnr, #1
27                 bne     1001b                           @ Until no bits
28                 b       1009f                           @ Nothing?  Hmm.
29 1008:           movs    \irqstat, #1                    @ Force !Z
30 1009:
31                .endm
32
33 #elif defined(CONFIG_ARCH_LH7A404)
34
35                 .macro  disable_fiq
36                 .endm
37
38                 .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
39                 mov     \irqnr, #0                      @ VIC1 irq base
40                 mov     \base, #io_p2v(0x80000000)      @ APB registers
41                 add     \base, \base, #0x8000
42                 ldr     \tmp, [\base, #0x0030]          @ VIC1_VECTADDR
43                 tst     \tmp, #VA_VECTORED              @ Direct vectored
44                 bne     1002f
45                 tst     \tmp, #VA_VIC1DEFAULT           @ Default vectored VIC1
46                 ldrne   \irqstat, [\base, #0]           @ VIC1_IRQSTATUS
47                 bne     1001f
48                 add     \base, \base, #(0xa000 - 0x8000)
49                 ldr     \tmp, [\base, #0x0030]          @ VIC2_VECTADDR
50                 tst     \tmp, #VA_VECTORED              @ Direct vectored
51                 bne     1002f
52                 ldr     \irqstat, [\base, #0]           @ VIC2_IRQSTATUS
53                 mov     \irqnr, #32                     @ VIC2 irq base
54
55 1001:           movs    \irqstat, \irqstat, lsr #1      @ Shift into carry
56                 bcs     1008f                           @ Bit set; irq found
57                 add     \irqnr, \irqnr, #1
58                 bne     1001b                           @ Until no bits
59                 b       1009f                           @ Nothing?  Hmm.
60 1002:           and     \irqnr, \tmp, #0x3f             @ Mask for valid bits
61 1008:           movs    \irqstat, #1                    @ Force !Z
62                 str     \tmp, [\base, #0x0030]          @ Clear vector
63 1009:
64                .endm
65 #endif
66
67