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   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2008 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #include <linux/types.h>
  29 #include <linux/module.h>
  30 #include <linux/pci.h>
  31 #include <linux/netdevice.h>
  32 #include <linux/vmalloc.h>
  33 #include <linux/string.h>
  34 #include <linux/in.h>
  35 #include <linux/ip.h>
  36 #include <linux/tcp.h>
  37 #include <linux/ipv6.h>
  38 #include <net/checksum.h>
  39 #include <net/ip6_checksum.h>
  40 #include <linux/ethtool.h>
  41 #include <linux/if_vlan.h>
  42
  43 #include "ixgbe.h"
  44 #include "ixgbe_common.h"
  45
  46 char ixgbe_driver_name[] = "ixgbe";
  47 static const char ixgbe_driver_string[] =
  48                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  49
  50 #define DRV_VERSION "1.3.30-k2"
  51 const char ixgbe_driver_version[] = DRV_VERSION;
  52 static char ixgbe_copyright[] = "Copyright (c) 1999-2007 Intel Corporation.";
  53
  54 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  55         [board_82598] = &ixgbe_82598_info,
  56 };
  57
  58 /* ixgbe_pci_tbl - PCI Device ID Table
  59  *
  60  * Wildcard entries (PCI_ANY_ID) should come last
  61  * Last entry must be all 0s
  62  *
  63  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  64  *   Class, Class Mask, private data (not used) }
  65  */
  66 static struct pci_device_id ixgbe_pci_tbl[] = {
  67         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598),
  68          board_82598 },
  69         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
  70          board_82598 },
  71         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
  72          board_82598 },
  73         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT),
  74          board_82598 },
  75         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
  76          board_82598 },
  77         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT),
  78          board_82598 },
  79         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT),
  80          board_82598 },
  81         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM),
  82          board_82598 },
  83         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR),
  84          board_82598 },
  85         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM),
  86          board_82598 },
  87         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX),
  88          board_82598 },
  89
  90         /* required last entry */
  91         {0, }
  92 };
  93 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
  94
  95 #ifdef CONFIG_IXGBE_DCA
  96 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
  97                             void *p);
  98 static struct notifier_block dca_notifier = {
  99         .notifier_call = ixgbe_notify_dca,
 100         .next          = NULL,
 101         .priority      = 0
 102 };
 103 #endif
 104
 105 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 106 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 107 MODULE_LICENSE("GPL");
 108 MODULE_VERSION(DRV_VERSION);
 109
 110 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
 111
 112 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 113 {
 114         u32 ctrl_ext;
 115
 116         /* Let firmware take over control of h/w */
 117         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 118         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 119                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 120 }
 121
 122 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 123 {
 124         u32 ctrl_ext;
 125
 126         /* Let firmware know the driver has taken over */
 127         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 128         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 129                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 130 }
 131
 132 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
 133                            u8 msix_vector)
 134 {
 135         u32 ivar, index;
 136
 137         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 138         index = (int_alloc_entry >> 2) & 0x1F;
 139         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR(index));
 140         ivar &= ~(0xFF << (8 * (int_alloc_entry & 0x3)));
 141         ivar |= (msix_vector << (8 * (int_alloc_entry & 0x3)));
 142         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
 143 }
 144
 145 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
 146                                              struct ixgbe_tx_buffer
 147                                              *tx_buffer_info)
 148 {
 149         if (tx_buffer_info->dma) {
 150                 pci_unmap_page(adapter->pdev, tx_buffer_info->dma,
 151                                tx_buffer_info->length, PCI_DMA_TODEVICE);
 152                 tx_buffer_info->dma = 0;
 153         }
 154         if (tx_buffer_info->skb) {
 155                 dev_kfree_skb_any(tx_buffer_info->skb);
 156                 tx_buffer_info->skb = NULL;
 157         }
 158         /* tx_buffer_info must be completely set up in the transmit path */
 159 }
 160
 161 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
 162                                        struct ixgbe_ring *tx_ring,
 163                                        unsigned int eop)
 164 {
 165         struct ixgbe_hw *hw = &adapter->hw;
 166         u32 head, tail;
 167
 168         /* Detect a transmit hang in hardware, this serializes the
 169          * check with the clearing of time_stamp and movement of eop */
 170         head = IXGBE_READ_REG(hw, tx_ring->head);
 171         tail = IXGBE_READ_REG(hw, tx_ring->tail);
 172         adapter->detect_tx_hung = false;
 173         if ((head != tail) &&
 174             tx_ring->tx_buffer_info[eop].time_stamp &&
 175             time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
 176             !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
 177                 /* detected Tx unit hang */
 178                 union ixgbe_adv_tx_desc *tx_desc;
 179                 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
 180                 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
 181                         "  Tx Queue             <%d>\n"
 182                         "  TDH, TDT             <%x>, <%x>\n"
 183                         "  next_to_use          <%x>\n"
 184                         "  next_to_clean        <%x>\n"
 185                         "tx_buffer_info[next_to_clean]\n"
 186                         "  time_stamp           <%lx>\n"
 187                         "  jiffies              <%lx>\n",
 188                         tx_ring->queue_index,
 189                         head, tail,
 190                         tx_ring->next_to_use, eop,
 191                         tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
 192                 return true;
 193         }
 194
 195         return false;
 196 }
 197
 198 #define IXGBE_MAX_TXD_PWR       14
 199 #define IXGBE_MAX_DATA_PER_TXD  (1 << IXGBE_MAX_TXD_PWR)
 200
 201 /* Tx Descriptors needed, worst case */
 202 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
 203                          (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
 204 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
 205         MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
 206
 207 #define GET_TX_HEAD_FROM_RING(ring) (\
 208         *(volatile u32 *) \
 209         ((union ixgbe_adv_tx_desc *)(ring)->desc + (ring)->count))
 210 static void ixgbe_tx_timeout(struct net_device *netdev);
 211
 212 /**
 213  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
 214  * @adapter: board private structure
 215  * @tx_ring: tx ring to clean
 216  **/
 217 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
 218                                struct ixgbe_ring *tx_ring)
 219 {
 220         union ixgbe_adv_tx_desc *tx_desc;
 221         struct ixgbe_tx_buffer *tx_buffer_info;
 222         struct net_device *netdev = adapter->netdev;
 223         struct sk_buff *skb;
 224         unsigned int i;
 225         u32 head, oldhead;
 226         unsigned int count = 0;
 227         unsigned int total_bytes = 0, total_packets = 0;
 228
 229         rmb();
 230         head = GET_TX_HEAD_FROM_RING(tx_ring);
 231         head = le32_to_cpu(head);
 232         i = tx_ring->next_to_clean;
 233         while (1) {
 234                 while (i != head) {
 235                         tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
 236                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
 237                         skb = tx_buffer_info->skb;
 238
 239                         if (skb) {
 240                                 unsigned int segs, bytecount;
 241
 242                                 /* gso_segs is currently only valid for tcp */
 243                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
 244                                 /* multiply data chunks by size of headers */
 245                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
 246                                             skb->len;
 247                                 total_packets += segs;
 248                                 total_bytes += bytecount;
 249                         }
 250
 251                         ixgbe_unmap_and_free_tx_resource(adapter,
 252                                                          tx_buffer_info);
 253
 254                         i++;
 255                         if (i == tx_ring->count)
 256                                 i = 0;
 257
 258                         count++;
 259                         if (count == tx_ring->count)
 260                                 goto done_cleaning;
 261                 }
 262                 oldhead = head;
 263                 rmb();
 264                 head = GET_TX_HEAD_FROM_RING(tx_ring);
 265                 head = le32_to_cpu(head);
 266                 if (head == oldhead)
 267                         goto done_cleaning;
 268         } /* while (1) */
 269
 270 done_cleaning:
 271         tx_ring->next_to_clean = i;
 272
 273 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
 274         if (unlikely(count && netif_carrier_ok(netdev) &&
 275                      (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
 276                 /* Make sure that anybody stopping the queue after this
 277                  * sees the new next_to_clean.
 278                  */
 279                 smp_mb();
 280                 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
 281                     !test_bit(__IXGBE_DOWN, &adapter->state)) {
 282                         netif_wake_subqueue(netdev, tx_ring->queue_index);
 283                         ++adapter->restart_queue;
 284                 }
 285         }
 286
 287         if (adapter->detect_tx_hung) {
 288                 if (ixgbe_check_tx_hang(adapter, tx_ring, i)) {
 289                         /* schedule immediate reset if we believe we hung */
 290                         DPRINTK(PROBE, INFO,
 291                                 "tx hang %d detected, resetting adapter\n",
 292                                 adapter->tx_timeout_count + 1);
 293                         ixgbe_tx_timeout(adapter->netdev);
 294                 }
 295         }
 296
 297         /* re-arm the interrupt */
 298         if ((total_packets >= tx_ring->work_limit) ||
 299             (count == tx_ring->count))
 300                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->v_idx);
 301
 302         tx_ring->total_bytes += total_bytes;
 303         tx_ring->total_packets += total_packets;
 304         tx_ring->stats.bytes += total_bytes;
 305         tx_ring->stats.packets += total_packets;
 306         adapter->net_stats.tx_bytes += total_bytes;
 307         adapter->net_stats.tx_packets += total_packets;
 308         return (total_packets ? true : false);
 309 }
 310
 311 #ifdef CONFIG_IXGBE_DCA
 312 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
 313                                 struct ixgbe_ring *rx_ring)
 314 {
 315         u32 rxctrl;
 316         int cpu = get_cpu();
 317         int q = rx_ring - adapter->rx_ring;
 318
 319         if (rx_ring->cpu != cpu) {
 320                 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q));
 321                 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK;
 322                 rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
 323                 rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN;
 324                 rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN;
 325                 rxctrl &= ~(IXGBE_DCA_RXCTRL_DESC_RRO_EN);
 326                 rxctrl &= ~(IXGBE_DCA_RXCTRL_DESC_WRO_EN |
 327                             IXGBE_DCA_RXCTRL_DESC_HSRO_EN);
 328                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl);
 329                 rx_ring->cpu = cpu;
 330         }
 331         put_cpu();
 332 }
 333
 334 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
 335                                 struct ixgbe_ring *tx_ring)
 336 {
 337         u32 txctrl;
 338         int cpu = get_cpu();
 339         int q = tx_ring - adapter->tx_ring;
 340
 341         if (tx_ring->cpu != cpu) {
 342                 txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q));
 343                 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
 344                 txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
 345                 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
 346                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl);
 347                 tx_ring->cpu = cpu;
 348         }
 349         put_cpu();
 350 }
 351
 352 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
 353 {
 354         int i;
 355
 356         if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
 357                 return;
 358
 359         for (i = 0; i < adapter->num_tx_queues; i++) {
 360                 adapter->tx_ring[i].cpu = -1;
 361                 ixgbe_update_tx_dca(adapter, &adapter->tx_ring[i]);
 362         }
 363         for (i = 0; i < adapter->num_rx_queues; i++) {
 364                 adapter->rx_ring[i].cpu = -1;
 365                 ixgbe_update_rx_dca(adapter, &adapter->rx_ring[i]);
 366         }
 367 }
 368
 369 static int __ixgbe_notify_dca(struct device *dev, void *data)
 370 {
 371         struct net_device *netdev = dev_get_drvdata(dev);
 372         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 373         unsigned long event = *(unsigned long *)data;
 374
 375         switch (event) {
 376         case DCA_PROVIDER_ADD:
 377                 /* if we're already enabled, don't do it again */
 378                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
 379                         break;
 380                 /* Always use CB2 mode, difference is masked
 381                  * in the CB driver. */
 382                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
 383                 if (dca_add_requester(dev) == 0) {
 384                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
 385                         ixgbe_setup_dca(adapter);
 386                         break;
 387                 }
 388                 /* Fall Through since DCA is disabled. */
 389         case DCA_PROVIDER_REMOVE:
 390                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
 391                         dca_remove_requester(dev);
 392                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
 393                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
 394                 }
 395                 break;
 396         }
 397
 398         return 0;
 399 }
 400
 401 #endif /* CONFIG_IXGBE_DCA */
 402 /**
 403  * ixgbe_receive_skb - Send a completed packet up the stack
 404  * @adapter: board private structure
 405  * @skb: packet to send up
 406  * @status: hardware indication of status of receive
 407  * @rx_ring: rx descriptor ring (for a specific queue) to setup
 408  * @rx_desc: rx descriptor
 409  **/
 410 static void ixgbe_receive_skb(struct ixgbe_q_vector *q_vector,
 411                               struct sk_buff *skb, u8 status,
 412                               union ixgbe_adv_rx_desc *rx_desc)
 413 {
 414         struct ixgbe_adapter *adapter = q_vector->adapter;
 415         struct napi_struct *napi = &q_vector->napi;
 416         bool is_vlan = (status & IXGBE_RXD_STAT_VP);
 417         u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
 418
 419         skb_record_rx_queue(skb, q_vector - &adapter->q_vector[0]);
 420         if (skb->ip_summed == CHECKSUM_UNNECESSARY) {
 421                 if (adapter->vlgrp && is_vlan && (tag != 0))
 422                         vlan_gro_receive(napi, adapter->vlgrp, tag, skb);
 423                 else
 424                         napi_gro_receive(napi, skb);
 425         } else {
 426                 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
 427                         if (adapter->vlgrp && is_vlan && (tag != 0))
 428                                 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
 429                         else
 430                                 netif_receive_skb(skb);
 431                 } else {
 432                         if (adapter->vlgrp && is_vlan && (tag != 0))
 433                                 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
 434                         else
 435                                 netif_rx(skb);
 436                 }
 437         }
 438 }
 439
 440 /**
 441  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
 442  * @adapter: address of board private structure
 443  * @status_err: hardware indication of status of receive
 444  * @skb: skb currently being received and modified
 445  **/
 446 static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
 447                                      u32 status_err, struct sk_buff *skb)
 448 {
 449         skb->ip_summed = CHECKSUM_NONE;
 450
 451         /* Rx csum disabled */
 452         if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
 453                 return;
 454
 455         /* if IP and error */
 456         if ((status_err & IXGBE_RXD_STAT_IPCS) &&
 457             (status_err & IXGBE_RXDADV_ERR_IPE)) {
 458                 adapter->hw_csum_rx_error++;
 459                 return;
 460         }
 461
 462         if (!(status_err & IXGBE_RXD_STAT_L4CS))
 463                 return;
 464
 465         if (status_err & IXGBE_RXDADV_ERR_TCPE) {
 466                 adapter->hw_csum_rx_error++;
 467                 return;
 468         }
 469
 470         /* It must be a TCP or UDP packet with a valid checksum */
 471         skb->ip_summed = CHECKSUM_UNNECESSARY;
 472         adapter->hw_csum_rx_good++;
 473 }
 474
 475 /**
 476  * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
 477  * @adapter: address of board private structure
 478  **/
 479 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
 480                                    struct ixgbe_ring *rx_ring,
 481                                    int cleaned_count)
 482 {
 483         struct pci_dev *pdev = adapter->pdev;
 484         union ixgbe_adv_rx_desc *rx_desc;
 485         struct ixgbe_rx_buffer *bi;
 486         unsigned int i;
 487
 488         i = rx_ring->next_to_use;
 489         bi = &rx_ring->rx_buffer_info[i];
 490
 491         while (cleaned_count--) {
 492                 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
 493
 494                 if (!bi->page_dma &&
 495                     (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
 496                         if (!bi->page) {
 497                                 bi->page = alloc_page(GFP_ATOMIC);
 498                                 if (!bi->page) {
 499                                         adapter->alloc_rx_page_failed++;
 500                                         goto no_buffers;
 501                                 }
 502                                 bi->page_offset = 0;
 503                         } else {
 504                                 /* use a half page if we're re-using */
 505                                 bi->page_offset ^= (PAGE_SIZE / 2);
 506                         }
 507
 508                         bi->page_dma = pci_map_page(pdev, bi->page,
 509                                                     bi->page_offset,
 510                                                     (PAGE_SIZE / 2),
 511                                                     PCI_DMA_FROMDEVICE);
 512                 }
 513
 514                 if (!bi->skb) {
 515                         struct sk_buff *skb;
 516                         skb = netdev_alloc_skb(adapter->netdev,
 517                                                (rx_ring->rx_buf_len +
 518                                                 NET_IP_ALIGN));
 519
 520                         if (!skb) {
 521                                 adapter->alloc_rx_buff_failed++;
 522                                 goto no_buffers;
 523                         }
 524
 525                         /*
 526                          * Make buffer alignment 2 beyond a 16 byte boundary
 527                          * this will result in a 16 byte aligned IP header after
 528                          * the 14 byte MAC header is removed
 529                          */
 530                         skb_reserve(skb, NET_IP_ALIGN);
 531
 532                         bi->skb = skb;
 533                         bi->dma = pci_map_single(pdev, skb->data,
 534                                                  rx_ring->rx_buf_len,
 535                                                  PCI_DMA_FROMDEVICE);
 536                 }
 537                 /* Refresh the desc even if buffer_addrs didn't change because
 538                  * each write-back erases this info. */
 539                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 540                         rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
 541                         rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
 542                 } else {
 543                         rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
 544                 }
 545
 546                 i++;
 547                 if (i == rx_ring->count)
 548                         i = 0;
 549                 bi = &rx_ring->rx_buffer_info[i];
 550         }
 551
 552 no_buffers:
 553         if (rx_ring->next_to_use != i) {
 554                 rx_ring->next_to_use = i;
 555                 if (i-- == 0)
 556                         i = (rx_ring->count - 1);
 557
 558                 /*
 559                  * Force memory writes to complete before letting h/w
 560                  * know there are new descriptors to fetch.  (Only
 561                  * applicable for weak-ordered memory model archs,
 562                  * such as IA-64).
 563                  */
 564                 wmb();
 565                 writel(i, adapter->hw.hw_addr + rx_ring->tail);
 566         }
 567 }
 568
 569 static inline u16 ixgbe_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
 570 {
 571         return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
 572 }
 573
 574 static inline u16 ixgbe_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
 575 {
 576         return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
 577 }
 578
 579 static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
 580                                struct ixgbe_ring *rx_ring,
 581                                int *work_done, int work_to_do)
 582 {
 583         struct ixgbe_adapter *adapter = q_vector->adapter;
 584         struct pci_dev *pdev = adapter->pdev;
 585         union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
 586         struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
 587         struct sk_buff *skb;
 588         unsigned int i;
 589         u32 len, staterr;
 590         u16 hdr_info;
 591         bool cleaned = false;
 592         int cleaned_count = 0;
 593         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 594
 595         i = rx_ring->next_to_clean;
 596         rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
 597         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 598         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 599
 600         while (staterr & IXGBE_RXD_STAT_DD) {
 601                 u32 upper_len = 0;
 602                 if (*work_done >= work_to_do)
 603                         break;
 604                 (*work_done)++;
 605
 606                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 607                         hdr_info = le16_to_cpu(ixgbe_get_hdr_info(rx_desc));
 608                         len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
 609                                IXGBE_RXDADV_HDRBUFLEN_SHIFT;
 610                         if (hdr_info & IXGBE_RXDADV_SPH)
 611                                 adapter->rx_hdr_split++;
 612                         if (len > IXGBE_RX_HDR_SIZE)
 613                                 len = IXGBE_RX_HDR_SIZE;
 614                         upper_len = le16_to_cpu(rx_desc->wb.upper.length);
 615                 } else {
 616                         len = le16_to_cpu(rx_desc->wb.upper.length);
 617                 }
 618
 619                 cleaned = true;
 620                 skb = rx_buffer_info->skb;
 621                 prefetch(skb->data - NET_IP_ALIGN);
 622                 rx_buffer_info->skb = NULL;
 623
 624                 if (len && !skb_shinfo(skb)->nr_frags) {
 625                         pci_unmap_single(pdev, rx_buffer_info->dma,
 626                                          rx_ring->rx_buf_len,
 627                                          PCI_DMA_FROMDEVICE);
 628                         skb_put(skb, len);
 629                 }
 630
 631                 if (upper_len) {
 632                         pci_unmap_page(pdev, rx_buffer_info->page_dma,
 633                                        PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
 634                         rx_buffer_info->page_dma = 0;
 635                         skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
 636                                            rx_buffer_info->page,
 637                                            rx_buffer_info->page_offset,
 638                                            upper_len);
 639
 640                         if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
 641                             (page_count(rx_buffer_info->page) != 1))
 642                                 rx_buffer_info->page = NULL;
 643                         else
 644                                 get_page(rx_buffer_info->page);
 645
 646                         skb->len += upper_len;
 647                         skb->data_len += upper_len;
 648                         skb->truesize += upper_len;
 649                 }
 650
 651                 i++;
 652                 if (i == rx_ring->count)
 653                         i = 0;
 654                 next_buffer = &rx_ring->rx_buffer_info[i];
 655
 656                 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
 657                 prefetch(next_rxd);
 658
 659                 cleaned_count++;
 660                 if (staterr & IXGBE_RXD_STAT_EOP) {
 661                         rx_ring->stats.packets++;
 662                         rx_ring->stats.bytes += skb->len;
 663                 } else {
 664                         rx_buffer_info->skb = next_buffer->skb;
 665                         rx_buffer_info->dma = next_buffer->dma;
 666                         next_buffer->skb = skb;
 667                         next_buffer->dma = 0;
 668                         adapter->non_eop_descs++;
 669                         goto next_desc;
 670                 }
 671
 672                 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
 673                         dev_kfree_skb_irq(skb);
 674                         goto next_desc;
 675                 }
 676
 677                 ixgbe_rx_checksum(adapter, staterr, skb);
 678
 679                 /* probably a little skewed due to removing CRC */
 680                 total_rx_bytes += skb->len;
 681                 total_rx_packets++;
 682
 683                 skb->protocol = eth_type_trans(skb, adapter->netdev);
 684                 ixgbe_receive_skb(q_vector, skb, staterr, rx_desc);
 685
 686 next_desc:
 687                 rx_desc->wb.upper.status_error = 0;
 688
 689                 /* return some buffers to hardware, one at a time is too slow */
 690                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
 691                         ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
 692                         cleaned_count = 0;
 693                 }
 694
 695                 /* use prefetched values */
 696                 rx_desc = next_rxd;
 697                 rx_buffer_info = next_buffer;
 698
 699                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 700         }
 701
 702         rx_ring->next_to_clean = i;
 703         cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
 704
 705         if (cleaned_count)
 706                 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
 707
 708         rx_ring->total_packets += total_rx_packets;
 709         rx_ring->total_bytes += total_rx_bytes;
 710         adapter->net_stats.rx_bytes += total_rx_bytes;
 711         adapter->net_stats.rx_packets += total_rx_packets;
 712
 713         return cleaned;
 714 }
 715
 716 static int ixgbe_clean_rxonly(struct napi_struct *, int);
 717 /**
 718  * ixgbe_configure_msix - Configure MSI-X hardware
 719  * @adapter: board private structure
 720  *
 721  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
 722  * interrupts.
 723  **/
 724 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
 725 {
 726         struct ixgbe_q_vector *q_vector;
 727         int i, j, q_vectors, v_idx, r_idx;
 728         u32 mask;
 729
 730         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
 731
 732         /* Populate the IVAR table and set the ITR values to the
 733          * corresponding register.
 734          */
 735         for (v_idx = 0; v_idx < q_vectors; v_idx++) {
 736                 q_vector = &adapter->q_vector[v_idx];
 737                 /* XXX for_each_bit(...) */
 738                 r_idx = find_first_bit(q_vector->rxr_idx,
 739                                        adapter->num_rx_queues);
 740
 741                 for (i = 0; i < q_vector->rxr_count; i++) {
 742                         j = adapter->rx_ring[r_idx].reg_idx;
 743                         ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(j), v_idx);
 744                         r_idx = find_next_bit(q_vector->rxr_idx,
 745                                               adapter->num_rx_queues,
 746                                               r_idx + 1);
 747                 }
 748                 r_idx = find_first_bit(q_vector->txr_idx,
 749                                        adapter->num_tx_queues);
 750
 751                 for (i = 0; i < q_vector->txr_count; i++) {
 752                         j = adapter->tx_ring[r_idx].reg_idx;
 753                         ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(j), v_idx);
 754                         r_idx = find_next_bit(q_vector->txr_idx,
 755                                               adapter->num_tx_queues,
 756                                               r_idx + 1);
 757                 }
 758
 759                 /* if this is a tx only vector halve the interrupt rate */
 760                 if (q_vector->txr_count && !q_vector->rxr_count)
 761                         q_vector->eitr = (adapter->eitr_param >> 1);
 762                 else
 763                         /* rx only */
 764                         q_vector->eitr = adapter->eitr_param;
 765
 766                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx),
 767                                 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
 768         }
 769
 770         ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX, v_idx);
 771         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
 772
 773         /* set up to autoclear timer, and the vectors */
 774         mask = IXGBE_EIMS_ENABLE_MASK;
 775         mask &= ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC);
 776         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
 777 }
 778
 779 enum latency_range {
 780         lowest_latency = 0,
 781         low_latency = 1,
 782         bulk_latency = 2,
 783         latency_invalid = 255
 784 };
 785
 786 /**
 787  * ixgbe_update_itr - update the dynamic ITR value based on statistics
 788  * @adapter: pointer to adapter
 789  * @eitr: eitr setting (ints per sec) to give last timeslice
 790  * @itr_setting: current throttle rate in ints/second
 791  * @packets: the number of packets during this measurement interval
 792  * @bytes: the number of bytes during this measurement interval
 793  *
 794  *      Stores a new ITR value based on packets and byte
 795  *      counts during the last interrupt.  The advantage of per interrupt
 796  *      computation is faster updates and more accurate ITR for the current
 797  *      traffic pattern.  Constants in this function were computed
 798  *      based on theoretical maximum wire speed and thresholds were set based
 799  *      on testing data as well as attempting to minimize response time
 800  *      while increasing bulk throughput.
 801  *      this functionality is controlled by the InterruptThrottleRate module
 802  *      parameter (see ixgbe_param.c)
 803  **/
 804 static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter,
 805                            u32 eitr, u8 itr_setting,
 806                            int packets, int bytes)
 807 {
 808         unsigned int retval = itr_setting;
 809         u32 timepassed_us;
 810         u64 bytes_perint;
 811
 812         if (packets == 0)
 813                 goto update_itr_done;
 814
 815
 816         /* simple throttlerate management
 817          *    0-20MB/s lowest (100000 ints/s)
 818          *   20-100MB/s low   (20000 ints/s)
 819          *  100-1249MB/s bulk (8000 ints/s)
 820          */
 821         /* what was last interrupt timeslice? */
 822         timepassed_us = 1000000/eitr;
 823         bytes_perint = bytes / timepassed_us; /* bytes/usec */
 824
 825         switch (itr_setting) {
 826         case lowest_latency:
 827                 if (bytes_perint > adapter->eitr_low)
 828                         retval = low_latency;
 829                 break;
 830         case low_latency:
 831                 if (bytes_perint > adapter->eitr_high)
 832                         retval = bulk_latency;
 833                 else if (bytes_perint <= adapter->eitr_low)
 834                         retval = lowest_latency;
 835                 break;
 836         case bulk_latency:
 837                 if (bytes_perint <= adapter->eitr_high)
 838                         retval = low_latency;
 839                 break;
 840         }
 841
 842 update_itr_done:
 843         return retval;
 844 }
 845
 846 static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
 847 {
 848         struct ixgbe_adapter *adapter = q_vector->adapter;
 849         struct ixgbe_hw *hw = &adapter->hw;
 850         u32 new_itr;
 851         u8 current_itr, ret_itr;
 852         int i, r_idx, v_idx = ((void *)q_vector - (void *)(adapter->q_vector)) /
 853                                sizeof(struct ixgbe_q_vector);
 854         struct ixgbe_ring *rx_ring, *tx_ring;
 855
 856         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
 857         for (i = 0; i < q_vector->txr_count; i++) {
 858                 tx_ring = &(adapter->tx_ring[r_idx]);
 859                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
 860                                            q_vector->tx_itr,
 861                                            tx_ring->total_packets,
 862                                            tx_ring->total_bytes);
 863                 /* if the result for this queue would decrease interrupt
 864                  * rate for this vector then use that result */
 865                 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
 866                                     q_vector->tx_itr - 1 : ret_itr);
 867                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
 868                                       r_idx + 1);
 869         }
 870
 871         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 872         for (i = 0; i < q_vector->rxr_count; i++) {
 873                 rx_ring = &(adapter->rx_ring[r_idx]);
 874                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
 875                                            q_vector->rx_itr,
 876                                            rx_ring->total_packets,
 877                                            rx_ring->total_bytes);
 878                 /* if the result for this queue would decrease interrupt
 879                  * rate for this vector then use that result */
 880                 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
 881                                     q_vector->rx_itr - 1 : ret_itr);
 882                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
 883                                       r_idx + 1);
 884         }
 885
 886         current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
 887
 888         switch (current_itr) {
 889         /* counts and packets in update_itr are dependent on these numbers */
 890         case lowest_latency:
 891                 new_itr = 100000;
 892                 break;
 893         case low_latency:
 894                 new_itr = 20000; /* aka hwitr = ~200 */
 895                 break;
 896         case bulk_latency:
 897         default:
 898                 new_itr = 8000;
 899                 break;
 900         }
 901
 902         if (new_itr != q_vector->eitr) {
 903                 u32 itr_reg;
 904                 /* do an exponential smoothing */
 905                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
 906                 q_vector->eitr = new_itr;
 907                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
 908                 /* must write high and low 16 bits to reset counter */
 909                 DPRINTK(TX_ERR, DEBUG, "writing eitr(%d): %08X\n", v_idx,
 910                         itr_reg);
 911                 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg | (itr_reg)<<16);
 912         }
 913
 914         return;
 915 }
 916
 917 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
 918 {
 919         struct ixgbe_hw *hw = &adapter->hw;
 920
 921         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
 922             (eicr & IXGBE_EICR_GPI_SDP1)) {
 923                 DPRINTK(PROBE, CRIT, "Fan has stopped, replace the adapter\n");
 924                 /* write to clear the interrupt */
 925                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
 926         }
 927 }
 928
 929 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
 930 {
 931         struct ixgbe_hw *hw = &adapter->hw;
 932
 933         adapter->lsc_int++;
 934         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
 935         adapter->link_check_timeout = jiffies;
 936         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
 937                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
 938                 schedule_work(&adapter->watchdog_task);
 939         }
 940 }
 941
 942 static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
 943 {
 944         struct net_device *netdev = data;
 945         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 946         struct ixgbe_hw *hw = &adapter->hw;
 947         u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
 948
 949         if (eicr & IXGBE_EICR_LSC)
 950                 ixgbe_check_lsc(adapter);
 951
 952         ixgbe_check_fan_failure(adapter, eicr);
 953
 954         if (!test_bit(__IXGBE_DOWN, &adapter->state))
 955                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
 956
 957         return IRQ_HANDLED;
 958 }
 959
 960 static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
 961 {
 962         struct ixgbe_q_vector *q_vector = data;
 963         struct ixgbe_adapter  *adapter = q_vector->adapter;
 964         struct ixgbe_ring     *tx_ring;
 965         int i, r_idx;
 966
 967         if (!q_vector->txr_count)
 968                 return IRQ_HANDLED;
 969
 970         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
 971         for (i = 0; i < q_vector->txr_count; i++) {
 972                 tx_ring = &(adapter->tx_ring[r_idx]);
 973 #ifdef CONFIG_IXGBE_DCA
 974                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
 975                         ixgbe_update_tx_dca(adapter, tx_ring);
 976 #endif
 977                 tx_ring->total_bytes = 0;
 978                 tx_ring->total_packets = 0;
 979                 ixgbe_clean_tx_irq(adapter, tx_ring);
 980                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
 981                                       r_idx + 1);
 982         }
 983
 984         return IRQ_HANDLED;
 985 }
 986
 987 /**
 988  * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
 989  * @irq: unused
 990  * @data: pointer to our q_vector struct for this interrupt vector
 991  **/
 992 static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
 993 {
 994         struct ixgbe_q_vector *q_vector = data;
 995         struct ixgbe_adapter  *adapter = q_vector->adapter;
 996         struct ixgbe_ring  *rx_ring;
 997         int r_idx;
 998         int i;
 999
1000         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1001         for (i = 0;  i < q_vector->rxr_count; i++) {
1002                 rx_ring = &(adapter->rx_ring[r_idx]);
1003                 rx_ring->total_bytes = 0;
1004                 rx_ring->total_packets = 0;
1005                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1006                                       r_idx + 1);
1007         }
1008
1009         if (!q_vector->rxr_count)
1010                 return IRQ_HANDLED;
1011
1012         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1013         rx_ring = &(adapter->rx_ring[r_idx]);
1014         /* disable interrupts on this vector only */
1015         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rx_ring->v_idx);
1016         napi_schedule(&q_vector->napi);
1017
1018         return IRQ_HANDLED;
1019 }
1020
1021 static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
1022 {
1023         ixgbe_msix_clean_rx(irq, data);
1024         ixgbe_msix_clean_tx(irq, data);
1025
1026         return IRQ_HANDLED;
1027 }
1028
1029 /**
1030  * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1031  * @napi: napi struct with our devices info in it
1032  * @budget: amount of work driver is allowed to do this pass, in packets
1033  *
1034  * This function is optimized for cleaning one queue only on a single
1035  * q_vector!!!
1036  **/
1037 static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
1038 {
1039         struct ixgbe_q_vector *q_vector =
1040                                container_of(napi, struct ixgbe_q_vector, napi);
1041         struct ixgbe_adapter *adapter = q_vector->adapter;
1042         struct ixgbe_ring *rx_ring = NULL;
1043         int work_done = 0;
1044         long r_idx;
1045
1046         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1047         rx_ring = &(adapter->rx_ring[r_idx]);
1048 #ifdef CONFIG_IXGBE_DCA
1049         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1050                 ixgbe_update_rx_dca(adapter, rx_ring);
1051 #endif
1052
1053         ixgbe_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
1054
1055         /* If all Rx work done, exit the polling mode */
1056         if (work_done < budget) {
1057                 napi_complete(napi);
1058                 if (adapter->itr_setting & 3)
1059                         ixgbe_set_itr_msix(q_vector);
1060                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1061                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, rx_ring->v_idx);
1062         }
1063
1064         return work_done;
1065 }
1066
1067 /**
1068  * ixgbe_clean_rxonly_many - msix (aka one shot) rx clean routine
1069  * @napi: napi struct with our devices info in it
1070  * @budget: amount of work driver is allowed to do this pass, in packets
1071  *
1072  * This function will clean more than one rx queue associated with a
1073  * q_vector.
1074  **/
1075 static int ixgbe_clean_rxonly_many(struct napi_struct *napi, int budget)
1076 {
1077         struct ixgbe_q_vector *q_vector =
1078                                container_of(napi, struct ixgbe_q_vector, napi);
1079         struct ixgbe_adapter *adapter = q_vector->adapter;
1080         struct ixgbe_ring *rx_ring = NULL;
1081         int work_done = 0, i;
1082         long r_idx;
1083         u16 enable_mask = 0;
1084
1085         /* attempt to distribute budget to each queue fairly, but don't allow
1086          * the budget to go below 1 because we'll exit polling */
1087         budget /= (q_vector->rxr_count ?: 1);
1088         budget = max(budget, 1);
1089         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1090         for (i = 0; i < q_vector->rxr_count; i++) {
1091                 rx_ring = &(adapter->rx_ring[r_idx]);
1092 #ifdef CONFIG_IXGBE_DCA
1093                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1094                         ixgbe_update_rx_dca(adapter, rx_ring);
1095 #endif
1096                 ixgbe_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
1097                 enable_mask |= rx_ring->v_idx;
1098                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1099                                       r_idx + 1);
1100         }
1101
1102         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1103         rx_ring = &(adapter->rx_ring[r_idx]);
1104         /* If all Rx work done, exit the polling mode */
1105         if (work_done < budget) {
1106                 napi_complete(napi);
1107                 if (adapter->itr_setting & 3)
1108                         ixgbe_set_itr_msix(q_vector);
1109                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1110                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, enable_mask);
1111                 return 0;
1112         }
1113
1114         return work_done;
1115 }
1116 static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx,
1117                                      int r_idx)
1118 {
1119         a->q_vector[v_idx].adapter = a;
1120         set_bit(r_idx, a->q_vector[v_idx].rxr_idx);
1121         a->q_vector[v_idx].rxr_count++;
1122         a->rx_ring[r_idx].v_idx = 1 << v_idx;
1123 }
1124
1125 static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
1126                                      int r_idx)
1127 {
1128         a->q_vector[v_idx].adapter = a;
1129         set_bit(r_idx, a->q_vector[v_idx].txr_idx);
1130         a->q_vector[v_idx].txr_count++;
1131         a->tx_ring[r_idx].v_idx = 1 << v_idx;
1132 }
1133
1134 /**
1135  * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1136  * @adapter: board private structure to initialize
1137  * @vectors: allotted vector count for descriptor rings
1138  *
1139  * This function maps descriptor rings to the queue-specific vectors
1140  * we were allotted through the MSI-X enabling code.  Ideally, we'd have
1141  * one vector per ring/queue, but on a constrained vector budget, we
1142  * group the rings as "efficiently" as possible.  You would add new
1143  * mapping configurations in here.
1144  **/
1145 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter,
1146                                       int vectors)
1147 {
1148         int v_start = 0;
1149         int rxr_idx = 0, txr_idx = 0;
1150         int rxr_remaining = adapter->num_rx_queues;
1151         int txr_remaining = adapter->num_tx_queues;
1152         int i, j;
1153         int rqpv, tqpv;
1154         int err = 0;
1155
1156         /* No mapping required if MSI-X is disabled. */
1157         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1158                 goto out;
1159
1160         /*
1161          * The ideal configuration...
1162          * We have enough vectors to map one per queue.
1163          */
1164         if (vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1165                 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1166                         map_vector_to_rxq(adapter, v_start, rxr_idx);
1167
1168                 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1169                         map_vector_to_txq(adapter, v_start, txr_idx);
1170
1171                 goto out;
1172         }
1173
1174         /*
1175          * If we don't have enough vectors for a 1-to-1
1176          * mapping, we'll have to group them so there are
1177          * multiple queues per vector.
1178          */
1179         /* Re-adjusting *qpv takes care of the remainder. */
1180         for (i = v_start; i < vectors; i++) {
1181                 rqpv = DIV_ROUND_UP(rxr_remaining, vectors - i);
1182                 for (j = 0; j < rqpv; j++) {
1183                         map_vector_to_rxq(adapter, i, rxr_idx);
1184                         rxr_idx++;
1185                         rxr_remaining--;
1186                 }
1187         }
1188         for (i = v_start; i < vectors; i++) {
1189                 tqpv = DIV_ROUND_UP(txr_remaining, vectors - i);
1190                 for (j = 0; j < tqpv; j++) {
1191                         map_vector_to_txq(adapter, i, txr_idx);
1192                         txr_idx++;
1193                         txr_remaining--;
1194                 }
1195         }
1196
1197 out:
1198         return err;
1199 }
1200
1201 /**
1202  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1203  * @adapter: board private structure
1204  *
1205  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1206  * interrupts from the kernel.
1207  **/
1208 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
1209 {
1210         struct net_device *netdev = adapter->netdev;
1211         irqreturn_t (*handler)(int, void *);
1212         int i, vector, q_vectors, err;
1213         int ri=0, ti=0;
1214
1215         /* Decrement for Other and TCP Timer vectors */
1216         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1217
1218         /* Map the Tx/Rx rings to the vectors we were allotted. */
1219         err = ixgbe_map_rings_to_vectors(adapter, q_vectors);
1220         if (err)
1221                 goto out;
1222
1223 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1224                          (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1225                          &ixgbe_msix_clean_many)
1226         for (vector = 0; vector < q_vectors; vector++) {
1227                 handler = SET_HANDLER(&adapter->q_vector[vector]);
1228
1229                 if(handler == &ixgbe_msix_clean_rx) {
1230                         sprintf(adapter->name[vector], "%s-%s-%d",
1231                                 netdev->name, "rx", ri++);
1232                 }
1233                 else if(handler == &ixgbe_msix_clean_tx) {
1234                         sprintf(adapter->name[vector], "%s-%s-%d",
1235                                 netdev->name, "tx", ti++);
1236                 }
1237                 else
1238                         sprintf(adapter->name[vector], "%s-%s-%d",
1239                                 netdev->name, "TxRx", vector);
1240
1241                 err = request_irq(adapter->msix_entries[vector].vector,
1242                                   handler, 0, adapter->name[vector],
1243                                   &(adapter->q_vector[vector]));
1244                 if (err) {
1245                         DPRINTK(PROBE, ERR,
1246                                 "request_irq failed for MSIX interrupt "
1247                                 "Error: %d\n", err);
1248                         goto free_queue_irqs;
1249                 }
1250         }
1251
1252         sprintf(adapter->name[vector], "%s:lsc", netdev->name);
1253         err = request_irq(adapter->msix_entries[vector].vector,
1254                           &ixgbe_msix_lsc, 0, adapter->name[vector], netdev);
1255         if (err) {
1256                 DPRINTK(PROBE, ERR,
1257                         "request_irq for msix_lsc failed: %d\n", err);
1258                 goto free_queue_irqs;
1259         }
1260
1261         return 0;
1262
1263 free_queue_irqs:
1264         for (i = vector - 1; i >= 0; i--)
1265                 free_irq(adapter->msix_entries[--vector].vector,
1266                          &(adapter->q_vector[i]));
1267         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
1268         pci_disable_msix(adapter->pdev);
1269         kfree(adapter->msix_entries);
1270         adapter->msix_entries = NULL;
1271 out:
1272         return err;
1273 }
1274
1275 static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
1276 {
1277         struct ixgbe_hw *hw = &adapter->hw;
1278         struct ixgbe_q_vector *q_vector = adapter->q_vector;
1279         u8 current_itr;
1280         u32 new_itr = q_vector->eitr;
1281         struct ixgbe_ring *rx_ring = &adapter->rx_ring[0];
1282         struct ixgbe_ring *tx_ring = &adapter->tx_ring[0];
1283
1284         q_vector->tx_itr = ixgbe_update_itr(adapter, new_itr,
1285                                             q_vector->tx_itr,
1286                                             tx_ring->total_packets,
1287                                             tx_ring->total_bytes);
1288         q_vector->rx_itr = ixgbe_update_itr(adapter, new_itr,
1289                                             q_vector->rx_itr,
1290                                             rx_ring->total_packets,
1291                                             rx_ring->total_bytes);
1292
1293         current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
1294
1295         switch (current_itr) {
1296         /* counts and packets in update_itr are dependent on these numbers */
1297         case lowest_latency:
1298                 new_itr = 100000;
1299                 break;
1300         case low_latency:
1301                 new_itr = 20000; /* aka hwitr = ~200 */
1302                 break;
1303         case bulk_latency:
1304                 new_itr = 8000;
1305                 break;
1306         default:
1307                 break;
1308         }
1309
1310         if (new_itr != q_vector->eitr) {
1311                 u32 itr_reg;
1312                 /* do an exponential smoothing */
1313                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
1314                 q_vector->eitr = new_itr;
1315                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
1316                 /* must write high and low 16 bits to reset counter */
1317                 IXGBE_WRITE_REG(hw, IXGBE_EITR(0), itr_reg | (itr_reg)<<16);
1318         }
1319
1320         return;
1321 }
1322
1323 /**
1324  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1325  * @adapter: board private structure
1326  **/
1327 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
1328 {
1329         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
1330         IXGBE_WRITE_FLUSH(&adapter->hw);
1331         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1332                 int i;
1333                 for (i = 0; i < adapter->num_msix_vectors; i++)
1334                         synchronize_irq(adapter->msix_entries[i].vector);
1335         } else {
1336                 synchronize_irq(adapter->pdev->irq);
1337         }
1338 }
1339
1340 /**
1341  * ixgbe_irq_enable - Enable default interrupt generation settings
1342  * @adapter: board private structure
1343  **/
1344 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
1345 {
1346         u32 mask;
1347         mask = IXGBE_EIMS_ENABLE_MASK;
1348         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
1349                 mask |= IXGBE_EIMS_GPI_SDP1;
1350         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1351         IXGBE_WRITE_FLUSH(&adapter->hw);
1352 }
1353
1354 /**
1355  * ixgbe_intr - legacy mode Interrupt Handler
1356  * @irq: interrupt number
1357  * @data: pointer to a network interface device structure
1358  **/
1359 static irqreturn_t ixgbe_intr(int irq, void *data)
1360 {
1361         struct net_device *netdev = data;
1362         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1363         struct ixgbe_hw *hw = &adapter->hw;
1364         u32 eicr;
1365
1366         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1367          * therefore no explict interrupt disable is necessary */
1368         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
1369         if (!eicr) {
1370                 /* shared interrupt alert!
1371                  * make sure interrupts are enabled because the read will
1372                  * have disabled interrupts due to EIAM */
1373                 ixgbe_irq_enable(adapter);
1374                 return IRQ_NONE;        /* Not our interrupt */
1375         }
1376
1377         if (eicr & IXGBE_EICR_LSC)
1378                 ixgbe_check_lsc(adapter);
1379
1380         ixgbe_check_fan_failure(adapter, eicr);
1381
1382         if (napi_schedule_prep(&adapter->q_vector[0].napi)) {
1383                 adapter->tx_ring[0].total_packets = 0;
1384                 adapter->tx_ring[0].total_bytes = 0;
1385                 adapter->rx_ring[0].total_packets = 0;
1386                 adapter->rx_ring[0].total_bytes = 0;
1387                 /* would disable interrupts here but EIAM disabled it */
1388                 __napi_schedule(&adapter->q_vector[0].napi);
1389         }
1390
1391         return IRQ_HANDLED;
1392 }
1393
1394 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter *adapter)
1395 {
1396         int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1397
1398         for (i = 0; i < q_vectors; i++) {
1399                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
1400                 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1401                 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1402                 q_vector->rxr_count = 0;
1403                 q_vector->txr_count = 0;
1404         }
1405 }
1406
1407 /**
1408  * ixgbe_request_irq - initialize interrupts
1409  * @adapter: board private structure
1410  *
1411  * Attempts to configure interrupts using the best available
1412  * capabilities of the hardware and kernel.
1413  **/
1414 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
1415 {
1416         struct net_device *netdev = adapter->netdev;
1417         int err;
1418
1419         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1420                 err = ixgbe_request_msix_irqs(adapter);
1421         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1422                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, 0,
1423                                   netdev->name, netdev);
1424         } else {
1425                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, IRQF_SHARED,
1426                                   netdev->name, netdev);
1427         }
1428
1429         if (err)
1430                 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
1431
1432         return err;
1433 }
1434
1435 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
1436 {
1437         struct net_device *netdev = adapter->netdev;
1438
1439         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1440                 int i, q_vectors;
1441
1442                 q_vectors = adapter->num_msix_vectors;
1443
1444                 i = q_vectors - 1;
1445                 free_irq(adapter->msix_entries[i].vector, netdev);
1446
1447                 i--;
1448                 for (; i >= 0; i--) {
1449                         free_irq(adapter->msix_entries[i].vector,
1450                                  &(adapter->q_vector[i]));
1451                 }
1452
1453                 ixgbe_reset_q_vectors(adapter);
1454         } else {
1455                 free_irq(adapter->pdev->irq, netdev);
1456         }
1457 }
1458
1459 /**
1460  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1461  *
1462  **/
1463 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
1464 {
1465         struct ixgbe_hw *hw = &adapter->hw;
1466
1467         IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
1468                         EITR_INTS_PER_SEC_TO_REG(adapter->eitr_param));
1469
1470         ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0);
1471         ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(0), 0);
1472
1473         map_vector_to_rxq(adapter, 0, 0);
1474         map_vector_to_txq(adapter, 0, 0);
1475
1476         DPRINTK(HW, INFO, "Legacy interrupt IVAR setup done\n");
1477 }
1478
1479 /**
1480  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1481  * @adapter: board private structure
1482  *
1483  * Configure the Tx unit of the MAC after a reset.
1484  **/
1485 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
1486 {
1487         u64 tdba, tdwba;
1488         struct ixgbe_hw *hw = &adapter->hw;
1489         u32 i, j, tdlen, txctrl;
1490
1491         /* Setup the HW Tx Head and Tail descriptor pointers */
1492         for (i = 0; i < adapter->num_tx_queues; i++) {
1493                 struct ixgbe_ring *ring = &adapter->tx_ring[i];
1494                 j = ring->reg_idx;
1495                 tdba = ring->dma;
1496                 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1497                 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
1498                                 (tdba & DMA_32BIT_MASK));
1499                 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
1500                 tdwba = ring->dma +
1501                         (ring->count * sizeof(union ixgbe_adv_tx_desc));
1502                 tdwba |= IXGBE_TDWBAL_HEAD_WB_ENABLE;
1503                 IXGBE_WRITE_REG(hw, IXGBE_TDWBAL(j), tdwba & DMA_32BIT_MASK);
1504                 IXGBE_WRITE_REG(hw, IXGBE_TDWBAH(j), (tdwba >> 32));
1505                 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), tdlen);
1506                 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
1507                 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
1508                 adapter->tx_ring[i].head = IXGBE_TDH(j);
1509                 adapter->tx_ring[i].tail = IXGBE_TDT(j);
1510                 /* Disable Tx Head Writeback RO bit, since this hoses
1511                  * bookkeeping if things aren't delivered in order.
1512                  */
1513                 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j));
1514                 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1515                 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl);
1516         }
1517 }
1518
1519 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1520
1521 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index)
1522 {
1523         struct ixgbe_ring *rx_ring;
1524         u32 srrctl;
1525         int queue0;
1526         unsigned long mask;
1527
1528         /* program one srrctl register per VMDq index */
1529         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
1530                 long shift, len;
1531                 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1532                 len = sizeof(adapter->ring_feature[RING_F_VMDQ].mask) * 8;
1533                 shift = find_first_bit(&mask, len);
1534                 queue0 = index & mask;
1535                 index = (index & mask) >> shift;
1536         /* program one srrctl per RSS queue since RDRXCTL.MVMEN is enabled */
1537         } else {
1538                 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1539                 queue0 = index & mask;
1540                 index = index & mask;
1541         }
1542
1543         rx_ring = &adapter->rx_ring[queue0];
1544
1545         srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(index));
1546
1547         srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1548         srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1549
1550         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1551                 srrctl |= IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1552                 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1553                 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1554                             IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1555                            IXGBE_SRRCTL_BSIZEHDR_MASK);
1556         } else {
1557                 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1558
1559                 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1560                         srrctl |= IXGBE_RXBUFFER_2048 >>
1561                                   IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1562                 else
1563                         srrctl |= rx_ring->rx_buf_len >>
1564                                   IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1565         }
1566         IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl);
1567 }
1568
1569 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1570                            (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1571
1572 /**
1573  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1574  * @adapter: board private structure
1575  *
1576  * Configure the Rx unit of the MAC after a reset.
1577  **/
1578 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1579 {
1580         u64 rdba;
1581         struct ixgbe_hw *hw = &adapter->hw;
1582         struct net_device *netdev = adapter->netdev;
1583         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1584         int i, j;
1585         u32 rdlen, rxctrl, rxcsum;
1586         static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
1587                           0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
1588                           0x6A3E67EA, 0x14364D17, 0x3BED200D};
1589         u32 fctrl, hlreg0;
1590         u32 pages;
1591         u32 reta = 0, mrqc;
1592         u32 rdrxctl;
1593         int rx_buf_len;
1594
1595         /* Decide whether to use packet split mode or not */
1596         adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1597
1598         /* Set the RX buffer length according to the mode */
1599         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1600                 rx_buf_len = IXGBE_RX_HDR_SIZE;
1601         } else {
1602                 if (netdev->mtu <= ETH_DATA_LEN)
1603                         rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1604                 else
1605                         rx_buf_len = ALIGN(max_frame, 1024);
1606         }
1607
1608         fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1609         fctrl |= IXGBE_FCTRL_BAM;
1610         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
1611         IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
1612
1613         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1614         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1615                 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
1616         else
1617                 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
1618         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
1619
1620         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1621
1622         rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1623         /* disable receives while setting up the descriptors */
1624         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1625         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
1626
1627         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1628          * the Base and Length of the Rx Descriptor Ring */
1629         for (i = 0; i < adapter->num_rx_queues; i++) {
1630                 rdba = adapter->rx_ring[i].dma;
1631                 j = adapter->rx_ring[i].reg_idx;
1632                 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), (rdba & DMA_32BIT_MASK));
1633                 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
1634                 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), rdlen);
1635                 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);
1636                 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);
1637                 adapter->rx_ring[i].head = IXGBE_RDH(j);
1638                 adapter->rx_ring[i].tail = IXGBE_RDT(j);
1639                 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1640
1641                 ixgbe_configure_srrctl(adapter, j);
1642         }
1643
1644         /*
1645          * For VMDq support of different descriptor types or
1646          * buffer sizes through the use of multiple SRRCTL
1647          * registers, RDRXCTL.MVMEN must be set to 1
1648          *
1649          * also, the manual doesn't mention it clearly but DCA hints
1650          * will only use queue 0's tags unless this bit is set.  Side
1651          * effects of setting this bit are only that SRRCTL must be
1652          * fully programmed [0..15]
1653          */
1654         if (adapter->flags &
1655             (IXGBE_FLAG_RSS_ENABLED | IXGBE_FLAG_VMDQ_ENABLED)) {
1656                 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
1657                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
1658                 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
1659         }
1660
1661         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
1662                 /* Fill out redirection table */
1663                 for (i = 0, j = 0; i < 128; i++, j++) {
1664                         if (j == adapter->ring_feature[RING_F_RSS].indices)
1665                                 j = 0;
1666                         /* reta = 4-byte sliding window of
1667                          * 0x00..(indices-1)(indices-1)00..etc. */
1668                         reta = (reta << 8) | (j * 0x11);
1669                         if ((i & 3) == 3)
1670                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
1671                 }
1672
1673                 /* Fill out hash function seeds */
1674                 for (i = 0; i < 10; i++)
1675                         IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
1676
1677                 mrqc = IXGBE_MRQC_RSSEN
1678                     /* Perform hash on these packet types */
1679                        | IXGBE_MRQC_RSS_FIELD_IPV4
1680                        | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1681                        | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1682                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1683                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1684                        | IXGBE_MRQC_RSS_FIELD_IPV6
1685                        | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1686                        | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1687                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
1688                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1689         }
1690
1691         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1692
1693         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED ||
1694             adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1695                 /* Disable indicating checksum in descriptor, enables
1696                  * RSS hash */
1697                 rxcsum |= IXGBE_RXCSUM_PCSD;
1698         }
1699         if (!(rxcsum & IXGBE_RXCSUM_PCSD)) {
1700                 /* Enable IPv4 payload checksum for UDP fragments
1701                  * if PCSD is not set */
1702                 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1703         }
1704
1705         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1706 }
1707
1708 static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1709 {
1710         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1711         struct ixgbe_hw *hw = &adapter->hw;
1712
1713         /* add VID to filter table */
1714         hw->mac.ops.set_vfta(&adapter->hw, vid, 0, true);
1715 }
1716
1717 static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1718 {
1719         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1720         struct ixgbe_hw *hw = &adapter->hw;
1721
1722         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1723                 ixgbe_irq_disable(adapter);
1724
1725         vlan_group_set_device(adapter->vlgrp, vid, NULL);
1726
1727         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1728                 ixgbe_irq_enable(adapter);
1729
1730         /* remove VID from filter table */
1731         hw->mac.ops.set_vfta(&adapter->hw, vid, 0, false);
1732 }
1733
1734 static void ixgbe_vlan_rx_register(struct net_device *netdev,
1735                                    struct vlan_group *grp)
1736 {
1737         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1738         u32 ctrl;
1739
1740         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1741                 ixgbe_irq_disable(adapter);
1742         adapter->vlgrp = grp;
1743
1744         /*
1745          * For a DCB driver, always enable VLAN tag stripping so we can
1746          * still receive traffic from a DCB-enabled host even if we're
1747          * not in DCB mode.
1748          */
1749         ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1750         ctrl |= IXGBE_VLNCTRL_VME;
1751         ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1752         IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1753         ixgbe_vlan_rx_add_vid(netdev, 0);
1754
1755         if (grp) {
1756                 /* enable VLAN tag insert/strip */
1757                 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1758                 ctrl |= IXGBE_VLNCTRL_VME;
1759                 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1760                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1761         }
1762
1763         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1764                 ixgbe_irq_enable(adapter);
1765 }
1766
1767 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1768 {
1769         ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1770
1771         if (adapter->vlgrp) {
1772                 u16 vid;
1773                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1774                         if (!vlan_group_get_device(adapter->vlgrp, vid))
1775                                 continue;
1776                         ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1777                 }
1778         }
1779 }
1780
1781 static u8 *ixgbe_addr_list_itr(struct ixgbe_hw *hw, u8 **mc_addr_ptr, u32 *vmdq)
1782 {
1783         struct dev_mc_list *mc_ptr;
1784         u8 *addr = *mc_addr_ptr;
1785         *vmdq = 0;
1786
1787         mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]);
1788         if (mc_ptr->next)
1789                 *mc_addr_ptr = mc_ptr->next->dmi_addr;
1790         else
1791                 *mc_addr_ptr = NULL;
1792
1793         return addr;
1794 }
1795
1796 /**
1797  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
1798  * @netdev: network interface device structure
1799  *
1800  * The set_rx_method entry point is called whenever the unicast/multicast
1801  * address list or the network interface flags are updated.  This routine is
1802  * responsible for configuring the hardware for proper unicast, multicast and
1803  * promiscuous mode.
1804  **/
1805 static void ixgbe_set_rx_mode(struct net_device *netdev)
1806 {
1807         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1808         struct ixgbe_hw *hw = &adapter->hw;
1809         u32 fctrl, vlnctrl;
1810         u8 *addr_list = NULL;
1811         int addr_count = 0;
1812
1813         /* Check for Promiscuous and All Multicast modes */
1814
1815         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1816         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
1817
1818         if (netdev->flags & IFF_PROMISC) {
1819                 hw->addr_ctrl.user_set_promisc = 1;
1820                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1821                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
1822         } else {
1823                 if (netdev->flags & IFF_ALLMULTI) {
1824                         fctrl |= IXGBE_FCTRL_MPE;
1825                         fctrl &= ~IXGBE_FCTRL_UPE;
1826                 } else {
1827                         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1828                 }
1829                 vlnctrl |= IXGBE_VLNCTRL_VFE;
1830                 hw->addr_ctrl.user_set_promisc = 0;
1831         }
1832
1833         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
1834         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
1835
1836         /* reprogram secondary unicast list */
1837         addr_count = netdev->uc_count;
1838         if (addr_count)
1839                 addr_list = netdev->uc_list->dmi_addr;
1840         hw->mac.ops.update_uc_addr_list(hw, addr_list, addr_count,
1841                                           ixgbe_addr_list_itr);
1842
1843         /* reprogram multicast list */
1844         addr_count = netdev->mc_count;
1845         if (addr_count)
1846                 addr_list = netdev->mc_list->dmi_addr;
1847         hw->mac.ops.update_mc_addr_list(hw, addr_list, addr_count,
1848                                         ixgbe_addr_list_itr);
1849 }
1850
1851 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
1852 {
1853         int q_idx;
1854         struct ixgbe_q_vector *q_vector;
1855         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1856
1857         /* legacy and MSI only use one vector */
1858         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1859                 q_vectors = 1;
1860
1861         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1862                 struct napi_struct *napi;
1863                 q_vector = &adapter->q_vector[q_idx];
1864                 if (!q_vector->rxr_count)
1865                         continue;
1866                 napi = &q_vector->napi;
1867                 if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) &&
1868                     (q_vector->rxr_count > 1))
1869                         napi->poll = &ixgbe_clean_rxonly_many;
1870
1871                 napi_enable(napi);
1872         }
1873 }
1874
1875 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
1876 {
1877         int q_idx;
1878         struct ixgbe_q_vector *q_vector;
1879         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1880
1881         /* legacy and MSI only use one vector */
1882         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1883                 q_vectors = 1;
1884
1885         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1886                 q_vector = &adapter->q_vector[q_idx];
1887                 if (!q_vector->rxr_count)
1888                         continue;
1889                 napi_disable(&q_vector->napi);
1890         }
1891 }
1892
1893 #ifdef CONFIG_IXGBE_DCB
1894 /*
1895  * ixgbe_configure_dcb - Configure DCB hardware
1896  * @adapter: ixgbe adapter struct
1897  *
1898  * This is called by the driver on open to configure the DCB hardware.
1899  * This is also called by the gennetlink interface when reconfiguring
1900  * the DCB state.
1901  */
1902 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
1903 {
1904         struct ixgbe_hw *hw = &adapter->hw;
1905         u32 txdctl, vlnctrl;
1906         int i, j;
1907
1908         ixgbe_dcb_check_config(&adapter->dcb_cfg);
1909         ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_TX_CONFIG);
1910         ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_RX_CONFIG);
1911
1912         /* reconfigure the hardware */
1913         ixgbe_dcb_hw_config(&adapter->hw, &adapter->dcb_cfg);
1914
1915         for (i = 0; i < adapter->num_tx_queues; i++) {
1916                 j = adapter->tx_ring[i].reg_idx;
1917                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
1918                 /* PThresh workaround for Tx hang with DFP enabled. */
1919                 txdctl |= 32;
1920                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
1921         }
1922         /* Enable VLAN tag insert/strip */
1923         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
1924         vlnctrl |= IXGBE_VLNCTRL_VME | IXGBE_VLNCTRL_VFE;
1925         vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
1926         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
1927         hw->mac.ops.set_vfta(&adapter->hw, 0, 0, true);
1928 }
1929
1930 #endif
1931 static void ixgbe_configure(struct ixgbe_adapter *adapter)
1932 {
1933         struct net_device *netdev = adapter->netdev;
1934         int i;
1935
1936         ixgbe_set_rx_mode(netdev);
1937
1938         ixgbe_restore_vlan(adapter);
1939 #ifdef CONFIG_IXGBE_DCB
1940         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1941                 netif_set_gso_max_size(netdev, 32768);
1942                 ixgbe_configure_dcb(adapter);
1943         } else {
1944                 netif_set_gso_max_size(netdev, 65536);
1945         }
1946 #else
1947         netif_set_gso_max_size(netdev, 65536);
1948 #endif
1949
1950         ixgbe_configure_tx(adapter);
1951         ixgbe_configure_rx(adapter);
1952         for (i = 0; i < adapter->num_rx_queues; i++)
1953                 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
1954                                        (adapter->rx_ring[i].count - 1));
1955 }
1956
1957 static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1958 {
1959         struct net_device *netdev = adapter->netdev;
1960         struct ixgbe_hw *hw = &adapter->hw;
1961         int i, j = 0;
1962         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1963         u32 txdctl, rxdctl, mhadd;
1964         u32 gpie;
1965
1966         ixgbe_get_hw_control(adapter);
1967
1968         if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) ||
1969             (adapter->flags & IXGBE_FLAG_MSI_ENABLED)) {
1970                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1971                         gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
1972                                 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
1973                 } else {
1974                         /* MSI only */
1975                         gpie = 0;
1976                 }
1977                 /* XXX: to interrupt immediately for EICS writes, enable this */
1978                 /* gpie |= IXGBE_GPIE_EIMEN; */
1979                 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
1980         }
1981
1982         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
1983                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
1984                  * specifically only auto mask tx and rx interrupts */
1985                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
1986         }
1987
1988         /* Enable fan failure interrupt if media type is copper */
1989         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
1990                 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
1991                 gpie |= IXGBE_SDP1_GPIEN;
1992                 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
1993         }
1994
1995         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
1996         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
1997                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
1998                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
1999
2000                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
2001         }
2002
2003         for (i = 0; i < adapter->num_tx_queues; i++) {
2004                 j = adapter->tx_ring[i].reg_idx;
2005                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2006                 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
2007                 txdctl |= (8 << 16);
2008                 txdctl |= IXGBE_TXDCTL_ENABLE;
2009                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
2010         }
2011
2012         for (i = 0; i < adapter->num_rx_queues; i++) {
2013                 j = adapter->rx_ring[i].reg_idx;
2014                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
2015                 /* enable PTHRESH=32 descriptors (half the internal cache)
2016                  * and HTHRESH=0 descriptors (to minimize latency on fetch),
2017                  * this also removes a pesky rx_no_buffer_count increment */
2018                 rxdctl |= 0x0020;
2019                 rxdctl |= IXGBE_RXDCTL_ENABLE;
2020                 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), rxdctl);
2021         }
2022         /* enable all receives */
2023         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2024         rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
2025         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxdctl);
2026
2027         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2028                 ixgbe_configure_msix(adapter);
2029         else
2030                 ixgbe_configure_msi_and_legacy(adapter);
2031
2032         ixgbe_napi_add_all(adapter);
2033
2034         clear_bit(__IXGBE_DOWN, &adapter->state);
2035         ixgbe_napi_enable_all(adapter);
2036
2037         /* clear any pending interrupts, may auto mask */
2038         IXGBE_READ_REG(hw, IXGBE_EICR);
2039
2040         ixgbe_irq_enable(adapter);
2041
2042         /* enable transmits */
2043         netif_tx_start_all_queues(netdev);
2044
2045         /* bring the link up in the watchdog, this could race with our first
2046          * link up interrupt but shouldn't be a problem */
2047         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2048         adapter->link_check_timeout = jiffies;
2049         mod_timer(&adapter->watchdog_timer, jiffies);
2050         return 0;
2051 }
2052
2053 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
2054 {
2055         WARN_ON(in_interrupt());
2056         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
2057                 msleep(1);
2058         ixgbe_down(adapter);
2059         ixgbe_up(adapter);
2060         clear_bit(__IXGBE_RESETTING, &adapter->state);
2061 }
2062
2063 int ixgbe_up(struct ixgbe_adapter *adapter)
2064 {
2065         /* hardware has been reset, we need to reload some things */
2066         ixgbe_configure(adapter);
2067
2068         return ixgbe_up_complete(adapter);
2069 }
2070
2071 void ixgbe_reset(struct ixgbe_adapter *adapter)
2072 {
2073         struct ixgbe_hw *hw = &adapter->hw;
2074         if (hw->mac.ops.init_hw(hw))
2075                 dev_err(&adapter->pdev->dev, "Hardware Error\n");
2076
2077         /* reprogram the RAR[0] in case user changed it. */
2078         hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
2079
2080 }
2081
2082 /**
2083  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
2084  * @adapter: board private structure
2085  * @rx_ring: ring to free buffers from
2086  **/
2087 static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
2088                                 struct ixgbe_ring *rx_ring)
2089 {
2090         struct pci_dev *pdev = adapter->pdev;
2091         unsigned long size;
2092         unsigned int i;
2093
2094         /* Free all the Rx ring sk_buffs */
2095
2096         for (i = 0; i < rx_ring->count; i++) {
2097                 struct ixgbe_rx_buffer *rx_buffer_info;
2098
2099                 rx_buffer_info = &rx_ring->rx_buffer_info[i];
2100                 if (rx_buffer_info->dma) {
2101                         pci_unmap_single(pdev, rx_buffer_info->dma,
2102                                          rx_ring->rx_buf_len,
2103                                          PCI_DMA_FROMDEVICE);
2104                         rx_buffer_info->dma = 0;
2105                 }
2106                 if (rx_buffer_info->skb) {
2107                         dev_kfree_skb(rx_buffer_info->skb);
2108                         rx_buffer_info->skb = NULL;
2109                 }
2110                 if (!rx_buffer_info->page)
2111                         continue;
2112                 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE / 2,
2113                                PCI_DMA_FROMDEVICE);
2114                 rx_buffer_info->page_dma = 0;
2115                 put_page(rx_buffer_info->page);
2116                 rx_buffer_info->page = NULL;
2117                 rx_buffer_info->page_offset = 0;
2118         }
2119
2120         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2121         memset(rx_ring->rx_buffer_info, 0, size);
2122
2123         /* Zero out the descriptor ring */
2124         memset(rx_ring->desc, 0, rx_ring->size);
2125
2126         rx_ring->next_to_clean = 0;
2127         rx_ring->next_to_use = 0;
2128
2129         writel(0, adapter->hw.hw_addr + rx_ring->head);
2130         writel(0, adapter->hw.hw_addr + rx_ring->tail);
2131 }
2132
2133 /**
2134  * ixgbe_clean_tx_ring - Free Tx Buffers
2135  * @adapter: board private structure
2136  * @tx_ring: ring to be cleaned
2137  **/
2138 static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
2139                                 struct ixgbe_ring *tx_ring)
2140 {
2141         struct ixgbe_tx_buffer *tx_buffer_info;
2142         unsigned long size;
2143         unsigned int i;
2144
2145         /* Free all the Tx ring sk_buffs */
2146
2147         for (i = 0; i < tx_ring->count; i++) {
2148                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2149                 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
2150         }
2151
2152         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2153         memset(tx_ring->tx_buffer_info, 0, size);
2154
2155         /* Zero out the descriptor ring */
2156         memset(tx_ring->desc, 0, tx_ring->size);
2157
2158         tx_ring->next_to_use = 0;
2159         tx_ring->next_to_clean = 0;
2160
2161         writel(0, adapter->hw.hw_addr + tx_ring->head);
2162         writel(0, adapter->hw.hw_addr + tx_ring->tail);
2163 }
2164
2165 /**
2166  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
2167  * @adapter: board private structure
2168  **/
2169 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
2170 {
2171         int i;
2172
2173         for (i = 0; i < adapter->num_rx_queues; i++)
2174                 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2175 }
2176
2177 /**
2178  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
2179  * @adapter: board private structure
2180  **/
2181 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
2182 {
2183         int i;
2184
2185         for (i = 0; i < adapter->num_tx_queues; i++)
2186                 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2187 }
2188
2189 void ixgbe_down(struct ixgbe_adapter *adapter)
2190 {
2191         struct net_device *netdev = adapter->netdev;
2192         struct ixgbe_hw *hw = &adapter->hw;
2193         u32 rxctrl;
2194         u32 txdctl;
2195         int i, j;
2196
2197         /* signal that we are down to the interrupt handler */
2198         set_bit(__IXGBE_DOWN, &adapter->state);
2199
2200         /* disable receives */
2201         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2202         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
2203
2204         netif_tx_disable(netdev);
2205
2206         IXGBE_WRITE_FLUSH(hw);
2207         msleep(10);
2208
2209         netif_tx_stop_all_queues(netdev);
2210
2211         ixgbe_irq_disable(adapter);
2212
2213         ixgbe_napi_disable_all(adapter);
2214
2215         del_timer_sync(&adapter->watchdog_timer);
2216         cancel_work_sync(&adapter->watchdog_task);
2217
2218         /* disable transmits in the hardware now that interrupts are off */
2219         for (i = 0; i < adapter->num_tx_queues; i++) {
2220                 j = adapter->tx_ring[i].reg_idx;
2221                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2222                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j),
2223                                 (txdctl & ~IXGBE_TXDCTL_ENABLE));
2224         }
2225
2226         netif_carrier_off(netdev);
2227
2228 #ifdef CONFIG_IXGBE_DCA
2229         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2230                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
2231                 dca_remove_requester(&adapter->pdev->dev);
2232         }
2233
2234 #endif
2235         if (!pci_channel_offline(adapter->pdev))
2236                 ixgbe_reset(adapter);
2237         ixgbe_clean_all_tx_rings(adapter);
2238         ixgbe_clean_all_rx_rings(adapter);
2239
2240 #ifdef CONFIG_IXGBE_DCA
2241         /* since we reset the hardware DCA settings were cleared */
2242         if (dca_add_requester(&adapter->pdev->dev) == 0) {
2243                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
2244                 /* always use CB2 mode, difference is masked
2245                  * in the CB driver */
2246                 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
2247                 ixgbe_setup_dca(adapter);
2248         }
2249 #endif
2250 }
2251
2252 /**
2253  * ixgbe_poll - NAPI Rx polling callback
2254  * @napi: structure for representing this polling device
2255  * @budget: how many packets driver is allowed to clean
2256  *
2257  * This function is used for legacy and MSI, NAPI mode
2258  **/
2259 static int ixgbe_poll(struct napi_struct *napi, int budget)
2260 {
2261         struct ixgbe_q_vector *q_vector = container_of(napi,
2262                                                   struct ixgbe_q_vector, napi);
2263         struct ixgbe_adapter *adapter = q_vector->adapter;
2264         int tx_cleaned, work_done = 0;
2265
2266 #ifdef CONFIG_IXGBE_DCA
2267         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2268                 ixgbe_update_tx_dca(adapter, adapter->tx_ring);
2269                 ixgbe_update_rx_dca(adapter, adapter->rx_ring);
2270         }
2271 #endif
2272
2273         tx_cleaned = ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
2274         ixgbe_clean_rx_irq(q_vector, adapter->rx_ring, &work_done, budget);
2275
2276         if (tx_cleaned)
2277                 work_done = budget;
2278
2279         /* If budget not fully consumed, exit the polling mode */
2280         if (work_done < budget) {
2281                 napi_complete(napi);
2282                 if (adapter->itr_setting & 3)
2283                         ixgbe_set_itr(adapter);
2284                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2285                         ixgbe_irq_enable(adapter);
2286         }
2287         return work_done;
2288 }
2289
2290 /**
2291  * ixgbe_tx_timeout - Respond to a Tx Hang
2292  * @netdev: network interface device structure
2293  **/
2294 static void ixgbe_tx_timeout(struct net_device *netdev)
2295 {
2296         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2297
2298         /* Do the reset outside of interrupt context */
2299         schedule_work(&adapter->reset_task);
2300 }
2301
2302 static void ixgbe_reset_task(struct work_struct *work)
2303 {
2304         struct ixgbe_adapter *adapter;
2305         adapter = container_of(work, struct ixgbe_adapter, reset_task);
2306
2307         /* If we're already down or resetting, just bail */
2308         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
2309             test_bit(__IXGBE_RESETTING, &adapter->state))
2310                 return;
2311
2312         adapter->tx_timeout_count++;
2313
2314         ixgbe_reinit_locked(adapter);
2315 }
2316
2317 static void ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
2318 {
2319         int nrq = 1, ntq = 1;
2320         int feature_mask = 0, rss_i, rss_m;
2321         int dcb_i, dcb_m;
2322
2323         /* Number of supported queues */
2324         switch (adapter->hw.mac.type) {
2325         case ixgbe_mac_82598EB:
2326                 dcb_i = adapter->ring_feature[RING_F_DCB].indices;
2327                 dcb_m = 0;
2328                 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2329                 rss_m = 0;
2330                 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2331                 feature_mask |= IXGBE_FLAG_DCB_ENABLED;
2332
2333                 switch (adapter->flags & feature_mask) {
2334                 case (IXGBE_FLAG_RSS_ENABLED | IXGBE_FLAG_DCB_ENABLED):
2335                         dcb_m = 0x7 << 3;
2336                         rss_i = min(8, rss_i);
2337                         rss_m = 0x7;
2338                         nrq = dcb_i * rss_i;
2339                         ntq = min(MAX_TX_QUEUES, dcb_i * rss_i);
2340                         break;
2341                 case (IXGBE_FLAG_DCB_ENABLED):
2342                         dcb_m = 0x7 << 3;
2343                         nrq = dcb_i;
2344                         ntq = dcb_i;
2345                         break;
2346                 case (IXGBE_FLAG_RSS_ENABLED):
2347                         rss_m = 0xF;
2348                         nrq = rss_i;
2349                         ntq = rss_i;
2350                         break;
2351                 case 0:
2352                 default:
2353                         dcb_i = 0;
2354                         dcb_m = 0;
2355                         rss_i = 0;
2356                         rss_m = 0;
2357                         nrq = 1;
2358                         ntq = 1;
2359                         break;
2360                 }
2361
2362                 /* Sanity check, we should never have zero queues */
2363                 nrq = (nrq ?:1);
2364                 ntq = (ntq ?:1);
2365
2366                 adapter->ring_feature[RING_F_DCB].indices = dcb_i;
2367                 adapter->ring_feature[RING_F_DCB].mask = dcb_m;
2368                 adapter->ring_feature[RING_F_RSS].indices = rss_i;
2369                 adapter->ring_feature[RING_F_RSS].mask = rss_m;
2370                 break;
2371         default:
2372                 nrq = 1;
2373                 ntq = 1;
2374                 break;
2375         }
2376
2377         adapter->num_rx_queues = nrq;
2378         adapter->num_tx_queues = ntq;
2379 }
2380
2381 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
2382                                        int vectors)
2383 {
2384         int err, vector_threshold;
2385
2386         /* We'll want at least 3 (vector_threshold):
2387          * 1) TxQ[0] Cleanup
2388          * 2) RxQ[0] Cleanup
2389          * 3) Other (Link Status Change, etc.)
2390          * 4) TCP Timer (optional)
2391          */
2392         vector_threshold = MIN_MSIX_COUNT;
2393
2394         /* The more we get, the more we will assign to Tx/Rx Cleanup
2395          * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2396          * Right now, we simply care about how many we'll get; we'll
2397          * set them up later while requesting irq's.
2398          */
2399         while (vectors >= vector_threshold) {
2400                 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
2401                                       vectors);
2402                 if (!err) /* Success in acquiring all requested vectors. */
2403                         break;
2404                 else if (err < 0)
2405                         vectors = 0; /* Nasty failure, quit now */
2406                 else /* err == number of vectors we should try again with */
2407                         vectors = err;
2408         }
2409
2410         if (vectors < vector_threshold) {
2411                 /* Can't allocate enough MSI-X interrupts?  Oh well.
2412                  * This just means we'll go with either a single MSI
2413                  * vector or fall back to legacy interrupts.
2414                  */
2415                 DPRINTK(HW, DEBUG, "Unable to allocate MSI-X interrupts\n");
2416                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2417                 kfree(adapter->msix_entries);
2418                 adapter->msix_entries = NULL;
2419                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
2420                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2421                 ixgbe_set_num_queues(adapter);
2422         } else {
2423                 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */
2424                 /*
2425                  * Adjust for only the vectors we'll use, which is minimum
2426                  * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
2427                  * vectors we were allocated.
2428                  */
2429                 adapter->num_msix_vectors = min(vectors,
2430                                    adapter->max_msix_q_vectors + NON_Q_VECTORS);
2431         }
2432 }
2433
2434 /**
2435  * ixgbe_cache_ring_register - Descriptor ring to register mapping
2436  * @adapter: board private structure to initialize
2437  *
2438  * Once we know the feature-set enabled for the device, we'll cache
2439  * the register offset the descriptor ring is assigned to.
2440  **/
2441 static void ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
2442 {
2443         int feature_mask = 0, rss_i;
2444         int i, txr_idx, rxr_idx;
2445         int dcb_i;
2446
2447         /* Number of supported queues */
2448         switch (adapter->hw.mac.type) {
2449         case ixgbe_mac_82598EB:
2450                 dcb_i = adapter->ring_feature[RING_F_DCB].indices;
2451                 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2452                 txr_idx = 0;
2453                 rxr_idx = 0;
2454                 feature_mask |= IXGBE_FLAG_DCB_ENABLED;
2455                 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2456                 switch (adapter->flags & feature_mask) {
2457                 case (IXGBE_FLAG_RSS_ENABLED | IXGBE_FLAG_DCB_ENABLED):
2458                         for (i = 0; i < dcb_i; i++) {
2459                                 int j;
2460                                 /* Rx first */
2461                                 for (j = 0; j < adapter->num_rx_queues; j++) {
2462                                         adapter->rx_ring[rxr_idx].reg_idx =
2463                                                 i << 3 | j;
2464                                         rxr_idx++;
2465                                 }
2466                                 /* Tx now */
2467                                 for (j = 0; j < adapter->num_tx_queues; j++) {
2468                                         adapter->tx_ring[txr_idx].reg_idx =
2469                                                 i << 2 | (j >> 1);
2470                                         if (j & 1)
2471                                                 txr_idx++;
2472                                 }
2473                         }
2474                 case (IXGBE_FLAG_DCB_ENABLED):
2475                         /* the number of queues is assumed to be symmetric */
2476                         for (i = 0; i < dcb_i; i++) {
2477                                 adapter->rx_ring[i].reg_idx = i << 3;
2478                                 adapter->tx_ring[i].reg_idx = i << 2;
2479                         }
2480                         break;
2481                 case (IXGBE_FLAG_RSS_ENABLED):
2482                         for (i = 0; i < adapter->num_rx_queues; i++)
2483                                 adapter->rx_ring[i].reg_idx = i;
2484                         for (i = 0; i < adapter->num_tx_queues; i++)
2485                                 adapter->tx_ring[i].reg_idx = i;
2486                         break;
2487                 case 0:
2488                 default:
2489                         break;
2490                 }
2491                 break;
2492         default:
2493                 break;
2494         }
2495 }
2496
2497 /**
2498  * ixgbe_alloc_queues - Allocate memory for all rings
2499  * @adapter: board private structure to initialize
2500  *
2501  * We allocate one ring per queue at run-time since we don't know the
2502  * number of queues at compile-time.
2503  **/
2504 static int ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
2505 {
2506         int i;
2507
2508         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
2509                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2510         if (!adapter->tx_ring)
2511                 goto err_tx_ring_allocation;
2512
2513         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
2514                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2515         if (!adapter->rx_ring)
2516                 goto err_rx_ring_allocation;
2517
2518         for (i = 0; i < adapter->num_tx_queues; i++) {
2519                 adapter->tx_ring[i].count = adapter->tx_ring_count;
2520                 adapter->tx_ring[i].queue_index = i;
2521         }
2522
2523         for (i = 0; i < adapter->num_rx_queues; i++) {
2524                 adapter->rx_ring[i].count = adapter->rx_ring_count;
2525                 adapter->rx_ring[i].queue_index = i;
2526         }
2527
2528         ixgbe_cache_ring_register(adapter);
2529
2530         return 0;
2531
2532 err_rx_ring_allocation:
2533         kfree(adapter->tx_ring);
2534 err_tx_ring_allocation:
2535         return -ENOMEM;
2536 }
2537
2538 /**
2539  * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2540  * @adapter: board private structure to initialize
2541  *
2542  * Attempt to configure the interrupts using the best available
2543  * capabilities of the hardware and the kernel.
2544  **/
2545 static int ixgbe_set_interrupt_capability(struct ixgbe_adapter *adapter)
2546 {
2547         int err = 0;
2548         int vector, v_budget;
2549
2550         /*
2551          * It's easy to be greedy for MSI-X vectors, but it really
2552          * doesn't do us much good if we have a lot more vectors
2553          * than CPU's.  So let's be conservative and only ask for
2554          * (roughly) twice the number of vectors as there are CPU's.
2555          */
2556         v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2557                        (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2558
2559         /*
2560          * At the same time, hardware can only support a maximum of
2561          * MAX_MSIX_COUNT vectors.  With features such as RSS and VMDq,
2562          * we can easily reach upwards of 64 Rx descriptor queues and
2563          * 32 Tx queues.  Thus, we cap it off in those rare cases where
2564          * the cpu count also exceeds our vector limit.
2565          */
2566         v_budget = min(v_budget, MAX_MSIX_COUNT);
2567
2568         /* A failure in MSI-X entry allocation isn't fatal, but it does
2569          * mean we disable MSI-X capabilities of the adapter. */
2570         adapter->msix_entries = kcalloc(v_budget,
2571                                         sizeof(struct msix_entry), GFP_KERNEL);
2572         if (!adapter->msix_entries) {
2573                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
2574                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2575                 ixgbe_set_num_queues(adapter);
2576                 kfree(adapter->tx_ring);
2577                 kfree(adapter->rx_ring);
2578                 err = ixgbe_alloc_queues(adapter);
2579                 if (err) {
2580                         DPRINTK(PROBE, ERR, "Unable to allocate memory "
2581                                 "for queues\n");
2582                         goto out;
2583                 }
2584
2585                 goto try_msi;
2586         }
2587
2588         for (vector = 0; vector < v_budget; vector++)
2589                 adapter->msix_entries[vector].entry = vector;
2590
2591         ixgbe_acquire_msix_vectors(adapter, v_budget);
2592
2593         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2594                 goto out;
2595
2596 try_msi:
2597         err = pci_enable_msi(adapter->pdev);
2598         if (!err) {
2599                 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
2600         } else {
2601                 DPRINTK(HW, DEBUG, "Unable to allocate MSI interrupt, "
2602                         "falling back to legacy.  Error: %d\n", err);
2603                 /* reset err */
2604                 err = 0;
2605         }
2606
2607 out:
2608         /* Notify the stack of the (possibly) reduced Tx Queue count. */
2609         adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
2610
2611         return err;
2612 }
2613
2614 void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter)
2615 {
2616         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2617                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2618                 pci_disable_msix(adapter->pdev);
2619                 kfree(adapter->msix_entries);
2620                 adapter->msix_entries = NULL;
2621         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
2622                 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
2623                 pci_disable_msi(adapter->pdev);
2624         }
2625         return;
2626 }
2627
2628 /**
2629  * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
2630  * @adapter: board private structure to initialize
2631  *
2632  * We determine which interrupt scheme to use based on...
2633  * - Kernel support (MSI, MSI-X)
2634  *   - which can be user-defined (via MODULE_PARAM)
2635  * - Hardware queue count (num_*_queues)
2636  *   - defined by miscellaneous hardware support/features (RSS, etc.)
2637  **/
2638 int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter)
2639 {
2640         int err;
2641
2642         /* Number of supported queues */
2643         ixgbe_set_num_queues(adapter);
2644
2645         err = ixgbe_alloc_queues(adapter);
2646         if (err) {
2647                 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
2648                 goto err_alloc_queues;
2649         }
2650
2651         err = ixgbe_set_interrupt_capability(adapter);
2652         if (err) {
2653                 DPRINTK(PROBE, ERR, "Unable to setup interrupt capabilities\n");
2654                 goto err_set_interrupt;
2655         }
2656
2657         DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, "
2658                 "Tx Queue count = %u\n",
2659                 (adapter->num_rx_queues > 1) ? "Enabled" :
2660                 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2661
2662         set_bit(__IXGBE_DOWN, &adapter->state);
2663
2664         return 0;
2665
2666 err_set_interrupt:
2667         kfree(adapter->tx_ring);
2668         kfree(adapter->rx_ring);
2669 err_alloc_queues:
2670         return err;
2671 }
2672
2673 /**
2674  * ixgbe_sfp_timer - worker thread to find a missing module
2675  * @data: pointer to our adapter struct
2676  **/
2677 static void ixgbe_sfp_timer(unsigned long data)
2678 {
2679         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
2680
2681         /* Do the sfp_timer outside of interrupt context due to the
2682          * delays that sfp+ detection requires
2683          */
2684         schedule_work(&adapter->sfp_task);
2685 }
2686
2687 /**
2688  * ixgbe_sfp_task - worker thread to find a missing module
2689  * @work: pointer to work_struct containing our data
2690  **/
2691 static void ixgbe_sfp_task(struct work_struct *work)
2692 {
2693         struct ixgbe_adapter *adapter = container_of(work,
2694                                                      struct ixgbe_adapter,
2695                                                      sfp_task);
2696         struct ixgbe_hw *hw = &adapter->hw;
2697
2698         if ((hw->phy.type == ixgbe_phy_nl) &&
2699             (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) {
2700                 s32 ret = hw->phy.ops.identify_sfp(hw);
2701                 if (ret)
2702                         goto reschedule;
2703                 ret = hw->phy.ops.reset(hw);
2704                 if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) {
2705                         DPRINTK(PROBE, ERR, "failed to initialize because an "
2706                                 "unsupported SFP+ module type was detected.\n"
2707                                 "Reload the driver after installing a "
2708                                 "supported module.\n");
2709                         unregister_netdev(adapter->netdev);
2710                 } else {
2711                         DPRINTK(PROBE, INFO, "detected SFP+: %d\n",
2712                                 hw->phy.sfp_type);
2713                 }
2714                 /* don't need this routine any more */
2715                 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
2716         }
2717         return;
2718 reschedule:
2719         if (test_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state))
2720                 mod_timer(&adapter->sfp_timer,
2721                           round_jiffies(jiffies + (2 * HZ)));
2722 }
2723
2724 /**
2725  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
2726  * @adapter: board private structure to initialize
2727  *
2728  * ixgbe_sw_init initializes the Adapter private data structure.
2729  * Fields are initialized based on PCI device information and
2730  * OS network device settings (MTU size).
2731  **/
2732 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
2733 {
2734         struct ixgbe_hw *hw = &adapter->hw;
2735         struct pci_dev *pdev = adapter->pdev;
2736         unsigned int rss;
2737 #ifdef CONFIG_IXGBE_DCB
2738         int j;
2739         struct tc_configuration *tc;
2740 #endif
2741
2742         /* PCI config space info */
2743
2744         hw->vendor_id = pdev->vendor;
2745         hw->device_id = pdev->device;
2746         hw->revision_id = pdev->revision;
2747         hw->subsystem_vendor_id = pdev->subsystem_vendor;
2748         hw->subsystem_device_id = pdev->subsystem_device;
2749
2750         /* Set capability flags */
2751         rss = min(IXGBE_MAX_RSS_INDICES, (int)num_online_cpus());
2752         adapter->ring_feature[RING_F_RSS].indices = rss;
2753         adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
2754         adapter->ring_feature[RING_F_DCB].indices = IXGBE_MAX_DCB_INDICES;
2755         adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82598;
2756
2757 #ifdef CONFIG_IXGBE_DCB
2758         /* Configure DCB traffic classes */
2759         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
2760                 tc = &adapter->dcb_cfg.tc_config[j];
2761                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
2762                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
2763                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
2764                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
2765                 tc->dcb_pfc = pfc_disabled;
2766         }
2767         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
2768         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
2769         adapter->dcb_cfg.rx_pba_cfg = pba_equal;
2770         adapter->dcb_cfg.round_robin_enable = false;
2771         adapter->dcb_set_bitmap = 0x00;
2772         ixgbe_copy_dcb_cfg(&adapter->dcb_cfg, &adapter->temp_dcb_cfg,
2773                            adapter->ring_feature[RING_F_DCB].indices);
2774
2775 #endif
2776         if (hw->mac.ops.get_media_type &&
2777             (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_copper))
2778                 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
2779
2780         /* default flow control settings */
2781         hw->fc.original_type = ixgbe_fc_none;
2782         hw->fc.type = ixgbe_fc_none;
2783         hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
2784         hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
2785         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
2786         hw->fc.send_xon = true;
2787
2788         /* select 10G link by default */
2789         hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
2790
2791         /* enable itr by default in dynamic mode */
2792         adapter->itr_setting = 1;
2793         adapter->eitr_param = 20000;
2794
2795         /* set defaults for eitr in MegaBytes */
2796         adapter->eitr_low = 10;
2797         adapter->eitr_high = 20;
2798
2799         /* set default ring sizes */
2800         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
2801         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
2802
2803         /* initialize eeprom parameters */
2804         if (ixgbe_init_eeprom_params_generic(hw)) {
2805                 dev_err(&pdev->dev, "EEPROM initialization failed\n");
2806                 return -EIO;
2807         }
2808
2809         /* enable rx csum by default */
2810         adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2811
2812         set_bit(__IXGBE_DOWN, &adapter->state);
2813
2814         return 0;
2815 }
2816
2817 /**
2818  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
2819  * @adapter: board private structure
2820  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
2821  *
2822  * Return 0 on success, negative on failure
2823  **/
2824 int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
2825                              struct ixgbe_ring *tx_ring)
2826 {
2827         struct pci_dev *pdev = adapter->pdev;
2828         int size;
2829
2830         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2831         tx_ring->tx_buffer_info = vmalloc(size);
2832         if (!tx_ring->tx_buffer_info)
2833                 goto err;
2834         memset(tx_ring->tx_buffer_info, 0, size);
2835
2836         /* round up to nearest 4K */
2837         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc) +
2838                         sizeof(u32);
2839         tx_ring->size = ALIGN(tx_ring->size, 4096);
2840
2841         tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
2842                                              &tx_ring->dma);
2843         if (!tx_ring->desc)
2844                 goto err;
2845
2846         tx_ring->next_to_use = 0;
2847         tx_ring->next_to_clean = 0;
2848         tx_ring->work_limit = tx_ring->count;
2849         return 0;
2850
2851 err:
2852         vfree(tx_ring->tx_buffer_info);
2853         tx_ring->tx_buffer_info = NULL;
2854         DPRINTK(PROBE, ERR, "Unable to allocate memory for the transmit "
2855                             "descriptor ring\n");
2856         return -ENOMEM;
2857 }
2858
2859 /**
2860  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
2861  * @adapter: board private structure
2862  *
2863  * If this function returns with an error, then it's possible one or
2864  * more of the rings is populated (while the rest are not).  It is the
2865  * callers duty to clean those orphaned rings.
2866  *
2867  * Return 0 on success, negative on failure
2868  **/
2869 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
2870 {
2871         int i, err = 0;
2872
2873         for (i = 0; i < adapter->num_tx_queues; i++) {
2874                 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2875                 if (!err)
2876                         continue;
2877                 DPRINTK(PROBE, ERR, "Allocation for Tx Queue %u failed\n", i);
2878                 break;
2879         }
2880
2881         return err;
2882 }
2883
2884 /**
2885  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
2886  * @adapter: board private structure
2887  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
2888  *
2889  * Returns 0 on success, negative on failure
2890  **/
2891 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
2892                              struct ixgbe_ring *rx_ring)
2893 {
2894         struct pci_dev *pdev = adapter->pdev;
2895         int size;
2896
2897         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2898         rx_ring->rx_buffer_info = vmalloc(size);
2899         if (!rx_ring->rx_buffer_info) {
2900                 DPRINTK(PROBE, ERR,
2901                         "vmalloc allocation failed for the rx desc ring\n");
2902                 goto alloc_failed;
2903         }
2904         memset(rx_ring->rx_buffer_info, 0, size);
2905
2906         /* Round up to nearest 4K */
2907         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2908         rx_ring->size = ALIGN(rx_ring->size, 4096);
2909
2910         rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size, &rx_ring->dma);
2911
2912         if (!rx_ring->desc) {
2913                 DPRINTK(PROBE, ERR,
2914                         "Memory allocation failed for the rx desc ring\n");
2915                 vfree(rx_ring->rx_buffer_info);
2916                 goto alloc_failed;
2917         }
2918
2919         rx_ring->next_to_clean = 0;
2920         rx_ring->next_to_use = 0;
2921
2922         return 0;
2923
2924 alloc_failed:
2925         return -ENOMEM;
2926 }
2927
2928 /**
2929  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
2930  * @adapter: board private structure
2931  *
2932  * If this function returns with an error, then it's possible one or
2933  * more of the rings is populated (while the rest are not).  It is the
2934  * callers duty to clean those orphaned rings.
2935  *
2936  * Return 0 on success, negative on failure
2937  **/
2938
2939 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
2940 {
2941         int i, err = 0;
2942
2943         for (i = 0; i < adapter->num_rx_queues; i++) {
2944                 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2945                 if (!err)
2946                         continue;
2947                 DPRINTK(PROBE, ERR, "Allocation for Rx Queue %u failed\n", i);
2948                 break;
2949         }
2950
2951         return err;
2952 }
2953
2954 /**
2955  * ixgbe_free_tx_resources - Free Tx Resources per Queue
2956  * @adapter: board private structure
2957  * @tx_ring: Tx descriptor ring for a specific queue
2958  *
2959  * Free all transmit software resources
2960  **/
2961 void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
2962                              struct ixgbe_ring *tx_ring)
2963 {
2964         struct pci_dev *pdev = adapter->pdev;
2965
2966         ixgbe_clean_tx_ring(adapter, tx_ring);
2967
2968         vfree(tx_ring->tx_buffer_info);
2969         tx_ring->tx_buffer_info = NULL;
2970
2971         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2972
2973         tx_ring->desc = NULL;
2974 }
2975
2976 /**
2977  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
2978  * @adapter: board private structure
2979  *
2980  * Free all transmit software resources
2981  **/
2982 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
2983 {
2984         int i;
2985
2986         for (i = 0; i < adapter->num_tx_queues; i++)
2987                 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
2988 }
2989
2990 /**
2991  * ixgbe_free_rx_resources - Free Rx Resources
2992  * @adapter: board private structure
2993  * @rx_ring: ring to clean the resources from
2994  *
2995  * Free all receive software resources
2996  **/
2997 void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
2998                              struct ixgbe_ring *rx_ring)
2999 {
3000         struct pci_dev *pdev = adapter->pdev;
3001
3002         ixgbe_clean_rx_ring(adapter, rx_ring);
3003
3004         vfree(rx_ring->rx_buffer_info);
3005         rx_ring->rx_buffer_info = NULL;
3006
3007         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
3008
3009         rx_ring->desc = NULL;
3010 }
3011
3012 /**
3013  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
3014  * @adapter: board private structure
3015  *
3016  * Free all receive software resources
3017  **/
3018 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
3019 {
3020         int i;
3021
3022         for (i = 0; i < adapter->num_rx_queues; i++)
3023                 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
3024 }
3025
3026 /**
3027  * ixgbe_change_mtu - Change the Maximum Transfer Unit
3028  * @netdev: network interface device structure
3029  * @new_mtu: new value for maximum frame size
3030  *
3031  * Returns 0 on success, negative on failure
3032  **/
3033 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
3034 {
3035         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3036         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3037
3038         /* MTU < 68 is an error and causes problems on some kernels */
3039         if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
3040                 return -EINVAL;
3041
3042         DPRINTK(PROBE, INFO, "changing MTU from %d to %d\n",
3043                 netdev->mtu, new_mtu);
3044         /* must set new MTU before calling down or up */
3045         netdev->mtu = new_mtu;
3046
3047         if (netif_running(netdev))
3048                 ixgbe_reinit_locked(adapter);
3049
3050         return 0;
3051 }
3052
3053 /**
3054  * ixgbe_open - Called when a network interface is made active
3055  * @netdev: network interface device structure
3056  *
3057  * Returns 0 on success, negative value on failure
3058  *
3059  * The open entry point is called when a network interface is made
3060  * active by the system (IFF_UP).  At this point all resources needed
3061  * for transmit and receive operations are allocated, the interrupt
3062  * handler is registered with the OS, the watchdog timer is started,
3063  * and the stack is notified that the interface is ready.
3064  **/
3065 static int ixgbe_open(struct net_device *netdev)
3066 {
3067         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3068         int err;
3069
3070         /* disallow open during test */
3071         if (test_bit(__IXGBE_TESTING, &adapter->state))
3072                 return -EBUSY;
3073
3074         /* allocate transmit descriptors */
3075         err = ixgbe_setup_all_tx_resources(adapter);
3076         if (err)
3077                 goto err_setup_tx;
3078
3079         /* allocate receive descriptors */
3080         err = ixgbe_setup_all_rx_resources(adapter);
3081         if (err)
3082                 goto err_setup_rx;
3083
3084         ixgbe_configure(adapter);
3085
3086         err = ixgbe_request_irq(adapter);
3087         if (err)
3088                 goto err_req_irq;
3089
3090         err = ixgbe_up_complete(adapter);
3091         if (err)
3092                 goto err_up;
3093
3094         netif_tx_start_all_queues(netdev);
3095
3096         return 0;
3097
3098 err_up:
3099         ixgbe_release_hw_control(adapter);
3100         ixgbe_free_irq(adapter);
3101 err_req_irq:
3102         ixgbe_free_all_rx_resources(adapter);
3103 err_setup_rx:
3104         ixgbe_free_all_tx_resources(adapter);
3105 err_setup_tx:
3106         ixgbe_reset(adapter);
3107
3108         return err;
3109 }
3110
3111 /**
3112  * ixgbe_close - Disables a network interface
3113  * @netdev: network interface device structure
3114  *
3115  * Returns 0, this is not allowed to fail
3116  *
3117  * The close entry point is called when an interface is de-activated
3118  * by the OS.  The hardware is still under the drivers control, but
3119  * needs to be disabled.  A global MAC reset is issued to stop the
3120  * hardware, and all transmit and receive resources are freed.
3121  **/
3122 static int ixgbe_close(struct net_device *netdev)
3123 {
3124         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3125
3126         ixgbe_down(adapter);
3127         ixgbe_free_irq(adapter);
3128
3129         ixgbe_free_all_tx_resources(adapter);
3130         ixgbe_free_all_rx_resources(adapter);
3131
3132         ixgbe_release_hw_control(adapter);
3133
3134         return 0;
3135 }
3136
3137 /**
3138  * ixgbe_napi_add_all - prep napi structs for use
3139  * @adapter: private struct
3140  * helper function to napi_add each possible q_vector->napi
3141  */
3142 void ixgbe_napi_add_all(struct ixgbe_adapter *adapter)
3143 {
3144         int q_idx, q_vectors;
3145         struct net_device *netdev = adapter->netdev;
3146         int (*poll)(struct napi_struct *, int);
3147
3148         /* check if we already have our netdev->napi_list populated */
3149         if (&netdev->napi_list != netdev->napi_list.next)
3150                 return;
3151
3152         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3153                 poll = &ixgbe_clean_rxonly;
3154                 /* Only enable as many vectors as we have rx queues. */
3155                 q_vectors = adapter->num_rx_queues;
3156         } else {
3157                 poll = &ixgbe_poll;
3158                 /* only one q_vector for legacy modes */
3159                 q_vectors = 1;
3160         }
3161
3162         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
3163                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[q_idx];
3164                 netif_napi_add(adapter->netdev, &q_vector->napi, (*poll), 64);
3165         }
3166 }
3167
3168 void ixgbe_napi_del_all(struct ixgbe_adapter *adapter)
3169 {
3170         int q_idx;
3171         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3172
3173         /* legacy and MSI only use one vector */
3174         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
3175                 q_vectors = 1;
3176
3177         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
3178                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[q_idx];
3179                 if (!q_vector->rxr_count)
3180                         continue;
3181                 netif_napi_del(&q_vector->napi);
3182         }
3183 }
3184
3185 #ifdef CONFIG_PM
3186 static int ixgbe_resume(struct pci_dev *pdev)
3187 {
3188         struct net_device *netdev = pci_get_drvdata(pdev);
3189         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3190         u32 err;
3191
3192         pci_set_power_state(pdev, PCI_D0);
3193         pci_restore_state(pdev);
3194         err = pci_enable_device(pdev);
3195         if (err) {
3196                 printk(KERN_ERR "ixgbe: Cannot enable PCI device from "
3197                                 "suspend\n");
3198                 return err;
3199         }
3200         pci_set_master(pdev);
3201
3202         pci_enable_wake(pdev, PCI_D3hot, 0);
3203         pci_enable_wake(pdev, PCI_D3cold, 0);
3204
3205         err = ixgbe_init_interrupt_scheme(adapter);
3206         if (err) {
3207                 printk(KERN_ERR "ixgbe: Cannot initialize interrupts for "
3208                                 "device\n");
3209                 return err;
3210         }
3211
3212         ixgbe_napi_add_all(adapter);
3213         ixgbe_reset(adapter);
3214
3215         if (netif_running(netdev)) {
3216                 err = ixgbe_open(adapter->netdev);
3217                 if (err)
3218                         return err;
3219         }
3220
3221         netif_device_attach(netdev);
3222
3223         return 0;
3224 }
3225
3226 #endif /* CONFIG_PM */
3227 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
3228 {
3229         struct net_device *netdev = pci_get_drvdata(pdev);
3230         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3231 #ifdef CONFIG_PM
3232         int retval = 0;
3233 #endif
3234
3235         netif_device_detach(netdev);
3236
3237         if (netif_running(netdev)) {
3238                 ixgbe_down(adapter);
3239                 ixgbe_free_irq(adapter);
3240                 ixgbe_free_all_tx_resources(adapter);
3241                 ixgbe_free_all_rx_resources(adapter);
3242         }
3243         ixgbe_reset_interrupt_capability(adapter);
3244         ixgbe_napi_del_all(adapter);
3245         INIT_LIST_HEAD(&netdev->napi_list);
3246         kfree(adapter->tx_ring);
3247         kfree(adapter->rx_ring);
3248
3249 #ifdef CONFIG_PM
3250         retval = pci_save_state(pdev);
3251         if (retval)
3252                 return retval;
3253 #endif
3254
3255         pci_enable_wake(pdev, PCI_D3hot, 0);
3256         pci_enable_wake(pdev, PCI_D3cold, 0);
3257
3258         ixgbe_release_hw_control(adapter);
3259
3260         pci_disable_device(pdev);
3261
3262         pci_set_power_state(pdev, pci_choose_state(pdev, state));
3263
3264         return 0;
3265 }
3266
3267 static void ixgbe_shutdown(struct pci_dev *pdev)
3268 {
3269         ixgbe_suspend(pdev, PMSG_SUSPEND);
3270 }
3271
3272 /**
3273  * ixgbe_update_stats - Update the board statistics counters.
3274  * @adapter: board private structure
3275  **/
3276 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
3277 {
3278         struct ixgbe_hw *hw = &adapter->hw;
3279         u64 total_mpc = 0;
3280         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
3281
3282         adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
3283         for (i = 0; i < 8; i++) {
3284                 /* for packet buffers not used, the register should read 0 */
3285                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
3286                 missed_rx += mpc;
3287                 adapter->stats.mpc[i] += mpc;
3288                 total_mpc += adapter->stats.mpc[i];
3289                 adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
3290                 adapter->stats.qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
3291                 adapter->stats.qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
3292                 adapter->stats.qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
3293                 adapter->stats.qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
3294                 adapter->stats.pxonrxc[i] += IXGBE_READ_REG(hw,
3295                                                             IXGBE_PXONRXC(i));
3296                 adapter->stats.pxontxc[i] += IXGBE_READ_REG(hw,
3297                                                             IXGBE_PXONTXC(i));
3298                 adapter->stats.pxoffrxc[i] += IXGBE_READ_REG(hw,
3299                                                             IXGBE_PXOFFRXC(i));
3300                 adapter->stats.pxofftxc[i] += IXGBE_READ_REG(hw,
3301                                                             IXGBE_PXOFFTXC(i));
3302         }
3303         adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
3304         /* work around hardware counting issue */
3305         adapter->stats.gprc -= missed_rx;
3306
3307         /* 82598 hardware only has a 32 bit counter in the high register */
3308         adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
3309         adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
3310         adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
3311         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
3312         adapter->stats.bprc += bprc;
3313         adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
3314         adapter->stats.mprc -= bprc;
3315         adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
3316         adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
3317         adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
3318         adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
3319         adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
3320         adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
3321         adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
3322         adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
3323         adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
3324         adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
3325         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
3326         adapter->stats.lxontxc += lxon;
3327         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
3328         adapter->stats.lxofftxc += lxoff;
3329         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
3330         adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
3331         adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
3332         /*
3333          * 82598 errata - tx of flow control packets is included in tx counters
3334          */
3335         xon_off_tot = lxon + lxoff;
3336         adapter->stats.gptc -= xon_off_tot;
3337         adapter->stats.mptc -= xon_off_tot;
3338         adapter->stats.gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
3339         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
3340         adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
3341         adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
3342         adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
3343         adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
3344         adapter->stats.ptc64 -= xon_off_tot;
3345         adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
3346         adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
3347         adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
3348         adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
3349         adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
3350         adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
3351
3352         /* Fill out the OS statistics structure */
3353         adapter->net_stats.multicast = adapter->stats.mprc;
3354
3355         /* Rx Errors */
3356         adapter->net_stats.rx_errors = adapter->stats.crcerrs +
3357                                        adapter->stats.rlec;
3358         adapter->net_stats.rx_dropped = 0;
3359         adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3360         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3361         adapter->net_stats.rx_missed_errors = total_mpc;
3362 }
3363
3364 /**
3365  * ixgbe_watchdog - Timer Call-back
3366  * @data: pointer to adapter cast into an unsigned long
3367  **/
3368 static void ixgbe_watchdog(unsigned long data)
3369 {
3370         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
3371         struct ixgbe_hw *hw = &adapter->hw;
3372
3373         /* Do the watchdog outside of interrupt context due to the lovely
3374          * delays that some of the newer hardware requires */
3375         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
3376                 /* Cause software interrupt to ensure rx rings are cleaned */
3377                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3378                         u32 eics =
3379                          (1 << (adapter->num_msix_vectors - NON_Q_VECTORS)) - 1;
3380                         IXGBE_WRITE_REG(hw, IXGBE_EICS, eics);
3381                 } else {
3382                         /* For legacy and MSI interrupts don't set any bits that
3383                          * are enabled for EIAM, because this operation would
3384                          * set *both* EIMS and EICS for any bit in EIAM */
3385                         IXGBE_WRITE_REG(hw, IXGBE_EICS,
3386                                     (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
3387                 }
3388                 /* Reset the timer */
3389                 mod_timer(&adapter->watchdog_timer,
3390                           round_jiffies(jiffies + 2 * HZ));
3391         }
3392
3393         schedule_work(&adapter->watchdog_task);
3394 }
3395
3396 /**
3397  * ixgbe_watchdog_task - worker thread to bring link up
3398  * @work: pointer to work_struct containing our data
3399  **/
3400 static void ixgbe_watchdog_task(struct work_struct *work)
3401 {
3402         struct ixgbe_adapter *adapter = container_of(work,
3403                                                      struct ixgbe_adapter,
3404                                                      watchdog_task);
3405         struct net_device *netdev = adapter->netdev;
3406         struct ixgbe_hw *hw = &adapter->hw;
3407         u32 link_speed = adapter->link_speed;
3408         bool link_up = adapter->link_up;
3409
3410         adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
3411
3412         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) {
3413                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
3414                 if (link_up ||
3415                     time_after(jiffies, (adapter->link_check_timeout +
3416                                          IXGBE_TRY_LINK_TIMEOUT))) {
3417                         IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
3418                         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
3419                 }
3420                 adapter->link_up = link_up;
3421                 adapter->link_speed = link_speed;
3422         }
3423
3424         if (link_up) {
3425                 if (!netif_carrier_ok(netdev)) {
3426                         u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3427                         u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
3428 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
3429 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
3430                         printk(KERN_INFO "ixgbe: %s NIC Link is Up %s, "
3431                                "Flow Control: %s\n",
3432                                netdev->name,
3433                                (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
3434                                 "10 Gbps" :
3435                                 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
3436                                  "1 Gbps" : "unknown speed")),
3437                                ((FLOW_RX && FLOW_TX) ? "RX/TX" :
3438                                 (FLOW_RX ? "RX" :
3439                                 (FLOW_TX ? "TX" : "None"))));
3440
3441                         netif_carrier_on(netdev);
3442                 } else {
3443                         /* Force detection of hung controller */
3444                         adapter->detect_tx_hung = true;
3445                 }
3446         } else {
3447                 adapter->link_up = false;
3448                 adapter->link_speed = 0;
3449                 if (netif_carrier_ok(netdev)) {
3450                         printk(KERN_INFO "ixgbe: %s NIC Link is Down\n",
3451                                netdev->name);
3452                         netif_carrier_off(netdev);
3453                 }
3454         }
3455
3456         ixgbe_update_stats(adapter);
3457         adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
3458 }
3459
3460 static int ixgbe_tso(struct ixgbe_adapter *adapter,
3461                      struct ixgbe_ring *tx_ring, struct sk_buff *skb,
3462                      u32 tx_flags, u8 *hdr_len)
3463 {
3464         struct ixgbe_adv_tx_context_desc *context_desc;
3465         unsigned int i;
3466         int err;
3467         struct ixgbe_tx_buffer *tx_buffer_info;
3468         u32 vlan_macip_lens = 0, type_tucmd_mlhl;
3469         u32 mss_l4len_idx, l4len;
3470
3471         if (skb_is_gso(skb)) {
3472                 if (skb_header_cloned(skb)) {
3473                         err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3474                         if (err)
3475                                 return err;
3476                 }
3477                 l4len = tcp_hdrlen(skb);
3478                 *hdr_len += l4len;
3479
3480                 if (skb->protocol == htons(ETH_P_IP)) {
3481                         struct iphdr *iph = ip_hdr(skb);
3482                         iph->tot_len = 0;
3483                         iph->check = 0;
3484                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3485                                                                  iph->daddr, 0,
3486                                                                  IPPROTO_TCP,
3487                                                                  0);
3488                         adapter->hw_tso_ctxt++;
3489                 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3490                         ipv6_hdr(skb)->payload_len = 0;
3491                         tcp_hdr(skb)->check =
3492                             ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3493                                              &ipv6_hdr(skb)->daddr,
3494                                              0, IPPROTO_TCP, 0);
3495                         adapter->hw_tso6_ctxt++;
3496                 }
3497
3498                 i = tx_ring->next_to_use;
3499
3500                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3501                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3502
3503                 /* VLAN MACLEN IPLEN */
3504                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3505                         vlan_macip_lens |=
3506                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3507                 vlan_macip_lens |= ((skb_network_offset(skb)) <<
3508                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3509                 *hdr_len += skb_network_offset(skb);
3510                 vlan_macip_lens |=
3511                     (skb_transport_header(skb) - skb_network_header(skb));
3512                 *hdr_len +=
3513                     (skb_transport_header(skb) - skb_network_header(skb));
3514                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3515                 context_desc->seqnum_seed = 0;
3516
3517                 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3518                 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
3519                                    IXGBE_ADVTXD_DTYP_CTXT);
3520
3521                 if (skb->protocol == htons(ETH_P_IP))
3522                         type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3523                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
3524                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3525
3526                 /* MSS L4LEN IDX */
3527                 mss_l4len_idx =
3528                     (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
3529                 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
3530                 /* use index 1 for TSO */
3531                 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3532                 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3533
3534                 tx_buffer_info->time_stamp = jiffies;
3535                 tx_buffer_info->next_to_watch = i;
3536
3537                 i++;
3538                 if (i == tx_ring->count)
3539                         i = 0;
3540                 tx_ring->next_to_use = i;
3541
3542                 return true;
3543         }
3544         return false;
3545 }
3546
3547 static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
3548                           struct ixgbe_ring *tx_ring,
3549                           struct sk_buff *skb, u32 tx_flags)
3550 {
3551         struct ixgbe_adv_tx_context_desc *context_desc;
3552         unsigned int i;
3553         struct ixgbe_tx_buffer *tx_buffer_info;
3554         u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
3555
3556         if (skb->ip_summed == CHECKSUM_PARTIAL ||
3557             (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
3558                 i = tx_ring->next_to_use;
3559                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3560                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3561
3562                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3563                         vlan_macip_lens |=
3564                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3565                 vlan_macip_lens |= (skb_network_offset(skb) <<
3566                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3567                 if (skb->ip_summed == CHECKSUM_PARTIAL)
3568                         vlan_macip_lens |= (skb_transport_header(skb) -
3569                                             skb_network_header(skb));
3570
3571                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3572                 context_desc->seqnum_seed = 0;
3573
3574                 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
3575                                     IXGBE_ADVTXD_DTYP_CTXT);
3576
3577                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3578                         switch (skb->protocol) {
3579                         case cpu_to_be16(ETH_P_IP):
3580                                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3581                                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3582                                         type_tucmd_mlhl |=
3583                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3584                                 break;
3585                         case cpu_to_be16(ETH_P_IPV6):
3586                                 /* XXX what about other V6 headers?? */
3587                                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3588                                         type_tucmd_mlhl |=
3589                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3590                                 break;
3591                         default:
3592                                 if (unlikely(net_ratelimit())) {
3593                                         DPRINTK(PROBE, WARNING,
3594                                          "partial checksum but proto=%x!\n",
3595                                          skb->protocol);
3596                                 }
3597                                 break;
3598                         }
3599                 }
3600
3601                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3602                 /* use index zero for tx checksum offload */
3603                 context_desc->mss_l4len_idx = 0;
3604
3605                 tx_buffer_info->time_stamp = jiffies;
3606                 tx_buffer_info->next_to_watch = i;
3607
3608                 adapter->hw_csum_tx_good++;
3609                 i++;
3610                 if (i == tx_ring->count)
3611                         i = 0;
3612                 tx_ring->next_to_use = i;
3613
3614                 return true;
3615         }
3616
3617         return false;
3618 }
3619
3620 static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
3621                         struct ixgbe_ring *tx_ring,
3622                         struct sk_buff *skb, unsigned int first)
3623 {
3624         struct ixgbe_tx_buffer *tx_buffer_info;
3625         unsigned int len = skb->len;
3626         unsigned int offset = 0, size, count = 0, i;
3627         unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
3628         unsigned int f;
3629
3630         len -= skb->data_len;
3631
3632         i = tx_ring->next_to_use;
3633
3634         while (len) {
3635                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3636                 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3637
3638                 tx_buffer_info->length = size;
3639                 tx_buffer_info->dma = pci_map_single(adapter->pdev,
3640                                                      skb->data + offset,
3641                                                      size, PCI_DMA_TODEVICE);
3642                 tx_buffer_info->time_stamp = jiffies;
3643                 tx_buffer_info->next_to_watch = i;
3644
3645                 len -= size;
3646                 offset += size;
3647                 count++;
3648                 i++;
3649                 if (i == tx_ring->count)
3650                         i = 0;
3651         }
3652
3653         for (f = 0; f < nr_frags; f++) {
3654                 struct skb_frag_struct *frag;
3655
3656                 frag = &skb_shinfo(skb)->frags[f];
3657                 len = frag->size;
3658                 offset = frag->page_offset;
3659
3660                 while (len) {
3661                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
3662                         size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3663
3664                         tx_buffer_info->length = size;
3665                         tx_buffer_info->dma = pci_map_page(adapter->pdev,
3666                                                            frag->page,
3667                                                            offset,
3668                                                            size,
3669                                                            PCI_DMA_TODEVICE);
3670                         tx_buffer_info->time_stamp = jiffies;
3671                         tx_buffer_info->next_to_watch = i;
3672
3673                         len -= size;
3674                         offset += size;
3675                         count++;
3676                         i++;
3677                         if (i == tx_ring->count)
3678                                 i = 0;
3679                 }
3680         }
3681         if (i == 0)
3682                 i = tx_ring->count - 1;
3683         else
3684                 i = i - 1;
3685         tx_ring->tx_buffer_info[i].skb = skb;
3686         tx_ring->tx_buffer_info[first].next_to_watch = i;
3687
3688         return count;
3689 }
3690
3691 static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
3692                            struct ixgbe_ring *tx_ring,
3693                            int tx_flags, int count, u32 paylen, u8 hdr_len)
3694 {
3695         union ixgbe_adv_tx_desc *tx_desc = NULL;
3696         struct ixgbe_tx_buffer *tx_buffer_info;
3697         u32 olinfo_status = 0, cmd_type_len = 0;
3698         unsigned int i;
3699         u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3700
3701         cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3702
3703         cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3704
3705         if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3706                 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3707
3708         if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3709                 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3710
3711                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3712                                  IXGBE_ADVTXD_POPTS_SHIFT;
3713
3714                 /* use index 1 context for tso */
3715                 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3716                 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3717                         olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3718                                          IXGBE_ADVTXD_POPTS_SHIFT;
3719
3720         } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3721                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3722                                  IXGBE_ADVTXD_POPTS_SHIFT;
3723
3724         olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3725
3726         i = tx_ring->next_to_use;
3727         while (count--) {
3728                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3729                 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3730                 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3731                 tx_desc->read.cmd_type_len =
3732                         cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3733                 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3734                 i++;
3735                 if (i == tx_ring->count)
3736                         i = 0;
3737         }
3738
3739         tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3740
3741         /*
3742          * Force memory writes to complete before letting h/w
3743          * know there are new descriptors to fetch.  (Only
3744          * applicable for weak-ordered memory model archs,
3745          * such as IA-64).
3746          */
3747         wmb();
3748
3749         tx_ring->next_to_use = i;
3750         writel(i, adapter->hw.hw_addr + tx_ring->tail);
3751 }
3752
3753 static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
3754                                  struct ixgbe_ring *tx_ring, int size)
3755 {
3756         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3757
3758         netif_stop_subqueue(netdev, tx_ring->queue_index);
3759         /* Herbert's original patch had:
3760          *  smp_mb__after_netif_stop_queue();
3761          * but since that doesn't exist yet, just open code it. */
3762         smp_mb();
3763
3764         /* We need to check again in a case another CPU has just
3765          * made room available. */
3766         if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3767                 return -EBUSY;
3768
3769         /* A reprieve! - use start_queue because it doesn't call schedule */
3770         netif_start_subqueue(netdev, tx_ring->queue_index);
3771         ++adapter->restart_queue;
3772         return 0;
3773 }
3774
3775 static int ixgbe_maybe_stop_tx(struct net_device *netdev,
3776                               struct ixgbe_ring *tx_ring, int size)
3777 {
3778         if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3779                 return 0;
3780         return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
3781 }
3782
3783 static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3784 {
3785         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3786         struct ixgbe_ring *tx_ring;
3787         unsigned int first;
3788         unsigned int tx_flags = 0;
3789         u8 hdr_len = 0;
3790         int r_idx = 0, tso;
3791         int count = 0;
3792         unsigned int f;
3793
3794         r_idx = (adapter->num_tx_queues - 1) & skb->queue_mapping;
3795         tx_ring = &adapter->tx_ring[r_idx];
3796
3797         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3798                 tx_flags |= vlan_tx_tag_get(skb);
3799                 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
3800                         tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
3801                         tx_flags |= (skb->queue_mapping << 13);
3802                 }
3803                 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3804                 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3805         } else if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
3806                 tx_flags |= (skb->queue_mapping << 13);
3807                 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3808                 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3809         }
3810         /* three things can cause us to need a context descriptor */
3811         if (skb_is_gso(skb) ||
3812             (skb->ip_summed == CHECKSUM_PARTIAL) ||
3813             (tx_flags & IXGBE_TX_FLAGS_VLAN))
3814                 count++;
3815
3816         count += TXD_USE_COUNT(skb_headlen(skb));
3817         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3818                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3819
3820         if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
3821                 adapter->tx_busy++;
3822                 return NETDEV_TX_BUSY;
3823         }
3824
3825         if (skb->protocol == htons(ETH_P_IP))
3826                 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3827         first = tx_ring->next_to_use;
3828         tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3829         if (tso < 0) {
3830                 dev_kfree_skb_any(skb);
3831                 return NETDEV_TX_OK;
3832         }
3833
3834         if (tso)
3835                 tx_flags |= IXGBE_TX_FLAGS_TSO;
3836         else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3837                  (skb->ip_summed == CHECKSUM_PARTIAL))
3838                 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3839
3840         ixgbe_tx_queue(adapter, tx_ring, tx_flags,
3841                        ixgbe_tx_map(adapter, tx_ring, skb, first),
3842                        skb->len, hdr_len);
3843
3844         netdev->trans_start = jiffies;
3845
3846         ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3847
3848         return NETDEV_TX_OK;
3849 }
3850
3851 /**
3852  * ixgbe_get_stats - Get System Network Statistics
3853  * @netdev: network interface device structure
3854  *
3855  * Returns the address of the device statistics structure.
3856  * The statistics are actually updated from the timer callback.
3857  **/
3858 static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
3859 {
3860         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3861
3862         /* only return the current stats */
3863         return &adapter->net_stats;
3864 }
3865
3866 /**
3867  * ixgbe_set_mac - Change the Ethernet Address of the NIC
3868  * @netdev: network interface device structure
3869  * @p: pointer to an address structure
3870  *
3871  * Returns 0 on success, negative on failure
3872  **/
3873 static int ixgbe_set_mac(struct net_device *netdev, void *p)
3874 {
3875         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3876         struct ixgbe_hw *hw = &adapter->hw;
3877         struct sockaddr *addr = p;
3878
3879         if (!is_valid_ether_addr(addr->sa_data))
3880                 return -EADDRNOTAVAIL;
3881
3882         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3883         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3884
3885         hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
3886
3887         return 0;
3888 }
3889
3890 #ifdef CONFIG_NET_POLL_CONTROLLER
3891 /*
3892  * Polling 'interrupt' - used by things like netconsole to send skbs
3893  * without having to re-enable interrupts. It's not called while
3894  * the interrupt routine is executing.
3895  */
3896 static void ixgbe_netpoll(struct net_device *netdev)
3897 {
3898         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3899
3900         disable_irq(adapter->pdev->irq);
3901         adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
3902         ixgbe_intr(adapter->pdev->irq, netdev);
3903         adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
3904         enable_irq(adapter->pdev->irq);
3905 }
3906 #endif
3907
3908 /**
3909  * ixgbe_link_config - set up initial link with default speed and duplex
3910  * @hw: pointer to private hardware struct
3911  *
3912  * Returns 0 on success, negative on failure
3913  **/
3914 static int ixgbe_link_config(struct ixgbe_hw *hw)
3915 {
3916         u32 autoneg;
3917         bool link_up = false;
3918         u32 ret = IXGBE_ERR_LINK_SETUP;
3919
3920         if (hw->mac.ops.check_link)
3921                 ret = hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
3922
3923         if (ret || !link_up)
3924                 goto link_cfg_out;
3925
3926         if (hw->mac.ops.get_link_capabilities)
3927                 ret = hw->mac.ops.get_link_capabilities(hw, &autoneg,
3928                                                         &hw->mac.autoneg);
3929         if (ret)
3930                 goto link_cfg_out;
3931
3932         if (hw->mac.ops.setup_link_speed)
3933                 ret = hw->mac.ops.setup_link_speed(hw, autoneg, true, true);
3934
3935 link_cfg_out:
3936         return ret;
3937 }
3938
3939 static const struct net_device_ops ixgbe_netdev_ops = {
3940         .ndo_open               = ixgbe_open,
3941         .ndo_stop               = ixgbe_close,
3942         .ndo_start_xmit         = ixgbe_xmit_frame,
3943         .ndo_get_stats          = ixgbe_get_stats,
3944         .ndo_set_multicast_list = ixgbe_set_rx_mode,
3945         .ndo_validate_addr      = eth_validate_addr,
3946         .ndo_set_mac_address    = ixgbe_set_mac,
3947         .ndo_change_mtu         = ixgbe_change_mtu,
3948         .ndo_tx_timeout         = ixgbe_tx_timeout,
3949         .ndo_vlan_rx_register   = ixgbe_vlan_rx_register,
3950         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
3951         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
3952 #ifdef CONFIG_NET_POLL_CONTROLLER
3953         .ndo_poll_controller    = ixgbe_netpoll,
3954 #endif
3955 };
3956
3957 /**
3958  * ixgbe_probe - Device Initialization Routine
3959  * @pdev: PCI device information struct
3960  * @ent: entry in ixgbe_pci_tbl
3961  *
3962  * Returns 0 on success, negative on failure
3963  *
3964  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
3965  * The OS initialization, configuring of the adapter private structure,
3966  * and a hardware reset occur.
3967  **/
3968 static int __devinit ixgbe_probe(struct pci_dev *pdev,
3969                                  const struct pci_device_id *ent)
3970 {
3971         struct net_device *netdev;
3972         struct ixgbe_adapter *adapter = NULL;
3973         struct ixgbe_hw *hw;
3974         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
3975         static int cards_found;
3976         int i, err, pci_using_dac;
3977         u16 link_status, link_speed, link_width;
3978         u32 part_num, eec;
3979
3980         err = pci_enable_device(pdev);
3981         if (err)
3982                 return err;
3983
3984         if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
3985             !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
3986                 pci_using_dac = 1;
3987         } else {
3988                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
3989                 if (err) {
3990                         err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
3991                         if (err) {
3992                                 dev_err(&pdev->dev, "No usable DMA "
3993                                         "configuration, aborting\n");
3994                                 goto err_dma;
3995                         }
3996                 }
3997                 pci_using_dac = 0;
3998         }
3999
4000         err = pci_request_regions(pdev, ixgbe_driver_name);
4001         if (err) {
4002                 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
4003                 goto err_pci_reg;
4004         }
4005
4006         err = pci_enable_pcie_error_reporting(pdev);
4007         if (err) {
4008                 dev_err(&pdev->dev, "pci_enable_pcie_error_reporting failed "
4009                                     "0x%x\n", err);
4010                 /* non-fatal, continue */
4011         }
4012
4013         pci_set_master(pdev);
4014         pci_save_state(pdev);
4015
4016         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), MAX_TX_QUEUES);
4017         if (!netdev) {
4018                 err = -ENOMEM;
4019                 goto err_alloc_etherdev;
4020         }
4021
4022         SET_NETDEV_DEV(netdev, &pdev->dev);
4023
4024         pci_set_drvdata(pdev, netdev);
4025         adapter = netdev_priv(netdev);
4026
4027         adapter->netdev = netdev;
4028         adapter->pdev = pdev;
4029         hw = &adapter->hw;
4030         hw->back = adapter;
4031         adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
4032
4033         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
4034                               pci_resource_len(pdev, 0));
4035         if (!hw->hw_addr) {
4036                 err = -EIO;
4037                 goto err_ioremap;
4038         }
4039
4040         for (i = 1; i <= 5; i++) {
4041                 if (pci_resource_len(pdev, i) == 0)
4042                         continue;
4043         }
4044
4045         netdev->netdev_ops = &ixgbe_netdev_ops;
4046         ixgbe_set_ethtool_ops(netdev);
4047         netdev->watchdog_timeo = 5 * HZ;
4048         strcpy(netdev->name, pci_name(pdev));
4049
4050         adapter->bd_number = cards_found;
4051
4052         /* Setup hw api */
4053         memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
4054         hw->mac.type  = ii->mac;
4055
4056         /* EEPROM */
4057         memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
4058         eec = IXGBE_READ_REG(hw, IXGBE_EEC);
4059         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
4060         if (!(eec & (1 << 8)))
4061                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
4062
4063         /* PHY */
4064         memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
4065         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
4066
4067         /* set up this timer and work struct before calling get_invariants
4068          * which might start the timer
4069          */
4070         init_timer(&adapter->sfp_timer);
4071         adapter->sfp_timer.function = &ixgbe_sfp_timer;
4072         adapter->sfp_timer.data = (unsigned long) adapter;
4073
4074         INIT_WORK(&adapter->sfp_task, ixgbe_sfp_task);
4075
4076         err = ii->get_invariants(hw);
4077         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
4078                 /* start a kernel thread to watch for a module to arrive */
4079                 set_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4080                 mod_timer(&adapter->sfp_timer,
4081                           round_jiffies(jiffies + (2 * HZ)));
4082                 err = 0;
4083         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
4084                 DPRINTK(PROBE, ERR, "failed to load because an "
4085                         "unsupported SFP+ module type was detected.\n");
4086                 goto err_hw_init;
4087         } else if (err) {
4088                 goto err_hw_init;
4089         }
4090
4091         /* setup the private structure */
4092         err = ixgbe_sw_init(adapter);
4093         if (err)
4094                 goto err_sw_init;
4095
4096         /* reset_hw fills in the perm_addr as well */
4097         err = hw->mac.ops.reset_hw(hw);
4098         if (err) {
4099                 dev_err(&adapter->pdev->dev, "HW Init failed: %d\n", err);
4100                 goto err_sw_init;
4101         }
4102
4103         netdev->features = NETIF_F_SG |
4104                            NETIF_F_IP_CSUM |
4105                            NETIF_F_HW_VLAN_TX |
4106                            NETIF_F_HW_VLAN_RX |
4107                            NETIF_F_HW_VLAN_FILTER;
4108
4109         netdev->features |= NETIF_F_IPV6_CSUM;
4110         netdev->features |= NETIF_F_TSO;
4111         netdev->features |= NETIF_F_TSO6;
4112         netdev->features |= NETIF_F_GRO;
4113
4114         netdev->vlan_features |= NETIF_F_TSO;
4115         netdev->vlan_features |= NETIF_F_TSO6;
4116         netdev->vlan_features |= NETIF_F_IP_CSUM;
4117         netdev->vlan_features |= NETIF_F_SG;
4118
4119         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
4120                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
4121
4122 #ifdef CONFIG_IXGBE_DCB
4123         netdev->dcbnl_ops = &dcbnl_ops;
4124 #endif
4125
4126         if (pci_using_dac)
4127                 netdev->features |= NETIF_F_HIGHDMA;
4128
4129         /* make sure the EEPROM is good */
4130         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
4131                 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
4132                 err = -EIO;
4133                 goto err_eeprom;
4134         }
4135
4136         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
4137         memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
4138
4139         if (ixgbe_validate_mac_addr(netdev->perm_addr)) {
4140                 dev_err(&pdev->dev, "invalid MAC address\n");
4141                 err = -EIO;
4142                 goto err_eeprom;
4143         }
4144
4145         init_timer(&adapter->watchdog_timer);
4146         adapter->watchdog_timer.function = &ixgbe_watchdog;
4147         adapter->watchdog_timer.data = (unsigned long)adapter;
4148
4149         INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
4150         INIT_WORK(&adapter->watchdog_task, ixgbe_watchdog_task);
4151
4152         err = ixgbe_init_interrupt_scheme(adapter);
4153         if (err)
4154                 goto err_sw_init;
4155
4156         /* print bus type/speed/width info */
4157         pci_read_config_word(pdev, IXGBE_PCI_LINK_STATUS, &link_status);
4158         link_speed = link_status & IXGBE_PCI_LINK_SPEED;
4159         link_width = link_status & IXGBE_PCI_LINK_WIDTH;
4160         dev_info(&pdev->dev, "(PCI Express:%s:%s) %pM\n",
4161                 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" :
4162                  (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" :
4163                  "Unknown"),
4164                 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" :
4165                  (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" :
4166                  (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" :
4167                  (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" :
4168                  "Unknown"),
4169                 netdev->dev_addr);
4170         ixgbe_read_pba_num_generic(hw, &part_num);
4171         dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4172                  hw->mac.type, hw->phy.type,
4173                  (part_num >> 8), (part_num & 0xff));
4174
4175         if (link_width <= IXGBE_PCI_LINK_WIDTH_4) {
4176                 dev_warn(&pdev->dev, "PCI-Express bandwidth available for "
4177                          "this card is not sufficient for optimal "
4178                          "performance.\n");
4179                 dev_warn(&pdev->dev, "For optimal performance a x8 "
4180                          "PCI-Express slot is required.\n");
4181         }
4182
4183         /* reset the hardware with the new settings */
4184         hw->mac.ops.start_hw(hw);
4185
4186         /* link_config depends on start_hw being called at least once */
4187         err = ixgbe_link_config(hw);
4188         if (err) {
4189                 dev_err(&pdev->dev, "setup_link_speed FAILED %d\n", err);
4190                 goto err_register;
4191         }
4192
4193         netif_carrier_off(netdev);
4194
4195         strcpy(netdev->name, "eth%d");
4196         err = register_netdev(netdev);
4197         if (err)
4198                 goto err_register;
4199
4200 #ifdef CONFIG_IXGBE_DCA
4201         if (dca_add_requester(&pdev->dev) == 0) {
4202                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
4203                 /* always use CB2 mode, difference is masked
4204                  * in the CB driver */
4205                 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
4206                 ixgbe_setup_dca(adapter);
4207         }
4208 #endif
4209
4210         dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
4211         cards_found++;
4212         return 0;
4213
4214 err_register:
4215         ixgbe_release_hw_control(adapter);
4216 err_hw_init:
4217 err_sw_init:
4218         ixgbe_reset_interrupt_capability(adapter);
4219 err_eeprom:
4220         clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4221         del_timer_sync(&adapter->sfp_timer);
4222         cancel_work_sync(&adapter->sfp_task);
4223         iounmap(hw->hw_addr);
4224 err_ioremap:
4225         free_netdev(netdev);
4226 err_alloc_etherdev:
4227         pci_release_regions(pdev);
4228 err_pci_reg:
4229 err_dma:
4230         pci_disable_device(pdev);
4231         return err;
4232 }
4233
4234 /**
4235  * ixgbe_remove - Device Removal Routine
4236  * @pdev: PCI device information struct
4237  *
4238  * ixgbe_remove is called by the PCI subsystem to alert the driver
4239  * that it should release a PCI device.  The could be caused by a
4240  * Hot-Plug event, or because the driver is going to be removed from
4241  * memory.
4242  **/
4243 static void __devexit ixgbe_remove(struct pci_dev *pdev)
4244 {
4245         struct net_device *netdev = pci_get_drvdata(pdev);
4246         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4247         int err;
4248
4249         set_bit(__IXGBE_DOWN, &adapter->state);
4250         /* clear the module not found bit to make sure the worker won't
4251          * reschedule
4252          */
4253         clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4254         del_timer_sync(&adapter->watchdog_timer);
4255
4256         del_timer_sync(&adapter->sfp_timer);
4257         cancel_work_sync(&adapter->watchdog_task);
4258         cancel_work_sync(&adapter->sfp_task);
4259         flush_scheduled_work();
4260
4261 #ifdef CONFIG_IXGBE_DCA
4262         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
4263                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
4264                 dca_remove_requester(&pdev->dev);
4265                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
4266         }
4267
4268 #endif
4269         if (netdev->reg_state == NETREG_REGISTERED)
4270                 unregister_netdev(netdev);
4271
4272         ixgbe_reset_interrupt_capability(adapter);
4273
4274         ixgbe_release_hw_control(adapter);
4275
4276         iounmap(adapter->hw.hw_addr);
4277         pci_release_regions(pdev);
4278
4279         DPRINTK(PROBE, INFO, "complete\n");
4280         kfree(adapter->tx_ring);
4281         kfree(adapter->rx_ring);
4282
4283         free_netdev(netdev);
4284
4285         err = pci_disable_pcie_error_reporting(pdev);
4286         if (err)
4287                 dev_err(&pdev->dev,
4288                         "pci_disable_pcie_error_reporting failed 0x%x\n", err);
4289
4290         pci_disable_device(pdev);
4291 }
4292
4293 /**
4294  * ixgbe_io_error_detected - called when PCI error is detected
4295  * @pdev: Pointer to PCI device
4296  * @state: The current pci connection state
4297  *
4298  * This function is called after a PCI bus error affecting
4299  * this device has been detected.
4300  */
4301 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
4302                                                 pci_channel_state_t state)
4303 {
4304         struct net_device *netdev = pci_get_drvdata(pdev);
4305         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4306
4307         netif_device_detach(netdev);
4308
4309         if (netif_running(netdev))
4310                 ixgbe_down(adapter);
4311         pci_disable_device(pdev);
4312
4313         /* Request a slot reset. */
4314         return PCI_ERS_RESULT_NEED_RESET;
4315 }
4316
4317 /**
4318  * ixgbe_io_slot_reset - called after the pci bus has been reset.
4319  * @pdev: Pointer to PCI device
4320  *
4321  * Restart the card from scratch, as if from a cold-boot.
4322  */
4323 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
4324 {
4325         struct net_device *netdev = pci_get_drvdata(pdev);
4326         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4327         pci_ers_result_t result;
4328         int err;
4329
4330         if (pci_enable_device(pdev)) {
4331                 DPRINTK(PROBE, ERR,
4332                         "Cannot re-enable PCI device after reset.\n");
4333                 result = PCI_ERS_RESULT_DISCONNECT;
4334         } else {
4335                 pci_set_master(pdev);
4336                 pci_restore_state(pdev);
4337
4338                 pci_enable_wake(pdev, PCI_D3hot, 0);
4339                 pci_enable_wake(pdev, PCI_D3cold, 0);
4340
4341                 ixgbe_reset(adapter);
4342
4343                 result = PCI_ERS_RESULT_RECOVERED;
4344         }
4345
4346         err = pci_cleanup_aer_uncorrect_error_status(pdev);
4347         if (err) {
4348                 dev_err(&pdev->dev,
4349                   "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", err);
4350                 /* non-fatal, continue */
4351         }
4352
4353         return result;
4354 }
4355
4356 /**
4357  * ixgbe_io_resume - called when traffic can start flowing again.
4358  * @pdev: Pointer to PCI device
4359  *
4360  * This callback is called when the error recovery driver tells us that
4361  * its OK to resume normal operation.
4362  */
4363 static void ixgbe_io_resume(struct pci_dev *pdev)
4364 {
4365         struct net_device *netdev = pci_get_drvdata(pdev);
4366         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4367
4368         if (netif_running(netdev)) {
4369                 if (ixgbe_up(adapter)) {
4370                         DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
4371                         return;
4372                 }
4373         }
4374
4375         netif_device_attach(netdev);
4376 }
4377
4378 static struct pci_error_handlers ixgbe_err_handler = {
4379         .error_detected = ixgbe_io_error_detected,
4380         .slot_reset = ixgbe_io_slot_reset,
4381         .resume = ixgbe_io_resume,
4382 };
4383
4384 static struct pci_driver ixgbe_driver = {
4385         .name     = ixgbe_driver_name,
4386         .id_table = ixgbe_pci_tbl,
4387         .probe    = ixgbe_probe,
4388         .remove   = __devexit_p(ixgbe_remove),
4389 #ifdef CONFIG_PM
4390         .suspend  = ixgbe_suspend,
4391         .resume   = ixgbe_resume,
4392 #endif
4393         .shutdown = ixgbe_shutdown,
4394         .err_handler = &ixgbe_err_handler
4395 };
4396
4397 /**
4398  * ixgbe_init_module - Driver Registration Routine
4399  *
4400  * ixgbe_init_module is the first routine called when the driver is
4401  * loaded. All it does is register with the PCI subsystem.
4402  **/
4403 static int __init ixgbe_init_module(void)
4404 {
4405         int ret;
4406         printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
4407                ixgbe_driver_string, ixgbe_driver_version);
4408
4409         printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
4410
4411 #ifdef CONFIG_IXGBE_DCA
4412         dca_register_notify(&dca_notifier);
4413 #endif
4414
4415         ret = pci_register_driver(&ixgbe_driver);
4416         return ret;
4417 }
4418
4419 module_init(ixgbe_init_module);
4420
4421 /**
4422  * ixgbe_exit_module - Driver Exit Cleanup Routine
4423  *
4424  * ixgbe_exit_module is called just before the driver is removed
4425  * from memory.
4426  **/
4427 static void __exit ixgbe_exit_module(void)
4428 {
4429 #ifdef CONFIG_IXGBE_DCA
4430         dca_unregister_notify(&dca_notifier);
4431 #endif
4432         pci_unregister_driver(&ixgbe_driver);
4433 }
4434
4435 #ifdef CONFIG_IXGBE_DCA
4436 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
4437                             void *p)
4438 {
4439         int ret_val;
4440
4441         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
4442                                          __ixgbe_notify_dca);
4443
4444         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
4445 }
4446 #endif /* CONFIG_IXGBE_DCA */
4447
4448 module_exit(ixgbe_exit_module);
4449
4450 /* ixgbe_main.c */