2 * ALSA driver for RME Digi9652 audio interfaces
4 * Copyright (c) 1999 IEM - Winfried Ritsch
5 * Copyright (c) 1999-2001 Paul Davis
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <sound/driver.h>
24 #include <linux/delay.h>
25 #include <linux/init.h>
26 #include <linux/interrupt.h>
27 #include <linux/pci.h>
28 #include <linux/slab.h>
29 #include <linux/moduleparam.h>
31 #include <sound/core.h>
32 #include <sound/control.h>
33 #include <sound/pcm.h>
34 #include <sound/info.h>
35 #include <sound/asoundef.h>
36 #include <sound/initval.h>
38 #include <asm/current.h>
41 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
42 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
43 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
44 static int precise_ptr[SNDRV_CARDS]; /* Enable precise pointer */
46 module_param_array(index, int, NULL, 0444);
47 MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard.");
48 module_param_array(id, charp, NULL, 0444);
49 MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard.");
50 module_param_array(enable, bool, NULL, 0444);
51 MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards.");
52 module_param_array(precise_ptr, bool, NULL, 0444);
53 MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably).");
54 MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch");
55 MODULE_DESCRIPTION("RME Digi9652/Digi9636");
56 MODULE_LICENSE("GPL");
57 MODULE_SUPPORTED_DEVICE("{{RME,Hammerfall},"
58 "{RME,Hammerfall-Light}}");
60 /* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for
61 capture, one for playback. Both the ADAT and S/PDIF channels appear
62 to the host CPU in the same block of memory. There is no functional
63 difference between them in terms of access.
65 The Hammerfall Light is identical to the Hammerfall, except that it
66 has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback.
69 #define RME9652_NCHANNELS 26
70 #define RME9636_NCHANNELS 18
72 /* Preferred sync source choices - used by "sync_pref" control switch */
74 #define RME9652_SYNC_FROM_SPDIF 0
75 #define RME9652_SYNC_FROM_ADAT1 1
76 #define RME9652_SYNC_FROM_ADAT2 2
77 #define RME9652_SYNC_FROM_ADAT3 3
79 /* Possible sources of S/PDIF input */
81 #define RME9652_SPDIFIN_OPTICAL 0 /* optical (ADAT1) */
82 #define RME9652_SPDIFIN_COAXIAL 1 /* coaxial (RCA) */
83 #define RME9652_SPDIFIN_INTERN 2 /* internal (CDROM) */
85 /* ------------- Status-Register bits --------------------- */
87 #define RME9652_IRQ (1<<0) /* IRQ is High if not reset by irq_clear */
88 #define RME9652_lock_2 (1<<1) /* ADAT 3-PLL: 1=locked, 0=unlocked */
89 #define RME9652_lock_1 (1<<2) /* ADAT 2-PLL: 1=locked, 0=unlocked */
90 #define RME9652_lock_0 (1<<3) /* ADAT 1-PLL: 1=locked, 0=unlocked */
91 #define RME9652_fs48 (1<<4) /* sample rate is 0=44.1/88.2,1=48/96 Khz */
92 #define RME9652_wsel_rd (1<<5) /* if Word-Clock is used and valid then 1 */
93 /* bits 6-15 encode h/w buffer pointer position */
94 #define RME9652_sync_2 (1<<16) /* if ADAT-IN 3 in sync to system clock */
95 #define RME9652_sync_1 (1<<17) /* if ADAT-IN 2 in sync to system clock */
96 #define RME9652_sync_0 (1<<18) /* if ADAT-IN 1 in sync to system clock */
97 #define RME9652_DS_rd (1<<19) /* 1=Double Speed Mode, 0=Normal Speed */
98 #define RME9652_tc_busy (1<<20) /* 1=time-code copy in progress (960ms) */
99 #define RME9652_tc_out (1<<21) /* time-code out bit */
100 #define RME9652_F_0 (1<<22) /* 000=64kHz, 100=88.2kHz, 011=96kHz */
101 #define RME9652_F_1 (1<<23) /* 111=32kHz, 110=44.1kHz, 101=48kHz, */
102 #define RME9652_F_2 (1<<24) /* external Crystal Chip if ERF=1 */
103 #define RME9652_ERF (1<<25) /* Error-Flag of SDPIF Receiver (1=No Lock) */
104 #define RME9652_buffer_id (1<<26) /* toggles by each interrupt on rec/play */
105 #define RME9652_tc_valid (1<<27) /* 1 = a signal is detected on time-code input */
106 #define RME9652_SPDIF_READ (1<<28) /* byte available from Rev 1.5+ S/PDIF interface */
108 #define RME9652_sync (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2)
109 #define RME9652_lock (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2)
110 #define RME9652_F (RME9652_F_0|RME9652_F_1|RME9652_F_2)
111 #define rme9652_decode_spdif_rate(x) ((x)>>22)
113 /* Bit 6..15 : h/w buffer pointer */
115 #define RME9652_buf_pos 0x000FFC0
117 /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later
118 Rev G EEPROMS and Rev 1.5 cards or later.
121 #define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos))
123 /* amount of io space we remap for register access. i'm not sure we
124 even need this much, but 1K is nice round number :)
127 #define RME9652_IO_EXTENT 1024
129 #define RME9652_init_buffer 0
130 #define RME9652_play_buffer 32 /* holds ptr to 26x64kBit host RAM */
131 #define RME9652_rec_buffer 36 /* holds ptr to 26x64kBit host RAM */
132 #define RME9652_control_register 64
133 #define RME9652_irq_clear 96
134 #define RME9652_time_code 100 /* useful if used with alesis adat */
135 #define RME9652_thru_base 128 /* 132...228 Thru for 26 channels */
137 /* Read-only registers */
139 /* Writing to any of the register locations writes to the status
140 register. We'll use the first location as our point of access.
143 #define RME9652_status_register 0
145 /* --------- Control-Register Bits ---------------- */
148 #define RME9652_start_bit (1<<0) /* start record/play */
149 /* bits 1-3 encode buffersize/latency */
150 #define RME9652_Master (1<<4) /* Clock Mode Master=1,Slave/Auto=0 */
151 #define RME9652_IE (1<<5) /* Interupt Enable */
152 #define RME9652_freq (1<<6) /* samplerate 0=44.1/88.2, 1=48/96 kHz */
153 #define RME9652_freq1 (1<<7) /* if 0, 32kHz, else always 1 */
154 #define RME9652_DS (1<<8) /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */
155 #define RME9652_PRO (1<<9) /* S/PDIF out: 0=consumer, 1=professional */
156 #define RME9652_EMP (1<<10) /* Emphasis 0=None, 1=ON */
157 #define RME9652_Dolby (1<<11) /* Non-audio bit 1=set, 0=unset */
158 #define RME9652_opt_out (1<<12) /* Use 1st optical OUT as SPDIF: 1=yes,0=no */
159 #define RME9652_wsel (1<<13) /* use Wordclock as sync (overwrites master) */
160 #define RME9652_inp_0 (1<<14) /* SPDIF-IN: 00=optical (ADAT1), */
161 #define RME9652_inp_1 (1<<15) /* 01=koaxial (Cinch), 10=Internal CDROM */
162 #define RME9652_SyncPref_ADAT2 (1<<16)
163 #define RME9652_SyncPref_ADAT3 (1<<17)
164 #define RME9652_SPDIF_RESET (1<<18) /* Rev 1.5+: h/w S/PDIF receiver */
165 #define RME9652_SPDIF_SELECT (1<<19)
166 #define RME9652_SPDIF_CLOCK (1<<20)
167 #define RME9652_SPDIF_WRITE (1<<21)
168 #define RME9652_ADAT1_INTERNAL (1<<22) /* Rev 1.5+: if set, internal CD connector carries ADAT */
170 /* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */
172 #define RME9652_latency 0x0e
173 #define rme9652_encode_latency(x) (((x)&0x7)<<1)
174 #define rme9652_decode_latency(x) (((x)>>1)&0x7)
175 #define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS)
176 #define RME9652_inp (RME9652_inp_0|RME9652_inp_1)
177 #define rme9652_encode_spdif_in(x) (((x)&0x3)<<14)
178 #define rme9652_decode_spdif_in(x) (((x)>>14)&0x3)
180 #define RME9652_SyncPref_Mask (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
181 #define RME9652_SyncPref_ADAT1 0
182 #define RME9652_SyncPref_SPDIF (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
184 /* the size of a substream (1 mono data stream) */
186 #define RME9652_CHANNEL_BUFFER_SAMPLES (16*1024)
187 #define RME9652_CHANNEL_BUFFER_BYTES (4*RME9652_CHANNEL_BUFFER_SAMPLES)
189 /* the size of the area we need to allocate for DMA transfers. the
190 size is the same regardless of the number of channels - the
191 9636 still uses the same memory area.
193 Note that we allocate 1 more channel than is apparently needed
194 because the h/w seems to write 1 byte beyond the end of the last
198 #define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES)
199 #define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024)
207 void __iomem *iobase;
211 u32 control_register; /* cached value */
212 u32 thru_bits; /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */
215 u32 creg_spdif_stream;
217 char *card_name; /* hammerfall or hammerfall light names */
219 size_t hw_offsetmask; /* &-with status register to get real hw_offset */
220 size_t prev_hw_offset; /* previous hw offset */
221 size_t max_jitter; /* maximum jitter in frames for
223 size_t period_bytes; /* guess what this is */
225 unsigned char ds_channels;
226 unsigned char ss_channels; /* different for hammerfall/hammerfall-light */
228 struct snd_dma_buffer playback_dma_buf;
229 struct snd_dma_buffer capture_dma_buf;
231 unsigned char *capture_buffer; /* suitably aligned address */
232 unsigned char *playback_buffer; /* suitably aligned address */
237 struct snd_pcm_substream *capture_substream;
238 struct snd_pcm_substream *playback_substream;
241 int passthru; /* non-zero if doing pass-thru */
242 int hw_rev; /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */
244 int last_spdif_sample_rate; /* so that we can catch externally ... */
245 int last_adat_sample_rate; /* ... induced rate changes */
249 struct snd_card *card;
252 struct snd_kcontrol *spdif_ctl;
256 /* These tables map the ALSA channels 1..N to the channels that we
257 need to use in order to find the relevant channel buffer. RME
258 refer to this kind of mapping as between "the ADAT channel and
259 the DMA channel." We index it using the logical audio channel,
260 and the value is the DMA channel (i.e. channel buffer number)
261 where the data for that channel can be read/written from/to.
264 static char channel_map_9652_ss[26] = {
265 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
266 18, 19, 20, 21, 22, 23, 24, 25
269 static char channel_map_9636_ss[26] = {
270 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
271 /* channels 16 and 17 are S/PDIF */
273 /* channels 18-25 don't exist */
274 -1, -1, -1, -1, -1, -1, -1, -1
277 static char channel_map_9652_ds[26] = {
278 /* ADAT channels are remapped */
279 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
280 /* channels 12 and 13 are S/PDIF */
282 /* others don't exist */
283 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
286 static char channel_map_9636_ds[26] = {
287 /* ADAT channels are remapped */
288 1, 3, 5, 7, 9, 11, 13, 15,
289 /* channels 8 and 9 are S/PDIF */
291 /* others don't exist */
292 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
295 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
297 dmab->dev.type = SNDRV_DMA_TYPE_DEV;
298 dmab->dev.dev = snd_dma_pci_data(pci);
299 if (snd_dma_get_reserved_buf(dmab, snd_dma_pci_buf_id(pci))) {
300 if (dmab->bytes >= size)
303 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
309 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
312 dmab->dev.dev = NULL; /* make it anonymous */
313 snd_dma_reserve_buf(dmab, snd_dma_pci_buf_id(pci));
318 static struct pci_device_id snd_rme9652_ids[] = {
322 .subvendor = PCI_ANY_ID,
323 .subdevice = PCI_ANY_ID,
324 }, /* RME Digi9652 */
328 MODULE_DEVICE_TABLE(pci, snd_rme9652_ids);
330 static inline void rme9652_write(struct snd_rme9652 *rme9652, int reg, int val)
332 writel(val, rme9652->iobase + reg);
335 static inline unsigned int rme9652_read(struct snd_rme9652 *rme9652, int reg)
337 return readl(rme9652->iobase + reg);
340 static inline int snd_rme9652_use_is_exclusive(struct snd_rme9652 *rme9652)
345 spin_lock_irqsave(&rme9652->lock, flags);
346 if ((rme9652->playback_pid != rme9652->capture_pid) &&
347 (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) {
350 spin_unlock_irqrestore(&rme9652->lock, flags);
354 static inline int rme9652_adat_sample_rate(struct snd_rme9652 *rme9652)
356 if (rme9652_running_double_speed(rme9652)) {
357 return (rme9652_read(rme9652, RME9652_status_register) &
358 RME9652_fs48) ? 96000 : 88200;
360 return (rme9652_read(rme9652, RME9652_status_register) &
361 RME9652_fs48) ? 48000 : 44100;
365 static inline void rme9652_compute_period_size(struct snd_rme9652 *rme9652)
369 i = rme9652->control_register & RME9652_latency;
370 rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8));
371 rme9652->hw_offsetmask =
372 (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos;
373 rme9652->max_jitter = 80;
376 static snd_pcm_uframes_t rme9652_hw_pointer(struct snd_rme9652 *rme9652)
379 unsigned int offset, frag;
380 snd_pcm_uframes_t period_size = rme9652->period_bytes / 4;
381 snd_pcm_sframes_t delta;
383 status = rme9652_read(rme9652, RME9652_status_register);
384 if (!rme9652->precise_ptr)
385 return (status & RME9652_buffer_id) ? period_size : 0;
386 offset = status & RME9652_buf_pos;
388 /* The hardware may give a backward movement for up to 80 frames
389 Martin Kirst <martin.kirst@freenet.de> knows the details.
392 delta = rme9652->prev_hw_offset - offset;
394 if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4)
395 offset = rme9652->prev_hw_offset;
397 rme9652->prev_hw_offset = offset;
398 offset &= rme9652->hw_offsetmask;
400 frag = status & RME9652_buffer_id;
402 if (offset < period_size) {
403 if (offset > rme9652->max_jitter) {
405 printk(KERN_ERR "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n", status, offset);
408 offset -= rme9652->max_jitter;
410 offset += period_size * 2;
412 if (offset > period_size + rme9652->max_jitter) {
414 printk(KERN_ERR "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n", status, offset);
417 offset -= rme9652->max_jitter;
423 static inline void rme9652_reset_hw_pointer(struct snd_rme9652 *rme9652)
427 /* reset the FIFO pointer to zero. We do this by writing to 8
428 registers, each of which is a 32bit wide register, and set
429 them all to zero. Note that s->iobase is a pointer to
430 int32, not pointer to char.
433 for (i = 0; i < 8; i++) {
434 rme9652_write(rme9652, i * 4, 0);
437 rme9652->prev_hw_offset = 0;
440 static inline void rme9652_start(struct snd_rme9652 *s)
442 s->control_register |= (RME9652_IE | RME9652_start_bit);
443 rme9652_write(s, RME9652_control_register, s->control_register);
446 static inline void rme9652_stop(struct snd_rme9652 *s)
448 s->control_register &= ~(RME9652_start_bit | RME9652_IE);
449 rme9652_write(s, RME9652_control_register, s->control_register);
452 static int rme9652_set_interrupt_interval(struct snd_rme9652 *s,
458 spin_lock_irq(&s->lock);
460 if ((restart = s->running)) {
471 s->control_register &= ~RME9652_latency;
472 s->control_register |= rme9652_encode_latency(n);
474 rme9652_write(s, RME9652_control_register, s->control_register);
476 rme9652_compute_period_size(s);
481 spin_unlock_irq(&s->lock);
486 static int rme9652_set_rate(struct snd_rme9652 *rme9652, int rate)
489 int reject_if_open = 0;
492 if (!snd_rme9652_use_is_exclusive (rme9652)) {
496 /* Changing from a "single speed" to a "double speed" rate is
497 not allowed if any substreams are open. This is because
498 such a change causes a shift in the location of
499 the DMA buffers and a reduction in the number of available
502 Note that a similar but essentially insoluble problem
503 exists for externally-driven rate changes. All we can do
504 is to flag rate changes in the read/write routines.
507 spin_lock_irq(&rme9652->lock);
508 xrate = rme9652_adat_sample_rate(rme9652);
533 rate = RME9652_DS | RME9652_freq;
536 spin_unlock_irq(&rme9652->lock);
540 if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) {
541 spin_unlock_irq(&rme9652->lock);
545 if ((restart = rme9652->running)) {
546 rme9652_stop(rme9652);
548 rme9652->control_register &= ~(RME9652_freq | RME9652_DS);
549 rme9652->control_register |= rate;
550 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
553 rme9652_start(rme9652);
556 if (rate & RME9652_DS) {
557 if (rme9652->ss_channels == RME9652_NCHANNELS) {
558 rme9652->channel_map = channel_map_9652_ds;
560 rme9652->channel_map = channel_map_9636_ds;
563 if (rme9652->ss_channels == RME9652_NCHANNELS) {
564 rme9652->channel_map = channel_map_9652_ss;
566 rme9652->channel_map = channel_map_9636_ss;
570 spin_unlock_irq(&rme9652->lock);
574 static void rme9652_set_thru(struct snd_rme9652 *rme9652, int channel, int enable)
578 rme9652->passthru = 0;
582 /* set thru for all channels */
585 for (i = 0; i < RME9652_NCHANNELS; i++) {
586 rme9652->thru_bits |= (1 << i);
587 rme9652_write(rme9652, RME9652_thru_base + i * 4, 1);
590 for (i = 0; i < RME9652_NCHANNELS; i++) {
591 rme9652->thru_bits &= ~(1 << i);
592 rme9652_write(rme9652, RME9652_thru_base + i * 4, 0);
599 snd_assert(channel == RME9652_NCHANNELS, return);
601 mapped_channel = rme9652->channel_map[channel];
604 rme9652->thru_bits |= (1 << mapped_channel);
606 rme9652->thru_bits &= ~(1 << mapped_channel);
609 rme9652_write(rme9652,
610 RME9652_thru_base + mapped_channel * 4,
615 static int rme9652_set_passthru(struct snd_rme9652 *rme9652, int onoff)
618 rme9652_set_thru(rme9652, -1, 1);
620 /* we don't want interrupts, so do a
621 custom version of rme9652_start().
624 rme9652->control_register =
626 rme9652_encode_latency(7) |
629 rme9652_reset_hw_pointer(rme9652);
631 rme9652_write(rme9652, RME9652_control_register,
632 rme9652->control_register);
633 rme9652->passthru = 1;
635 rme9652_set_thru(rme9652, -1, 0);
636 rme9652_stop(rme9652);
637 rme9652->passthru = 0;
643 static void rme9652_spdif_set_bit (struct snd_rme9652 *rme9652, int mask, int onoff)
646 rme9652->control_register |= mask;
648 rme9652->control_register &= ~mask;
650 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
653 static void rme9652_spdif_write_byte (struct snd_rme9652 *rme9652, const int val)
658 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
660 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1);
662 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0);
664 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
665 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
669 static int rme9652_spdif_read_byte (struct snd_rme9652 *rme9652)
677 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
678 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
679 if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ)
681 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
687 static void rme9652_write_spdif_codec (struct snd_rme9652 *rme9652, const int address, const int data)
689 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
690 rme9652_spdif_write_byte (rme9652, 0x20);
691 rme9652_spdif_write_byte (rme9652, address);
692 rme9652_spdif_write_byte (rme9652, data);
693 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
697 static int rme9652_spdif_read_codec (struct snd_rme9652 *rme9652, const int address)
701 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
702 rme9652_spdif_write_byte (rme9652, 0x20);
703 rme9652_spdif_write_byte (rme9652, address);
704 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
705 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
707 rme9652_spdif_write_byte (rme9652, 0x21);
708 ret = rme9652_spdif_read_byte (rme9652);
709 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
714 static void rme9652_initialize_spdif_receiver (struct snd_rme9652 *rme9652)
716 /* XXX what unsets this ? */
718 rme9652->control_register |= RME9652_SPDIF_RESET;
720 rme9652_write_spdif_codec (rme9652, 4, 0x40);
721 rme9652_write_spdif_codec (rme9652, 17, 0x13);
722 rme9652_write_spdif_codec (rme9652, 6, 0x02);
725 static inline int rme9652_spdif_sample_rate(struct snd_rme9652 *s)
727 unsigned int rate_bits;
729 if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) {
730 return -1; /* error condition */
733 if (s->hw_rev == 15) {
737 x = rme9652_spdif_read_codec (s, 30);
744 if (y > 30400 && y < 33600) ret = 32000;
745 else if (y > 41900 && y < 46000) ret = 44100;
746 else if (y > 46000 && y < 50400) ret = 48000;
747 else if (y > 60800 && y < 67200) ret = 64000;
748 else if (y > 83700 && y < 92000) ret = 88200;
749 else if (y > 92000 && y < 100000) ret = 96000;
754 rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F;
756 switch (rme9652_decode_spdif_rate(rate_bits)) {
782 snd_printk(KERN_ERR "%s: unknown S/PDIF input rate (bits = 0x%x)\n",
783 s->card_name, rate_bits);
789 /*-----------------------------------------------------------------------------
791 ----------------------------------------------------------------------------*/
793 static u32 snd_rme9652_convert_from_aes(struct snd_aes_iec958 *aes)
796 val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0;
797 val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0;
798 if (val & RME9652_PRO)
799 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0;
801 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0;
805 static void snd_rme9652_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
807 aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) |
808 ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0);
809 if (val & RME9652_PRO)
810 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
812 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
815 static int snd_rme9652_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
817 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
822 static int snd_rme9652_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
824 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
826 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif);
830 static int snd_rme9652_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
832 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
836 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
837 spin_lock_irq(&rme9652->lock);
838 change = val != rme9652->creg_spdif;
839 rme9652->creg_spdif = val;
840 spin_unlock_irq(&rme9652->lock);
844 static int snd_rme9652_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
846 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
851 static int snd_rme9652_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
853 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
855 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream);
859 static int snd_rme9652_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
861 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
865 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
866 spin_lock_irq(&rme9652->lock);
867 change = val != rme9652->creg_spdif_stream;
868 rme9652->creg_spdif_stream = val;
869 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
870 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val);
871 spin_unlock_irq(&rme9652->lock);
875 static int snd_rme9652_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
877 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
882 static int snd_rme9652_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
884 ucontrol->value.iec958.status[0] = kcontrol->private_value;
888 #define RME9652_ADAT1_IN(xname, xindex) \
889 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
890 .info = snd_rme9652_info_adat1_in, \
891 .get = snd_rme9652_get_adat1_in, \
892 .put = snd_rme9652_put_adat1_in }
894 static unsigned int rme9652_adat1_in(struct snd_rme9652 *rme9652)
896 if (rme9652->control_register & RME9652_ADAT1_INTERNAL)
901 static int rme9652_set_adat1_input(struct snd_rme9652 *rme9652, int internal)
906 rme9652->control_register |= RME9652_ADAT1_INTERNAL;
908 rme9652->control_register &= ~RME9652_ADAT1_INTERNAL;
911 /* XXX do we actually need to stop the card when we do this ? */
913 if ((restart = rme9652->running)) {
914 rme9652_stop(rme9652);
917 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
920 rme9652_start(rme9652);
926 static int snd_rme9652_info_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
928 static char *texts[2] = {"ADAT1", "Internal"};
930 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
932 uinfo->value.enumerated.items = 2;
933 if (uinfo->value.enumerated.item > 1)
934 uinfo->value.enumerated.item = 1;
935 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
939 static int snd_rme9652_get_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
941 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
943 spin_lock_irq(&rme9652->lock);
944 ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652);
945 spin_unlock_irq(&rme9652->lock);
949 static int snd_rme9652_put_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
951 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
955 if (!snd_rme9652_use_is_exclusive(rme9652))
957 val = ucontrol->value.enumerated.item[0] % 2;
958 spin_lock_irq(&rme9652->lock);
959 change = val != rme9652_adat1_in(rme9652);
961 rme9652_set_adat1_input(rme9652, val);
962 spin_unlock_irq(&rme9652->lock);
966 #define RME9652_SPDIF_IN(xname, xindex) \
967 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
968 .info = snd_rme9652_info_spdif_in, \
969 .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in }
971 static unsigned int rme9652_spdif_in(struct snd_rme9652 *rme9652)
973 return rme9652_decode_spdif_in(rme9652->control_register &
977 static int rme9652_set_spdif_input(struct snd_rme9652 *rme9652, int in)
981 rme9652->control_register &= ~RME9652_inp;
982 rme9652->control_register |= rme9652_encode_spdif_in(in);
984 if ((restart = rme9652->running)) {
985 rme9652_stop(rme9652);
988 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
991 rme9652_start(rme9652);
997 static int snd_rme9652_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
999 static char *texts[3] = {"ADAT1", "Coaxial", "Internal"};
1001 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1003 uinfo->value.enumerated.items = 3;
1004 if (uinfo->value.enumerated.item > 2)
1005 uinfo->value.enumerated.item = 2;
1006 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1010 static int snd_rme9652_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1012 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1014 spin_lock_irq(&rme9652->lock);
1015 ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652);
1016 spin_unlock_irq(&rme9652->lock);
1020 static int snd_rme9652_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1022 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1026 if (!snd_rme9652_use_is_exclusive(rme9652))
1028 val = ucontrol->value.enumerated.item[0] % 3;
1029 spin_lock_irq(&rme9652->lock);
1030 change = val != rme9652_spdif_in(rme9652);
1032 rme9652_set_spdif_input(rme9652, val);
1033 spin_unlock_irq(&rme9652->lock);
1037 #define RME9652_SPDIF_OUT(xname, xindex) \
1038 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1039 .info = snd_rme9652_info_spdif_out, \
1040 .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out }
1042 static int rme9652_spdif_out(struct snd_rme9652 *rme9652)
1044 return (rme9652->control_register & RME9652_opt_out) ? 1 : 0;
1047 static int rme9652_set_spdif_output(struct snd_rme9652 *rme9652, int out)
1052 rme9652->control_register |= RME9652_opt_out;
1054 rme9652->control_register &= ~RME9652_opt_out;
1057 if ((restart = rme9652->running)) {
1058 rme9652_stop(rme9652);
1061 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1064 rme9652_start(rme9652);
1070 #define snd_rme9652_info_spdif_out snd_ctl_boolean_mono_info
1072 static int snd_rme9652_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1074 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1076 spin_lock_irq(&rme9652->lock);
1077 ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652);
1078 spin_unlock_irq(&rme9652->lock);
1082 static int snd_rme9652_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1084 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1088 if (!snd_rme9652_use_is_exclusive(rme9652))
1090 val = ucontrol->value.integer.value[0] & 1;
1091 spin_lock_irq(&rme9652->lock);
1092 change = (int)val != rme9652_spdif_out(rme9652);
1093 rme9652_set_spdif_output(rme9652, val);
1094 spin_unlock_irq(&rme9652->lock);
1098 #define RME9652_SYNC_MODE(xname, xindex) \
1099 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1100 .info = snd_rme9652_info_sync_mode, \
1101 .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode }
1103 static int rme9652_sync_mode(struct snd_rme9652 *rme9652)
1105 if (rme9652->control_register & RME9652_wsel) {
1107 } else if (rme9652->control_register & RME9652_Master) {
1114 static int rme9652_set_sync_mode(struct snd_rme9652 *rme9652, int mode)
1120 rme9652->control_register &=
1121 ~(RME9652_Master | RME9652_wsel);
1124 rme9652->control_register =
1125 (rme9652->control_register & ~RME9652_wsel) | RME9652_Master;
1128 rme9652->control_register |=
1129 (RME9652_Master | RME9652_wsel);
1133 if ((restart = rme9652->running)) {
1134 rme9652_stop(rme9652);
1137 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1140 rme9652_start(rme9652);
1146 static int snd_rme9652_info_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1148 static char *texts[3] = {"AutoSync", "Master", "Word Clock"};
1150 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1152 uinfo->value.enumerated.items = 3;
1153 if (uinfo->value.enumerated.item > 2)
1154 uinfo->value.enumerated.item = 2;
1155 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1159 static int snd_rme9652_get_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1161 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1163 spin_lock_irq(&rme9652->lock);
1164 ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652);
1165 spin_unlock_irq(&rme9652->lock);
1169 static int snd_rme9652_put_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1171 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1175 val = ucontrol->value.enumerated.item[0] % 3;
1176 spin_lock_irq(&rme9652->lock);
1177 change = (int)val != rme9652_sync_mode(rme9652);
1178 rme9652_set_sync_mode(rme9652, val);
1179 spin_unlock_irq(&rme9652->lock);
1183 #define RME9652_SYNC_PREF(xname, xindex) \
1184 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1185 .info = snd_rme9652_info_sync_pref, \
1186 .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref }
1188 static int rme9652_sync_pref(struct snd_rme9652 *rme9652)
1190 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1191 case RME9652_SyncPref_ADAT1:
1192 return RME9652_SYNC_FROM_ADAT1;
1193 case RME9652_SyncPref_ADAT2:
1194 return RME9652_SYNC_FROM_ADAT2;
1195 case RME9652_SyncPref_ADAT3:
1196 return RME9652_SYNC_FROM_ADAT3;
1197 case RME9652_SyncPref_SPDIF:
1198 return RME9652_SYNC_FROM_SPDIF;
1204 static int rme9652_set_sync_pref(struct snd_rme9652 *rme9652, int pref)
1208 rme9652->control_register &= ~RME9652_SyncPref_Mask;
1210 case RME9652_SYNC_FROM_ADAT1:
1211 rme9652->control_register |= RME9652_SyncPref_ADAT1;
1213 case RME9652_SYNC_FROM_ADAT2:
1214 rme9652->control_register |= RME9652_SyncPref_ADAT2;
1216 case RME9652_SYNC_FROM_ADAT3:
1217 rme9652->control_register |= RME9652_SyncPref_ADAT3;
1219 case RME9652_SYNC_FROM_SPDIF:
1220 rme9652->control_register |= RME9652_SyncPref_SPDIF;
1224 if ((restart = rme9652->running)) {
1225 rme9652_stop(rme9652);
1228 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1231 rme9652_start(rme9652);
1237 static int snd_rme9652_info_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1239 static char *texts[4] = {"IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"};
1240 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1242 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1244 uinfo->value.enumerated.items = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1245 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1246 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1247 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1251 static int snd_rme9652_get_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1253 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1255 spin_lock_irq(&rme9652->lock);
1256 ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652);
1257 spin_unlock_irq(&rme9652->lock);
1261 static int snd_rme9652_put_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1263 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1267 if (!snd_rme9652_use_is_exclusive(rme9652))
1269 max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1270 val = ucontrol->value.enumerated.item[0] % max;
1271 spin_lock_irq(&rme9652->lock);
1272 change = (int)val != rme9652_sync_pref(rme9652);
1273 rme9652_set_sync_pref(rme9652, val);
1274 spin_unlock_irq(&rme9652->lock);
1278 static int snd_rme9652_info_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1280 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1281 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1282 uinfo->count = rme9652->ss_channels;
1283 uinfo->value.integer.min = 0;
1284 uinfo->value.integer.max = 1;
1288 static int snd_rme9652_get_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1290 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1292 u32 thru_bits = rme9652->thru_bits;
1294 for (k = 0; k < rme9652->ss_channels; ++k) {
1295 ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k));
1300 static int snd_rme9652_put_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1302 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1307 if (!snd_rme9652_use_is_exclusive(rme9652))
1310 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1311 if (ucontrol->value.integer.value[chn])
1312 thru_bits |= 1 << chn;
1315 spin_lock_irq(&rme9652->lock);
1316 change = thru_bits ^ rme9652->thru_bits;
1318 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1319 if (!(change & (1 << chn)))
1321 rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn));
1324 spin_unlock_irq(&rme9652->lock);
1328 #define RME9652_PASSTHRU(xname, xindex) \
1329 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1330 .info = snd_rme9652_info_passthru, \
1331 .put = snd_rme9652_put_passthru, \
1332 .get = snd_rme9652_get_passthru }
1334 #define snd_rme9652_info_passthru snd_ctl_boolean_mono_info
1336 static int snd_rme9652_get_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1338 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1340 spin_lock_irq(&rme9652->lock);
1341 ucontrol->value.integer.value[0] = rme9652->passthru;
1342 spin_unlock_irq(&rme9652->lock);
1346 static int snd_rme9652_put_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1348 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1353 if (!snd_rme9652_use_is_exclusive(rme9652))
1356 val = ucontrol->value.integer.value[0] & 1;
1357 spin_lock_irq(&rme9652->lock);
1358 change = (ucontrol->value.integer.value[0] != rme9652->passthru);
1360 err = rme9652_set_passthru(rme9652, val);
1361 spin_unlock_irq(&rme9652->lock);
1362 return err ? err : change;
1365 /* Read-only switches */
1367 #define RME9652_SPDIF_RATE(xname, xindex) \
1368 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1369 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1370 .info = snd_rme9652_info_spdif_rate, \
1371 .get = snd_rme9652_get_spdif_rate }
1373 static int snd_rme9652_info_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1375 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1377 uinfo->value.integer.min = 0;
1378 uinfo->value.integer.max = 96000;
1382 static int snd_rme9652_get_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1384 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1386 spin_lock_irq(&rme9652->lock);
1387 ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652);
1388 spin_unlock_irq(&rme9652->lock);
1392 #define RME9652_ADAT_SYNC(xname, xindex, xidx) \
1393 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1394 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1395 .info = snd_rme9652_info_adat_sync, \
1396 .get = snd_rme9652_get_adat_sync, .private_value = xidx }
1398 static int snd_rme9652_info_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1400 static char *texts[4] = {"No Lock", "Lock", "No Lock Sync", "Lock Sync"};
1402 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1404 uinfo->value.enumerated.items = 4;
1405 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1406 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1407 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1411 static int snd_rme9652_get_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1413 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1414 unsigned int mask1, mask2, val;
1416 switch (kcontrol->private_value) {
1417 case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break;
1418 case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break;
1419 case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break;
1420 default: return -EINVAL;
1422 val = rme9652_read(rme9652, RME9652_status_register);
1423 ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0;
1424 ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0;
1428 #define RME9652_TC_VALID(xname, xindex) \
1429 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1430 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1431 .info = snd_rme9652_info_tc_valid, \
1432 .get = snd_rme9652_get_tc_valid }
1434 #define snd_rme9652_info_tc_valid snd_ctl_boolean_mono_info
1436 static int snd_rme9652_get_tc_valid(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1438 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1440 ucontrol->value.integer.value[0] =
1441 (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0;
1445 #ifdef ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE
1447 /* FIXME: this routine needs a port to the new control API --jk */
1449 static int snd_rme9652_get_tc_value(void *private_data,
1450 snd_kswitch_t *kswitch,
1451 snd_switch_t *uswitch)
1453 struct snd_rme9652 *s = (struct snd_rme9652 *) private_data;
1457 uswitch->type = SNDRV_SW_TYPE_DWORD;
1459 if ((rme9652_read(s, RME9652_status_register) &
1460 RME9652_tc_valid) == 0) {
1461 uswitch->value.data32[0] = 0;
1465 /* timecode request */
1467 rme9652_write(s, RME9652_time_code, 0);
1469 /* XXX bug alert: loop-based timing !!!! */
1471 for (i = 0; i < 50; i++) {
1472 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy))
1476 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) {
1482 for (i = 0; i < 32; i++) {
1485 if (rme9652_read(s, i * 4) & RME9652_tc_out)
1486 value |= 0x80000000;
1489 if (value > 2 * 60 * 48000) {
1490 value -= 2 * 60 * 48000;
1495 uswitch->value.data32[0] = value;
1500 #endif /* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */
1502 static struct snd_kcontrol_new snd_rme9652_controls[] = {
1504 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1505 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1506 .info = snd_rme9652_control_spdif_info,
1507 .get = snd_rme9652_control_spdif_get,
1508 .put = snd_rme9652_control_spdif_put,
1511 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1512 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1513 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1514 .info = snd_rme9652_control_spdif_stream_info,
1515 .get = snd_rme9652_control_spdif_stream_get,
1516 .put = snd_rme9652_control_spdif_stream_put,
1519 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1520 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1521 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1522 .info = snd_rme9652_control_spdif_mask_info,
1523 .get = snd_rme9652_control_spdif_mask_get,
1524 .private_value = IEC958_AES0_NONAUDIO |
1525 IEC958_AES0_PROFESSIONAL |
1526 IEC958_AES0_CON_EMPHASIS,
1529 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1530 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1531 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1532 .info = snd_rme9652_control_spdif_mask_info,
1533 .get = snd_rme9652_control_spdif_mask_get,
1534 .private_value = IEC958_AES0_NONAUDIO |
1535 IEC958_AES0_PROFESSIONAL |
1536 IEC958_AES0_PRO_EMPHASIS,
1538 RME9652_SPDIF_IN("IEC958 Input Connector", 0),
1539 RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
1540 RME9652_SYNC_MODE("Sync Mode", 0),
1541 RME9652_SYNC_PREF("Preferred Sync Source", 0),
1543 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1544 .name = "Channels Thru",
1546 .info = snd_rme9652_info_thru,
1547 .get = snd_rme9652_get_thru,
1548 .put = snd_rme9652_put_thru,
1550 RME9652_SPDIF_RATE("IEC958 Sample Rate", 0),
1551 RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0),
1552 RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1),
1553 RME9652_TC_VALID("Timecode Valid", 0),
1554 RME9652_PASSTHRU("Passthru", 0)
1557 static struct snd_kcontrol_new snd_rme9652_adat3_check =
1558 RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2);
1560 static struct snd_kcontrol_new snd_rme9652_adat1_input =
1561 RME9652_ADAT1_IN("ADAT1 Input Source", 0);
1563 static int snd_rme9652_create_controls(struct snd_card *card, struct snd_rme9652 *rme9652)
1567 struct snd_kcontrol *kctl;
1569 for (idx = 0; idx < ARRAY_SIZE(snd_rme9652_controls); idx++) {
1570 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0)
1572 if (idx == 1) /* IEC958 (S/PDIF) Stream */
1573 rme9652->spdif_ctl = kctl;
1576 if (rme9652->ss_channels == RME9652_NCHANNELS)
1577 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0)
1580 if (rme9652->hw_rev >= 15)
1581 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0)
1587 /*------------------------------------------------------------
1589 ------------------------------------------------------------*/
1592 snd_rme9652_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1594 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) entry->private_data;
1595 u32 thru_bits = rme9652->thru_bits;
1596 int show_auto_sync_source = 0;
1598 unsigned int status;
1601 status = rme9652_read(rme9652, RME9652_status_register);
1603 snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1);
1604 snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
1605 rme9652->capture_buffer, rme9652->playback_buffer);
1606 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
1607 rme9652->irq, rme9652->port, (unsigned long)rme9652->iobase);
1608 snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register);
1610 snd_iprintf(buffer, "\n");
1612 x = 1 << (6 + rme9652_decode_latency(rme9652->control_register &
1615 snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n",
1616 x, (unsigned long) rme9652->period_bytes);
1617 snd_iprintf(buffer, "Hardware pointer (frames): %ld\n",
1618 rme9652_hw_pointer(rme9652));
1619 snd_iprintf(buffer, "Passthru: %s\n",
1620 rme9652->passthru ? "yes" : "no");
1622 if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) {
1623 snd_iprintf(buffer, "Clock mode: autosync\n");
1624 show_auto_sync_source = 1;
1625 } else if (rme9652->control_register & RME9652_wsel) {
1626 if (status & RME9652_wsel_rd) {
1627 snd_iprintf(buffer, "Clock mode: word clock\n");
1629 snd_iprintf(buffer, "Clock mode: word clock (no signal)\n");
1632 snd_iprintf(buffer, "Clock mode: master\n");
1635 if (show_auto_sync_source) {
1636 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1637 case RME9652_SyncPref_ADAT1:
1638 snd_iprintf(buffer, "Pref. sync source: ADAT1\n");
1640 case RME9652_SyncPref_ADAT2:
1641 snd_iprintf(buffer, "Pref. sync source: ADAT2\n");
1643 case RME9652_SyncPref_ADAT3:
1644 snd_iprintf(buffer, "Pref. sync source: ADAT3\n");
1646 case RME9652_SyncPref_SPDIF:
1647 snd_iprintf(buffer, "Pref. sync source: IEC958\n");
1650 snd_iprintf(buffer, "Pref. sync source: ???\n");
1654 if (rme9652->hw_rev >= 15)
1655 snd_iprintf(buffer, "\nADAT1 Input source: %s\n",
1656 (rme9652->control_register & RME9652_ADAT1_INTERNAL) ?
1657 "Internal" : "ADAT1 optical");
1659 snd_iprintf(buffer, "\n");
1661 switch (rme9652_decode_spdif_in(rme9652->control_register &
1663 case RME9652_SPDIFIN_OPTICAL:
1664 snd_iprintf(buffer, "IEC958 input: ADAT1\n");
1666 case RME9652_SPDIFIN_COAXIAL:
1667 snd_iprintf(buffer, "IEC958 input: Coaxial\n");
1669 case RME9652_SPDIFIN_INTERN:
1670 snd_iprintf(buffer, "IEC958 input: Internal\n");
1673 snd_iprintf(buffer, "IEC958 input: ???\n");
1677 if (rme9652->control_register & RME9652_opt_out) {
1678 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
1680 snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
1683 if (rme9652->control_register & RME9652_PRO) {
1684 snd_iprintf(buffer, "IEC958 quality: Professional\n");
1686 snd_iprintf(buffer, "IEC958 quality: Consumer\n");
1689 if (rme9652->control_register & RME9652_EMP) {
1690 snd_iprintf(buffer, "IEC958 emphasis: on\n");
1692 snd_iprintf(buffer, "IEC958 emphasis: off\n");
1695 if (rme9652->control_register & RME9652_Dolby) {
1696 snd_iprintf(buffer, "IEC958 Dolby: on\n");
1698 snd_iprintf(buffer, "IEC958 Dolby: off\n");
1701 i = rme9652_spdif_sample_rate(rme9652);
1705 "IEC958 sample rate: error flag set\n");
1706 } else if (i == 0) {
1707 snd_iprintf(buffer, "IEC958 sample rate: undetermined\n");
1709 snd_iprintf(buffer, "IEC958 sample rate: %d\n", i);
1712 snd_iprintf(buffer, "\n");
1714 snd_iprintf(buffer, "ADAT Sample rate: %dHz\n",
1715 rme9652_adat_sample_rate(rme9652));
1719 x = status & RME9652_sync_0;
1720 if (status & RME9652_lock_0) {
1721 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
1723 snd_iprintf(buffer, "ADAT1: No Lock\n");
1726 x = status & RME9652_sync_1;
1727 if (status & RME9652_lock_1) {
1728 snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
1730 snd_iprintf(buffer, "ADAT2: No Lock\n");
1733 x = status & RME9652_sync_2;
1734 if (status & RME9652_lock_2) {
1735 snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
1737 snd_iprintf(buffer, "ADAT3: No Lock\n");
1740 snd_iprintf(buffer, "\n");
1742 snd_iprintf(buffer, "Timecode signal: %s\n",
1743 (status & RME9652_tc_valid) ? "yes" : "no");
1747 snd_iprintf(buffer, "Punch Status:\n\n");
1749 for (i = 0; i < rme9652->ss_channels; i++) {
1750 if (thru_bits & (1 << i)) {
1751 snd_iprintf(buffer, "%2d: on ", i + 1);
1753 snd_iprintf(buffer, "%2d: off ", i + 1);
1756 if (((i + 1) % 8) == 0) {
1757 snd_iprintf(buffer, "\n");
1761 snd_iprintf(buffer, "\n");
1764 static void __devinit snd_rme9652_proc_init(struct snd_rme9652 *rme9652)
1766 struct snd_info_entry *entry;
1768 if (! snd_card_proc_new(rme9652->card, "rme9652", &entry))
1769 snd_info_set_text_ops(entry, rme9652, snd_rme9652_proc_read);
1772 static void snd_rme9652_free_buffers(struct snd_rme9652 *rme9652)
1774 snd_hammerfall_free_buffer(&rme9652->capture_dma_buf, rme9652->pci);
1775 snd_hammerfall_free_buffer(&rme9652->playback_dma_buf, rme9652->pci);
1778 static int snd_rme9652_free(struct snd_rme9652 *rme9652)
1780 if (rme9652->irq >= 0)
1781 rme9652_stop(rme9652);
1782 snd_rme9652_free_buffers(rme9652);
1784 if (rme9652->irq >= 0)
1785 free_irq(rme9652->irq, (void *)rme9652);
1786 if (rme9652->iobase)
1787 iounmap(rme9652->iobase);
1789 pci_release_regions(rme9652->pci);
1791 pci_disable_device(rme9652->pci);
1795 static int __devinit snd_rme9652_initialize_memory(struct snd_rme9652 *rme9652)
1797 unsigned long pb_bus, cb_bus;
1799 if (snd_hammerfall_get_buffer(rme9652->pci, &rme9652->capture_dma_buf, RME9652_DMA_AREA_BYTES) < 0 ||
1800 snd_hammerfall_get_buffer(rme9652->pci, &rme9652->playback_dma_buf, RME9652_DMA_AREA_BYTES) < 0) {
1801 if (rme9652->capture_dma_buf.area)
1802 snd_dma_free_pages(&rme9652->capture_dma_buf);
1803 printk(KERN_ERR "%s: no buffers available\n", rme9652->card_name);
1807 /* Align to bus-space 64K boundary */
1809 cb_bus = ALIGN(rme9652->capture_dma_buf.addr, 0x10000ul);
1810 pb_bus = ALIGN(rme9652->playback_dma_buf.addr, 0x10000ul);
1812 /* Tell the card where it is */
1814 rme9652_write(rme9652, RME9652_rec_buffer, cb_bus);
1815 rme9652_write(rme9652, RME9652_play_buffer, pb_bus);
1817 rme9652->capture_buffer = rme9652->capture_dma_buf.area + (cb_bus - rme9652->capture_dma_buf.addr);
1818 rme9652->playback_buffer = rme9652->playback_dma_buf.area + (pb_bus - rme9652->playback_dma_buf.addr);
1823 static void snd_rme9652_set_defaults(struct snd_rme9652 *rme9652)
1827 /* ASSUMPTION: rme9652->lock is either held, or
1828 there is no need to hold it (e.g. during module
1834 SPDIF Input via Coax
1836 maximum latency (7 = 8192 samples, 64Kbyte buffer,
1837 which implies 2 4096 sample, 32Kbyte periods).
1839 if rev 1.5, initialize the S/PDIF receiver.
1843 rme9652->control_register =
1844 RME9652_inp_0 | rme9652_encode_latency(7);
1846 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1848 rme9652_reset_hw_pointer(rme9652);
1849 rme9652_compute_period_size(rme9652);
1851 /* default: thru off for all channels */
1853 for (k = 0; k < RME9652_NCHANNELS; ++k)
1854 rme9652_write(rme9652, RME9652_thru_base + k * 4, 0);
1856 rme9652->thru_bits = 0;
1857 rme9652->passthru = 0;
1859 /* set a default rate so that the channel map is set up */
1861 rme9652_set_rate(rme9652, 48000);
1864 static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id)
1866 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) dev_id;
1868 if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) {
1872 rme9652_write(rme9652, RME9652_irq_clear, 0);
1874 if (rme9652->capture_substream) {
1875 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
1878 if (rme9652->playback_substream) {
1879 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
1884 static snd_pcm_uframes_t snd_rme9652_hw_pointer(struct snd_pcm_substream *substream)
1886 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1887 return rme9652_hw_pointer(rme9652);
1890 static char *rme9652_channel_buffer_location(struct snd_rme9652 *rme9652,
1897 snd_assert(channel >= 0 || channel < RME9652_NCHANNELS, return NULL);
1899 if ((mapped_channel = rme9652->channel_map[channel]) < 0) {
1903 if (stream == SNDRV_PCM_STREAM_CAPTURE) {
1904 return rme9652->capture_buffer +
1905 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1907 return rme9652->playback_buffer +
1908 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1912 static int snd_rme9652_playback_copy(struct snd_pcm_substream *substream, int channel,
1913 snd_pcm_uframes_t pos, void __user *src, snd_pcm_uframes_t count)
1915 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1918 snd_assert(pos + count <= RME9652_CHANNEL_BUFFER_BYTES / 4, return -EINVAL);
1920 channel_buf = rme9652_channel_buffer_location (rme9652,
1921 substream->pstr->stream,
1923 snd_assert(channel_buf != NULL, return -EIO);
1924 if (copy_from_user(channel_buf + pos * 4, src, count * 4))
1929 static int snd_rme9652_capture_copy(struct snd_pcm_substream *substream, int channel,
1930 snd_pcm_uframes_t pos, void __user *dst, snd_pcm_uframes_t count)
1932 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1935 snd_assert(pos + count <= RME9652_CHANNEL_BUFFER_BYTES / 4, return -EINVAL);
1937 channel_buf = rme9652_channel_buffer_location (rme9652,
1938 substream->pstr->stream,
1940 snd_assert(channel_buf != NULL, return -EIO);
1941 if (copy_to_user(dst, channel_buf + pos * 4, count * 4))
1946 static int snd_rme9652_hw_silence(struct snd_pcm_substream *substream, int channel,
1947 snd_pcm_uframes_t pos, snd_pcm_uframes_t count)
1949 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1952 channel_buf = rme9652_channel_buffer_location (rme9652,
1953 substream->pstr->stream,
1955 snd_assert(channel_buf != NULL, return -EIO);
1956 memset(channel_buf + pos * 4, 0, count * 4);
1960 static int snd_rme9652_reset(struct snd_pcm_substream *substream)
1962 struct snd_pcm_runtime *runtime = substream->runtime;
1963 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1964 struct snd_pcm_substream *other;
1965 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1966 other = rme9652->capture_substream;
1968 other = rme9652->playback_substream;
1969 if (rme9652->running)
1970 runtime->status->hw_ptr = rme9652_hw_pointer(rme9652);
1972 runtime->status->hw_ptr = 0;
1974 struct snd_pcm_substream *s;
1975 struct snd_pcm_runtime *oruntime = other->runtime;
1976 snd_pcm_group_for_each_entry(s, substream) {
1978 oruntime->status->hw_ptr = runtime->status->hw_ptr;
1986 static int snd_rme9652_hw_params(struct snd_pcm_substream *substream,
1987 struct snd_pcm_hw_params *params)
1989 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1994 spin_lock_irq(&rme9652->lock);
1996 if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1997 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
1998 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream);
1999 this_pid = rme9652->playback_pid;
2000 other_pid = rme9652->capture_pid;
2002 this_pid = rme9652->capture_pid;
2003 other_pid = rme9652->playback_pid;
2006 if ((other_pid > 0) && (this_pid != other_pid)) {
2008 /* The other stream is open, and not by the same
2009 task as this one. Make sure that the parameters
2010 that matter are the same.
2013 if ((int)params_rate(params) !=
2014 rme9652_adat_sample_rate(rme9652)) {
2015 spin_unlock_irq(&rme9652->lock);
2016 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2020 if (params_period_size(params) != rme9652->period_bytes / 4) {
2021 spin_unlock_irq(&rme9652->lock);
2022 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2028 spin_unlock_irq(&rme9652->lock);
2032 spin_unlock_irq(&rme9652->lock);
2035 /* how to make sure that the rate matches an externally-set one ?
2038 if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) {
2039 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2043 if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) {
2044 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2051 static int snd_rme9652_channel_info(struct snd_pcm_substream *substream,
2052 struct snd_pcm_channel_info *info)
2054 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2057 snd_assert(info->channel < RME9652_NCHANNELS, return -EINVAL);
2059 if ((chn = rme9652->channel_map[info->channel]) < 0) {
2063 info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES;
2069 static int snd_rme9652_ioctl(struct snd_pcm_substream *substream,
2070 unsigned int cmd, void *arg)
2073 case SNDRV_PCM_IOCTL1_RESET:
2075 return snd_rme9652_reset(substream);
2077 case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
2079 struct snd_pcm_channel_info *info = arg;
2080 return snd_rme9652_channel_info(substream, info);
2086 return snd_pcm_lib_ioctl(substream, cmd, arg);
2089 static void rme9652_silence_playback(struct snd_rme9652 *rme9652)
2091 memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES);
2094 static int snd_rme9652_trigger(struct snd_pcm_substream *substream,
2097 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2098 struct snd_pcm_substream *other;
2100 spin_lock(&rme9652->lock);
2101 running = rme9652->running;
2103 case SNDRV_PCM_TRIGGER_START:
2104 running |= 1 << substream->stream;
2106 case SNDRV_PCM_TRIGGER_STOP:
2107 running &= ~(1 << substream->stream);
2111 spin_unlock(&rme9652->lock);
2114 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2115 other = rme9652->capture_substream;
2117 other = rme9652->playback_substream;
2120 struct snd_pcm_substream *s;
2121 snd_pcm_group_for_each_entry(s, substream) {
2123 snd_pcm_trigger_done(s, substream);
2124 if (cmd == SNDRV_PCM_TRIGGER_START)
2125 running |= 1 << s->stream;
2127 running &= ~(1 << s->stream);
2131 if (cmd == SNDRV_PCM_TRIGGER_START) {
2132 if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
2133 substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2134 rme9652_silence_playback(rme9652);
2137 substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2138 rme9652_silence_playback(rme9652);
2141 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2142 rme9652_silence_playback(rme9652);
2145 snd_pcm_trigger_done(substream, substream);
2146 if (!rme9652->running && running)
2147 rme9652_start(rme9652);
2148 else if (rme9652->running && !running)
2149 rme9652_stop(rme9652);
2150 rme9652->running = running;
2151 spin_unlock(&rme9652->lock);
2156 static int snd_rme9652_prepare(struct snd_pcm_substream *substream)
2158 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2159 unsigned long flags;
2162 spin_lock_irqsave(&rme9652->lock, flags);
2163 if (!rme9652->running)
2164 rme9652_reset_hw_pointer(rme9652);
2165 spin_unlock_irqrestore(&rme9652->lock, flags);
2169 static struct snd_pcm_hardware snd_rme9652_playback_subinfo =
2171 .info = (SNDRV_PCM_INFO_MMAP |
2172 SNDRV_PCM_INFO_MMAP_VALID |
2173 SNDRV_PCM_INFO_NONINTERLEAVED |
2174 SNDRV_PCM_INFO_SYNC_START |
2175 SNDRV_PCM_INFO_DOUBLE),
2176 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2177 .rates = (SNDRV_PCM_RATE_44100 |
2178 SNDRV_PCM_RATE_48000 |
2179 SNDRV_PCM_RATE_88200 |
2180 SNDRV_PCM_RATE_96000),
2185 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES * 26,
2186 .period_bytes_min = (64 * 4) * 10,
2187 .period_bytes_max = (8192 * 4) * 26,
2193 static struct snd_pcm_hardware snd_rme9652_capture_subinfo =
2195 .info = (SNDRV_PCM_INFO_MMAP |
2196 SNDRV_PCM_INFO_MMAP_VALID |
2197 SNDRV_PCM_INFO_NONINTERLEAVED |
2198 SNDRV_PCM_INFO_SYNC_START),
2199 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2200 .rates = (SNDRV_PCM_RATE_44100 |
2201 SNDRV_PCM_RATE_48000 |
2202 SNDRV_PCM_RATE_88200 |
2203 SNDRV_PCM_RATE_96000),
2208 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES *26,
2209 .period_bytes_min = (64 * 4) * 10,
2210 .period_bytes_max = (8192 * 4) * 26,
2216 static unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
2218 static struct snd_pcm_hw_constraint_list hw_constraints_period_sizes = {
2219 .count = ARRAY_SIZE(period_sizes),
2220 .list = period_sizes,
2224 static int snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params *params,
2225 struct snd_pcm_hw_rule *rule)
2227 struct snd_rme9652 *rme9652 = rule->private;
2228 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2229 unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels };
2230 return snd_interval_list(c, 2, list, 0);
2233 static int snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params *params,
2234 struct snd_pcm_hw_rule *rule)
2236 struct snd_rme9652 *rme9652 = rule->private;
2237 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2238 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2239 if (r->min > 48000) {
2240 struct snd_interval t = {
2241 .min = rme9652->ds_channels,
2242 .max = rme9652->ds_channels,
2245 return snd_interval_refine(c, &t);
2246 } else if (r->max < 88200) {
2247 struct snd_interval t = {
2248 .min = rme9652->ss_channels,
2249 .max = rme9652->ss_channels,
2252 return snd_interval_refine(c, &t);
2257 static int snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params *params,
2258 struct snd_pcm_hw_rule *rule)
2260 struct snd_rme9652 *rme9652 = rule->private;
2261 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2262 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2263 if (c->min >= rme9652->ss_channels) {
2264 struct snd_interval t = {
2269 return snd_interval_refine(r, &t);
2270 } else if (c->max <= rme9652->ds_channels) {
2271 struct snd_interval t = {
2276 return snd_interval_refine(r, &t);
2281 static int snd_rme9652_playback_open(struct snd_pcm_substream *substream)
2283 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2284 struct snd_pcm_runtime *runtime = substream->runtime;
2286 spin_lock_irq(&rme9652->lock);
2288 snd_pcm_set_sync(substream);
2290 runtime->hw = snd_rme9652_playback_subinfo;
2291 runtime->dma_area = rme9652->playback_buffer;
2292 runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2294 if (rme9652->capture_substream == NULL) {
2295 rme9652_stop(rme9652);
2296 rme9652_set_thru(rme9652, -1, 0);
2299 rme9652->playback_pid = current->pid;
2300 rme9652->playback_substream = substream;
2302 spin_unlock_irq(&rme9652->lock);
2304 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2305 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2306 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2307 snd_rme9652_hw_rule_channels, rme9652,
2308 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2309 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2310 snd_rme9652_hw_rule_channels_rate, rme9652,
2311 SNDRV_PCM_HW_PARAM_RATE, -1);
2312 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2313 snd_rme9652_hw_rule_rate_channels, rme9652,
2314 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2316 rme9652->creg_spdif_stream = rme9652->creg_spdif;
2317 rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2318 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2319 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2323 static int snd_rme9652_playback_release(struct snd_pcm_substream *substream)
2325 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2327 spin_lock_irq(&rme9652->lock);
2329 rme9652->playback_pid = -1;
2330 rme9652->playback_substream = NULL;
2332 spin_unlock_irq(&rme9652->lock);
2334 rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2335 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2336 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2341 static int snd_rme9652_capture_open(struct snd_pcm_substream *substream)
2343 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2344 struct snd_pcm_runtime *runtime = substream->runtime;
2346 spin_lock_irq(&rme9652->lock);
2348 snd_pcm_set_sync(substream);
2350 runtime->hw = snd_rme9652_capture_subinfo;
2351 runtime->dma_area = rme9652->capture_buffer;
2352 runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2354 if (rme9652->playback_substream == NULL) {
2355 rme9652_stop(rme9652);
2356 rme9652_set_thru(rme9652, -1, 0);
2359 rme9652->capture_pid = current->pid;
2360 rme9652->capture_substream = substream;
2362 spin_unlock_irq(&rme9652->lock);
2364 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2365 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2366 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2367 snd_rme9652_hw_rule_channels, rme9652,
2368 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2369 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2370 snd_rme9652_hw_rule_channels_rate, rme9652,
2371 SNDRV_PCM_HW_PARAM_RATE, -1);
2372 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2373 snd_rme9652_hw_rule_rate_channels, rme9652,
2374 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2378 static int snd_rme9652_capture_release(struct snd_pcm_substream *substream)
2380 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2382 spin_lock_irq(&rme9652->lock);
2384 rme9652->capture_pid = -1;
2385 rme9652->capture_substream = NULL;
2387 spin_unlock_irq(&rme9652->lock);
2391 static struct snd_pcm_ops snd_rme9652_playback_ops = {
2392 .open = snd_rme9652_playback_open,
2393 .close = snd_rme9652_playback_release,
2394 .ioctl = snd_rme9652_ioctl,
2395 .hw_params = snd_rme9652_hw_params,
2396 .prepare = snd_rme9652_prepare,
2397 .trigger = snd_rme9652_trigger,
2398 .pointer = snd_rme9652_hw_pointer,
2399 .copy = snd_rme9652_playback_copy,
2400 .silence = snd_rme9652_hw_silence,
2403 static struct snd_pcm_ops snd_rme9652_capture_ops = {
2404 .open = snd_rme9652_capture_open,
2405 .close = snd_rme9652_capture_release,
2406 .ioctl = snd_rme9652_ioctl,
2407 .hw_params = snd_rme9652_hw_params,
2408 .prepare = snd_rme9652_prepare,
2409 .trigger = snd_rme9652_trigger,
2410 .pointer = snd_rme9652_hw_pointer,
2411 .copy = snd_rme9652_capture_copy,
2414 static int __devinit snd_rme9652_create_pcm(struct snd_card *card,
2415 struct snd_rme9652 *rme9652)
2417 struct snd_pcm *pcm;
2420 if ((err = snd_pcm_new(card,
2422 0, 1, 1, &pcm)) < 0) {
2427 pcm->private_data = rme9652;
2428 strcpy(pcm->name, rme9652->card_name);
2430 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops);
2431 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops);
2433 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
2438 static int __devinit snd_rme9652_create(struct snd_card *card,
2439 struct snd_rme9652 *rme9652,
2442 struct pci_dev *pci = rme9652->pci;
2448 rme9652->card = card;
2450 pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev);
2452 switch (rev & 0xff) {
2464 if ((err = pci_enable_device(pci)) < 0)
2467 spin_lock_init(&rme9652->lock);
2469 if ((err = pci_request_regions(pci, "rme9652")) < 0)
2471 rme9652->port = pci_resource_start(pci, 0);
2472 rme9652->iobase = ioremap_nocache(rme9652->port, RME9652_IO_EXTENT);
2473 if (rme9652->iobase == NULL) {
2474 snd_printk(KERN_ERR "unable to remap region 0x%lx-0x%lx\n", rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1);
2478 if (request_irq(pci->irq, snd_rme9652_interrupt, IRQF_SHARED,
2479 "rme9652", rme9652)) {
2480 snd_printk(KERN_ERR "unable to request IRQ %d\n", pci->irq);
2483 rme9652->irq = pci->irq;
2484 rme9652->precise_ptr = precise_ptr;
2486 /* Determine the h/w rev level of the card. This seems like
2487 a particularly kludgy way to encode it, but its what RME
2488 chose to do, so we follow them ...
2491 status = rme9652_read(rme9652, RME9652_status_register);
2492 if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) {
2493 rme9652->hw_rev = 15;
2495 rme9652->hw_rev = 11;
2498 /* Differentiate between the standard Hammerfall, and the
2499 "Light", which does not have the expansion board. This
2500 method comes from information received from Mathhias
2501 Clausen at RME. Display the EEPROM and h/w revID where
2506 case 8: /* original eprom */
2507 strcpy(card->driver, "RME9636");
2508 if (rme9652->hw_rev == 15) {
2509 rme9652->card_name = "RME Digi9636 (Rev 1.5)";
2511 rme9652->card_name = "RME Digi9636";
2513 rme9652->ss_channels = RME9636_NCHANNELS;
2515 case 9: /* W36_G EPROM */
2516 strcpy(card->driver, "RME9636");
2517 rme9652->card_name = "RME Digi9636 (Rev G)";
2518 rme9652->ss_channels = RME9636_NCHANNELS;
2520 case 4: /* W52_G EPROM */
2521 strcpy(card->driver, "RME9652");
2522 rme9652->card_name = "RME Digi9652 (Rev G)";
2523 rme9652->ss_channels = RME9652_NCHANNELS;
2525 case 3: /* original eprom */
2526 strcpy(card->driver, "RME9652");
2527 if (rme9652->hw_rev == 15) {
2528 rme9652->card_name = "RME Digi9652 (Rev 1.5)";
2530 rme9652->card_name = "RME Digi9652";
2532 rme9652->ss_channels = RME9652_NCHANNELS;
2536 rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2;
2538 pci_set_master(rme9652->pci);
2540 if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) {
2544 if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) {
2548 if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) {
2552 snd_rme9652_proc_init(rme9652);
2554 rme9652->last_spdif_sample_rate = -1;
2555 rme9652->last_adat_sample_rate = -1;
2556 rme9652->playback_pid = -1;
2557 rme9652->capture_pid = -1;
2558 rme9652->capture_substream = NULL;
2559 rme9652->playback_substream = NULL;
2561 snd_rme9652_set_defaults(rme9652);
2563 if (rme9652->hw_rev == 15) {
2564 rme9652_initialize_spdif_receiver (rme9652);
2570 static void snd_rme9652_card_free(struct snd_card *card)
2572 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) card->private_data;
2575 snd_rme9652_free(rme9652);
2578 static int __devinit snd_rme9652_probe(struct pci_dev *pci,
2579 const struct pci_device_id *pci_id)
2582 struct snd_rme9652 *rme9652;
2583 struct snd_card *card;
2586 if (dev >= SNDRV_CARDS)
2593 card = snd_card_new(index[dev], id[dev], THIS_MODULE,
2594 sizeof(struct snd_rme9652));
2599 rme9652 = (struct snd_rme9652 *) card->private_data;
2600 card->private_free = snd_rme9652_card_free;
2603 snd_card_set_dev(card, &pci->dev);
2605 if ((err = snd_rme9652_create(card, rme9652, precise_ptr[dev])) < 0) {
2606 snd_card_free(card);
2610 strcpy(card->shortname, rme9652->card_name);
2612 sprintf(card->longname, "%s at 0x%lx, irq %d",
2613 card->shortname, rme9652->port, rme9652->irq);
2616 if ((err = snd_card_register(card)) < 0) {
2617 snd_card_free(card);
2620 pci_set_drvdata(pci, card);
2625 static void __devexit snd_rme9652_remove(struct pci_dev *pci)
2627 snd_card_free(pci_get_drvdata(pci));
2628 pci_set_drvdata(pci, NULL);
2631 static struct pci_driver driver = {
2632 .name = "RME Digi9652 (Hammerfall)",
2633 .id_table = snd_rme9652_ids,
2634 .probe = snd_rme9652_probe,
2635 .remove = __devexit_p(snd_rme9652_remove),
2638 static int __init alsa_card_hammerfall_init(void)
2640 return pci_register_driver(&driver);
2643 static void __exit alsa_card_hammerfall_exit(void)
2645 pci_unregister_driver(&driver);
2648 module_init(alsa_card_hammerfall_init)
2649 module_exit(alsa_card_hammerfall_exit)