git.oblomov.eu Git - linux-2.6/blob - drivers/mtd/chips/jedec_probe.c

   1 /*
   2    Common Flash Interface probe code.
   3    (C) 2000 Red Hat. GPL'd.
   4    $Id: jedec_probe.c,v 1.66 2005/11/07 11:14:23 gleixner Exp $
   5    See JEDEC (http://www.jedec.org/) standard JESD21C (section 3.5)
   6    for the standard this probe goes back to.
   7
   8    Occasionally maintained by Thayne Harbaugh tharbaugh at lnxi dot com
   9 */
  10
  11 #include <linux/module.h>
  12 #include <linux/init.h>
  13 #include <linux/types.h>
  14 #include <linux/kernel.h>
  15 #include <asm/io.h>
  16 #include <asm/byteorder.h>
  17 #include <linux/errno.h>
  18 #include <linux/slab.h>
  19 #include <linux/interrupt.h>
  20
  21 #include <linux/mtd/mtd.h>
  22 #include <linux/mtd/map.h>
  23 #include <linux/mtd/cfi.h>
  24 #include <linux/mtd/gen_probe.h>
  25
  26 /* Manufacturers */
  27 #define MANUFACTURER_AMD        0x0001
  28 #define MANUFACTURER_ATMEL      0x001f
  29 #define MANUFACTURER_FUJITSU    0x0004
  30 #define MANUFACTURER_HYUNDAI    0x00AD
  31 #define MANUFACTURER_INTEL      0x0089
  32 #define MANUFACTURER_MACRONIX   0x00C2
  33 #define MANUFACTURER_NEC        0x0010
  34 #define MANUFACTURER_PMC        0x009D
  35 #define MANUFACTURER_SHARP      0x00b0
  36 #define MANUFACTURER_SST        0x00BF
  37 #define MANUFACTURER_ST         0x0020
  38 #define MANUFACTURER_TOSHIBA    0x0098
  39 #define MANUFACTURER_WINBOND    0x00da
  40
  41
  42 /* AMD */
  43 #define AM29DL800BB     0x22C8
  44 #define AM29DL800BT     0x224A
  45
  46 #define AM29F800BB      0x2258
  47 #define AM29F800BT      0x22D6
  48 #define AM29LV400BB     0x22BA
  49 #define AM29LV400BT     0x22B9
  50 #define AM29LV800BB     0x225B
  51 #define AM29LV800BT     0x22DA
  52 #define AM29LV160DT     0x22C4
  53 #define AM29LV160DB     0x2249
  54 #define AM29F017D       0x003D
  55 #define AM29F016D       0x00AD
  56 #define AM29F080        0x00D5
  57 #define AM29F040        0x00A4
  58 #define AM29LV040B      0x004F
  59 #define AM29F032B       0x0041
  60 #define AM29F002T       0x00B0
  61
  62 /* Atmel */
  63 #define AT49BV512       0x0003
  64 #define AT29LV512       0x003d
  65 #define AT49BV16X       0x00C0
  66 #define AT49BV16XT      0x00C2
  67 #define AT49BV32X       0x00C8
  68 #define AT49BV32XT      0x00C9
  69
  70 /* Fujitsu */
  71 #define MBM29F040C      0x00A4
  72 #define MBM29F800BA     0x2258
  73 #define MBM29LV650UE    0x22D7
  74 #define MBM29LV320TE    0x22F6
  75 #define MBM29LV320BE    0x22F9
  76 #define MBM29LV160TE    0x22C4
  77 #define MBM29LV160BE    0x2249
  78 #define MBM29LV800BA    0x225B
  79 #define MBM29LV800TA    0x22DA
  80 #define MBM29LV400TC    0x22B9
  81 #define MBM29LV400BC    0x22BA
  82
  83 /* Hyundai */
  84 #define HY29F002T       0x00B0
  85
  86 /* Intel */
  87 #define I28F004B3T      0x00d4
  88 #define I28F004B3B      0x00d5
  89 #define I28F400B3T      0x8894
  90 #define I28F400B3B      0x8895
  91 #define I28F008S5       0x00a6
  92 #define I28F016S5       0x00a0
  93 #define I28F008SA       0x00a2
  94 #define I28F008B3T      0x00d2
  95 #define I28F008B3B      0x00d3
  96 #define I28F800B3T      0x8892
  97 #define I28F800B3B      0x8893
  98 #define I28F016S3       0x00aa
  99 #define I28F016B3T      0x00d0
 100 #define I28F016B3B      0x00d1
 101 #define I28F160B3T      0x8890
 102 #define I28F160B3B      0x8891
 103 #define I28F320B3T      0x8896
 104 #define I28F320B3B      0x8897
 105 #define I28F640B3T      0x8898
 106 #define I28F640B3B      0x8899
 107 #define I82802AB        0x00ad
 108 #define I82802AC        0x00ac
 109
 110 /* Macronix */
 111 #define MX29LV040C      0x004F
 112 #define MX29LV160T      0x22C4
 113 #define MX29LV160B      0x2249
 114 #define MX29F040        0x00A4
 115 #define MX29F016        0x00AD
 116 #define MX29F002T       0x00B0
 117 #define MX29F004T       0x0045
 118 #define MX29F004B       0x0046
 119
 120 /* NEC */
 121 #define UPD29F064115    0x221C
 122
 123 /* PMC */
 124 #define PM49FL002       0x006D
 125 #define PM49FL004       0x006E
 126 #define PM49FL008       0x006A
 127
 128 /* Sharp */
 129 #define LH28F640BF      0x00b0
 130
 131 /* ST - www.st.com */
 132 #define M29F800AB       0x0058
 133 #define M29W800DT       0x00D7
 134 #define M29W800DB       0x005B
 135 #define M29W160DT       0x22C4
 136 #define M29W160DB       0x2249
 137 #define M29W040B        0x00E3
 138 #define M50FW040        0x002C
 139 #define M50FW080        0x002D
 140 #define M50FW016        0x002E
 141 #define M50LPW080       0x002F
 142
 143 /* SST */
 144 #define SST29EE020      0x0010
 145 #define SST29LE020      0x0012
 146 #define SST29EE512      0x005d
 147 #define SST29LE512      0x003d
 148 #define SST39LF800      0x2781
 149 #define SST39LF160      0x2782
 150 #define SST39VF1601     0x234b
 151 #define SST39LF512      0x00D4
 152 #define SST39LF010      0x00D5
 153 #define SST39LF020      0x00D6
 154 #define SST39LF040      0x00D7
 155 #define SST39SF010A     0x00B5
 156 #define SST39SF020A     0x00B6
 157 #define SST49LF004B     0x0060
 158 #define SST49LF040B     0x0050
 159 #define SST49LF008A     0x005a
 160 #define SST49LF030A     0x001C
 161 #define SST49LF040A     0x0051
 162 #define SST49LF080A     0x005B
 163
 164 /* Toshiba */
 165 #define TC58FVT160      0x00C2
 166 #define TC58FVB160      0x0043
 167 #define TC58FVT321      0x009A
 168 #define TC58FVB321      0x009C
 169 #define TC58FVT641      0x0093
 170 #define TC58FVB641      0x0095
 171
 172 /* Winbond */
 173 #define W49V002A        0x00b0
 174
 175
 176 /*
 177  * Unlock address sets for AMD command sets.
 178  * Intel command sets use the MTD_UADDR_UNNECESSARY.
 179  * Each identifier, except MTD_UADDR_UNNECESSARY, and
 180  * MTD_UADDR_NO_SUPPORT must be defined below in unlock_addrs[].
 181  * MTD_UADDR_NOT_SUPPORTED must be 0 so that structure
 182  * initialization need not require initializing all of the
 183  * unlock addresses for all bit widths.
 184  */
 185 enum uaddr {
 186         MTD_UADDR_NOT_SUPPORTED = 0,    /* data width not supported */
 187         MTD_UADDR_0x0555_0x02AA,
 188         MTD_UADDR_0x0555_0x0AAA,
 189         MTD_UADDR_0x5555_0x2AAA,
 190         MTD_UADDR_0x0AAA_0x0555,
 191         MTD_UADDR_DONT_CARE,            /* Requires an arbitrary address */
 192         MTD_UADDR_UNNECESSARY,          /* Does not require any address */
 193 };
 194
 195
 196 struct unlock_addr {
 197         u32 addr1;
 198         u32 addr2;
 199 };
 200
 201
 202 /*
 203  * I don't like the fact that the first entry in unlock_addrs[]
 204  * exists, but is for MTD_UADDR_NOT_SUPPORTED - and, therefore,
 205  * should not be used.  The  problem is that structures with
 206  * initializers have extra fields initialized to 0.  It is _very_
 207  * desireable to have the unlock address entries for unsupported
 208  * data widths automatically initialized - that means that
 209  * MTD_UADDR_NOT_SUPPORTED must be 0 and the first entry here
 210  * must go unused.
 211  */
 212 static const struct unlock_addr  unlock_addrs[] = {
 213         [MTD_UADDR_NOT_SUPPORTED] = {
 214                 .addr1 = 0xffff,
 215                 .addr2 = 0xffff
 216         },
 217
 218         [MTD_UADDR_0x0555_0x02AA] = {
 219                 .addr1 = 0x0555,
 220                 .addr2 = 0x02aa
 221         },
 222
 223         [MTD_UADDR_0x0555_0x0AAA] = {
 224                 .addr1 = 0x0555,
 225                 .addr2 = 0x0aaa
 226         },
 227
 228         [MTD_UADDR_0x5555_0x2AAA] = {
 229                 .addr1 = 0x5555,
 230                 .addr2 = 0x2aaa
 231         },
 232
 233         [MTD_UADDR_0x0AAA_0x0555] = {
 234                 .addr1 = 0x0AAA,
 235                 .addr2 = 0x0555
 236         },
 237
 238         [MTD_UADDR_DONT_CARE] = {
 239                 .addr1 = 0x0000,      /* Doesn't matter which address */
 240                 .addr2 = 0x0000       /* is used - must be last entry */
 241         },
 242
 243         [MTD_UADDR_UNNECESSARY] = {
 244                 .addr1 = 0x0000,
 245                 .addr2 = 0x0000
 246         }
 247 };
 248
 249
 250 struct amd_flash_info {
 251         const __u16 mfr_id;
 252         const __u16 dev_id;
 253         const char *name;
 254         const int DevSize;
 255         const int NumEraseRegions;
 256         const int CmdSet;
 257         const __u8 uaddr[4];            /* unlock addrs for 8, 16, 32, 64 */
 258         const ulong regions[6];
 259 };
 260
 261 #define ERASEINFO(size,blocks) (size<<8)|(blocks-1)
 262
 263 #define SIZE_64KiB  16
 264 #define SIZE_128KiB 17
 265 #define SIZE_256KiB 18
 266 #define SIZE_512KiB 19
 267 #define SIZE_1MiB   20
 268 #define SIZE_2MiB   21
 269 #define SIZE_4MiB   22
 270 #define SIZE_8MiB   23
 271
 272
 273 /*
 274  * Please keep this list ordered by manufacturer!
 275  * Fortunately, the list isn't searched often and so a
 276  * slow, linear search isn't so bad.
 277  */
 278 static const struct amd_flash_info jedec_table[] = {
 279         {
 280                 .mfr_id         = MANUFACTURER_AMD,
 281                 .dev_id         = AM29F032B,
 282                 .name           = "AMD AM29F032B",
 283                 .uaddr          = {
 284                         [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
 285                 },
 286                 .DevSize        = SIZE_4MiB,
 287                 .CmdSet         = P_ID_AMD_STD,
 288                 .NumEraseRegions= 1,
 289                 .regions        = {
 290                         ERASEINFO(0x10000,64)
 291                 }
 292         }, {
 293                 .mfr_id         = MANUFACTURER_AMD,
 294                 .dev_id         = AM29LV160DT,
 295                 .name           = "AMD AM29LV160DT",
 296                 .uaddr          = {
 297                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 298                         [1] = MTD_UADDR_0x0555_0x02AA   /* x16 */
 299                 },
 300                 .DevSize        = SIZE_2MiB,
 301                 .CmdSet         = P_ID_AMD_STD,
 302                 .NumEraseRegions= 4,
 303                 .regions        = {
 304                         ERASEINFO(0x10000,31),
 305                         ERASEINFO(0x08000,1),
 306                         ERASEINFO(0x02000,2),
 307                         ERASEINFO(0x04000,1)
 308                 }
 309         }, {
 310                 .mfr_id         = MANUFACTURER_AMD,
 311                 .dev_id         = AM29LV160DB,
 312                 .name           = "AMD AM29LV160DB",
 313                 .uaddr          = {
 314                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 315                         [1] = MTD_UADDR_0x0555_0x02AA   /* x16 */
 316                 },
 317                 .DevSize        = SIZE_2MiB,
 318                 .CmdSet         = P_ID_AMD_STD,
 319                 .NumEraseRegions= 4,
 320                 .regions        = {
 321                         ERASEINFO(0x04000,1),
 322                         ERASEINFO(0x02000,2),
 323                         ERASEINFO(0x08000,1),
 324                         ERASEINFO(0x10000,31)
 325                 }
 326         }, {
 327                 .mfr_id         = MANUFACTURER_AMD,
 328                 .dev_id         = AM29LV400BB,
 329                 .name           = "AMD AM29LV400BB",
 330                 .uaddr          = {
 331                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 332                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 333                 },
 334                 .DevSize        = SIZE_512KiB,
 335                 .CmdSet         = P_ID_AMD_STD,
 336                 .NumEraseRegions= 4,
 337                 .regions        = {
 338                         ERASEINFO(0x04000,1),
 339                         ERASEINFO(0x02000,2),
 340                         ERASEINFO(0x08000,1),
 341                         ERASEINFO(0x10000,7)
 342                 }
 343         }, {
 344                 .mfr_id         = MANUFACTURER_AMD,
 345                 .dev_id         = AM29LV400BT,
 346                 .name           = "AMD AM29LV400BT",
 347                 .uaddr          = {
 348                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 349                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 350                 },
 351                 .DevSize        = SIZE_512KiB,
 352                 .CmdSet         = P_ID_AMD_STD,
 353                 .NumEraseRegions= 4,
 354                 .regions        = {
 355                         ERASEINFO(0x10000,7),
 356                         ERASEINFO(0x08000,1),
 357                         ERASEINFO(0x02000,2),
 358                         ERASEINFO(0x04000,1)
 359                 }
 360         }, {
 361                 .mfr_id         = MANUFACTURER_AMD,
 362                 .dev_id         = AM29LV800BB,
 363                 .name           = "AMD AM29LV800BB",
 364                 .uaddr          = {
 365                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 366                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 367                 },
 368                 .DevSize        = SIZE_1MiB,
 369                 .CmdSet         = P_ID_AMD_STD,
 370                 .NumEraseRegions= 4,
 371                 .regions        = {
 372                         ERASEINFO(0x04000,1),
 373                         ERASEINFO(0x02000,2),
 374                         ERASEINFO(0x08000,1),
 375                         ERASEINFO(0x10000,15),
 376                 }
 377         }, {
 378 /* add DL */
 379                 .mfr_id         = MANUFACTURER_AMD,
 380                 .dev_id         = AM29DL800BB,
 381                 .name           = "AMD AM29DL800BB",
 382                 .uaddr          = {
 383                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 384                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 385                 },
 386                 .DevSize        = SIZE_1MiB,
 387                 .CmdSet         = P_ID_AMD_STD,
 388                 .NumEraseRegions= 6,
 389                 .regions        = {
 390                         ERASEINFO(0x04000,1),
 391                         ERASEINFO(0x08000,1),
 392                         ERASEINFO(0x02000,4),
 393                         ERASEINFO(0x08000,1),
 394                         ERASEINFO(0x04000,1),
 395                         ERASEINFO(0x10000,14)
 396                 }
 397         }, {
 398                 .mfr_id         = MANUFACTURER_AMD,
 399                 .dev_id         = AM29DL800BT,
 400                 .name           = "AMD AM29DL800BT",
 401                 .uaddr          = {
 402                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 403                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 404                 },
 405                 .DevSize        = SIZE_1MiB,
 406                 .CmdSet         = P_ID_AMD_STD,
 407                 .NumEraseRegions= 6,
 408                 .regions        = {
 409                         ERASEINFO(0x10000,14),
 410                         ERASEINFO(0x04000,1),
 411                         ERASEINFO(0x08000,1),
 412                         ERASEINFO(0x02000,4),
 413                         ERASEINFO(0x08000,1),
 414                         ERASEINFO(0x04000,1)
 415                 }
 416         }, {
 417                 .mfr_id         = MANUFACTURER_AMD,
 418                 .dev_id         = AM29F800BB,
 419                 .name           = "AMD AM29F800BB",
 420                 .uaddr          = {
 421                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 422                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 423                 },
 424                 .DevSize        = SIZE_1MiB,
 425                 .CmdSet         = P_ID_AMD_STD,
 426                 .NumEraseRegions= 4,
 427                 .regions        = {
 428                         ERASEINFO(0x04000,1),
 429                         ERASEINFO(0x02000,2),
 430                         ERASEINFO(0x08000,1),
 431                         ERASEINFO(0x10000,15),
 432                 }
 433         }, {
 434                 .mfr_id         = MANUFACTURER_AMD,
 435                 .dev_id         = AM29LV800BT,
 436                 .name           = "AMD AM29LV800BT",
 437                 .uaddr          = {
 438                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 439                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 440                 },
 441                 .DevSize        = SIZE_1MiB,
 442                 .CmdSet         = P_ID_AMD_STD,
 443                 .NumEraseRegions= 4,
 444                 .regions        = {
 445                         ERASEINFO(0x10000,15),
 446                         ERASEINFO(0x08000,1),
 447                         ERASEINFO(0x02000,2),
 448                         ERASEINFO(0x04000,1)
 449                 }
 450         }, {
 451                 .mfr_id         = MANUFACTURER_AMD,
 452                 .dev_id         = AM29F800BT,
 453                 .name           = "AMD AM29F800BT",
 454                 .uaddr          = {
 455                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 456                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 457                 },
 458                 .DevSize        = SIZE_1MiB,
 459                 .CmdSet         = P_ID_AMD_STD,
 460                 .NumEraseRegions= 4,
 461                 .regions        = {
 462                         ERASEINFO(0x10000,15),
 463                         ERASEINFO(0x08000,1),
 464                         ERASEINFO(0x02000,2),
 465                         ERASEINFO(0x04000,1)
 466                 }
 467         }, {
 468                 .mfr_id         = MANUFACTURER_AMD,
 469                 .dev_id         = AM29F017D,
 470                 .name           = "AMD AM29F017D",
 471                 .uaddr          = {
 472                         [0] = MTD_UADDR_DONT_CARE     /* x8 */
 473                 },
 474                 .DevSize        = SIZE_2MiB,
 475                 .CmdSet         = P_ID_AMD_STD,
 476                 .NumEraseRegions= 1,
 477                 .regions        = {
 478                         ERASEINFO(0x10000,32),
 479                 }
 480         }, {
 481                 .mfr_id         = MANUFACTURER_AMD,
 482                 .dev_id         = AM29F016D,
 483                 .name           = "AMD AM29F016D",
 484                 .uaddr          = {
 485                         [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
 486                 },
 487                 .DevSize        = SIZE_2MiB,
 488                 .CmdSet         = P_ID_AMD_STD,
 489                 .NumEraseRegions= 1,
 490                 .regions        = {
 491                         ERASEINFO(0x10000,32),
 492                 }
 493         }, {
 494                 .mfr_id         = MANUFACTURER_AMD,
 495                 .dev_id         = AM29F080,
 496                 .name           = "AMD AM29F080",
 497                 .uaddr          = {
 498                         [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
 499                 },
 500                 .DevSize        = SIZE_1MiB,
 501                 .CmdSet         = P_ID_AMD_STD,
 502                 .NumEraseRegions= 1,
 503                 .regions        = {
 504                         ERASEINFO(0x10000,16),
 505                 }
 506         }, {
 507                 .mfr_id         = MANUFACTURER_AMD,
 508                 .dev_id         = AM29F040,
 509                 .name           = "AMD AM29F040",
 510                 .uaddr          = {
 511                         [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
 512                 },
 513                 .DevSize        = SIZE_512KiB,
 514                 .CmdSet         = P_ID_AMD_STD,
 515                 .NumEraseRegions= 1,
 516                 .regions        = {
 517                         ERASEINFO(0x10000,8),
 518                 }
 519         }, {
 520                 .mfr_id         = MANUFACTURER_AMD,
 521                 .dev_id         = AM29LV040B,
 522                 .name           = "AMD AM29LV040B",
 523                 .uaddr          = {
 524                         [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
 525                 },
 526                 .DevSize        = SIZE_512KiB,
 527                 .CmdSet         = P_ID_AMD_STD,
 528                 .NumEraseRegions= 1,
 529                 .regions        = {
 530                         ERASEINFO(0x10000,8),
 531                 }
 532         }, {
 533                 .mfr_id         = MANUFACTURER_AMD,
 534                 .dev_id         = AM29F002T,
 535                 .name           = "AMD AM29F002T",
 536                 .uaddr          = {
 537                         [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
 538                 },
 539                 .DevSize        = SIZE_256KiB,
 540                 .CmdSet         = P_ID_AMD_STD,
 541                 .NumEraseRegions= 4,
 542                 .regions        = {
 543                         ERASEINFO(0x10000,3),
 544                         ERASEINFO(0x08000,1),
 545                         ERASEINFO(0x02000,2),
 546                         ERASEINFO(0x04000,1),
 547                 }
 548         }, {
 549                 .mfr_id         = MANUFACTURER_ATMEL,
 550                 .dev_id         = AT49BV512,
 551                 .name           = "Atmel AT49BV512",
 552                 .uaddr          = {
 553                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
 554                 },
 555                 .DevSize        = SIZE_64KiB,
 556                 .CmdSet         = P_ID_AMD_STD,
 557                 .NumEraseRegions= 1,
 558                 .regions        = {
 559                         ERASEINFO(0x10000,1)
 560                 }
 561         }, {
 562                 .mfr_id         = MANUFACTURER_ATMEL,
 563                 .dev_id         = AT29LV512,
 564                 .name           = "Atmel AT29LV512",
 565                 .uaddr          = {
 566                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
 567                 },
 568                 .DevSize        = SIZE_64KiB,
 569                 .CmdSet         = P_ID_AMD_STD,
 570                 .NumEraseRegions= 1,
 571                 .regions        = {
 572                         ERASEINFO(0x80,256),
 573                         ERASEINFO(0x80,256)
 574                 }
 575         }, {
 576                 .mfr_id         = MANUFACTURER_ATMEL,
 577                 .dev_id         = AT49BV16X,
 578                 .name           = "Atmel AT49BV16X",
 579                 .uaddr          = {
 580                         [0] = MTD_UADDR_0x0555_0x0AAA,  /* x8 */
 581                         [1] = MTD_UADDR_0x0555_0x0AAA   /* x16 */
 582                 },
 583                 .DevSize        = SIZE_2MiB,
 584                 .CmdSet         = P_ID_AMD_STD,
 585                 .NumEraseRegions= 2,
 586                 .regions        = {
 587                         ERASEINFO(0x02000,8),
 588                         ERASEINFO(0x10000,31)
 589                 }
 590         }, {
 591                 .mfr_id         = MANUFACTURER_ATMEL,
 592                 .dev_id         = AT49BV16XT,
 593                 .name           = "Atmel AT49BV16XT",
 594                 .uaddr          = {
 595                         [0] = MTD_UADDR_0x0555_0x0AAA,  /* x8 */
 596                         [1] = MTD_UADDR_0x0555_0x0AAA   /* x16 */
 597                 },
 598                 .DevSize        = SIZE_2MiB,
 599                 .CmdSet         = P_ID_AMD_STD,
 600                 .NumEraseRegions= 2,
 601                 .regions        = {
 602                         ERASEINFO(0x10000,31),
 603                         ERASEINFO(0x02000,8)
 604                 }
 605         }, {
 606                 .mfr_id         = MANUFACTURER_ATMEL,
 607                 .dev_id         = AT49BV32X,
 608                 .name           = "Atmel AT49BV32X",
 609                 .uaddr          = {
 610                         [0] = MTD_UADDR_0x0555_0x0AAA,  /* x8 */
 611                         [1] = MTD_UADDR_0x0555_0x0AAA   /* x16 */
 612                 },
 613                 .DevSize        = SIZE_4MiB,
 614                 .CmdSet         = P_ID_AMD_STD,
 615                 .NumEraseRegions= 2,
 616                 .regions        = {
 617                         ERASEINFO(0x02000,8),
 618                         ERASEINFO(0x10000,63)
 619                 }
 620         }, {
 621                 .mfr_id         = MANUFACTURER_ATMEL,
 622                 .dev_id         = AT49BV32XT,
 623                 .name           = "Atmel AT49BV32XT",
 624                 .uaddr          = {
 625                         [0] = MTD_UADDR_0x0555_0x0AAA,  /* x8 */
 626                         [1] = MTD_UADDR_0x0555_0x0AAA   /* x16 */
 627                 },
 628                 .DevSize        = SIZE_4MiB,
 629                 .CmdSet         = P_ID_AMD_STD,
 630                 .NumEraseRegions= 2,
 631                 .regions        = {
 632                         ERASEINFO(0x10000,63),
 633                         ERASEINFO(0x02000,8)
 634                 }
 635         }, {
 636                 .mfr_id         = MANUFACTURER_FUJITSU,
 637                 .dev_id         = MBM29F040C,
 638                 .name           = "Fujitsu MBM29F040C",
 639                 .uaddr          = {
 640                         [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */
 641                 },
 642                 .DevSize        = SIZE_512KiB,
 643                 .CmdSet         = P_ID_AMD_STD,
 644                 .NumEraseRegions= 1,
 645                 .regions        = {
 646                         ERASEINFO(0x10000,8)
 647                 }
 648         }, {
 649                 .mfr_id         = MANUFACTURER_FUJITSU,
 650                 .dev_id         = MBM29F800BA,
 651                 .name           = "Fujitsu MBM29F800BA",
 652                 .uaddr          = {
 653                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 654                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 655                 },
 656                 .DevSize        = SIZE_1MiB,
 657                 .CmdSet         = P_ID_AMD_STD,
 658                 .NumEraseRegions= 4,
 659                 .regions        = {
 660                         ERASEINFO(0x04000,1),
 661                         ERASEINFO(0x02000,2),
 662                         ERASEINFO(0x08000,1),
 663                         ERASEINFO(0x10000,15),
 664                 }
 665         }, {
 666                 .mfr_id         = MANUFACTURER_FUJITSU,
 667                 .dev_id         = MBM29LV650UE,
 668                 .name           = "Fujitsu MBM29LV650UE",
 669                 .uaddr          = {
 670                         [0] = MTD_UADDR_DONT_CARE     /* x16 */
 671                 },
 672                 .DevSize        = SIZE_8MiB,
 673                 .CmdSet         = P_ID_AMD_STD,
 674                 .NumEraseRegions= 1,
 675                 .regions        = {
 676                         ERASEINFO(0x10000,128)
 677                 }
 678         }, {
 679                 .mfr_id         = MANUFACTURER_FUJITSU,
 680                 .dev_id         = MBM29LV320TE,
 681                 .name           = "Fujitsu MBM29LV320TE",
 682                 .uaddr          = {
 683                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 684                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 685                 },
 686                 .DevSize        = SIZE_4MiB,
 687                 .CmdSet         = P_ID_AMD_STD,
 688                 .NumEraseRegions= 2,
 689                 .regions        = {
 690                         ERASEINFO(0x10000,63),
 691                         ERASEINFO(0x02000,8)
 692                 }
 693         }, {
 694                 .mfr_id         = MANUFACTURER_FUJITSU,
 695                 .dev_id         = MBM29LV320BE,
 696                 .name           = "Fujitsu MBM29LV320BE",
 697                 .uaddr          = {
 698                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 699                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 700                 },
 701                 .DevSize        = SIZE_4MiB,
 702                 .CmdSet         = P_ID_AMD_STD,
 703                 .NumEraseRegions= 2,
 704                 .regions        = {
 705                         ERASEINFO(0x02000,8),
 706                         ERASEINFO(0x10000,63)
 707                 }
 708         }, {
 709                 .mfr_id         = MANUFACTURER_FUJITSU,
 710                 .dev_id         = MBM29LV160TE,
 711                 .name           = "Fujitsu MBM29LV160TE",
 712                 .uaddr          = {
 713                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 714                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 715                 },
 716                 .DevSize        = SIZE_2MiB,
 717                 .CmdSet         = P_ID_AMD_STD,
 718                 .NumEraseRegions= 4,
 719                 .regions        = {
 720                         ERASEINFO(0x10000,31),
 721                         ERASEINFO(0x08000,1),
 722                         ERASEINFO(0x02000,2),
 723                         ERASEINFO(0x04000,1)
 724                 }
 725         }, {
 726                 .mfr_id         = MANUFACTURER_FUJITSU,
 727                 .dev_id         = MBM29LV160BE,
 728                 .name           = "Fujitsu MBM29LV160BE",
 729                 .uaddr          = {
 730                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 731                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 732                 },
 733                 .DevSize        = SIZE_2MiB,
 734                 .CmdSet         = P_ID_AMD_STD,
 735                 .NumEraseRegions= 4,
 736                 .regions        = {
 737                         ERASEINFO(0x04000,1),
 738                         ERASEINFO(0x02000,2),
 739                         ERASEINFO(0x08000,1),
 740                         ERASEINFO(0x10000,31)
 741                 }
 742         }, {
 743                 .mfr_id         = MANUFACTURER_FUJITSU,
 744                 .dev_id         = MBM29LV800BA,
 745                 .name           = "Fujitsu MBM29LV800BA",
 746                 .uaddr          = {
 747                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 748                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 749                 },
 750                 .DevSize        = SIZE_1MiB,
 751                 .CmdSet         = P_ID_AMD_STD,
 752                 .NumEraseRegions= 4,
 753                 .regions        = {
 754                         ERASEINFO(0x04000,1),
 755                         ERASEINFO(0x02000,2),
 756                         ERASEINFO(0x08000,1),
 757                         ERASEINFO(0x10000,15)
 758                 }
 759         }, {
 760                 .mfr_id         = MANUFACTURER_FUJITSU,
 761                 .dev_id         = MBM29LV800TA,
 762                 .name           = "Fujitsu MBM29LV800TA",
 763                 .uaddr          = {
 764                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 765                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 766                 },
 767                 .DevSize        = SIZE_1MiB,
 768                 .CmdSet         = P_ID_AMD_STD,
 769                 .NumEraseRegions= 4,
 770                 .regions        = {
 771                         ERASEINFO(0x10000,15),
 772                         ERASEINFO(0x08000,1),
 773                         ERASEINFO(0x02000,2),
 774                         ERASEINFO(0x04000,1)
 775                 }
 776         }, {
 777                 .mfr_id         = MANUFACTURER_FUJITSU,
 778                 .dev_id         = MBM29LV400BC,
 779                 .name           = "Fujitsu MBM29LV400BC",
 780                 .uaddr          = {
 781                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 782                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 783                 },
 784                 .DevSize        = SIZE_512KiB,
 785                 .CmdSet         = P_ID_AMD_STD,
 786                 .NumEraseRegions= 4,
 787                 .regions        = {
 788                         ERASEINFO(0x04000,1),
 789                         ERASEINFO(0x02000,2),
 790                         ERASEINFO(0x08000,1),
 791                         ERASEINFO(0x10000,7)
 792                 }
 793         }, {
 794                 .mfr_id         = MANUFACTURER_FUJITSU,
 795                 .dev_id         = MBM29LV400TC,
 796                 .name           = "Fujitsu MBM29LV400TC",
 797                 .uaddr          = {
 798                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 799                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 800                 },
 801                 .DevSize        = SIZE_512KiB,
 802                 .CmdSet         = P_ID_AMD_STD,
 803                 .NumEraseRegions= 4,
 804                 .regions        = {
 805                         ERASEINFO(0x10000,7),
 806                         ERASEINFO(0x08000,1),
 807                         ERASEINFO(0x02000,2),
 808                         ERASEINFO(0x04000,1)
 809                 }
 810         }, {
 811                 .mfr_id         = MANUFACTURER_HYUNDAI,
 812                 .dev_id         = HY29F002T,
 813                 .name           = "Hyundai HY29F002T",
 814                 .uaddr          = {
 815                         [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
 816                 },
 817                 .DevSize        = SIZE_256KiB,
 818                 .CmdSet         = P_ID_AMD_STD,
 819                 .NumEraseRegions= 4,
 820                 .regions        = {
 821                         ERASEINFO(0x10000,3),
 822                         ERASEINFO(0x08000,1),
 823                         ERASEINFO(0x02000,2),
 824                         ERASEINFO(0x04000,1),
 825                 }
 826         }, {
 827                 .mfr_id         = MANUFACTURER_INTEL,
 828                 .dev_id         = I28F004B3B,
 829                 .name           = "Intel 28F004B3B",
 830                 .uaddr          = {
 831                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
 832                 },
 833                 .DevSize        = SIZE_512KiB,
 834                 .CmdSet         = P_ID_INTEL_STD,
 835                 .NumEraseRegions= 2,
 836                 .regions        = {
 837                         ERASEINFO(0x02000, 8),
 838                         ERASEINFO(0x10000, 7),
 839                 }
 840         }, {
 841                 .mfr_id         = MANUFACTURER_INTEL,
 842                 .dev_id         = I28F004B3T,
 843                 .name           = "Intel 28F004B3T",
 844                 .uaddr          = {
 845                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
 846                 },
 847                 .DevSize        = SIZE_512KiB,
 848                 .CmdSet         = P_ID_INTEL_STD,
 849                 .NumEraseRegions= 2,
 850                 .regions        = {
 851                         ERASEINFO(0x10000, 7),
 852                         ERASEINFO(0x02000, 8),
 853                 }
 854         }, {
 855                 .mfr_id         = MANUFACTURER_INTEL,
 856                 .dev_id         = I28F400B3B,
 857                 .name           = "Intel 28F400B3B",
 858                 .uaddr          = {
 859                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
 860                         [1] = MTD_UADDR_UNNECESSARY,    /* x16 */
 861                 },
 862                 .DevSize        = SIZE_512KiB,
 863                 .CmdSet         = P_ID_INTEL_STD,
 864                 .NumEraseRegions= 2,
 865                 .regions        = {
 866                         ERASEINFO(0x02000, 8),
 867                         ERASEINFO(0x10000, 7),
 868                 }
 869         }, {
 870                 .mfr_id         = MANUFACTURER_INTEL,
 871                 .dev_id         = I28F400B3T,
 872                 .name           = "Intel 28F400B3T",
 873                 .uaddr          = {
 874                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
 875                         [1] = MTD_UADDR_UNNECESSARY,    /* x16 */
 876                 },
 877                 .DevSize        = SIZE_512KiB,
 878                 .CmdSet         = P_ID_INTEL_STD,
 879                 .NumEraseRegions= 2,
 880                 .regions        = {
 881                         ERASEINFO(0x10000, 7),
 882                         ERASEINFO(0x02000, 8),
 883                 }
 884         }, {
 885                 .mfr_id         = MANUFACTURER_INTEL,
 886                 .dev_id         = I28F008B3B,
 887                 .name           = "Intel 28F008B3B",
 888                 .uaddr          = {
 889                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
 890                 },
 891                 .DevSize        = SIZE_1MiB,
 892                 .CmdSet         = P_ID_INTEL_STD,
 893                 .NumEraseRegions= 2,
 894                 .regions        = {
 895                         ERASEINFO(0x02000, 8),
 896                         ERASEINFO(0x10000, 15),
 897                 }
 898         }, {
 899                 .mfr_id         = MANUFACTURER_INTEL,
 900                 .dev_id         = I28F008B3T,
 901                 .name           = "Intel 28F008B3T",
 902                 .uaddr          = {
 903                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
 904                 },
 905                 .DevSize        = SIZE_1MiB,
 906                 .CmdSet         = P_ID_INTEL_STD,
 907                 .NumEraseRegions= 2,
 908                 .regions        = {
 909                         ERASEINFO(0x10000, 15),
 910                         ERASEINFO(0x02000, 8),
 911                 }
 912         }, {
 913                 .mfr_id         = MANUFACTURER_INTEL,
 914                 .dev_id         = I28F008S5,
 915                 .name           = "Intel 28F008S5",
 916                 .uaddr          = {
 917                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
 918                 },
 919                 .DevSize        = SIZE_1MiB,
 920                 .CmdSet         = P_ID_INTEL_EXT,
 921                 .NumEraseRegions= 1,
 922                 .regions        = {
 923                         ERASEINFO(0x10000,16),
 924                 }
 925         }, {
 926                 .mfr_id         = MANUFACTURER_INTEL,
 927                 .dev_id         = I28F016S5,
 928                 .name           = "Intel 28F016S5",
 929                 .uaddr          = {
 930                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
 931                 },
 932                 .DevSize        = SIZE_2MiB,
 933                 .CmdSet         = P_ID_INTEL_EXT,
 934                 .NumEraseRegions= 1,
 935                 .regions        = {
 936                         ERASEINFO(0x10000,32),
 937                 }
 938         }, {
 939                 .mfr_id         = MANUFACTURER_INTEL,
 940                 .dev_id         = I28F008SA,
 941                 .name           = "Intel 28F008SA",
 942                 .uaddr          = {
 943                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
 944                 },
 945                 .DevSize        = SIZE_1MiB,
 946                 .CmdSet         = P_ID_INTEL_STD,
 947                 .NumEraseRegions= 1,
 948                 .regions        = {
 949                         ERASEINFO(0x10000, 16),
 950                 }
 951         }, {
 952                 .mfr_id         = MANUFACTURER_INTEL,
 953                 .dev_id         = I28F800B3B,
 954                 .name           = "Intel 28F800B3B",
 955                 .uaddr          = {
 956                         [1] = MTD_UADDR_UNNECESSARY,    /* x16 */
 957                 },
 958                 .DevSize        = SIZE_1MiB,
 959                 .CmdSet         = P_ID_INTEL_STD,
 960                 .NumEraseRegions= 2,
 961                 .regions        = {
 962                         ERASEINFO(0x02000, 8),
 963                         ERASEINFO(0x10000, 15),
 964                 }
 965         }, {
 966                 .mfr_id         = MANUFACTURER_INTEL,
 967                 .dev_id         = I28F800B3T,
 968                 .name           = "Intel 28F800B3T",
 969                 .uaddr          = {
 970                         [1] = MTD_UADDR_UNNECESSARY,    /* x16 */
 971                 },
 972                 .DevSize        = SIZE_1MiB,
 973                 .CmdSet         = P_ID_INTEL_STD,
 974                 .NumEraseRegions= 2,
 975                 .regions        = {
 976                         ERASEINFO(0x10000, 15),
 977                         ERASEINFO(0x02000, 8),
 978                 }
 979         }, {
 980                 .mfr_id         = MANUFACTURER_INTEL,
 981                 .dev_id         = I28F016B3B,
 982                 .name           = "Intel 28F016B3B",
 983                 .uaddr          = {
 984                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
 985                 },
 986                 .DevSize        = SIZE_2MiB,
 987                 .CmdSet         = P_ID_INTEL_STD,
 988                 .NumEraseRegions= 2,
 989                 .regions        = {
 990                         ERASEINFO(0x02000, 8),
 991                         ERASEINFO(0x10000, 31),
 992                 }
 993         }, {
 994                 .mfr_id         = MANUFACTURER_INTEL,
 995                 .dev_id         = I28F016S3,
 996                 .name           = "Intel I28F016S3",
 997                 .uaddr          = {
 998                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
 999                 },
1000                 .DevSize        = SIZE_2MiB,
1001                 .CmdSet         = P_ID_INTEL_STD,
1002                 .NumEraseRegions= 1,
1003                 .regions        = {
1004                         ERASEINFO(0x10000, 32),
1005                 }
1006         }, {
1007                 .mfr_id         = MANUFACTURER_INTEL,
1008                 .dev_id         = I28F016B3T,
1009                 .name           = "Intel 28F016B3T",
1010                 .uaddr          = {
1011                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
1012                 },
1013                 .DevSize        = SIZE_2MiB,
1014                 .CmdSet         = P_ID_INTEL_STD,
1015                 .NumEraseRegions= 2,
1016                 .regions        = {
1017                         ERASEINFO(0x10000, 31),
1018                         ERASEINFO(0x02000, 8),
1019                 }
1020         }, {
1021                 .mfr_id         = MANUFACTURER_INTEL,
1022                 .dev_id         = I28F160B3B,
1023                 .name           = "Intel 28F160B3B",
1024                 .uaddr          = {
1025                         [1] = MTD_UADDR_UNNECESSARY,    /* x16 */
1026                 },
1027                 .DevSize        = SIZE_2MiB,
1028                 .CmdSet         = P_ID_INTEL_STD,
1029                 .NumEraseRegions= 2,
1030                 .regions        = {
1031                         ERASEINFO(0x02000, 8),
1032                         ERASEINFO(0x10000, 31),
1033                 }
1034         }, {
1035                 .mfr_id         = MANUFACTURER_INTEL,
1036                 .dev_id         = I28F160B3T,
1037                 .name           = "Intel 28F160B3T",
1038                 .uaddr          = {
1039                         [1] = MTD_UADDR_UNNECESSARY,    /* x16 */
1040                 },
1041                 .DevSize        = SIZE_2MiB,
1042                 .CmdSet         = P_ID_INTEL_STD,
1043                 .NumEraseRegions= 2,
1044                 .regions        = {
1045                         ERASEINFO(0x10000, 31),
1046                         ERASEINFO(0x02000, 8),
1047                 }
1048         }, {
1049                 .mfr_id         = MANUFACTURER_INTEL,
1050                 .dev_id         = I28F320B3B,
1051                 .name           = "Intel 28F320B3B",
1052                 .uaddr          = {
1053                         [1] = MTD_UADDR_UNNECESSARY,    /* x16 */
1054                 },
1055                 .DevSize        = SIZE_4MiB,
1056                 .CmdSet         = P_ID_INTEL_STD,
1057                 .NumEraseRegions= 2,
1058                 .regions        = {
1059                         ERASEINFO(0x02000, 8),
1060                         ERASEINFO(0x10000, 63),
1061                 }
1062         }, {
1063                 .mfr_id         = MANUFACTURER_INTEL,
1064                 .dev_id         = I28F320B3T,
1065                 .name           = "Intel 28F320B3T",
1066                 .uaddr          = {
1067                         [1] = MTD_UADDR_UNNECESSARY,    /* x16 */
1068                 },
1069                 .DevSize        = SIZE_4MiB,
1070                 .CmdSet         = P_ID_INTEL_STD,
1071                 .NumEraseRegions= 2,
1072                 .regions        = {
1073                         ERASEINFO(0x10000, 63),
1074                         ERASEINFO(0x02000, 8),
1075                 }
1076         }, {
1077                 .mfr_id         = MANUFACTURER_INTEL,
1078                 .dev_id         = I28F640B3B,
1079                 .name           = "Intel 28F640B3B",
1080                 .uaddr          = {
1081                         [1] = MTD_UADDR_UNNECESSARY,    /* x16 */
1082                 },
1083                 .DevSize        = SIZE_8MiB,
1084                 .CmdSet         = P_ID_INTEL_STD,
1085                 .NumEraseRegions= 2,
1086                 .regions        = {
1087                         ERASEINFO(0x02000, 8),
1088                         ERASEINFO(0x10000, 127),
1089                 }
1090         }, {
1091                 .mfr_id         = MANUFACTURER_INTEL,
1092                 .dev_id         = I28F640B3T,
1093                 .name           = "Intel 28F640B3T",
1094                 .uaddr          = {
1095                         [1] = MTD_UADDR_UNNECESSARY,    /* x16 */
1096                 },
1097                 .DevSize        = SIZE_8MiB,
1098                 .CmdSet         = P_ID_INTEL_STD,
1099                 .NumEraseRegions= 2,
1100                 .regions        = {
1101                         ERASEINFO(0x10000, 127),
1102                         ERASEINFO(0x02000, 8),
1103                 }
1104         }, {
1105                 .mfr_id         = MANUFACTURER_INTEL,
1106                 .dev_id         = I82802AB,
1107                 .name           = "Intel 82802AB",
1108                 .uaddr          = {
1109                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
1110                 },
1111                 .DevSize        = SIZE_512KiB,
1112                 .CmdSet         = P_ID_INTEL_EXT,
1113                 .NumEraseRegions= 1,
1114                 .regions        = {
1115                         ERASEINFO(0x10000,8),
1116                 }
1117         }, {
1118                 .mfr_id         = MANUFACTURER_INTEL,
1119                 .dev_id         = I82802AC,
1120                 .name           = "Intel 82802AC",
1121                 .uaddr          = {
1122                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
1123                 },
1124                 .DevSize        = SIZE_1MiB,
1125                 .CmdSet         = P_ID_INTEL_EXT,
1126                 .NumEraseRegions= 1,
1127                 .regions        = {
1128                         ERASEINFO(0x10000,16),
1129                 }
1130         }, {
1131                 .mfr_id         = MANUFACTURER_MACRONIX,
1132                 .dev_id         = MX29LV040C,
1133                 .name           = "Macronix MX29LV040C",
1134                 .uaddr          = {
1135                         [0] = MTD_UADDR_0x0555_0x02AA,  /* x8 */
1136                 },
1137                 .DevSize        = SIZE_512KiB,
1138                 .CmdSet         = P_ID_AMD_STD,
1139                 .NumEraseRegions= 1,
1140                 .regions        = {
1141                         ERASEINFO(0x10000,8),
1142                 }
1143         }, {
1144                 .mfr_id         = MANUFACTURER_MACRONIX,
1145                 .dev_id         = MX29LV160T,
1146                 .name           = "MXIC MX29LV160T",
1147                 .uaddr          = {
1148                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
1149                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
1150                 },
1151                 .DevSize        = SIZE_2MiB,
1152                 .CmdSet         = P_ID_AMD_STD,
1153                 .NumEraseRegions= 4,
1154                 .regions        = {
1155                         ERASEINFO(0x10000,31),
1156                         ERASEINFO(0x08000,1),
1157                         ERASEINFO(0x02000,2),
1158                         ERASEINFO(0x04000,1)
1159                 }
1160         }, {
1161                 .mfr_id         = MANUFACTURER_NEC,
1162                 .dev_id         = UPD29F064115,
1163                 .name           = "NEC uPD29F064115",
1164                 .uaddr          = {
1165                         [0] = MTD_UADDR_0x0555_0x02AA,  /* x8 */
1166                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
1167                 },
1168                 .DevSize        = SIZE_8MiB,
1169                 .CmdSet         = P_ID_AMD_STD,
1170                 .NumEraseRegions= 3,
1171                 .regions        = {
1172                         ERASEINFO(0x2000,8),
1173                         ERASEINFO(0x10000,126),
1174                         ERASEINFO(0x2000,8),
1175                 }
1176         }, {
1177                 .mfr_id         = MANUFACTURER_MACRONIX,
1178                 .dev_id         = MX29LV160B,
1179                 .name           = "MXIC MX29LV160B",
1180                 .uaddr          = {
1181                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
1182                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
1183                 },
1184                 .DevSize        = SIZE_2MiB,
1185                 .CmdSet         = P_ID_AMD_STD,
1186                 .NumEraseRegions= 4,
1187                 .regions        = {
1188                         ERASEINFO(0x04000,1),
1189                         ERASEINFO(0x02000,2),
1190                         ERASEINFO(0x08000,1),
1191                         ERASEINFO(0x10000,31)
1192                 }
1193         }, {
1194                 .mfr_id         = MANUFACTURER_MACRONIX,
1195                 .dev_id         = MX29F040,
1196                 .name           = "Macronix MX29F040",
1197                 .uaddr          = {
1198                         [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
1199                 },
1200                 .DevSize        = SIZE_512KiB,
1201                 .CmdSet         = P_ID_AMD_STD,
1202                 .NumEraseRegions= 1,
1203                 .regions        = {
1204                         ERASEINFO(0x10000,8),
1205                 }
1206         }, {
1207                 .mfr_id         = MANUFACTURER_MACRONIX,
1208                 .dev_id         = MX29F016,
1209                 .name           = "Macronix MX29F016",
1210                 .uaddr          = {
1211                         [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
1212                 },
1213                 .DevSize        = SIZE_2MiB,
1214                 .CmdSet         = P_ID_AMD_STD,
1215                 .NumEraseRegions= 1,
1216                 .regions        = {
1217                         ERASEINFO(0x10000,32),
1218                 }
1219         }, {
1220                 .mfr_id         = MANUFACTURER_MACRONIX,
1221                 .dev_id         = MX29F004T,
1222                 .name           = "Macronix MX29F004T",
1223                 .uaddr          = {
1224                         [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
1225                 },
1226                 .DevSize        = SIZE_512KiB,
1227                 .CmdSet         = P_ID_AMD_STD,
1228                 .NumEraseRegions= 4,
1229                 .regions        = {
1230                         ERASEINFO(0x10000,7),
1231                         ERASEINFO(0x08000,1),
1232                         ERASEINFO(0x02000,2),
1233                         ERASEINFO(0x04000,1),
1234                 }
1235         }, {
1236                 .mfr_id         = MANUFACTURER_MACRONIX,
1237                 .dev_id         = MX29F004B,
1238                 .name           = "Macronix MX29F004B",
1239                 .uaddr          = {
1240                         [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
1241                 },
1242                 .DevSize        = SIZE_512KiB,
1243                 .CmdSet         = P_ID_AMD_STD,
1244                 .NumEraseRegions= 4,
1245                 .regions        = {
1246                         ERASEINFO(0x04000,1),
1247                         ERASEINFO(0x02000,2),
1248                         ERASEINFO(0x08000,1),
1249                         ERASEINFO(0x10000,7),
1250                 }
1251         }, {
1252                 .mfr_id         = MANUFACTURER_MACRONIX,
1253                 .dev_id         = MX29F002T,
1254                 .name           = "Macronix MX29F002T",
1255                 .uaddr          = {
1256                         [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
1257                 },
1258                 .DevSize        = SIZE_256KiB,
1259                 .CmdSet         = P_ID_AMD_STD,
1260                 .NumEraseRegions= 4,
1261                 .regions        = {
1262                         ERASEINFO(0x10000,3),
1263                         ERASEINFO(0x08000,1),
1264                         ERASEINFO(0x02000,2),
1265                         ERASEINFO(0x04000,1),
1266                 }
1267         }, {
1268                 .mfr_id         = MANUFACTURER_PMC,
1269                 .dev_id         = PM49FL002,
1270                 .name           = "PMC Pm49FL002",
1271                 .uaddr          = {
1272                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1273                 },
1274                 .DevSize        = SIZE_256KiB,
1275                 .CmdSet         = P_ID_AMD_STD,
1276                 .NumEraseRegions= 1,
1277                 .regions        = {
1278                         ERASEINFO( 0x01000, 64 )
1279                 }
1280         }, {
1281                 .mfr_id         = MANUFACTURER_PMC,
1282                 .dev_id         = PM49FL004,
1283                 .name           = "PMC Pm49FL004",
1284                 .uaddr          = {
1285                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1286                 },
1287                 .DevSize        = SIZE_512KiB,
1288                 .CmdSet         = P_ID_AMD_STD,
1289                 .NumEraseRegions= 1,
1290                 .regions        = {
1291                         ERASEINFO( 0x01000, 128 )
1292                 }
1293         }, {
1294                 .mfr_id         = MANUFACTURER_PMC,
1295                 .dev_id         = PM49FL008,
1296                 .name           = "PMC Pm49FL008",
1297                 .uaddr          = {
1298                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1299                 },
1300                 .DevSize        = SIZE_1MiB,
1301                 .CmdSet         = P_ID_AMD_STD,
1302                 .NumEraseRegions= 1,
1303                 .regions        = {
1304                         ERASEINFO( 0x01000, 256 )
1305                 }
1306         }, {
1307                 .mfr_id         = MANUFACTURER_SHARP,
1308                 .dev_id         = LH28F640BF,
1309                 .name           = "LH28F640BF",
1310                 .uaddr          = {
1311                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
1312                 },
1313                 .DevSize        = SIZE_4MiB,
1314                 .CmdSet         = P_ID_INTEL_STD,
1315                 .NumEraseRegions= 1,
1316                 .regions        = {
1317                         ERASEINFO(0x40000,16),
1318                 }
1319         }, {
1320                 .mfr_id         = MANUFACTURER_SST,
1321                 .dev_id         = SST39LF512,
1322                 .name           = "SST 39LF512",
1323                 .uaddr          = {
1324                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1325                 },
1326                 .DevSize        = SIZE_64KiB,
1327                 .CmdSet         = P_ID_AMD_STD,
1328                 .NumEraseRegions= 1,
1329                 .regions        = {
1330                         ERASEINFO(0x01000,16),
1331                 }
1332         }, {
1333                 .mfr_id         = MANUFACTURER_SST,
1334                 .dev_id         = SST39LF010,
1335                 .name           = "SST 39LF010",
1336                 .uaddr          = {
1337                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1338                 },
1339                 .DevSize        = SIZE_128KiB,
1340                 .CmdSet         = P_ID_AMD_STD,
1341                 .NumEraseRegions= 1,
1342                 .regions        = {
1343                         ERASEINFO(0x01000,32),
1344                 }
1345         }, {
1346                 .mfr_id         = MANUFACTURER_SST,
1347                 .dev_id         = SST29EE020,
1348                 .name           = "SST 29EE020",
1349                 .uaddr          = {
1350                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1351                 },
1352                 .DevSize        = SIZE_256KiB,
1353                 .CmdSet         = P_ID_SST_PAGE,
1354                 .NumEraseRegions= 1,
1355                 .regions = {ERASEINFO(0x01000,64),
1356                 }
1357          }, {
1358                 .mfr_id         = MANUFACTURER_SST,
1359                 .dev_id         = SST29LE020,
1360                 .name           = "SST 29LE020",
1361                 .uaddr          = {
1362                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1363                 },
1364                 .DevSize        = SIZE_256KiB,
1365                 .CmdSet         = P_ID_SST_PAGE,
1366                 .NumEraseRegions= 1,
1367                 .regions = {ERASEINFO(0x01000,64),
1368                 }
1369         }, {
1370                 .mfr_id         = MANUFACTURER_SST,
1371                 .dev_id         = SST39LF020,
1372                 .name           = "SST 39LF020",
1373                 .uaddr          = {
1374                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1375                 },
1376                 .DevSize        = SIZE_256KiB,
1377                 .CmdSet         = P_ID_AMD_STD,
1378                 .NumEraseRegions= 1,
1379                 .regions        = {
1380                         ERASEINFO(0x01000,64),
1381                 }
1382         }, {
1383                 .mfr_id         = MANUFACTURER_SST,
1384                 .dev_id         = SST39LF040,
1385                 .name           = "SST 39LF040",
1386                 .uaddr          = {
1387                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1388                 },
1389                 .DevSize        = SIZE_512KiB,
1390                 .CmdSet         = P_ID_AMD_STD,
1391                 .NumEraseRegions= 1,
1392                 .regions        = {
1393                         ERASEINFO(0x01000,128),
1394                 }
1395         }, {
1396                 .mfr_id         = MANUFACTURER_SST,
1397                 .dev_id         = SST39SF010A,
1398                 .name           = "SST 39SF010A",
1399                 .uaddr          = {
1400                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1401                 },
1402                 .DevSize        = SIZE_128KiB,
1403                 .CmdSet         = P_ID_AMD_STD,
1404                 .NumEraseRegions= 1,
1405                 .regions        = {
1406                         ERASEINFO(0x01000,32),
1407                 }
1408         }, {
1409                 .mfr_id         = MANUFACTURER_SST,
1410                 .dev_id         = SST39SF020A,
1411                 .name           = "SST 39SF020A",
1412                 .uaddr          = {
1413                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1414                 },
1415                 .DevSize        = SIZE_256KiB,
1416                 .CmdSet         = P_ID_AMD_STD,
1417                 .NumEraseRegions= 1,
1418                 .regions        = {
1419                         ERASEINFO(0x01000,64),
1420                 }
1421         }, {
1422                 .mfr_id         = MANUFACTURER_SST,
1423                 .dev_id         = SST49LF040B,
1424                 .name           = "SST 49LF040B",
1425                 .uaddr          = {
1426                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1427                 },
1428                 .DevSize        = SIZE_512KiB,
1429                 .CmdSet         = P_ID_AMD_STD,
1430                 .NumEraseRegions= 1,
1431                 .regions        = {
1432                         ERASEINFO(0x01000,128),
1433                 }
1434         }, {
1435
1436                 .mfr_id         = MANUFACTURER_SST,
1437                 .dev_id         = SST49LF004B,
1438                 .name           = "SST 49LF004B",
1439                 .uaddr          = {
1440                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1441                 },
1442                 .DevSize        = SIZE_512KiB,
1443                 .CmdSet         = P_ID_AMD_STD,
1444                 .NumEraseRegions= 1,
1445                 .regions        = {
1446                         ERASEINFO(0x01000,128),
1447                 }
1448         }, {
1449                 .mfr_id         = MANUFACTURER_SST,
1450                 .dev_id         = SST49LF008A,
1451                 .name           = "SST 49LF008A",
1452                 .uaddr          = {
1453                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1454                 },
1455                 .DevSize        = SIZE_1MiB,
1456                 .CmdSet         = P_ID_AMD_STD,
1457                 .NumEraseRegions= 1,
1458                 .regions        = {
1459                         ERASEINFO(0x01000,256),
1460                 }
1461         }, {
1462                 .mfr_id         = MANUFACTURER_SST,
1463                 .dev_id         = SST49LF030A,
1464                 .name           = "SST 49LF030A",
1465                 .uaddr          = {
1466                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1467                 },
1468                 .DevSize        = SIZE_512KiB,
1469                 .CmdSet         = P_ID_AMD_STD,
1470                 .NumEraseRegions= 1,
1471                 .regions        = {
1472                         ERASEINFO(0x01000,96),
1473                 }
1474         }, {
1475                 .mfr_id         = MANUFACTURER_SST,
1476                 .dev_id         = SST49LF040A,
1477                 .name           = "SST 49LF040A",
1478                 .uaddr          = {
1479                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1480                 },
1481                 .DevSize        = SIZE_512KiB,
1482                 .CmdSet         = P_ID_AMD_STD,
1483                 .NumEraseRegions= 1,
1484                 .regions        = {
1485                         ERASEINFO(0x01000,128),
1486                 }
1487         }, {
1488                 .mfr_id         = MANUFACTURER_SST,
1489                 .dev_id         = SST49LF080A,
1490                 .name           = "SST 49LF080A",
1491                 .uaddr          = {
1492                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1493                 },
1494                 .DevSize        = SIZE_1MiB,
1495                 .CmdSet         = P_ID_AMD_STD,
1496                 .NumEraseRegions= 1,
1497                 .regions        = {
1498                         ERASEINFO(0x01000,256),
1499                 }
1500         }, {
1501                .mfr_id         = MANUFACTURER_SST,     /* should be CFI */
1502                .dev_id         = SST39LF160,
1503                .name           = "SST 39LF160",
1504                .uaddr          = {
1505                        [0] = MTD_UADDR_0x5555_0x2AAA,  /* x8 */
1506                        [1] = MTD_UADDR_0x5555_0x2AAA   /* x16 */
1507                },
1508                .DevSize        = SIZE_2MiB,
1509                .CmdSet         = P_ID_AMD_STD,
1510                .NumEraseRegions= 2,
1511                .regions        = {
1512                        ERASEINFO(0x1000,256),
1513                        ERASEINFO(0x1000,256)
1514                }
1515         }, {
1516                .mfr_id         = MANUFACTURER_SST,     /* should be CFI */
1517                .dev_id         = SST39VF1601,
1518                .name           = "SST 39VF1601",
1519                .uaddr          = {
1520                        [0] = MTD_UADDR_0x5555_0x2AAA,  /* x8 */
1521                        [1] = MTD_UADDR_0x5555_0x2AAA   /* x16 */
1522                },
1523                .DevSize        = SIZE_2MiB,
1524                .CmdSet         = P_ID_AMD_STD,
1525                .NumEraseRegions= 2,
1526                .regions        = {
1527                        ERASEINFO(0x1000,256),
1528                        ERASEINFO(0x1000,256)
1529                }
1530
1531         }, {
1532                 .mfr_id         = MANUFACTURER_ST,
1533                 .dev_id         = M29F800AB,
1534                 .name           = "ST M29F800AB",
1535                 .uaddr          = {
1536                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
1537                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
1538                 },
1539                 .DevSize        = SIZE_1MiB,
1540                 .CmdSet         = P_ID_AMD_STD,
1541                 .NumEraseRegions= 4,
1542                 .regions        = {
1543                         ERASEINFO(0x04000,1),
1544                         ERASEINFO(0x02000,2),
1545                         ERASEINFO(0x08000,1),
1546                         ERASEINFO(0x10000,15),
1547                 }
1548        }, {
1549                 .mfr_id         = MANUFACTURER_ST,      /* FIXME - CFI device? */
1550                 .dev_id         = M29W800DT,
1551                 .name           = "ST M29W800DT",
1552                 .uaddr          = {
1553                         [0] = MTD_UADDR_0x5555_0x2AAA,  /* x8 */
1554                         [1] = MTD_UADDR_0x5555_0x2AAA   /* x16 */
1555                 },
1556                 .DevSize        = SIZE_1MiB,
1557                 .CmdSet         = P_ID_AMD_STD,
1558                 .NumEraseRegions= 4,
1559                 .regions        = {
1560                         ERASEINFO(0x10000,15),
1561                         ERASEINFO(0x08000,1),
1562                         ERASEINFO(0x02000,2),
1563                         ERASEINFO(0x04000,1)
1564                 }
1565         }, {
1566                 .mfr_id         = MANUFACTURER_ST,      /* FIXME - CFI device? */
1567                 .dev_id         = M29W800DB,
1568                 .name           = "ST M29W800DB",
1569                 .uaddr          = {
1570                         [0] = MTD_UADDR_0x5555_0x2AAA,  /* x8 */
1571                         [1] = MTD_UADDR_0x5555_0x2AAA   /* x16 */
1572                 },
1573                 .DevSize        = SIZE_1MiB,
1574                 .CmdSet         = P_ID_AMD_STD,
1575                 .NumEraseRegions= 4,
1576                 .regions        = {
1577                         ERASEINFO(0x04000,1),
1578                         ERASEINFO(0x02000,2),
1579                         ERASEINFO(0x08000,1),
1580                         ERASEINFO(0x10000,15)
1581                 }
1582         }, {
1583                 .mfr_id         = MANUFACTURER_ST,      /* FIXME - CFI device? */
1584                 .dev_id         = M29W160DT,
1585                 .name           = "ST M29W160DT",
1586                 .uaddr          = {
1587                         [0] = MTD_UADDR_0x0555_0x02AA,  /* x8 */
1588                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
1589                 },
1590                 .DevSize        = SIZE_2MiB,
1591                 .CmdSet         = P_ID_AMD_STD,
1592                 .NumEraseRegions= 4,
1593                 .regions        = {
1594                         ERASEINFO(0x10000,31),
1595                         ERASEINFO(0x08000,1),
1596                         ERASEINFO(0x02000,2),
1597                         ERASEINFO(0x04000,1)
1598                 }
1599         }, {
1600                 .mfr_id         = MANUFACTURER_ST,      /* FIXME - CFI device? */
1601                 .dev_id         = M29W160DB,
1602                 .name           = "ST M29W160DB",
1603                 .uaddr          = {
1604                         [0] = MTD_UADDR_0x0555_0x02AA,  /* x8 */
1605                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
1606                 },
1607                 .DevSize        = SIZE_2MiB,
1608                 .CmdSet         = P_ID_AMD_STD,
1609                 .NumEraseRegions= 4,
1610                 .regions        = {
1611                         ERASEINFO(0x04000,1),
1612                         ERASEINFO(0x02000,2),
1613                         ERASEINFO(0x08000,1),
1614                         ERASEINFO(0x10000,31)
1615                 }
1616         }, {
1617                 .mfr_id         = MANUFACTURER_ST,
1618                 .dev_id         = M29W040B,
1619                 .name           = "ST M29W040B",
1620                 .uaddr          = {
1621                         [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
1622                 },
1623                 .DevSize        = SIZE_512KiB,
1624                 .CmdSet         = P_ID_AMD_STD,
1625                 .NumEraseRegions= 1,
1626                 .regions        = {
1627                         ERASEINFO(0x10000,8),
1628                 }
1629         }, {
1630                 .mfr_id         = MANUFACTURER_ST,
1631                 .dev_id         = M50FW040,
1632                 .name           = "ST M50FW040",
1633                 .uaddr          = {
1634                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
1635                 },
1636                 .DevSize        = SIZE_512KiB,
1637                 .CmdSet         = P_ID_INTEL_EXT,
1638                 .NumEraseRegions= 1,
1639                 .regions        = {
1640                         ERASEINFO(0x10000,8),
1641                 }
1642         }, {
1643                 .mfr_id         = MANUFACTURER_ST,
1644                 .dev_id         = M50FW080,
1645                 .name           = "ST M50FW080",
1646                 .uaddr          = {
1647                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
1648                 },
1649                 .DevSize        = SIZE_1MiB,
1650                 .CmdSet         = P_ID_INTEL_EXT,
1651                 .NumEraseRegions= 1,
1652                 .regions        = {
1653                         ERASEINFO(0x10000,16),
1654                 }
1655         }, {
1656                 .mfr_id         = MANUFACTURER_ST,
1657                 .dev_id         = M50FW016,
1658                 .name           = "ST M50FW016",
1659                 .uaddr          = {
1660                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
1661                 },
1662                 .DevSize        = SIZE_2MiB,
1663                 .CmdSet         = P_ID_INTEL_EXT,
1664                 .NumEraseRegions= 1,
1665                 .regions        = {
1666                         ERASEINFO(0x10000,32),
1667                 }
1668         }, {
1669                 .mfr_id         = MANUFACTURER_ST,
1670                 .dev_id         = M50LPW080,
1671                 .name           = "ST M50LPW080",
1672                 .uaddr          = {
1673                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
1674                 },
1675                 .DevSize        = SIZE_1MiB,
1676                 .CmdSet         = P_ID_INTEL_EXT,
1677                 .NumEraseRegions= 1,
1678                 .regions        = {
1679                         ERASEINFO(0x10000,16),
1680                 }
1681         }, {
1682                 .mfr_id         = MANUFACTURER_TOSHIBA,
1683                 .dev_id         = TC58FVT160,
1684                 .name           = "Toshiba TC58FVT160",
1685                 .uaddr          = {
1686                         [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */
1687                         [1] = MTD_UADDR_0x0555_0x02AA  /* x16 */
1688                 },
1689                 .DevSize        = SIZE_2MiB,
1690                 .CmdSet         = P_ID_AMD_STD,
1691                 .NumEraseRegions= 4,
1692                 .regions        = {
1693                         ERASEINFO(0x10000,31),
1694                         ERASEINFO(0x08000,1),
1695                         ERASEINFO(0x02000,2),
1696                         ERASEINFO(0x04000,1)
1697                 }
1698         }, {
1699                 .mfr_id         = MANUFACTURER_TOSHIBA,
1700                 .dev_id         = TC58FVB160,
1701                 .name           = "Toshiba TC58FVB160",
1702                 .uaddr          = {
1703                         [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */
1704                         [1] = MTD_UADDR_0x0555_0x02AA  /* x16 */
1705                 },
1706                 .DevSize        = SIZE_2MiB,
1707                 .CmdSet         = P_ID_AMD_STD,
1708                 .NumEraseRegions= 4,
1709                 .regions        = {
1710                         ERASEINFO(0x04000,1),
1711                         ERASEINFO(0x02000,2),
1712                         ERASEINFO(0x08000,1),
1713                         ERASEINFO(0x10000,31)
1714                 }
1715         }, {
1716                 .mfr_id         = MANUFACTURER_TOSHIBA,
1717                 .dev_id         = TC58FVB321,
1718                 .name           = "Toshiba TC58FVB321",
1719                 .uaddr          = {
1720                         [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */
1721                         [1] = MTD_UADDR_0x0555_0x02AA  /* x16 */
1722                 },
1723                 .DevSize        = SIZE_4MiB,
1724                 .CmdSet         = P_ID_AMD_STD,
1725                 .NumEraseRegions= 2,
1726                 .regions        = {
1727                         ERASEINFO(0x02000,8),
1728                         ERASEINFO(0x10000,63)
1729                 }
1730         }, {
1731                 .mfr_id         = MANUFACTURER_TOSHIBA,
1732                 .dev_id         = TC58FVT321,
1733                 .name           = "Toshiba TC58FVT321",
1734                 .uaddr          = {
1735                         [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */
1736                         [1] = MTD_UADDR_0x0555_0x02AA  /* x16 */
1737                 },
1738                 .DevSize        = SIZE_4MiB,
1739                 .CmdSet         = P_ID_AMD_STD,
1740                 .NumEraseRegions= 2,
1741                 .regions        = {
1742                         ERASEINFO(0x10000,63),
1743                         ERASEINFO(0x02000,8)
1744                 }
1745         }, {
1746                 .mfr_id         = MANUFACTURER_TOSHIBA,
1747                 .dev_id         = TC58FVB641,
1748                 .name           = "Toshiba TC58FVB641",
1749                 .uaddr          = {
1750                         [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */
1751                         [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */
1752                 },
1753                 .DevSize        = SIZE_8MiB,
1754                 .CmdSet         = P_ID_AMD_STD,
1755                 .NumEraseRegions= 2,
1756                 .regions        = {
1757                         ERASEINFO(0x02000,8),
1758                         ERASEINFO(0x10000,127)
1759                 }
1760         }, {
1761                 .mfr_id         = MANUFACTURER_TOSHIBA,
1762                 .dev_id         = TC58FVT641,
1763                 .name           = "Toshiba TC58FVT641",
1764                 .uaddr          = {
1765                         [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */
1766                         [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */
1767                 },
1768                 .DevSize        = SIZE_8MiB,
1769                 .CmdSet         = P_ID_AMD_STD,
1770                 .NumEraseRegions= 2,
1771                 .regions        = {
1772                         ERASEINFO(0x10000,127),
1773                         ERASEINFO(0x02000,8)
1774                 }
1775         }, {
1776                 .mfr_id         = MANUFACTURER_WINBOND,
1777                 .dev_id         = W49V002A,
1778                 .name           = "Winbond W49V002A",
1779                 .uaddr          = {
1780                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1781                 },
1782                 .DevSize        = SIZE_256KiB,
1783                 .CmdSet         = P_ID_AMD_STD,
1784                 .NumEraseRegions= 4,
1785                 .regions        = {
1786                         ERASEINFO(0x10000, 3),
1787                         ERASEINFO(0x08000, 1),
1788                         ERASEINFO(0x02000, 2),
1789                         ERASEINFO(0x04000, 1),
1790                 }
1791         }
1792 };
1793
1794
1795 static int cfi_jedec_setup(struct cfi_private *p_cfi, int index);
1796
1797 static int jedec_probe_chip(struct map_info *map, __u32 base,
1798                             unsigned long *chip_map, struct cfi_private *cfi);
1799
1800 static struct mtd_info *jedec_probe(struct map_info *map);
1801
1802 static inline u32 jedec_read_mfr(struct map_info *map, __u32 base,
1803         struct cfi_private *cfi)
1804 {
1805         map_word result;
1806         unsigned long mask;
1807         u32 ofs = cfi_build_cmd_addr(0, cfi_interleave(cfi), cfi->device_type);
1808         mask = (1 << (cfi->device_type * 8)) -1;
1809         result = map_read(map, base + ofs);
1810         return result.x[0] & mask;
1811 }
1812
1813 static inline u32 jedec_read_id(struct map_info *map, __u32 base,
1814         struct cfi_private *cfi)
1815 {
1816         map_word result;
1817         unsigned long mask;
1818         u32 ofs = cfi_build_cmd_addr(1, cfi_interleave(cfi), cfi->device_type);
1819         mask = (1 << (cfi->device_type * 8)) -1;
1820         result = map_read(map, base + ofs);
1821         return result.x[0] & mask;
1822 }
1823
1824 static inline void jedec_reset(u32 base, struct map_info *map,
1825         struct cfi_private *cfi)
1826 {
1827         /* Reset */
1828
1829         /* after checking the datasheets for SST, MACRONIX and ATMEL
1830          * (oh and incidentaly the jedec spec - 3.5.3.3) the reset
1831          * sequence is *supposed* to be 0xaa at 0x5555, 0x55 at
1832          * 0x2aaa, 0xF0 at 0x5555 this will not affect the AMD chips
1833          * as they will ignore the writes and dont care what address
1834          * the F0 is written to */
1835         if(cfi->addr_unlock1) {
1836                 DEBUG( MTD_DEBUG_LEVEL3,
1837                        "reset unlock called %x %x \n",
1838                        cfi->addr_unlock1,cfi->addr_unlock2);
1839                 cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
1840                 cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL);
1841         }
1842
1843         cfi_send_gen_cmd(0xF0, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
1844         /* Some misdesigned intel chips do not respond for 0xF0 for a reset,
1845          * so ensure we're in read mode.  Send both the Intel and the AMD command
1846          * for this.  Intel uses 0xff for this, AMD uses 0xff for NOP, so
1847          * this should be safe.
1848          */
1849         cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL);
1850         /* FIXME - should have reset delay before continuing */
1851 }
1852
1853
1854 static inline __u8 finfo_uaddr(const struct amd_flash_info *finfo, int device_type)
1855 {
1856         int uaddr_idx;
1857         __u8 uaddr = MTD_UADDR_NOT_SUPPORTED;
1858
1859         switch ( device_type ) {
1860         case CFI_DEVICETYPE_X8:  uaddr_idx = 0; break;
1861         case CFI_DEVICETYPE_X16: uaddr_idx = 1; break;
1862         case CFI_DEVICETYPE_X32: uaddr_idx = 2; break;
1863         default:
1864                 printk(KERN_NOTICE "MTD: %s(): unknown device_type %d\n",
1865                        __func__, device_type);
1866                 goto uaddr_done;
1867         }
1868
1869         uaddr = finfo->uaddr[uaddr_idx];
1870
1871         if (uaddr != MTD_UADDR_NOT_SUPPORTED ) {
1872                 /* ASSERT("The unlock addresses for non-8-bit mode
1873                    are bollocks. We don't really need an array."); */
1874                 uaddr = finfo->uaddr[0];
1875         }
1876
1877  uaddr_done:
1878         return uaddr;
1879 }
1880
1881
1882 static int cfi_jedec_setup(struct cfi_private *p_cfi, int index)
1883 {
1884         int i,num_erase_regions;
1885         __u8 uaddr;
1886
1887         printk("Found: %s\n",jedec_table[index].name);
1888
1889         num_erase_regions = jedec_table[index].NumEraseRegions;
1890
1891         p_cfi->cfiq = kmalloc(sizeof(struct cfi_ident) + num_erase_regions * 4, GFP_KERNEL);
1892         if (!p_cfi->cfiq) {
1893                 //xx printk(KERN_WARNING "%s: kmalloc failed for CFI ident structure\n", map->name);
1894                 return 0;
1895         }
1896
1897         memset(p_cfi->cfiq,0,sizeof(struct cfi_ident));
1898
1899         p_cfi->cfiq->P_ID = jedec_table[index].CmdSet;
1900         p_cfi->cfiq->NumEraseRegions = jedec_table[index].NumEraseRegions;
1901         p_cfi->cfiq->DevSize = jedec_table[index].DevSize;
1902         p_cfi->cfi_mode = CFI_MODE_JEDEC;
1903
1904         for (i=0; i<num_erase_regions; i++){
1905                 p_cfi->cfiq->EraseRegionInfo[i] = jedec_table[index].regions[i];
1906         }
1907         p_cfi->cmdset_priv = NULL;
1908
1909         /* This may be redundant for some cases, but it doesn't hurt */
1910         p_cfi->mfr = jedec_table[index].mfr_id;
1911         p_cfi->id = jedec_table[index].dev_id;
1912
1913         uaddr = finfo_uaddr(&jedec_table[index], p_cfi->device_type);
1914         if ( uaddr == MTD_UADDR_NOT_SUPPORTED ) {
1915                 kfree( p_cfi->cfiq );
1916                 return 0;
1917         }
1918
1919         p_cfi->addr_unlock1 = unlock_addrs[uaddr].addr1;
1920         p_cfi->addr_unlock2 = unlock_addrs[uaddr].addr2;
1921
1922         return 1;       /* ok */
1923 }
1924
1925
1926 /*
1927  * There is a BIG problem properly ID'ing the JEDEC device and guaranteeing
1928  * the mapped address, unlock addresses, and proper chip ID.  This function
1929  * attempts to minimize errors.  It is doubtfull that this probe will ever
1930  * be perfect - consequently there should be some module parameters that
1931  * could be manually specified to force the chip info.
1932  */
1933 static inline int jedec_match( __u32 base,
1934                                struct map_info *map,
1935                                struct cfi_private *cfi,
1936                                const struct amd_flash_info *finfo )
1937 {
1938         int rc = 0;           /* failure until all tests pass */
1939         u32 mfr, id;
1940         __u8 uaddr;
1941
1942         /*
1943          * The IDs must match.  For X16 and X32 devices operating in
1944          * a lower width ( X8 or X16 ), the device ID's are usually just
1945          * the lower byte(s) of the larger device ID for wider mode.  If
1946          * a part is found that doesn't fit this assumption (device id for
1947          * smaller width mode is completely unrealated to full-width mode)
1948          * then the jedec_table[] will have to be augmented with the IDs
1949          * for different widths.
1950          */
1951         switch (cfi->device_type) {
1952         case CFI_DEVICETYPE_X8:
1953                 mfr = (__u8)finfo->mfr_id;
1954                 id = (__u8)finfo->dev_id;
1955
1956                 /* bjd: it seems that if we do this, we can end up
1957                  * detecting 16bit flashes as an 8bit device, even though
1958                  * there aren't.
1959                  */
1960                 if (finfo->dev_id > 0xff) {
1961                         DEBUG( MTD_DEBUG_LEVEL3, "%s(): ID is not 8bit\n",
1962                                __func__);
1963                         goto match_done;
1964                 }
1965                 break;
1966         case CFI_DEVICETYPE_X16:
1967                 mfr = (__u16)finfo->mfr_id;
1968                 id = (__u16)finfo->dev_id;
1969                 break;
1970         case CFI_DEVICETYPE_X32:
1971                 mfr = (__u16)finfo->mfr_id;
1972                 id = (__u32)finfo->dev_id;
1973                 break;
1974         default:
1975                 printk(KERN_WARNING
1976                        "MTD %s(): Unsupported device type %d\n",
1977                        __func__, cfi->device_type);
1978                 goto match_done;
1979         }
1980         if ( cfi->mfr != mfr || cfi->id != id ) {
1981                 goto match_done;
1982         }
1983
1984         /* the part size must fit in the memory window */
1985         DEBUG( MTD_DEBUG_LEVEL3,
1986                "MTD %s(): Check fit 0x%.8x + 0x%.8x = 0x%.8x\n",
1987                __func__, base, 1 << finfo->DevSize, base + (1 << finfo->DevSize) );
1988         if ( base + cfi_interleave(cfi) * ( 1 << finfo->DevSize ) > map->size ) {
1989                 DEBUG( MTD_DEBUG_LEVEL3,
1990                        "MTD %s(): 0x%.4x 0x%.4x %dKiB doesn't fit\n",
1991                        __func__, finfo->mfr_id, finfo->dev_id,
1992                        1 << finfo->DevSize );
1993                 goto match_done;
1994         }
1995
1996         uaddr = finfo_uaddr(finfo, cfi->device_type);
1997         if ( uaddr == MTD_UADDR_NOT_SUPPORTED ) {
1998                 goto match_done;
1999         }
2000
2001         DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): check unlock addrs 0x%.4x 0x%.4x\n",
2002                __func__, cfi->addr_unlock1, cfi->addr_unlock2 );
2003         if ( MTD_UADDR_UNNECESSARY != uaddr && MTD_UADDR_DONT_CARE != uaddr
2004              && ( unlock_addrs[uaddr].addr1 != cfi->addr_unlock1 ||
2005                   unlock_addrs[uaddr].addr2 != cfi->addr_unlock2 ) ) {
2006                 DEBUG( MTD_DEBUG_LEVEL3,
2007                         "MTD %s(): 0x%.4x 0x%.4x did not match\n",
2008                         __func__,
2009                         unlock_addrs[uaddr].addr1,
2010                         unlock_addrs[uaddr].addr2);
2011                 goto match_done;
2012         }
2013
2014         /*
2015          * Make sure the ID's dissappear when the device is taken out of
2016          * ID mode.  The only time this should fail when it should succeed
2017          * is when the ID's are written as data to the same
2018          * addresses.  For this rare and unfortunate case the chip
2019          * cannot be probed correctly.
2020          * FIXME - write a driver that takes all of the chip info as
2021          * module parameters, doesn't probe but forces a load.
2022          */
2023         DEBUG( MTD_DEBUG_LEVEL3,
2024                "MTD %s(): check ID's disappear when not in ID mode\n",
2025                __func__ );
2026         jedec_reset( base, map, cfi );
2027         mfr = jedec_read_mfr( map, base, cfi );
2028         id = jedec_read_id( map, base, cfi );
2029         if ( mfr == cfi->mfr && id == cfi->id ) {
2030                 DEBUG( MTD_DEBUG_LEVEL3,
2031                        "MTD %s(): ID 0x%.2x:0x%.2x did not change after reset:\n"
2032                        "You might need to manually specify JEDEC parameters.\n",
2033                         __func__, cfi->mfr, cfi->id );
2034                 goto match_done;
2035         }
2036
2037         /* all tests passed - mark  as success */
2038         rc = 1;
2039
2040         /*
2041          * Put the device back in ID mode - only need to do this if we
2042          * were truly frobbing a real device.
2043          */
2044         DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): return to ID mode\n", __func__ );
2045         if(cfi->addr_unlock1) {
2046                 cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
2047                 cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL);
2048         }
2049         cfi_send_gen_cmd(0x90, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
2050         /* FIXME - should have a delay before continuing */
2051
2052  match_done:
2053         return rc;
2054 }
2055
2056
2057 static int jedec_probe_chip(struct map_info *map, __u32 base,
2058                             unsigned long *chip_map, struct cfi_private *cfi)
2059 {
2060         int i;
2061         enum uaddr uaddr_idx = MTD_UADDR_NOT_SUPPORTED;
2062         u32 probe_offset1, probe_offset2;
2063
2064  retry:
2065         if (!cfi->numchips) {
2066                 uaddr_idx++;
2067
2068                 if (MTD_UADDR_UNNECESSARY == uaddr_idx)
2069                         return 0;
2070
2071                 cfi->addr_unlock1 = unlock_addrs[uaddr_idx].addr1;
2072                 cfi->addr_unlock2 = unlock_addrs[uaddr_idx].addr2;
2073         }
2074
2075         /* Make certain we aren't probing past the end of map */
2076         if (base >= map->size) {
2077                 printk(KERN_NOTICE
2078                         "Probe at base(0x%08x) past the end of the map(0x%08lx)\n",
2079                         base, map->size -1);
2080                 return 0;
2081
2082         }
2083         /* Ensure the unlock addresses we try stay inside the map */
2084         probe_offset1 = cfi_build_cmd_addr(
2085                 cfi->addr_unlock1,
2086                 cfi_interleave(cfi),
2087                 cfi->device_type);
2088         probe_offset2 = cfi_build_cmd_addr(
2089                 cfi->addr_unlock1,
2090                 cfi_interleave(cfi),
2091                 cfi->device_type);
2092         if (    ((base + probe_offset1 + map_bankwidth(map)) >= map->size) ||
2093                 ((base + probe_offset2 + map_bankwidth(map)) >= map->size))
2094         {
2095                 goto retry;
2096         }
2097
2098         /* Reset */
2099         jedec_reset(base, map, cfi);
2100
2101         /* Autoselect Mode */
2102         if(cfi->addr_unlock1) {
2103                 cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
2104                 cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL);
2105         }
2106         cfi_send_gen_cmd(0x90, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
2107         /* FIXME - should have a delay before continuing */
2108
2109         if (!cfi->numchips) {
2110                 /* This is the first time we're called. Set up the CFI
2111                    stuff accordingly and return */
2112
2113                 cfi->mfr = jedec_read_mfr(map, base, cfi);
2114                 cfi->id = jedec_read_id(map, base, cfi);
2115                 DEBUG(MTD_DEBUG_LEVEL3,
2116                       "Search for id:(%02x %02x) interleave(%d) type(%d)\n",
2117                         cfi->mfr, cfi->id, cfi_interleave(cfi), cfi->device_type);
2118                 for (i = 0; i < ARRAY_SIZE(jedec_table); i++) {
2119                         if ( jedec_match( base, map, cfi, &jedec_table[i] ) ) {
2120                                 DEBUG( MTD_DEBUG_LEVEL3,
2121                                        "MTD %s(): matched device 0x%x,0x%x unlock_addrs: 0x%.4x 0x%.4x\n",
2122                                        __func__, cfi->mfr, cfi->id,
2123                                        cfi->addr_unlock1, cfi->addr_unlock2 );
2124                                 if (!cfi_jedec_setup(cfi, i))
2125                                         return 0;
2126                                 goto ok_out;
2127                         }
2128                 }
2129                 goto retry;
2130         } else {
2131                 __u16 mfr;
2132                 __u16 id;
2133
2134                 /* Make sure it is a chip of the same manufacturer and id */
2135                 mfr = jedec_read_mfr(map, base, cfi);
2136                 id = jedec_read_id(map, base, cfi);
2137
2138                 if ((mfr != cfi->mfr) || (id != cfi->id)) {
2139                         printk(KERN_DEBUG "%s: Found different chip or no chip at all (mfr 0x%x, id 0x%x) at 0x%x\n",
2140                                map->name, mfr, id, base);
2141                         jedec_reset(base, map, cfi);
2142                         return 0;
2143                 }
2144         }
2145
2146         /* Check each previous chip locations to see if it's an alias */
2147         for (i=0; i < (base >> cfi->chipshift); i++) {
2148                 unsigned long start;
2149                 if(!test_bit(i, chip_map)) {
2150                         continue; /* Skip location; no valid chip at this address */
2151                 }
2152                 start = i << cfi->chipshift;
2153                 if (jedec_read_mfr(map, start, cfi) == cfi->mfr &&
2154                     jedec_read_id(map, start, cfi) == cfi->id) {
2155                         /* Eep. This chip also looks like it's in autoselect mode.
2156                            Is it an alias for the new one? */
2157                         jedec_reset(start, map, cfi);
2158
2159                         /* If the device IDs go away, it's an alias */
2160                         if (jedec_read_mfr(map, base, cfi) != cfi->mfr ||
2161                             jedec_read_id(map, base, cfi) != cfi->id) {
2162                                 printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
2163                                        map->name, base, start);
2164                                 return 0;
2165                         }
2166
2167                         /* Yes, it's actually got the device IDs as data. Most
2168                          * unfortunate. Stick the new chip in read mode
2169                          * too and if it's the same, assume it's an alias. */
2170                         /* FIXME: Use other modes to do a proper check */
2171                         jedec_reset(base, map, cfi);
2172                         if (jedec_read_mfr(map, base, cfi) == cfi->mfr &&
2173                             jedec_read_id(map, base, cfi) == cfi->id) {
2174                                 printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
2175                                        map->name, base, start);
2176                                 return 0;
2177                         }
2178                 }
2179         }
2180
2181         /* OK, if we got to here, then none of the previous chips appear to
2182            be aliases for the current one. */
2183         set_bit((base >> cfi->chipshift), chip_map); /* Update chip map */
2184         cfi->numchips++;
2185
2186 ok_out:
2187         /* Put it back into Read Mode */
2188         jedec_reset(base, map, cfi);
2189
2190         printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n",
2191                map->name, cfi_interleave(cfi), cfi->device_type*8, base,
2192                map->bankwidth*8);
2193
2194         return 1;
2195 }
2196
2197 static struct chip_probe jedec_chip_probe = {
2198         .name = "JEDEC",
2199         .probe_chip = jedec_probe_chip
2200 };
2201
2202 static struct mtd_info *jedec_probe(struct map_info *map)
2203 {
2204         /*
2205          * Just use the generic probe stuff to call our CFI-specific
2206          * chip_probe routine in all the possible permutations, etc.
2207          */
2208         return mtd_do_chip_probe(map, &jedec_chip_probe);
2209 }
2210
2211 static struct mtd_chip_driver jedec_chipdrv = {
2212         .probe  = jedec_probe,
2213         .name   = "jedec_probe",
2214         .module = THIS_MODULE
2215 };
2216
2217 static int __init jedec_probe_init(void)
2218 {
2219         register_mtd_chip_driver(&jedec_chipdrv);
2220         return 0;
2221 }
2222
2223 static void __exit jedec_probe_exit(void)
2224 {
2225         unregister_mtd_chip_driver(&jedec_chipdrv);
2226 }
2227
2228 module_init(jedec_probe_init);
2229 module_exit(jedec_probe_exit);
2230
2231 MODULE_LICENSE("GPL");
2232 MODULE_AUTHOR("Erwin Authried <eauth@softsys.co.at> et al.");
2233 MODULE_DESCRIPTION("Probe code for JEDEC-compliant flash chips");