2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
4 * Copyright (c) 2005 Cisco Systems. All rights reserved.
5 * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
6 * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
8 * This software is available to you under a choice of one of two
9 * licenses. You may choose to be licensed under the terms of the GNU
10 * General Public License (GPL) Version 2, available from the file
11 * COPYING in the main directory of this source tree, or the
12 * OpenIB.org BSD license below:
14 * Redistribution and use in source and binary forms, with or
15 * without modification, are permitted provided that the following
18 * - Redistributions of source code must retain the above
19 * copyright notice, this list of conditions and the following
22 * - Redistributions in binary form must reproduce the above
23 * copyright notice, this list of conditions and the following
24 * disclaimer in the documentation and/or other materials
25 * provided with the distribution.
27 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
28 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
29 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
30 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
31 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
32 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
33 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 * $Id: mthca_provider.c 1397 2004-12-28 05:09:00Z roland $
39 #include <rdma/ib_smi.h>
40 #include <rdma/ib_user_verbs.h>
43 #include "mthca_dev.h"
44 #include "mthca_cmd.h"
45 #include "mthca_user.h"
46 #include "mthca_memfree.h"
48 static int mthca_query_device(struct ib_device *ibdev,
49 struct ib_device_attr *props)
51 struct ib_smp *in_mad = NULL;
52 struct ib_smp *out_mad = NULL;
54 struct mthca_dev* mdev = to_mdev(ibdev);
58 in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
59 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
60 if (!in_mad || !out_mad)
63 memset(props, 0, sizeof *props);
65 props->fw_ver = mdev->fw_ver;
67 memset(in_mad, 0, sizeof *in_mad);
68 in_mad->base_version = 1;
69 in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
70 in_mad->class_version = 1;
71 in_mad->method = IB_MGMT_METHOD_GET;
72 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
74 err = mthca_MAD_IFC(mdev, 1, 1,
75 1, NULL, NULL, in_mad, out_mad,
84 props->device_cap_flags = mdev->device_cap_flags;
85 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
87 props->vendor_part_id = be16_to_cpup((__be16 *) (out_mad->data + 30));
88 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
89 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
90 memcpy(&props->node_guid, out_mad->data + 12, 8);
92 props->max_mr_size = ~0ull;
93 props->max_qp = mdev->limits.num_qps - mdev->limits.reserved_qps;
94 props->max_qp_wr = mdev->limits.max_wqes;
95 props->max_sge = mdev->limits.max_sg;
96 props->max_cq = mdev->limits.num_cqs - mdev->limits.reserved_cqs;
97 props->max_cqe = mdev->limits.max_cqes;
98 props->max_mr = mdev->limits.num_mpts - mdev->limits.reserved_mrws;
99 props->max_pd = mdev->limits.num_pds - mdev->limits.reserved_pds;
100 props->max_qp_rd_atom = 1 << mdev->qp_table.rdb_shift;
101 props->max_qp_init_rd_atom = mdev->limits.max_qp_init_rdma;
102 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
103 props->max_srq = mdev->limits.num_srqs - mdev->limits.reserved_srqs;
104 props->max_srq_wr = mdev->limits.max_srq_wqes;
105 props->max_srq_sge = mdev->limits.max_sg;
106 props->local_ca_ack_delay = mdev->limits.local_ca_ack_delay;
107 props->atomic_cap = mdev->limits.flags & DEV_LIM_FLAG_ATOMIC ?
108 IB_ATOMIC_HCA : IB_ATOMIC_NONE;
109 props->max_pkeys = mdev->limits.pkey_table_len;
110 props->max_mcast_grp = mdev->limits.num_mgms + mdev->limits.num_amgms;
111 props->max_mcast_qp_attach = MTHCA_QP_PER_MGM;
112 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
113 props->max_mcast_grp;
122 static int mthca_query_port(struct ib_device *ibdev,
123 u8 port, struct ib_port_attr *props)
125 struct ib_smp *in_mad = NULL;
126 struct ib_smp *out_mad = NULL;
130 in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
131 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
132 if (!in_mad || !out_mad)
135 memset(props, 0, sizeof *props);
137 memset(in_mad, 0, sizeof *in_mad);
138 in_mad->base_version = 1;
139 in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
140 in_mad->class_version = 1;
141 in_mad->method = IB_MGMT_METHOD_GET;
142 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
143 in_mad->attr_mod = cpu_to_be32(port);
145 err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
146 port, NULL, NULL, in_mad, out_mad,
155 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
156 props->lmc = out_mad->data[34] & 0x7;
157 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
158 props->sm_sl = out_mad->data[36] & 0xf;
159 props->state = out_mad->data[32] & 0xf;
160 props->phys_state = out_mad->data[33] >> 4;
161 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
162 props->gid_tbl_len = to_mdev(ibdev)->limits.gid_table_len;
163 props->max_msg_sz = 0x80000000;
164 props->pkey_tbl_len = to_mdev(ibdev)->limits.pkey_table_len;
165 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
166 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
167 props->active_width = out_mad->data[31] & 0xf;
168 props->active_speed = out_mad->data[35] >> 4;
169 props->max_mtu = out_mad->data[41] & 0xf;
170 props->active_mtu = out_mad->data[36] >> 4;
171 props->subnet_timeout = out_mad->data[51] & 0x1f;
179 static int mthca_modify_port(struct ib_device *ibdev,
180 u8 port, int port_modify_mask,
181 struct ib_port_modify *props)
183 struct mthca_set_ib_param set_ib;
184 struct ib_port_attr attr;
188 if (down_interruptible(&to_mdev(ibdev)->cap_mask_mutex))
191 err = mthca_query_port(ibdev, port, &attr);
195 set_ib.set_si_guid = 0;
196 set_ib.reset_qkey_viol = !!(port_modify_mask & IB_PORT_RESET_QKEY_CNTR);
198 set_ib.cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
199 ~props->clr_port_cap_mask;
201 err = mthca_SET_IB(to_mdev(ibdev), &set_ib, port, &status);
210 up(&to_mdev(ibdev)->cap_mask_mutex);
214 static int mthca_query_pkey(struct ib_device *ibdev,
215 u8 port, u16 index, u16 *pkey)
217 struct ib_smp *in_mad = NULL;
218 struct ib_smp *out_mad = NULL;
222 in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
223 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
224 if (!in_mad || !out_mad)
227 memset(in_mad, 0, sizeof *in_mad);
228 in_mad->base_version = 1;
229 in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
230 in_mad->class_version = 1;
231 in_mad->method = IB_MGMT_METHOD_GET;
232 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
233 in_mad->attr_mod = cpu_to_be32(index / 32);
235 err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
236 port, NULL, NULL, in_mad, out_mad,
245 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
253 static int mthca_query_gid(struct ib_device *ibdev, u8 port,
254 int index, union ib_gid *gid)
256 struct ib_smp *in_mad = NULL;
257 struct ib_smp *out_mad = NULL;
261 in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
262 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
263 if (!in_mad || !out_mad)
266 memset(in_mad, 0, sizeof *in_mad);
267 in_mad->base_version = 1;
268 in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
269 in_mad->class_version = 1;
270 in_mad->method = IB_MGMT_METHOD_GET;
271 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
272 in_mad->attr_mod = cpu_to_be32(port);
274 err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
275 port, NULL, NULL, in_mad, out_mad,
284 memcpy(gid->raw, out_mad->data + 8, 8);
286 memset(in_mad, 0, sizeof *in_mad);
287 in_mad->base_version = 1;
288 in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
289 in_mad->class_version = 1;
290 in_mad->method = IB_MGMT_METHOD_GET;
291 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
292 in_mad->attr_mod = cpu_to_be32(index / 8);
294 err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
295 port, NULL, NULL, in_mad, out_mad,
304 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 16, 8);
312 static struct ib_ucontext *mthca_alloc_ucontext(struct ib_device *ibdev,
313 struct ib_udata *udata)
315 struct mthca_alloc_ucontext_resp uresp;
316 struct mthca_ucontext *context;
319 memset(&uresp, 0, sizeof uresp);
321 uresp.qp_tab_size = to_mdev(ibdev)->limits.num_qps;
322 if (mthca_is_memfree(to_mdev(ibdev)))
323 uresp.uarc_size = to_mdev(ibdev)->uar_table.uarc_size;
327 context = kmalloc(sizeof *context, GFP_KERNEL);
329 return ERR_PTR(-ENOMEM);
331 err = mthca_uar_alloc(to_mdev(ibdev), &context->uar);
337 context->db_tab = mthca_init_user_db_tab(to_mdev(ibdev));
338 if (IS_ERR(context->db_tab)) {
339 err = PTR_ERR(context->db_tab);
340 mthca_uar_free(to_mdev(ibdev), &context->uar);
345 if (ib_copy_to_udata(udata, &uresp, sizeof uresp)) {
346 mthca_cleanup_user_db_tab(to_mdev(ibdev), &context->uar, context->db_tab);
347 mthca_uar_free(to_mdev(ibdev), &context->uar);
349 return ERR_PTR(-EFAULT);
352 return &context->ibucontext;
355 static int mthca_dealloc_ucontext(struct ib_ucontext *context)
357 mthca_cleanup_user_db_tab(to_mdev(context->device), &to_mucontext(context)->uar,
358 to_mucontext(context)->db_tab);
359 mthca_uar_free(to_mdev(context->device), &to_mucontext(context)->uar);
360 kfree(to_mucontext(context));
365 static int mthca_mmap_uar(struct ib_ucontext *context,
366 struct vm_area_struct *vma)
368 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
371 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
373 if (io_remap_pfn_range(vma, vma->vm_start,
374 to_mucontext(context)->uar.pfn,
375 PAGE_SIZE, vma->vm_page_prot))
381 static struct ib_pd *mthca_alloc_pd(struct ib_device *ibdev,
382 struct ib_ucontext *context,
383 struct ib_udata *udata)
388 pd = kmalloc(sizeof *pd, GFP_KERNEL);
390 return ERR_PTR(-ENOMEM);
392 err = mthca_pd_alloc(to_mdev(ibdev), !context, pd);
399 if (ib_copy_to_udata(udata, &pd->pd_num, sizeof (__u32))) {
400 mthca_pd_free(to_mdev(ibdev), pd);
402 return ERR_PTR(-EFAULT);
409 static int mthca_dealloc_pd(struct ib_pd *pd)
411 mthca_pd_free(to_mdev(pd->device), to_mpd(pd));
417 static struct ib_ah *mthca_ah_create(struct ib_pd *pd,
418 struct ib_ah_attr *ah_attr)
423 ah = kmalloc(sizeof *ah, GFP_ATOMIC);
425 return ERR_PTR(-ENOMEM);
427 err = mthca_create_ah(to_mdev(pd->device), to_mpd(pd), ah_attr, ah);
436 static int mthca_ah_destroy(struct ib_ah *ah)
438 mthca_destroy_ah(to_mdev(ah->device), to_mah(ah));
444 static struct ib_srq *mthca_create_srq(struct ib_pd *pd,
445 struct ib_srq_init_attr *init_attr,
446 struct ib_udata *udata)
448 struct mthca_create_srq ucmd;
449 struct mthca_ucontext *context = NULL;
450 struct mthca_srq *srq;
453 srq = kmalloc(sizeof *srq, GFP_KERNEL);
455 return ERR_PTR(-ENOMEM);
458 context = to_mucontext(pd->uobject->context);
460 if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd))
461 return ERR_PTR(-EFAULT);
463 err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
464 context->db_tab, ucmd.db_index,
470 srq->mr.ibmr.lkey = ucmd.lkey;
471 srq->db_index = ucmd.db_index;
474 err = mthca_alloc_srq(to_mdev(pd->device), to_mpd(pd),
475 &init_attr->attr, srq);
477 if (err && pd->uobject)
478 mthca_unmap_user_db(to_mdev(pd->device), &context->uar,
479 context->db_tab, ucmd.db_index);
484 if (context && ib_copy_to_udata(udata, &srq->srqn, sizeof (__u32))) {
485 mthca_free_srq(to_mdev(pd->device), srq);
498 static int mthca_destroy_srq(struct ib_srq *srq)
500 struct mthca_ucontext *context;
503 context = to_mucontext(srq->uobject->context);
505 mthca_unmap_user_db(to_mdev(srq->device), &context->uar,
506 context->db_tab, to_msrq(srq)->db_index);
509 mthca_free_srq(to_mdev(srq->device), to_msrq(srq));
515 static struct ib_qp *mthca_create_qp(struct ib_pd *pd,
516 struct ib_qp_init_attr *init_attr,
517 struct ib_udata *udata)
519 struct mthca_create_qp ucmd;
523 switch (init_attr->qp_type) {
528 struct mthca_ucontext *context;
530 qp = kmalloc(sizeof *qp, GFP_KERNEL);
532 return ERR_PTR(-ENOMEM);
535 context = to_mucontext(pd->uobject->context);
537 if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd))
538 return ERR_PTR(-EFAULT);
540 err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
542 ucmd.sq_db_index, ucmd.sq_db_page);
548 err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
550 ucmd.rq_db_index, ucmd.rq_db_page);
552 mthca_unmap_user_db(to_mdev(pd->device),
560 qp->mr.ibmr.lkey = ucmd.lkey;
561 qp->sq.db_index = ucmd.sq_db_index;
562 qp->rq.db_index = ucmd.rq_db_index;
565 err = mthca_alloc_qp(to_mdev(pd->device), to_mpd(pd),
566 to_mcq(init_attr->send_cq),
567 to_mcq(init_attr->recv_cq),
568 init_attr->qp_type, init_attr->sq_sig_type,
569 &init_attr->cap, qp);
571 if (err && pd->uobject) {
572 context = to_mucontext(pd->uobject->context);
574 mthca_unmap_user_db(to_mdev(pd->device),
578 mthca_unmap_user_db(to_mdev(pd->device),
584 qp->ibqp.qp_num = qp->qpn;
590 /* Don't allow userspace to create special QPs */
592 return ERR_PTR(-EINVAL);
594 qp = kmalloc(sizeof (struct mthca_sqp), GFP_KERNEL);
596 return ERR_PTR(-ENOMEM);
598 qp->ibqp.qp_num = init_attr->qp_type == IB_QPT_SMI ? 0 : 1;
600 err = mthca_alloc_sqp(to_mdev(pd->device), to_mpd(pd),
601 to_mcq(init_attr->send_cq),
602 to_mcq(init_attr->recv_cq),
603 init_attr->sq_sig_type, &init_attr->cap,
604 qp->ibqp.qp_num, init_attr->port_num,
609 /* Don't support raw QPs */
610 return ERR_PTR(-ENOSYS);
618 init_attr->cap.max_inline_data = 0;
619 init_attr->cap.max_send_wr = qp->sq.max;
620 init_attr->cap.max_recv_wr = qp->rq.max;
621 init_attr->cap.max_send_sge = qp->sq.max_gs;
622 init_attr->cap.max_recv_sge = qp->rq.max_gs;
627 static int mthca_destroy_qp(struct ib_qp *qp)
630 mthca_unmap_user_db(to_mdev(qp->device),
631 &to_mucontext(qp->uobject->context)->uar,
632 to_mucontext(qp->uobject->context)->db_tab,
633 to_mqp(qp)->sq.db_index);
634 mthca_unmap_user_db(to_mdev(qp->device),
635 &to_mucontext(qp->uobject->context)->uar,
636 to_mucontext(qp->uobject->context)->db_tab,
637 to_mqp(qp)->rq.db_index);
639 mthca_free_qp(to_mdev(qp->device), to_mqp(qp));
644 static struct ib_cq *mthca_create_cq(struct ib_device *ibdev, int entries,
645 struct ib_ucontext *context,
646 struct ib_udata *udata)
648 struct mthca_create_cq ucmd;
653 if (entries < 1 || entries > to_mdev(ibdev)->limits.max_cqes)
654 return ERR_PTR(-EINVAL);
657 if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd))
658 return ERR_PTR(-EFAULT);
660 err = mthca_map_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
661 to_mucontext(context)->db_tab,
662 ucmd.set_db_index, ucmd.set_db_page);
666 err = mthca_map_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
667 to_mucontext(context)->db_tab,
668 ucmd.arm_db_index, ucmd.arm_db_page);
673 cq = kmalloc(sizeof *cq, GFP_KERNEL);
680 cq->mr.ibmr.lkey = ucmd.lkey;
681 cq->set_ci_db_index = ucmd.set_db_index;
682 cq->arm_db_index = ucmd.arm_db_index;
685 for (nent = 1; nent <= entries; nent <<= 1)
688 err = mthca_init_cq(to_mdev(ibdev), nent,
689 context ? to_mucontext(context) : NULL,
690 context ? ucmd.pdn : to_mdev(ibdev)->driver_pd.pd_num,
695 if (context && ib_copy_to_udata(udata, &cq->cqn, sizeof (__u32))) {
696 mthca_free_cq(to_mdev(ibdev), cq);
707 mthca_unmap_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
708 to_mucontext(context)->db_tab, ucmd.arm_db_index);
712 mthca_unmap_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
713 to_mucontext(context)->db_tab, ucmd.set_db_index);
718 static int mthca_destroy_cq(struct ib_cq *cq)
721 mthca_unmap_user_db(to_mdev(cq->device),
722 &to_mucontext(cq->uobject->context)->uar,
723 to_mucontext(cq->uobject->context)->db_tab,
724 to_mcq(cq)->arm_db_index);
725 mthca_unmap_user_db(to_mdev(cq->device),
726 &to_mucontext(cq->uobject->context)->uar,
727 to_mucontext(cq->uobject->context)->db_tab,
728 to_mcq(cq)->set_ci_db_index);
730 mthca_free_cq(to_mdev(cq->device), to_mcq(cq));
736 static inline u32 convert_access(int acc)
738 return (acc & IB_ACCESS_REMOTE_ATOMIC ? MTHCA_MPT_FLAG_ATOMIC : 0) |
739 (acc & IB_ACCESS_REMOTE_WRITE ? MTHCA_MPT_FLAG_REMOTE_WRITE : 0) |
740 (acc & IB_ACCESS_REMOTE_READ ? MTHCA_MPT_FLAG_REMOTE_READ : 0) |
741 (acc & IB_ACCESS_LOCAL_WRITE ? MTHCA_MPT_FLAG_LOCAL_WRITE : 0) |
742 MTHCA_MPT_FLAG_LOCAL_READ;
745 static struct ib_mr *mthca_get_dma_mr(struct ib_pd *pd, int acc)
750 mr = kmalloc(sizeof *mr, GFP_KERNEL);
752 return ERR_PTR(-ENOMEM);
754 err = mthca_mr_alloc_notrans(to_mdev(pd->device),
756 convert_access(acc), mr);
766 static struct ib_mr *mthca_reg_phys_mr(struct ib_pd *pd,
767 struct ib_phys_buf *buffer_list,
781 /* First check that we have enough alignment */
782 if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK))
783 return ERR_PTR(-EINVAL);
785 if (num_phys_buf > 1 &&
786 ((buffer_list[0].addr + buffer_list[0].size) & ~PAGE_MASK))
787 return ERR_PTR(-EINVAL);
791 for (i = 0; i < num_phys_buf; ++i) {
792 if (i != 0 && buffer_list[i].addr & ~PAGE_MASK)
793 return ERR_PTR(-EINVAL);
794 if (i != 0 && i != num_phys_buf - 1 &&
795 (buffer_list[i].size & ~PAGE_MASK))
796 return ERR_PTR(-EINVAL);
798 total_size += buffer_list[i].size;
800 mask |= buffer_list[i].addr;
803 /* Find largest page shift we can use to cover buffers */
804 for (shift = PAGE_SHIFT; shift < 31; ++shift)
805 if (num_phys_buf > 1) {
806 if ((1ULL << shift) & mask)
810 buffer_list[0].size +
811 (buffer_list[0].addr & ((1ULL << shift) - 1)))
815 buffer_list[0].size += buffer_list[0].addr & ((1ULL << shift) - 1);
816 buffer_list[0].addr &= ~0ull << shift;
818 mr = kmalloc(sizeof *mr, GFP_KERNEL);
820 return ERR_PTR(-ENOMEM);
823 for (i = 0; i < num_phys_buf; ++i)
824 npages += (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
829 page_list = kmalloc(npages * sizeof *page_list, GFP_KERNEL);
832 return ERR_PTR(-ENOMEM);
836 for (i = 0; i < num_phys_buf; ++i)
838 j < (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
840 page_list[n++] = buffer_list[i].addr + ((u64) j << shift);
842 mthca_dbg(to_mdev(pd->device), "Registering memory at %llx (iova %llx) "
843 "in PD %x; shift %d, npages %d.\n",
844 (unsigned long long) buffer_list[0].addr,
845 (unsigned long long) *iova_start,
849 err = mthca_mr_alloc_phys(to_mdev(pd->device),
851 page_list, shift, npages,
852 *iova_start, total_size,
853 convert_access(acc), mr);
865 static struct ib_mr *mthca_reg_user_mr(struct ib_pd *pd, struct ib_umem *region,
866 int acc, struct ib_udata *udata)
868 struct mthca_dev *dev = to_mdev(pd->device);
869 struct ib_umem_chunk *chunk;
876 shift = ffs(region->page_size) - 1;
878 mr = kmalloc(sizeof *mr, GFP_KERNEL);
880 return ERR_PTR(-ENOMEM);
883 list_for_each_entry(chunk, ®ion->chunk_list, list)
886 mr->mtt = mthca_alloc_mtt(dev, n);
887 if (IS_ERR(mr->mtt)) {
888 err = PTR_ERR(mr->mtt);
892 pages = (u64 *) __get_free_page(GFP_KERNEL);
900 list_for_each_entry(chunk, ®ion->chunk_list, list)
901 for (j = 0; j < chunk->nmap; ++j) {
902 len = sg_dma_len(&chunk->page_list[j]) >> shift;
903 for (k = 0; k < len; ++k) {
904 pages[i++] = sg_dma_address(&chunk->page_list[j]) +
905 region->page_size * k;
907 * Be friendly to WRITE_MTT command
908 * and leave two empty slots for the
909 * index and reserved fields of the
912 if (i == PAGE_SIZE / sizeof (u64) - 2) {
913 err = mthca_write_mtt(dev, mr->mtt,
924 err = mthca_write_mtt(dev, mr->mtt, n, pages, i);
926 free_page((unsigned long) pages);
930 err = mthca_mr_alloc(dev, to_mpd(pd)->pd_num, shift, region->virt_base,
931 region->length, convert_access(acc), mr);
939 mthca_free_mtt(dev, mr->mtt);
946 static int mthca_dereg_mr(struct ib_mr *mr)
948 struct mthca_mr *mmr = to_mmr(mr);
949 mthca_free_mr(to_mdev(mr->device), mmr);
954 static struct ib_fmr *mthca_alloc_fmr(struct ib_pd *pd, int mr_access_flags,
955 struct ib_fmr_attr *fmr_attr)
957 struct mthca_fmr *fmr;
960 fmr = kmalloc(sizeof *fmr, GFP_KERNEL);
962 return ERR_PTR(-ENOMEM);
964 memcpy(&fmr->attr, fmr_attr, sizeof *fmr_attr);
965 err = mthca_fmr_alloc(to_mdev(pd->device), to_mpd(pd)->pd_num,
966 convert_access(mr_access_flags), fmr);
976 static int mthca_dealloc_fmr(struct ib_fmr *fmr)
978 struct mthca_fmr *mfmr = to_mfmr(fmr);
981 err = mthca_free_fmr(to_mdev(fmr->device), mfmr);
989 static int mthca_unmap_fmr(struct list_head *fmr_list)
994 struct mthca_dev *mdev = NULL;
996 list_for_each_entry(fmr, fmr_list, list) {
997 if (mdev && to_mdev(fmr->device) != mdev)
999 mdev = to_mdev(fmr->device);
1005 if (mthca_is_memfree(mdev)) {
1006 list_for_each_entry(fmr, fmr_list, list)
1007 mthca_arbel_fmr_unmap(mdev, to_mfmr(fmr));
1011 list_for_each_entry(fmr, fmr_list, list)
1012 mthca_tavor_fmr_unmap(mdev, to_mfmr(fmr));
1014 err = mthca_SYNC_TPT(mdev, &status);
1022 static ssize_t show_rev(struct class_device *cdev, char *buf)
1024 struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
1025 return sprintf(buf, "%x\n", dev->rev_id);
1028 static ssize_t show_fw_ver(struct class_device *cdev, char *buf)
1030 struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
1031 return sprintf(buf, "%x.%x.%x\n", (int) (dev->fw_ver >> 32),
1032 (int) (dev->fw_ver >> 16) & 0xffff,
1033 (int) dev->fw_ver & 0xffff);
1036 static ssize_t show_hca(struct class_device *cdev, char *buf)
1038 struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
1039 switch (dev->pdev->device) {
1040 case PCI_DEVICE_ID_MELLANOX_TAVOR:
1041 return sprintf(buf, "MT23108\n");
1042 case PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT:
1043 return sprintf(buf, "MT25208 (MT23108 compat mode)\n");
1044 case PCI_DEVICE_ID_MELLANOX_ARBEL:
1045 return sprintf(buf, "MT25208\n");
1046 case PCI_DEVICE_ID_MELLANOX_SINAI:
1047 case PCI_DEVICE_ID_MELLANOX_SINAI_OLD:
1048 return sprintf(buf, "MT25204\n");
1050 return sprintf(buf, "unknown\n");
1054 static ssize_t show_board(struct class_device *cdev, char *buf)
1056 struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
1057 return sprintf(buf, "%.*s\n", MTHCA_BOARD_ID_LEN, dev->board_id);
1060 static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
1061 static CLASS_DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
1062 static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
1063 static CLASS_DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
1065 static struct class_device_attribute *mthca_class_attributes[] = {
1066 &class_device_attr_hw_rev,
1067 &class_device_attr_fw_ver,
1068 &class_device_attr_hca_type,
1069 &class_device_attr_board_id
1072 int mthca_register_device(struct mthca_dev *dev)
1077 strlcpy(dev->ib_dev.name, "mthca%d", IB_DEVICE_NAME_MAX);
1078 dev->ib_dev.owner = THIS_MODULE;
1080 dev->ib_dev.uverbs_abi_ver = MTHCA_UVERBS_ABI_VERSION;
1081 dev->ib_dev.uverbs_cmd_mask =
1082 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
1083 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
1084 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
1085 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
1086 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
1087 (1ull << IB_USER_VERBS_CMD_REG_MR) |
1088 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
1089 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
1090 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
1091 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
1092 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
1093 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
1094 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
1095 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
1096 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
1097 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
1098 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
1099 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ);
1100 dev->ib_dev.node_type = IB_NODE_CA;
1101 dev->ib_dev.phys_port_cnt = dev->limits.num_ports;
1102 dev->ib_dev.dma_device = &dev->pdev->dev;
1103 dev->ib_dev.class_dev.dev = &dev->pdev->dev;
1104 dev->ib_dev.query_device = mthca_query_device;
1105 dev->ib_dev.query_port = mthca_query_port;
1106 dev->ib_dev.modify_port = mthca_modify_port;
1107 dev->ib_dev.query_pkey = mthca_query_pkey;
1108 dev->ib_dev.query_gid = mthca_query_gid;
1109 dev->ib_dev.alloc_ucontext = mthca_alloc_ucontext;
1110 dev->ib_dev.dealloc_ucontext = mthca_dealloc_ucontext;
1111 dev->ib_dev.mmap = mthca_mmap_uar;
1112 dev->ib_dev.alloc_pd = mthca_alloc_pd;
1113 dev->ib_dev.dealloc_pd = mthca_dealloc_pd;
1114 dev->ib_dev.create_ah = mthca_ah_create;
1115 dev->ib_dev.destroy_ah = mthca_ah_destroy;
1117 if (dev->mthca_flags & MTHCA_FLAG_SRQ) {
1118 dev->ib_dev.create_srq = mthca_create_srq;
1119 dev->ib_dev.modify_srq = mthca_modify_srq;
1120 dev->ib_dev.destroy_srq = mthca_destroy_srq;
1122 if (mthca_is_memfree(dev))
1123 dev->ib_dev.post_srq_recv = mthca_arbel_post_srq_recv;
1125 dev->ib_dev.post_srq_recv = mthca_tavor_post_srq_recv;
1128 dev->ib_dev.create_qp = mthca_create_qp;
1129 dev->ib_dev.modify_qp = mthca_modify_qp;
1130 dev->ib_dev.destroy_qp = mthca_destroy_qp;
1131 dev->ib_dev.create_cq = mthca_create_cq;
1132 dev->ib_dev.destroy_cq = mthca_destroy_cq;
1133 dev->ib_dev.poll_cq = mthca_poll_cq;
1134 dev->ib_dev.get_dma_mr = mthca_get_dma_mr;
1135 dev->ib_dev.reg_phys_mr = mthca_reg_phys_mr;
1136 dev->ib_dev.reg_user_mr = mthca_reg_user_mr;
1137 dev->ib_dev.dereg_mr = mthca_dereg_mr;
1139 if (dev->mthca_flags & MTHCA_FLAG_FMR) {
1140 dev->ib_dev.alloc_fmr = mthca_alloc_fmr;
1141 dev->ib_dev.unmap_fmr = mthca_unmap_fmr;
1142 dev->ib_dev.dealloc_fmr = mthca_dealloc_fmr;
1143 if (mthca_is_memfree(dev))
1144 dev->ib_dev.map_phys_fmr = mthca_arbel_map_phys_fmr;
1146 dev->ib_dev.map_phys_fmr = mthca_tavor_map_phys_fmr;
1149 dev->ib_dev.attach_mcast = mthca_multicast_attach;
1150 dev->ib_dev.detach_mcast = mthca_multicast_detach;
1151 dev->ib_dev.process_mad = mthca_process_mad;
1153 if (mthca_is_memfree(dev)) {
1154 dev->ib_dev.req_notify_cq = mthca_arbel_arm_cq;
1155 dev->ib_dev.post_send = mthca_arbel_post_send;
1156 dev->ib_dev.post_recv = mthca_arbel_post_receive;
1158 dev->ib_dev.req_notify_cq = mthca_tavor_arm_cq;
1159 dev->ib_dev.post_send = mthca_tavor_post_send;
1160 dev->ib_dev.post_recv = mthca_tavor_post_receive;
1163 init_MUTEX(&dev->cap_mask_mutex);
1165 ret = ib_register_device(&dev->ib_dev);
1169 for (i = 0; i < ARRAY_SIZE(mthca_class_attributes); ++i) {
1170 ret = class_device_create_file(&dev->ib_dev.class_dev,
1171 mthca_class_attributes[i]);
1173 ib_unregister_device(&dev->ib_dev);
1181 void mthca_unregister_device(struct mthca_dev *dev)
1183 ib_unregister_device(&dev->ib_dev);