2 * linux/arch/arm/mach-sa1100/generic.c
4 * Author: Nicolas Pitre
6 * Code common to all SA11x0 machines.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 #include <linux/config.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
18 #include <linux/cpufreq.h>
19 #include <linux/ioport.h>
20 #include <linux/sched.h> /* just for sched_clock() - funny that */
21 #include <linux/platform_device.h>
23 #include <asm/div64.h>
24 #include <asm/hardware.h>
25 #include <asm/system.h>
26 #include <asm/pgtable.h>
27 #include <asm/mach/map.h>
28 #include <asm/mach/flash.h>
36 * This table is setup for a 3.6864MHz Crystal.
38 static const unsigned short cclk_frequency_100khz[NR_FREQS] = {
57 #if defined(CONFIG_CPU_FREQ_SA1100) || defined(CONFIG_CPU_FREQ_SA1110)
59 unsigned int sa11x0_freq_to_ppcr(unsigned int khz)
65 for (i = 0; i < NR_FREQS; i++)
66 if (cclk_frequency_100khz[i] >= khz)
72 unsigned int sa11x0_ppcr_to_freq(unsigned int idx)
74 unsigned int freq = 0;
76 freq = cclk_frequency_100khz[idx] * 100;
81 /* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on
82 * this platform, anyway.
84 int sa11x0_verify_speed(struct cpufreq_policy *policy)
90 cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
92 /* make sure that at least one frequency is within the policy */
93 tmp = cclk_frequency_100khz[sa11x0_freq_to_ppcr(policy->min)] * 100;
94 if (tmp > policy->max)
97 cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
102 unsigned int sa11x0_getspeed(unsigned int cpu)
106 return cclk_frequency_100khz[PPCR & 0xf] * 100;
111 * We still need to provide this so building without cpufreq works.
113 unsigned int cpufreq_get(unsigned int cpu)
115 return cclk_frequency_100khz[PPCR & 0xf] * 100;
117 EXPORT_SYMBOL(cpufreq_get);
121 * This is the SA11x0 sched_clock implementation. This has
122 * a resolution of 271ns, and a maximum value of 1165s.
123 * ( * 1E9 / 3686400 => * 78125 / 288)
125 unsigned long long sched_clock(void)
127 unsigned long long v;
129 v = (unsigned long long)OSCR * 78125;
136 * Default power-off for SA1100
138 static void sa1100_power_off(void)
142 /* disable internal oscillator, float CS lines */
143 PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
144 /* enable wake-up on GPIO0 (Assabet...) */
145 PWER = GFER = GRER = 1;
147 * set scratchpad to zero, just in case it is used as a
148 * restart address by the bootloader.
151 /* enter sleep mode */
155 static struct resource sa11x0udc_resources[] = {
159 .flags = IORESOURCE_MEM,
163 static u64 sa11x0udc_dma_mask = 0xffffffffUL;
165 static struct platform_device sa11x0udc_device = {
166 .name = "sa11x0-udc",
169 .dma_mask = &sa11x0udc_dma_mask,
170 .coherent_dma_mask = 0xffffffff,
172 .num_resources = ARRAY_SIZE(sa11x0udc_resources),
173 .resource = sa11x0udc_resources,
176 static struct resource sa11x0uart1_resources[] = {
180 .flags = IORESOURCE_MEM,
184 static struct platform_device sa11x0uart1_device = {
185 .name = "sa11x0-uart",
187 .num_resources = ARRAY_SIZE(sa11x0uart1_resources),
188 .resource = sa11x0uart1_resources,
191 static struct resource sa11x0uart3_resources[] = {
195 .flags = IORESOURCE_MEM,
199 static struct platform_device sa11x0uart3_device = {
200 .name = "sa11x0-uart",
202 .num_resources = ARRAY_SIZE(sa11x0uart3_resources),
203 .resource = sa11x0uart3_resources,
206 static struct resource sa11x0mcp_resources[] = {
210 .flags = IORESOURCE_MEM,
214 static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
216 static struct platform_device sa11x0mcp_device = {
217 .name = "sa11x0-mcp",
220 .dma_mask = &sa11x0mcp_dma_mask,
221 .coherent_dma_mask = 0xffffffff,
223 .num_resources = ARRAY_SIZE(sa11x0mcp_resources),
224 .resource = sa11x0mcp_resources,
227 void sa11x0_set_mcp_data(struct mcp_plat_data *data)
229 sa11x0mcp_device.dev.platform_data = data;
232 static struct resource sa11x0ssp_resources[] = {
236 .flags = IORESOURCE_MEM,
240 static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
242 static struct platform_device sa11x0ssp_device = {
243 .name = "sa11x0-ssp",
246 .dma_mask = &sa11x0ssp_dma_mask,
247 .coherent_dma_mask = 0xffffffff,
249 .num_resources = ARRAY_SIZE(sa11x0ssp_resources),
250 .resource = sa11x0ssp_resources,
253 static struct resource sa11x0fb_resources[] = {
257 .flags = IORESOURCE_MEM,
262 .flags = IORESOURCE_IRQ,
266 static struct platform_device sa11x0fb_device = {
270 .coherent_dma_mask = 0xffffffff,
272 .num_resources = ARRAY_SIZE(sa11x0fb_resources),
273 .resource = sa11x0fb_resources,
276 static struct platform_device sa11x0pcmcia_device = {
277 .name = "sa11x0-pcmcia",
281 static struct platform_device sa11x0mtd_device = {
286 void sa11x0_set_flash_data(struct flash_platform_data *flash,
287 struct resource *res, int nr)
289 flash->name = "sa1100";
290 sa11x0mtd_device.dev.platform_data = flash;
291 sa11x0mtd_device.resource = res;
292 sa11x0mtd_device.num_resources = nr;
295 static struct resource sa11x0ir_resources[] = {
297 .start = __PREG(Ser2UTCR0),
298 .end = __PREG(Ser2UTCR0) + 0x24 - 1,
299 .flags = IORESOURCE_MEM,
301 .start = __PREG(Ser2HSCR0),
302 .end = __PREG(Ser2HSCR0) + 0x1c - 1,
303 .flags = IORESOURCE_MEM,
305 .start = __PREG(Ser2HSCR2),
306 .end = __PREG(Ser2HSCR2) + 0x04 - 1,
307 .flags = IORESOURCE_MEM,
309 .start = IRQ_Ser2ICP,
311 .flags = IORESOURCE_IRQ,
315 static struct platform_device sa11x0ir_device = {
318 .num_resources = ARRAY_SIZE(sa11x0ir_resources),
319 .resource = sa11x0ir_resources,
322 void sa11x0_set_irda_data(struct irda_platform_data *irda)
324 sa11x0ir_device.dev.platform_data = irda;
327 static struct platform_device *sa11x0_devices[] __initdata = {
333 &sa11x0pcmcia_device,
338 static int __init sa1100_init(void)
340 pm_power_off = sa1100_power_off;
342 if (sa11x0ir_device.dev.platform_data)
343 platform_device_register(&sa11x0ir_device);
345 return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
348 arch_initcall(sa1100_init);
350 void (*sa1100fb_backlight_power)(int on);
351 void (*sa1100fb_lcd_power)(int on);
353 EXPORT_SYMBOL(sa1100fb_backlight_power);
354 EXPORT_SYMBOL(sa1100fb_lcd_power);
358 * Common I/O mapping:
360 * Typically, static virtual address mappings are as follow:
362 * 0xf0000000-0xf3ffffff: miscellaneous stuff (CPLDs, etc.)
363 * 0xf4000000-0xf4ffffff: SA-1111
364 * 0xf5000000-0xf5ffffff: reserved (used by cache flushing area)
365 * 0xf6000000-0xfffeffff: reserved (internal SA1100 IO defined above)
366 * 0xffff0000-0xffff0fff: SA1100 exception vectors
367 * 0xffff2000-0xffff2fff: Minicache copy_user_page area
369 * Below 0xe8000000 is reserved for vm allocation.
371 * The machine specific code must provide the extra mapping beside the
372 * default mapping provided here.
375 static struct map_desc standard_io_desc[] __initdata = {
377 .virtual = 0xf8000000,
378 .pfn = __phys_to_pfn(0x80000000),
379 .length = 0x00100000,
382 .virtual = 0xfa000000,
383 .pfn = __phys_to_pfn(0x90000000),
384 .length = 0x00100000,
387 .virtual = 0xfc000000,
388 .pfn = __phys_to_pfn(0xa0000000),
389 .length = 0x00100000,
392 .virtual = 0xfe000000,
393 .pfn = __phys_to_pfn(0xb0000000),
394 .length = 0x00200000,
399 void __init sa1100_map_io(void)
401 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
405 * Disable the memory bus request/grant signals on the SA1110 to
406 * ensure that we don't receive spurious memory requests. We set
407 * the MBGNT signal false to ensure the SA1111 doesn't own the
410 void __init sa1110_mb_disable(void)
414 local_irq_save(flags);
418 GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
420 GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ);
422 local_irq_restore(flags);
426 * If the system is going to use the SA-1111 DMA engines, set up
427 * the memory bus request/grant pins.
429 void __init sa1110_mb_enable(void)
433 local_irq_save(flags);
437 GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
439 GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
442 local_irq_restore(flags);