2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1992 - 1997, 2000-2006 Silicon Graphics, Inc. All rights reserved.
9 #include <asm/sn/types.h>
10 #include <asm/sn/addrs.h>
11 #include <asm/sn/io.h>
12 #include <asm/sn/module.h>
13 #include <asm/sn/intr.h>
14 #include <asm/sn/pcibus_provider_defs.h>
15 #include <asm/sn/pcidev.h>
16 #include <asm/sn/sn_sal.h>
17 #include "xtalk/hubdev.h"
20 * The code in this file will only be executed when running with
21 * a PROM that does _not_ have base ACPI IO support.
22 * (i.e., SN_ACPI_BASE_SUPPORT() == 0)
25 static int max_segment_number; /* Default highest segment number */
26 static int max_pcibus_number = 255; /* Default highest pci bus number */
30 * Retrieve the hub device info structure for the given nasid.
32 static inline u64 sal_get_hubdev_info(u64 handle, u64 address)
34 struct ia64_sal_retval ret_stuff;
38 SAL_CALL_NOLOCK(ret_stuff,
39 (u64) SN_SAL_IOIF_GET_HUBDEV_INFO,
40 (u64) handle, (u64) address, 0, 0, 0, 0, 0);
45 * Retrieve the pci bus information given the bus number.
47 static inline u64 sal_get_pcibus_info(u64 segment, u64 busnum, u64 address)
49 struct ia64_sal_retval ret_stuff;
53 SAL_CALL_NOLOCK(ret_stuff,
54 (u64) SN_SAL_IOIF_GET_PCIBUS_INFO,
55 (u64) segment, (u64) busnum, (u64) address, 0, 0, 0, 0);
60 * Retrieve the pci device information given the bus and device|function number.
63 sal_get_pcidev_info(u64 segment, u64 bus_number, u64 devfn, u64 pci_dev,
66 struct ia64_sal_retval ret_stuff;
70 SAL_CALL_NOLOCK(ret_stuff,
71 (u64) SN_SAL_IOIF_GET_PCIDEV_INFO,
72 (u64) segment, (u64) bus_number, (u64) devfn,
80 * sn_fixup_ionodes() - This routine initializes the HUB data structure for
81 * each node in the system. This function is only
82 * executed when running with a non-ACPI capable PROM.
84 static void __init sn_fixup_ionodes(void)
87 struct hubdev_info *hubdev;
91 extern void sn_common_hubdev_init(struct hubdev_info *);
94 * Get SGI Specific HUB chipset information.
95 * Inform Prom that this kernel can support domain bus numbering.
97 for (i = 0; i < num_cnodes; i++) {
98 hubdev = (struct hubdev_info *)(NODEPDA(i)->pdinfo);
99 nasid = cnodeid_to_nasid(i);
100 hubdev->max_segment_number = 0xffffffff;
101 hubdev->max_pcibus_number = 0xff;
102 status = sal_get_hubdev_info(nasid, (u64) __pa(hubdev));
106 /* Save the largest Domain and pcibus numbers found. */
107 if (hubdev->max_segment_number) {
109 * Dealing with a Prom that supports segments.
111 max_segment_number = hubdev->max_segment_number;
112 max_pcibus_number = hubdev->max_pcibus_number;
114 sn_common_hubdev_init(hubdev);
119 * sn_pci_legacy_window_fixup - Create PCI controller windows for
120 * legacy IO and MEM space. This needs to
121 * be done here, as the PROM does not have
122 * ACPI support defining the root buses
123 * and their resources (_CRS),
126 sn_legacy_pci_window_fixup(struct pci_controller *controller,
127 u64 legacy_io, u64 legacy_mem)
129 controller->window = kcalloc(2, sizeof(struct pci_window),
131 if (controller->window == NULL)
133 controller->window[0].offset = legacy_io;
134 controller->window[0].resource.name = "legacy_io";
135 controller->window[0].resource.flags = IORESOURCE_IO;
136 controller->window[0].resource.start = legacy_io;
137 controller->window[0].resource.end =
138 controller->window[0].resource.start + 0xffff;
139 controller->window[0].resource.parent = &ioport_resource;
140 controller->window[1].offset = legacy_mem;
141 controller->window[1].resource.name = "legacy_mem";
142 controller->window[1].resource.flags = IORESOURCE_MEM;
143 controller->window[1].resource.start = legacy_mem;
144 controller->window[1].resource.end =
145 controller->window[1].resource.start + (1024 * 1024) - 1;
146 controller->window[1].resource.parent = &iomem_resource;
147 controller->windows = 2;
151 * sn_pci_window_fixup() - Create a pci_window for each device resource.
152 * It will setup pci_windows for use by
153 * pcibios_bus_to_resource(), pcibios_resource_to_bus(),
157 sn_pci_window_fixup(struct pci_dev *dev, unsigned int count,
160 struct pci_controller *controller = PCI_CONTROLLER(dev->bus);
163 unsigned int new_count;
164 struct pci_window *new_window;
168 idx = controller->windows;
169 new_count = controller->windows + count;
170 new_window = kcalloc(new_count, sizeof(struct pci_window), GFP_KERNEL);
171 if (new_window == NULL)
173 if (controller->window) {
174 memcpy(new_window, controller->window,
175 sizeof(struct pci_window) * controller->windows);
176 kfree(controller->window);
179 /* Setup a pci_window for each device resource. */
180 for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
181 if (pci_addrs[i] == -1)
184 new_window[idx].offset = dev->resource[i].start - pci_addrs[i];
185 new_window[idx].resource = dev->resource[i];
189 controller->windows = new_count;
190 controller->window = new_window;
194 * sn_io_slot_fixup() - We are not running with an ACPI capable PROM,
195 * and need to convert the pci_dev->resource
196 * 'start' and 'end' addresses to mapped addresses,
197 * and setup the pci_controller->window array entries.
200 sn_io_slot_fixup(struct pci_dev *dev)
202 unsigned int count = 0;
204 s64 pci_addrs[PCI_ROM_RESOURCE + 1];
205 unsigned long addr, end, size, start;
206 struct pcidev_info *pcidev_info;
207 struct sn_irq_info *sn_irq_info;
210 pcidev_info = kzalloc(sizeof(struct pcidev_info), GFP_KERNEL);
212 panic("%s: Unable to alloc memory for pcidev_info", __FUNCTION__);
214 sn_irq_info = kzalloc(sizeof(struct sn_irq_info), GFP_KERNEL);
216 panic("%s: Unable to alloc memory for sn_irq_info", __FUNCTION__);
218 /* Call to retrieve pci device information needed by kernel. */
219 status = sal_get_pcidev_info((u64) pci_domain_nr(dev),
220 (u64) dev->bus->number,
222 (u64) __pa(pcidev_info),
223 (u64) __pa(sn_irq_info));
226 BUG(); /* Cannot get platform pci device information */
229 /* Copy over PIO Mapped Addresses */
230 for (idx = 0; idx <= PCI_ROM_RESOURCE; idx++) {
232 if (!pcidev_info->pdi_pio_mapped_addr[idx]) {
237 start = dev->resource[idx].start;
238 end = dev->resource[idx].end;
244 pci_addrs[idx] = start;
246 addr = pcidev_info->pdi_pio_mapped_addr[idx];
247 addr = ((addr << 4) >> 4) | __IA64_UNCACHED_OFFSET;
248 dev->resource[idx].start = addr;
249 dev->resource[idx].end = addr + size;
252 * if it's already in the device structure, remove it before
255 if (dev->resource[idx].parent && dev->resource[idx].parent->child)
256 release_resource(&dev->resource[idx]);
258 if (dev->resource[idx].flags & IORESOURCE_IO)
259 insert_resource(&ioport_resource, &dev->resource[idx]);
261 insert_resource(&iomem_resource, &dev->resource[idx]);
262 /* If ROM, mark as shadowed in PROM */
263 if (idx == PCI_ROM_RESOURCE)
264 dev->resource[idx].flags |= IORESOURCE_ROM_BIOS_COPY;
266 /* Create a pci_window in the pci_controller struct for
267 * each device resource.
270 sn_pci_window_fixup(dev, count, pci_addrs);
272 sn_pci_fixup_slot(dev, pcidev_info, sn_irq_info);
275 EXPORT_SYMBOL(sn_io_slot_fixup);
278 * sn_pci_controller_fixup() - This routine sets up a bus's resources
279 * consistent with the Linux PCI abstraction layer.
282 sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus)
285 struct pci_controller *controller;
286 struct pcibus_bussoft *prom_bussoft_ptr;
289 status = sal_get_pcibus_info((u64) segment, (u64) busnum,
290 (u64) ia64_tpa(&prom_bussoft_ptr));
292 return; /*bus # does not exist */
293 prom_bussoft_ptr = __va(prom_bussoft_ptr);
295 controller = kzalloc(sizeof(*controller), GFP_KERNEL);
298 controller->segment = segment;
301 * Temporarily save the prom_bussoft_ptr for use by sn_bus_fixup().
302 * (platform_data will be overwritten later in sn_common_bus_fixup())
304 controller->platform_data = prom_bussoft_ptr;
306 bus = pci_scan_bus(busnum, &pci_root_ops, controller);
308 goto error_return; /* error, or bus already scanned */
310 bus->sysdata = controller;
324 sn_bus_fixup(struct pci_bus *bus)
326 struct pci_dev *pci_dev = NULL;
327 struct pcibus_bussoft *prom_bussoft_ptr;
329 if (!bus->parent) { /* If root bus */
330 prom_bussoft_ptr = PCI_CONTROLLER(bus)->platform_data;
331 if (prom_bussoft_ptr == NULL) {
333 "sn_bus_fixup: 0x%04x:0x%02x Unable to "
334 "obtain prom_bussoft_ptr\n",
335 pci_domain_nr(bus), bus->number);
338 sn_common_bus_fixup(bus, prom_bussoft_ptr);
339 sn_legacy_pci_window_fixup(PCI_CONTROLLER(bus),
340 prom_bussoft_ptr->bs_legacy_io,
341 prom_bussoft_ptr->bs_legacy_mem);
343 list_for_each_entry(pci_dev, &bus->devices, bus_list) {
344 sn_io_slot_fixup(pci_dev);
350 * sn_io_init - PROM does not have ACPI support to define nodes or root buses,
351 * so we need to do things the hard way, including initiating the
352 * bus scanning ourselves.
355 void __init sn_io_init(void)
361 /* busses are not known yet ... */
362 for (i = 0; i <= max_segment_number; i++)
363 for (j = 0; j <= max_pcibus_number; j++)
364 sn_pci_controller_fixup(i, j, NULL);