Pull pnpacpi into acpica branch
[linux-2.6] / arch / ppc / platforms / 4xx / ibm440gx.c
1 /*
2  * arch/ppc/platforms/4xx/ibm440gx.c
3  *
4  * PPC440GX I/O descriptions
5  *
6  * Matt Porter <mporter@mvista.com>
7  * Copyright 2002-2004 MontaVista Software Inc.
8  *
9  * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
10  * Copyright (c) 2003, 2004 Zultys Technologies
11  *
12  * This program is free software; you can redistribute  it and/or modify it
13  * under  the terms of  the GNU General  Public License as published by the
14  * Free Software Foundation;  either version 2 of the  License, or (at your
15  * option) any later version.
16  *
17  */
18 #include <linux/init.h>
19 #include <linux/module.h>
20 #include <platforms/4xx/ibm440gx.h>
21 #include <asm/ocp.h>
22 #include <asm/ppc4xx_pic.h>
23
24 static struct ocp_func_emac_data ibm440gx_emac0_def = {
25         .rgmii_idx      = -1,           /* No RGMII */
26         .rgmii_mux      = -1,           /* No RGMII */
27         .zmii_idx       = 0,            /* ZMII device index */
28         .zmii_mux       = 0,            /* ZMII input of this EMAC */
29         .mal_idx        = 0,            /* MAL device index */
30         .mal_rx_chan    = 0,            /* MAL rx channel number */
31         .mal_tx_chan    = 0,            /* MAL tx channel number */
32         .wol_irq        = 61,           /* WOL interrupt number */
33         .mdio_idx       = -1,           /* No shared MDIO */
34         .tah_idx        = -1,           /* No TAH */
35 };
36
37 static struct ocp_func_emac_data ibm440gx_emac1_def = {
38         .rgmii_idx      = -1,           /* No RGMII */
39         .rgmii_mux      = -1,           /* No RGMII */
40         .zmii_idx       = 0,            /* ZMII device index */
41         .zmii_mux       = 1,            /* ZMII input of this EMAC */
42         .mal_idx        = 0,            /* MAL device index */
43         .mal_rx_chan    = 1,            /* MAL rx channel number */
44         .mal_tx_chan    = 1,            /* MAL tx channel number */
45         .wol_irq        = 63,           /* WOL interrupt number */
46         .mdio_idx       = -1,           /* No shared MDIO */
47         .tah_idx        = -1,           /* No TAH */
48 };
49
50 static struct ocp_func_emac_data ibm440gx_emac2_def = {
51         .rgmii_idx      = 0,            /* RGMII device index */
52         .rgmii_mux      = 0,            /* RGMII input of this EMAC */
53         .zmii_idx       = 0,            /* ZMII device index */
54         .zmii_mux       = 2,            /* ZMII input of this EMAC */
55         .mal_idx        = 0,            /* MAL device index */
56         .mal_rx_chan    = 2,            /* MAL rx channel number */
57         .mal_tx_chan    = 2,            /* MAL tx channel number */
58         .wol_irq        = 65,           /* WOL interrupt number */
59         .mdio_idx       = -1,           /* No shared MDIO */
60         .tah_idx        = 0,            /* TAH device index */
61 };
62
63 static struct ocp_func_emac_data ibm440gx_emac3_def = {
64         .rgmii_idx      = 0,            /* RGMII device index */
65         .rgmii_mux      = 1,            /* RGMII input of this EMAC */
66         .zmii_idx       = 0,            /* ZMII device index */
67         .zmii_mux       = 3,            /* ZMII input of this EMAC */
68         .mal_idx        = 0,            /* MAL device index */
69         .mal_rx_chan    = 3,            /* MAL rx channel number */
70         .mal_tx_chan    = 3,            /* MAL tx channel number */
71         .wol_irq        = 67,           /* WOL interrupt number */
72         .mdio_idx       = -1,           /* No shared MDIO */
73         .tah_idx        = 1,            /* TAH device index */
74 };
75 OCP_SYSFS_EMAC_DATA()
76
77 static struct ocp_func_mal_data ibm440gx_mal0_def = {
78         .num_tx_chans   = 4,            /* Number of TX channels */
79         .num_rx_chans   = 4,            /* Number of RX channels */
80         .txeob_irq      = 10,           /* TX End Of Buffer IRQ  */
81         .rxeob_irq      = 11,           /* RX End Of Buffer IRQ  */
82         .txde_irq       = 33,           /* TX Descriptor Error IRQ */
83         .rxde_irq       = 34,           /* RX Descriptor Error IRQ */
84         .serr_irq       = 32,           /* MAL System Error IRQ    */
85         .dcr_base       = DCRN_MAL_BASE /* MAL0_CFG DCR number */
86 };
87 OCP_SYSFS_MAL_DATA()
88
89 static struct ocp_func_iic_data ibm440gx_iic0_def = {
90         .fast_mode      = 0,            /* Use standad mode (100Khz) */
91 };
92
93 static struct ocp_func_iic_data ibm440gx_iic1_def = {
94         .fast_mode      = 0,            /* Use standad mode (100Khz) */
95 };
96 OCP_SYSFS_IIC_DATA()
97
98 struct ocp_def core_ocp[] = {
99         { .vendor       = OCP_VENDOR_IBM,
100           .function     = OCP_FUNC_OPB,
101           .index        = 0,
102           .paddr        = 0x0000000140000000ULL,
103           .irq          = OCP_IRQ_NA,
104           .pm           = OCP_CPM_NA,
105         },
106         { .vendor       = OCP_VENDOR_IBM,
107           .function     = OCP_FUNC_16550,
108           .index        = 0,
109           .paddr        = PPC440GX_UART0_ADDR,
110           .irq          = UART0_INT,
111           .pm           = IBM_CPM_UART0,
112         },
113         { .vendor       = OCP_VENDOR_IBM,
114           .function     = OCP_FUNC_16550,
115           .index        = 1,
116           .paddr        = PPC440GX_UART1_ADDR,
117           .irq          = UART1_INT,
118           .pm           = IBM_CPM_UART1,
119         },
120         { .vendor       = OCP_VENDOR_IBM,
121           .function     = OCP_FUNC_IIC,
122           .index        = 0,
123           .paddr        = 0x0000000140000400ULL,
124           .irq          = 2,
125           .pm           = IBM_CPM_IIC0,
126           .additions    = &ibm440gx_iic0_def,
127           .show         = &ocp_show_iic_data
128         },
129         { .vendor       = OCP_VENDOR_IBM,
130           .function     = OCP_FUNC_IIC,
131           .index        = 1,
132           .paddr        = 0x0000000140000500ULL,
133           .irq          = 3,
134           .pm           = IBM_CPM_IIC1,
135           .additions    = &ibm440gx_iic1_def,
136           .show         = &ocp_show_iic_data
137         },
138         { .vendor       = OCP_VENDOR_IBM,
139           .function     = OCP_FUNC_GPIO,
140           .index        = 0,
141           .paddr        = 0x0000000140000700ULL,
142           .irq          = OCP_IRQ_NA,
143           .pm           = IBM_CPM_GPIO0,
144         },
145         { .vendor       = OCP_VENDOR_IBM,
146           .function     = OCP_FUNC_MAL,
147           .paddr        = OCP_PADDR_NA,
148           .irq          = OCP_IRQ_NA,
149           .pm           = OCP_CPM_NA,
150           .additions    = &ibm440gx_mal0_def,
151           .show         = &ocp_show_mal_data,
152         },
153         { .vendor       = OCP_VENDOR_IBM,
154           .function     = OCP_FUNC_EMAC,
155           .index        = 0,
156           .paddr        = 0x0000000140000800ULL,
157           .irq          = 60,
158           .pm           = OCP_CPM_NA,
159           .additions    = &ibm440gx_emac0_def,
160           .show         = &ocp_show_emac_data,
161         },
162         { .vendor       = OCP_VENDOR_IBM,
163           .function     = OCP_FUNC_EMAC,
164           .index        = 1,
165           .paddr        = 0x0000000140000900ULL,
166           .irq          = 62,
167           .pm           = OCP_CPM_NA,
168           .additions    = &ibm440gx_emac1_def,
169           .show         = &ocp_show_emac_data,
170         },
171         { .vendor       = OCP_VENDOR_IBM,
172           .function     = OCP_FUNC_EMAC,
173           .index        = 2,
174           .paddr        = 0x0000000140000C00ULL,
175           .irq          = 64,
176           .pm           = OCP_CPM_NA,
177           .additions    = &ibm440gx_emac2_def,
178           .show         = &ocp_show_emac_data,
179         },
180         { .vendor       = OCP_VENDOR_IBM,
181           .function     = OCP_FUNC_EMAC,
182           .index        = 3,
183           .paddr        = 0x0000000140000E00ULL,
184           .irq          = 66,
185           .pm           = OCP_CPM_NA,
186           .additions    = &ibm440gx_emac3_def,
187           .show         = &ocp_show_emac_data,
188         },
189         { .vendor       = OCP_VENDOR_IBM,
190           .function     = OCP_FUNC_RGMII,
191           .paddr        = 0x0000000140000790ULL,
192           .irq          = OCP_IRQ_NA,
193           .pm           = OCP_CPM_NA,
194         },
195         { .vendor       = OCP_VENDOR_IBM,
196           .function     = OCP_FUNC_ZMII,
197           .paddr        = 0x0000000140000780ULL,
198           .irq          = OCP_IRQ_NA,
199           .pm           = OCP_CPM_NA,
200         },
201         { .vendor       = OCP_VENDOR_IBM,
202           .function     = OCP_FUNC_TAH,
203           .index        = 0,
204           .paddr        = 0x0000000140000b50ULL,
205           .irq          = 68,
206           .pm           = OCP_CPM_NA,
207         },
208         { .vendor       = OCP_VENDOR_IBM,
209           .function     = OCP_FUNC_TAH,
210           .index        = 1,
211           .paddr        = 0x0000000140000d50ULL,
212           .irq          = 69,
213           .pm           = OCP_CPM_NA,
214         },
215         { .vendor       = OCP_VENDOR_INVALID
216         }
217 };
218
219 /* Polarity and triggering settings for internal interrupt sources */
220 struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = {
221         { .polarity     = 0xfffffe03,
222           .triggering   = 0x01c00000,
223           .ext_irq_mask = 0x000001fc,   /* IRQ0 - IRQ6 */
224         },
225         { .polarity     = 0xffffc0ff,
226           .triggering   = 0x00ff8000,
227           .ext_irq_mask = 0x00003f00,   /* IRQ7 - IRQ12 */
228         },
229         { .polarity     = 0xffff83ff,
230           .triggering   = 0x000f83c0,
231           .ext_irq_mask = 0x00007c00,   /* IRQ13 - IRQ17 */
232         },
233 };