2 * arch/ppc/platforms/4xx/ibm440sp.c
4 * PPC440SP I/O descriptions
6 * Matt Porter <mporter@kernel.crashing.org>
7 * Copyright 2002-2005 MontaVista Software Inc.
9 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
10 * Copyright (c) 2003, 2004 Zultys Technologies
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
18 #include <linux/init.h>
19 #include <linux/module.h>
20 #include <platforms/4xx/ibm440sp.h>
23 static struct ocp_func_emac_data ibm440sp_emac0_def = {
24 .rgmii_idx = -1, /* No RGMII */
25 .rgmii_mux = -1, /* No RGMII */
26 .zmii_idx = -1, /* No ZMII */
27 .zmii_mux = -1, /* No ZMII */
28 .mal_idx = 0, /* MAL device index */
29 .mal_rx_chan = 0, /* MAL rx channel number */
30 .mal_tx_chan = 0, /* MAL tx channel number */
31 .wol_irq = 61, /* WOL interrupt number */
32 .mdio_idx = -1, /* No shared MDIO */
33 .tah_idx = -1, /* No TAH */
37 static struct ocp_func_mal_data ibm440sp_mal0_def = {
38 .num_tx_chans = 1, /* Number of TX channels */
39 .num_rx_chans = 1, /* Number of RX channels */
40 .txeob_irq = 38, /* TX End Of Buffer IRQ */
41 .rxeob_irq = 39, /* RX End Of Buffer IRQ */
42 .txde_irq = 34, /* TX Descriptor Error IRQ */
43 .rxde_irq = 35, /* RX Descriptor Error IRQ */
44 .serr_irq = 33, /* MAL System Error IRQ */
45 .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */
49 static struct ocp_func_iic_data ibm440sp_iic0_def = {
50 .fast_mode = 0, /* Use standad mode (100Khz) */
53 static struct ocp_func_iic_data ibm440sp_iic1_def = {
54 .fast_mode = 0, /* Use standad mode (100Khz) */
58 struct ocp_def core_ocp[] = {
59 { .vendor = OCP_VENDOR_IBM,
60 .function = OCP_FUNC_OPB,
62 .paddr = 0x0000000140000000ULL,
66 { .vendor = OCP_VENDOR_IBM,
67 .function = OCP_FUNC_16550,
69 .paddr = PPC440SP_UART0_ADDR,
73 { .vendor = OCP_VENDOR_IBM,
74 .function = OCP_FUNC_16550,
76 .paddr = PPC440SP_UART1_ADDR,
80 { .vendor = OCP_VENDOR_IBM,
81 .function = OCP_FUNC_16550,
83 .paddr = PPC440SP_UART2_ADDR,
87 { .vendor = OCP_VENDOR_IBM,
88 .function = OCP_FUNC_IIC,
90 .paddr = 0x00000001f0000400ULL,
93 .additions = &ibm440sp_iic0_def,
94 .show = &ocp_show_iic_data
96 { .vendor = OCP_VENDOR_IBM,
97 .function = OCP_FUNC_IIC,
99 .paddr = 0x00000001f0000500ULL,
102 .additions = &ibm440sp_iic1_def,
103 .show = &ocp_show_iic_data
105 { .vendor = OCP_VENDOR_IBM,
106 .function = OCP_FUNC_GPIO,
108 .paddr = 0x00000001f0000700ULL,
112 { .vendor = OCP_VENDOR_IBM,
113 .function = OCP_FUNC_MAL,
114 .paddr = OCP_PADDR_NA,
117 .additions = &ibm440sp_mal0_def,
118 .show = &ocp_show_mal_data,
120 { .vendor = OCP_VENDOR_IBM,
121 .function = OCP_FUNC_EMAC,
123 .paddr = 0x00000001f0000800ULL,
126 .additions = &ibm440sp_emac0_def,
127 .show = &ocp_show_emac_data,
129 { .vendor = OCP_VENDOR_INVALID