git.oblomov.eu Git - linux-2.6/blob - arch/powerpc/boot/dts/mpc8272ads.dts

   1 /*
   2  * MPC8272 ADS Device Tree Source
   3  *
   4  * Copyright 2005,2008 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         model = "MPC8272ADS";
  16         compatible = "fsl,mpc8272ads";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         cpus {
  21                 #address-cells = <1>;
  22                 #size-cells = <0>;
  23
  24                 PowerPC,8272@0 {
  25                         device_type = "cpu";
  26                         reg = <0x0>;
  27                         d-cache-line-size = <32>;
  28                         i-cache-line-size = <32>;
  29                         d-cache-size = <16384>;
  30                         i-cache-size = <16384>;
  31                         timebase-frequency = <0>;
  32                         bus-frequency = <0>;
  33                         clock-frequency = <0>;
  34                 };
  35         };
  36
  37         memory {
  38                 device_type = "memory";
  39                 reg = <0x0 0x0>;
  40         };
  41
  42         localbus@f0010100 {
  43                 compatible = "fsl,mpc8272-localbus",
  44                              "fsl,pq2-localbus";
  45                 #address-cells = <2>;
  46                 #size-cells = <1>;
  47                 reg = <0xf0010100 0x40>;
  48
  49                 ranges = <0x0 0x0 0xfe000000 0x2000000
  50                           0x1 0x0 0xf4500000 0x8000
  51                           0x3 0x0 0xf8200000 0x8000>;
  52
  53                 flash@0,0 {
  54                         compatible = "jedec-flash";
  55                         reg = <0x0 0x0 0x2000000>;
  56                         bank-width = <4>;
  57                         device-width = <1>;
  58                 };
  59
  60                 board-control@1,0 {
  61                         reg = <0x1 0x0 0x20>;
  62                         compatible = "fsl,mpc8272ads-bcsr";
  63                 };
  64
  65                 PCI_PIC: interrupt-controller@3,0 {
  66                         compatible = "fsl,mpc8272ads-pci-pic",
  67                                      "fsl,pq2ads-pci-pic";
  68                         #interrupt-cells = <1>;
  69                         interrupt-controller;
  70                         reg = <0x3 0x0 0x8>;
  71                         interrupt-parent = <&PIC>;
  72                         interrupts = <20 8>;
  73                 };
  74         };
  75
  76
  77         pci@f0010800 {
  78                 device_type = "pci";
  79                 reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
  80                 compatible = "fsl,mpc8272-pci", "fsl,pq2-pci";
  81                 #interrupt-cells = <1>;
  82                 #size-cells = <2>;
  83                 #address-cells = <3>;
  84                 clock-frequency = <66666666>;
  85                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  86                 interrupt-map = <
  87                                  /* IDSEL 0x16 */
  88                                  0xb000 0x0 0x0 0x1 &PCI_PIC 0
  89                                  0xb000 0x0 0x0 0x2 &PCI_PIC 1
  90                                  0xb000 0x0 0x0 0x3 &PCI_PIC 2
  91                                  0xb000 0x0 0x0 0x4 &PCI_PIC 3
  92
  93                                  /* IDSEL 0x17 */
  94                                  0xb800 0x0 0x0 0x1 &PCI_PIC 4
  95                                  0xb800 0x0 0x0 0x2 &PCI_PIC 5
  96                                  0xb800 0x0 0x0 0x3 &PCI_PIC 6
  97                                  0xb800 0x0 0x0 0x4 &PCI_PIC 7
  98
  99                                  /* IDSEL 0x18 */
 100                                  0xc000 0x0 0x0 0x1 &PCI_PIC 8
 101                                  0xc000 0x0 0x0 0x2 &PCI_PIC 9
 102                                  0xc000 0x0 0x0 0x3 &PCI_PIC 10
 103                                  0xc000 0x0 0x0 0x4 &PCI_PIC 11>;
 104
 105                 interrupt-parent = <&PIC>;
 106                 interrupts = <18 8>;
 107                 ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
 108                           0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
 109                           0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>;
 110         };
 111
 112         soc@f0000000 {
 113                 #address-cells = <1>;
 114                 #size-cells = <1>;
 115                 device_type = "soc";
 116                 compatible = "fsl,mpc8272", "fsl,pq2-soc";
 117                 ranges = <0x0 0xf0000000 0x53000>;
 118
 119                 // Temporary -- will go away once kernel uses ranges for get_immrbase().
 120                 reg = <0xf0000000 0x53000>;
 121
 122                 cpm@119c0 {
 123                         #address-cells = <1>;
 124                         #size-cells = <1>;
 125                         compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
 126                         reg = <0x119c0 0x30>;
 127                         ranges;
 128
 129                         muram@0 {
 130                                 #address-cells = <1>;
 131                                 #size-cells = <1>;
 132                                 ranges = <0x0 0x0 0x10000>;
 133
 134                                 data@0 {
 135                                         compatible = "fsl,cpm-muram-data";
 136                                         reg = <0x0 0x2000 0x9800 0x800>;
 137                                 };
 138                         };
 139
 140                         brg@119f0 {
 141                                 compatible = "fsl,mpc8272-brg",
 142                                              "fsl,cpm2-brg",
 143                                              "fsl,cpm-brg";
 144                                 reg = <0x119f0 0x10 0x115f0 0x10>;
 145                         };
 146
 147                         serial@11a00 {
 148                                 device_type = "serial";
 149                                 compatible = "fsl,mpc8272-scc-uart",
 150                                              "fsl,cpm2-scc-uart";
 151                                 reg = <0x11a00 0x20 0x8000 0x100>;
 152                                 interrupts = <40 8>;
 153                                 interrupt-parent = <&PIC>;
 154                                 fsl,cpm-brg = <1>;
 155                                 fsl,cpm-command = <0x800000>;
 156                         };
 157
 158                         serial@11a60 {
 159                                 device_type = "serial";
 160                                 compatible = "fsl,mpc8272-scc-uart",
 161                                              "fsl,cpm2-scc-uart";
 162                                 reg = <0x11a60 0x20 0x8300 0x100>;
 163                                 interrupts = <43 8>;
 164                                 interrupt-parent = <&PIC>;
 165                                 fsl,cpm-brg = <4>;
 166                                 fsl,cpm-command = <0xce00000>;
 167                         };
 168
 169                         mdio@10d40 {
 170                                 device_type = "mdio";
 171                                 compatible = "fsl,mpc8272ads-mdio-bitbang",
 172                                              "fsl,mpc8272-mdio-bitbang",
 173                                              "fsl,cpm2-mdio-bitbang";
 174                                 reg = <0x10d40 0x14>;
 175                                 #address-cells = <1>;
 176                                 #size-cells = <0>;
 177                                 fsl,mdio-pin = <18>;
 178                                 fsl,mdc-pin = <19>;
 179
 180                                 PHY0: ethernet-phy@0 {
 181                                         interrupt-parent = <&PIC>;
 182                                         interrupts = <23 8>;
 183                                         reg = <0x0>;
 184                                         device_type = "ethernet-phy";
 185                                 };
 186
 187                                 PHY1: ethernet-phy@1 {
 188                                         interrupt-parent = <&PIC>;
 189                                         interrupts = <23 8>;
 190                                         reg = <0x3>;
 191                                         device_type = "ethernet-phy";
 192                                 };
 193                         };
 194
 195                         ethernet@11300 {
 196                                 device_type = "network";
 197                                 compatible = "fsl,mpc8272-fcc-enet",
 198                                              "fsl,cpm2-fcc-enet";
 199                                 reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>;
 200                                 local-mac-address = [ 00 00 00 00 00 00 ];
 201                                 interrupts = <32 8>;
 202                                 interrupt-parent = <&PIC>;
 203                                 phy-handle = <&PHY0>;
 204                                 linux,network-index = <0>;
 205                                 fsl,cpm-command = <0x12000300>;
 206                         };
 207
 208                         ethernet@11320 {
 209                                 device_type = "network";
 210                                 compatible = "fsl,mpc8272-fcc-enet",
 211                                              "fsl,cpm2-fcc-enet";
 212                                 reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
 213                                 local-mac-address = [ 00 00 00 00 00 00 ];
 214                                 interrupts = <33 8>;
 215                                 interrupt-parent = <&PIC>;
 216                                 phy-handle = <&PHY1>;
 217                                 linux,network-index = <1>;
 218                                 fsl,cpm-command = <0x16200300>;
 219                         };
 220                 };
 221
 222                 PIC: interrupt-controller@10c00 {
 223                         #interrupt-cells = <2>;
 224                         interrupt-controller;
 225                         reg = <0x10c00 0x80>;
 226                         compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic";
 227                 };
 228
 229 /* May need to remove if on a part without crypto engine */
 230                 crypto@30000 {
 231                         device_type = "crypto";
 232                         model = "SEC2";
 233                         compatible = "fsl,mpc8272-talitos-sec2",
 234                                      "fsl,talitos-sec2",
 235                                      "fsl,talitos",
 236                                      "talitos";
 237                         reg = <0x30000 0x10000>;
 238                         interrupts = <11 8>;
 239                         interrupt-parent = <&PIC>;
 240                         num-channels = <4>;
 241                         channel-fifo-len = <24>;
 242                         exec-units-mask = <0x7e>;
 243 /* desc mask is for rev1.x, we need runtime fixup for >=2.x */
 244                         descriptor-types-mask = <0x1010ebf>;
 245                 };
 246         };
 247
 248         chosen {
 249                 linux,stdout-path = "/soc/cpm/serial@11a00";
 250         };
 251 };