[PATCH] send_IPI_mask_sequence() warning fix
[linux-2.6] / include / asm-ia64 / mca.h
1 /*
2  * File:        mca.h
3  * Purpose:     Machine check handling specific defines
4  *
5  * Copyright (C) 1999, 2004 Silicon Graphics, Inc.
6  * Copyright (C) Vijay Chander (vijay@engr.sgi.com)
7  * Copyright (C) Srinivasa Thirumalachar (sprasad@engr.sgi.com)
8  * Copyright (C) Russ Anderson (rja@sgi.com)
9  */
10
11 #ifndef _ASM_IA64_MCA_H
12 #define _ASM_IA64_MCA_H
13
14 #define IA64_MCA_STACK_SIZE     8192
15
16 #if !defined(__ASSEMBLY__)
17
18 #include <linux/interrupt.h>
19 #include <linux/types.h>
20
21 #include <asm/param.h>
22 #include <asm/sal.h>
23 #include <asm/processor.h>
24 #include <asm/mca_asm.h>
25
26 #define IA64_MCA_RENDEZ_TIMEOUT         (20 * 1000)     /* value in milliseconds - 20 seconds */
27
28 typedef struct ia64_fptr {
29         unsigned long fp;
30         unsigned long gp;
31 } ia64_fptr_t;
32
33 typedef union cmcv_reg_u {
34         u64     cmcv_regval;
35         struct  {
36                 u64     cmcr_vector             : 8;
37                 u64     cmcr_reserved1          : 4;
38                 u64     cmcr_ignored1           : 1;
39                 u64     cmcr_reserved2          : 3;
40                 u64     cmcr_mask               : 1;
41                 u64     cmcr_ignored2           : 47;
42         } cmcv_reg_s;
43
44 } cmcv_reg_t;
45
46 #define cmcv_mask               cmcv_reg_s.cmcr_mask
47 #define cmcv_vector             cmcv_reg_s.cmcr_vector
48
49 enum {
50         IA64_MCA_RENDEZ_CHECKIN_NOTDONE =       0x0,
51         IA64_MCA_RENDEZ_CHECKIN_DONE    =       0x1
52 };
53
54 /* Information maintained by the MC infrastructure */
55 typedef struct ia64_mc_info_s {
56         u64             imi_mca_handler;
57         size_t          imi_mca_handler_size;
58         u64             imi_monarch_init_handler;
59         size_t          imi_monarch_init_handler_size;
60         u64             imi_slave_init_handler;
61         size_t          imi_slave_init_handler_size;
62         u8              imi_rendez_checkin[NR_CPUS];
63
64 } ia64_mc_info_t;
65
66 typedef struct ia64_mca_sal_to_os_state_s {
67         u64             imsto_os_gp;            /* GP of the os registered with the SAL */
68         u64             imsto_pal_proc;         /* PAL_PROC entry point - physical addr */
69         u64             imsto_sal_proc;         /* SAL_PROC entry point - physical addr */
70         u64             imsto_sal_gp;           /* GP of the SAL - physical */
71         u64             imsto_rendez_state;     /* Rendez state information */
72         u64             imsto_sal_check_ra;     /* Return address in SAL_CHECK while going
73                                                  * back to SAL from OS after MCA handling.
74                                                  */
75         u64             pal_min_state;          /* from PAL in r17 */
76         u64             proc_state_param;       /* from PAL in r18. See SDV 2:268 11.3.2.1 */
77 } ia64_mca_sal_to_os_state_t;
78
79 enum {
80         IA64_MCA_CORRECTED      =       0x0,    /* Error has been corrected by OS_MCA */
81         IA64_MCA_WARM_BOOT      =       -1,     /* Warm boot of the system need from SAL */
82         IA64_MCA_COLD_BOOT      =       -2,     /* Cold boot of the system need from SAL */
83         IA64_MCA_HALT           =       -3      /* System to be halted by SAL */
84 };
85
86 enum {
87         IA64_MCA_SAME_CONTEXT   =       0x0,    /* SAL to return to same context */
88         IA64_MCA_NEW_CONTEXT    =       -1      /* SAL to return to new context */
89 };
90
91 typedef struct ia64_mca_os_to_sal_state_s {
92         u64             imots_os_status;        /*   OS status to SAL as to what happened
93                                                  *   with the MCA handling.
94                                                  */
95         u64             imots_sal_gp;           /* GP of the SAL - physical */
96         u64             imots_context;          /* 0 if return to same context
97                                                    1 if return to new context */
98         u64             *imots_new_min_state;   /* Pointer to structure containing
99                                                  * new values of registers in the min state
100                                                  * save area.
101                                                  */
102         u64             imots_sal_check_ra;     /* Return address in SAL_CHECK while going
103                                                  * back to SAL from OS after MCA handling.
104                                                  */
105 } ia64_mca_os_to_sal_state_t;
106
107 /* Per-CPU MCA state that is too big for normal per-CPU variables.  */
108
109 struct ia64_mca_cpu {
110         u64 stack[IA64_MCA_STACK_SIZE/8];       /* MCA memory-stack */
111         u64 proc_state_dump[512];
112         u64 stackframe[32];
113         u64 rbstore[IA64_MCA_STACK_SIZE/8];     /* MCA reg.-backing store */
114         u64 init_stack[KERNEL_STACK_SIZE/8];
115 } __attribute__ ((aligned(16)));
116
117 /* Array of physical addresses of each CPU's MCA area.  */
118 extern unsigned long __per_cpu_mca[NR_CPUS];
119
120 extern void ia64_mca_init(void);
121 extern void ia64_mca_cpu_init(void *);
122 extern void ia64_os_mca_dispatch(void);
123 extern void ia64_os_mca_dispatch_end(void);
124 extern void ia64_mca_ucmc_handler(void);
125 extern void ia64_monarch_init_handler(void);
126 extern void ia64_slave_init_handler(void);
127 extern void ia64_mca_cmc_vector_setup(void);
128 extern int  ia64_reg_MCA_extension(void*);
129 extern void ia64_unreg_MCA_extension(void);
130
131 #endif /* !__ASSEMBLY__ */
132 #endif /* _ASM_IA64_MCA_H */